Jump to content

Zero, dev kernel and CPU cores


olekvi

Recommended Posts

Hello

 

I received my first OrangePi today, a Zero, and I'm a bit lost.  

 

Installed armbian xenial, upgraded to beta/dev and installed dev kernel as documented.  (working!)

 

But after this upgrade only one CPU core is in use. I've searched, and think my problem may be uboot, can anyone point me in the right direction?  (is there a working 4.x kernel with quadcore support?)

 

Thanks!

 

Info:

olekvi@orangepizero:~$ uname -a
Linux orangepizero 4.9.0-sun8i #16 SMP Fri Jan 6 05:03:52 CET 2017 armv7l armv7l armv7l GNU/Linux


olekvi@orangepizero:~$ cat /proc/cpuinfo
processor       : 0
model name      : ARMv7 Processor rev 5 (v7l)
BogoMIPS        : 48.00
[..]


olekvi@orangepizero:~$ dpkg -l linux-u-boot-orangepizero-dev
[..]
ii  linux-u-boot-orangepizero-dev                    5.24.170107 
Link to comment
Share on other sites

Hello!

 

I have exactly the same issue on a different setup:

Orange PI+ 2e on Armbian Debian Jessie.

 

I need to switch to a more recent kernel because of docker.

May there be a solution as well for Jessie?

 

Thanks in advance!

Link to comment
Share on other sites

That leads to the issue, that only 1 CPU is online:

root@host:/sys/devices/system/cpu# cat online
0

root@host:/sys/devices/system/cpu# cat offline
1-3

root@host:~# uname -r
4.10.3-sun8i

root@host:~# cat /proc/cpuinfo 
processor       : 0
model name      : ARMv7 Processor rev 5 (v7l)
BogoMIPS        : 22.85
Features        : half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt vfpd32 lpae evtstrm 
CPU implementer : 0x41
CPU architecture: 7
CPU variant     : 0x0
CPU part        : 0xc07
CPU revision    : 5

Hardware        : Allwinner sun8i Family
Revision        : 0000
Serial          : 02c00081090904b5

root@host:~# dmesg | fgrep CPU
[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), cr=50c5387d
[    0.000000] CPU: div instructions available: patching division code
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[    0.002023] CPU: Testing write buffer coherency: ok
[    0.002366] CPU0: update cpu_capacity 1024
[    0.002389] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[    0.003476] smp: Bringing up secondary CPUs ...
[    0.004621] smp: Brought up 1 node, 1 CPU
[    0.004667] CPU: All CPU(s) started in SVC mode.
[    5.105898] ledtrig-cpu: registered to indicate activity on CPUs

root@host:~# lscpu
Architecture:          armv7l
Byte Order:            Little Endian
CPU(s):                4
On-line CPU(s) list:   0
Off-line CPU(s) list:  1-3
Thread(s) per core:    1
Core(s) per socket:    1
Socket(s):             1
Model name:            ARMv7 Processor rev 5 (v7l)
CPU max MHz:           1368.0000
CPU min MHz:           120.0000

 

Link to comment
Share on other sites

Guest
This topic is now closed to further replies.
×
×
  • Create New...

Important Information

Terms of Use - Privacy Policy - Guidelines