martinayotte

That is a possibility ...

What is the output provided by the command "cat /sys/kernel/debug/gpio" ?

I2C standard clock are usually 100KHz or 400KHz, but you can try other values. Here is the doc, the parameter is "clock-frequency" : https://www.kernel.org/doc/Documentation/devicetree/bindings/i2c/i2c-designware.txt

OPiZeroPlus2 is using H5 SoC, not H3 ...

This looks like Android partitioning ...

Download this UserGuide : http://dl.linux-sunxi.org/A20/A20 User Manual 2013-03-22.pdf Read the LRADC chapter starting at page 192. You will see the description of the ControlRegister at page 193-194. You need your /dev/mem to be "O_RDWR", not "R+" to allow writing into ControlRegister.

Right, but don't forget to initialize Control Register first by setting Continuous Rate and Continuous Mode...

I can do sporadic testing ...

Like the message says, you need to use "-p" : patch -p 1 < 0001-fbtft-fb_ili9488.patch

PWM is always disabled by default in DT. You will need to decompile DTB into DTS, edit the DTS to place ' status = "okay"; ' in the PWM node, and recompile DTS into DTB ...

Overlays on R40 is a bit different than the ones on H3 ... I've done tests on my BPiM2U using proper overlay which is "spi-spidev0" (not "spi-spidev") , without any needs for "param_spidev_spi_bus", and /dev/spidev0.0 appeared properly.

Nope ! All my H6 (OPi3/OPiLite2/OPiOne+) are now on 5.9.y (after a month on 5.8.y), and none have frozen ... But none of them been "upgraded", I'm always do "fresh" install.

Overlays on meson64 are tough and not well supported in Armbian. Even different Amlogic SoCs pinctrl are not compatible between them. I've took a quick look at my OdroidN2, and it seems that GPIOX_7 is pin 72. So, I've created a quick overlay source provided below, although I didn't attached any DS18B20, it seems to work : /dts-v1/; / { compatible = "amlogic,meson-gxbb"; fragment@0 { target-path = [ 2f 00 ]; __overlay__ { onewire@0 { compatible = "w1-gpio"; pinctrl-names = "default"; gpios = < 0xffffffff 0x48 0x06 >; status = "okay"; phandle = < 0x01 >; }; }; }; __symbols__ { w1 = "/fragment@0/__overlay__/onewire@0"; }; __fixups__ { gpio = "/fragment@0/__overlay__/onewire@0:gpios:0"; }; }; Executing the command "cat /sys/kernel/debug/gpio" provided me the following output, and as we can see the w1 bus appeared : gpiochip1: GPIOs 412-426, parent: platform/ff800000.sys-ctrl:pinctrl@14, aobus-banks: gpio-420 ( |regulator-tflash_vdd) out hi gpio-421 ( |TF_IO ) out lo gpio-423 ( |n2:blue ) out lo gpiochip0: GPIOs 427-511, parent: platform/ff634400.bus:pinctrl@40, periphs-banks: gpio-442 ( |PHY reset ) out hi ACTIVE LOW gpio-447 ( |usb-hub-reset ) in hi gpio-448 ( |regulator-hub_5v ) out hi gpio-449 ( |regulator-usb_pwr_en) out lo gpio-464 ( |reset ) out hi ACTIVE LOW gpio-474 ( |cd ) in hi ACTIVE LOW gpio-499 ( |onewire@0 ) out hi Hoping this helped ...

A simple MOSFET, such AO3402, should do the job ...

Good ! Thanks !

Ah ! Ok ! So, we can trim my WiFi patches to keep only parts relevant to other drivers not provided by jwrdegoede ...

Those 2 patches worked fine 2 days ago for my 5.9.y builds (and also a month ago in 5.8.y) ... Is there something that changed since then ?

I don't have any objections to merge those subforums ...

My Allwinner garden tour using 5.9.y is almost finished ! Only 2 board models left ...

Those are only the pins. If there isn't something like "spdif@1c21000" node (this one is on H3 SoC), then there is nothing enabled ...

You need to decompile DTB into DTS, edit the DTS to change ' status = "okay"; ' of the spdif-out to ' status = "disabled"; ', and then recompile DTS into DTB.

Which ones ?

I think it should be good to switch to u-boot v2020.07, at least for DEV, I've done that since few weeks locally and didn't got any issues ...

Ok ! I will do some 5.9 builds for few of my Allwinner garden members ...