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jstefanop

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    jstefanop got a reaction from desperex in Orange Pi 4 PCIe Link Speed?   
    stock kernel works, issue is with orange pi 4 has badly designed FPC connector for PCIE lanes. They didn't group the diff pairs so transmission over FPC cable sucks. We had to make a flex ribbon board to correct this and route as diff pairs so Gen 2 2x works great. Might make some extra and release the board if there is enough interest. 

  2. Like
    jstefanop got a reaction from joaofl in Orange Pi 4 PCIe Link Speed?   
    stock kernel works, issue is with orange pi 4 has badly designed FPC connector for PCIE lanes. They didn't group the diff pairs so transmission over FPC cable sucks. We had to make a flex ribbon board to correct this and route as diff pairs so Gen 2 2x works great. Might make some extra and release the board if there is enough interest. 

  3. Like
    jstefanop got a reaction from lanefu in [Invalid] - OrangePi 4 UART on Pins 8, 10?   
    After wasting way to much time on this finally figured it out...in case anyone NEEDs UART on Pin 8,10 (UART2B) this is how you do it
     
    Go to amrbian config and edit .dts file
     
    disable i2c3 port (shares same pins as UART2B) ...change status to "disabled" in i2c@ff130000
    hijack uart2 address to point to UART2B pins instead of UART2C (the debug pins)....change phandle-0 in serial@ff1a0000 to 0x143
     
    now this is all you technically need to do, but this is tied to ttyS2 which is also the serial console output which is configured i believe at the kernel level (if anyone know how to disable let me know), so we need to swap ttyS2 to another interface to voice this
     
    so i just changed serial@ff1a0000 to point to ttyS1 by doing below
    swap serial1 ->serial2
    swap uart1 -> uart2
     
    If anyone has an elegant way to do all of the above with a nice dts overlay lmk, have no idea how overlay syntax works. 
     
    BTW also tried directly hijacking serial1 and serial 3 which are disabled (by changing phandle-0), but it only works in serial@ff1a0000...i guess all UART2 ports (UART2a,b,c) are tied to this address. 
  4. Like
    jstefanop got a reaction from Werner in Orange Pi 4 PCIe Link Speed?   
    stock kernel works, issue is with orange pi 4 has badly designed FPC connector for PCIE lanes. They didn't group the diff pairs so transmission over FPC cable sucks. We had to make a flex ribbon board to correct this and route as diff pairs so Gen 2 2x works great. Might make some extra and release the board if there is enough interest. 

  5. Like
    jstefanop got a reaction from lanefu in I needed a little more RAM :D   
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