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Change U-Boot UART on OrangePi Zero


yoq

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I'm trying to recompile U-Boot to move the serial console on my OP Zero from uart0 to uart2. I didn't have any trouble to move the linux console, but I'm struggling with U-Boot.

I tried creating a patch to change stdout-path in the device tree: https://github.com/u-boot/u-boot/blob/master/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts#L65

ff --git a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
index d166ffc..0e2e48d 100644
--- a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -55,7 +55,7 @@
 	compatible = "xunlong,orangepi-zero", "allwinner,sun8i-h2-plus";
 
 	aliases {
-		serial0 = &uart0;
+		serial0 = &uart2;
 		/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
 		ethernet0 = &emac;
 		ethernet1 = &xr819;
@@ -178,7 +178,7 @@
 &uart2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart2_pins>;
-	status = "disabled";
+	status = "okay";
 };
 
 &usb_otg {

I doesn't seem to make a difference if change the alias or stdout-path directly - with the changed tree I get this output on uart0:

U-Boot SPL 2019.04-armbian (Aug 16 2019 - 23:13:41 +0200)
DRAM: 512 MiB
Trying to boot from MMC1

And then it just freezes, with no output on uart2 at all.
Does anyone have an idea where else I should look?

Edited by yoq
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Thanks, this turned out to be much more involved than I expected.

To save the next person some time, here's what it took:
Activate the uart(s) and change stdout-path in the device tree, then add CONFIG_CONS_INDEX=3 (starts from 1) in configs/orangepi_zero_defconfig:

diff --git a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
index d166ffc0..abcc1874 100644
--- a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -56,13 +56,15 @@
 
 	aliases {
 		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
 		/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
 		ethernet0 = &emac;
 		ethernet1 = &xr819;
 	};
 
 	chosen {
-		stdout-path = "serial0:115200n8";
+		stdout-path = "serial2:115200n8";
 	};
 
 	leds {
@@ -172,13 +174,13 @@
 &uart1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart1_pins>;
-	status = "disabled";
+	status = "okay";
 };
 
 &uart2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart2_pins>;
-	status = "disabled";
+	status = "okay";
 };
 
 &usb_otg {
diff --git a/configs/orangepi_zero_defconfig b/configs/orangepi_zero_defconfig
index ef0c6884..956f6a28 100644
--- a/configs/orangepi_zero_defconfig
+++ b/configs/orangepi_zero_defconfig
@@ -17,3 +17,4 @@ CONFIG_SUN8I_EMAC=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_OHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
+CONFIG_CONS_INDEX=3
\ No newline at end of file


But CONFIG_CONS_INDEX is currently missing the pinmux code for uart1/uart2 in u-boot, so this also needs to be patched:

diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
index 40a3f845..e6048983 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -148,6 +148,7 @@ enum sunxi_gpio_number {
 #define SUN6I_GPA_SDC2		5
 #define SUN6I_GPA_SDC3		4
 #define SUN8I_H3_GPA_UART0	2
+#define SUN8I_H3_GPA_UART2	2
 
 #define SUN4I_GPB_PWM		2
 #define SUN4I_GPB_TWI0		2
@@ -188,6 +189,7 @@ enum sunxi_gpio_number {
 #define SUN8I_GPG_SDC1		2
 #define SUN6I_GPG_TWI3		2
 #define SUN5I_GPG_UART1		4
+#define SUN8I_H3_GPG_UART1	2
 
 #define SUN6I_GPH_PWM		2
 #define SUN8I_GPH_PWM		2
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index effbd032..e022bee4 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -133,10 +133,18 @@ static int gpio_init(void)
 	sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1);
 	sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1);
 	sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP);
-#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
+#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUNXI_H3_H5)
+	sunxi_gpio_set_cfgpin(SUNXI_GPG(6), SUN8I_H3_GPG_UART1);
+	sunxi_gpio_set_cfgpin(SUNXI_GPG(7), SUN8I_H3_GPG_UART1);
+	sunxi_gpio_set_pull(SUNXI_GPG(7), SUNXI_GPIO_PULL_UP);
+#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) && !defined(CONFIG_MACH_SUNXI_H3_H5)
 	sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_GPB_UART2);
 	sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_GPB_UART2);
 	sunxi_gpio_set_pull(SUNXI_GPB(1), SUNXI_GPIO_PULL_UP);
+#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUNXI_H3_H5)
+	sunxi_gpio_set_cfgpin(SUNXI_GPA(0), SUN8I_H3_GPA_UART2);
+	sunxi_gpio_set_cfgpin(SUNXI_GPA(1), SUN8I_H3_GPA_UART2);
+	sunxi_gpio_set_pull(SUNXI_GPA(1), SUNXI_GPIO_PULL_UP);
 #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
 	sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL_R_UART);
 	sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL_R_UART);
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 47ea1243..46866c5d 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -255,7 +255,7 @@ extern int soft_i2c_gpio_scl;
 #else
 #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28000:115200"
 #endif
-#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
+#elif CONFIG_CONS_INDEX == 2 && (defined(CONFIG_MACH_SUN5I) || defined(CONFIG_MACH_SUN8I))
 #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28400:115200"
 #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
 #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28800:115200"


This will make U-Boot output to uart1/uart2, but the Linux kernel has a low level debug output (e.g. to write "uncompressing kernel...") which writes to uart0 and simply freezes if it hasn't been initialized by U-Boot. So you'll need to compile a custom kernel with (Kernel Hacking -> Low Level debug functions) turned off.
Then the linux console can be moved the normal way, using a boot param: e.g. console=ttyS2,115200

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Hello

 

I tried this working for uart2. Works perfectly(I worked on Orange Pi zero and Olinuxino-A64 board). When I tried same working for uart4 for Olinuxino-A64 board but I did't achieve.

 

I opened uart4 from dts file:

 

diff -ruN uboot-2020.04_original/arch/arm/dts/sun50i-a64-olinuxino.dts uboot-2020.04_uart4/arch/arm/dts/sun50i-a64-olinuxino.dts
--- uboot-2020.04_original/arch/arm/dts/sun50i-a64-olinuxino.dts	2020-06-05 08:59:24.341767776 +0300
+++ uboot-2020.04_uart4/arch/arm/dts/sun50i-a64-olinuxino.dts	2020-06-05 09:07:52.377518517 +0300
@@ -53,10 +53,11 @@
 	aliases {
 		ethernet0 = &emac;
 		serial0 = &uart0;
+		serial4 = &uart4;
 	};
 
 	chosen {
-		stdout-path = "serial0:115200n8";
+		stdout-path = "serial4:115200n8";
 	};
 
 	hdmi-connector {
@@ -305,6 +306,12 @@
 	status = "okay";
 };
 
+&uart4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart4_pins>;
+	status = "okay";
+};
+
 &usb_otg {
 	dr_mode = "otg";
 	status = "okay";

 

I added uart4 pins(PD2->Tx  and PD3-> Rx) and set pinmux(Function 3 is uart mode for this pins in A64-datasheet). I set CONS_INDEX.

diff -ruN uboot-2020.04_original/arch/arm/include/asm/arch-sunxi/gpio.h uboot-2020.04_uart4/arch/arm/include/asm/arch-sunxi/gpio.h
--- uboot-2020.04_original/arch/arm/include/asm/arch-sunxi/gpio.h	2020-06-05 08:59:24.365768023 +0300
+++ uboot-2020.04_uart4/arch/arm/include/asm/arch-sunxi/gpio.h	2020-06-05 09:07:52.545511506 +0300
@@ -165,6 +165,7 @@
 #define SUN8I_A83T_GPB_UART0	2
 #define SUN8I_V3S_GPB_UART0	3
 #define SUN50I_GPB_UART0	4
+#define SUN50I_GPD_UART4	3
 
 #define SUNXI_GPC_NAND		2
 #define SUNXI_GPC_SPI0		3
diff -ruN uboot-2020.04_original/arch/arm/mach-sunxi/board.c uboot-2020.04_uart4/arch/arm/mach-sunxi/board.c
--- uboot-2020.04_original/arch/arm/mach-sunxi/board.c	2020-06-05 08:59:24.389768269 +0300
+++ uboot-2020.04_uart4/arch/arm/mach-sunxi/board.c	2020-06-05 09:07:52.733503660 +0300
@@ -133,10 +133,10 @@
 	sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_GPB_UART2);
 	sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_GPB_UART2);
 	sunxi_gpio_set_pull(SUNXI_GPB(1), SUNXI_GPIO_PULL_UP);
-#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
-	sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL_R_UART);
-	sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL_R_UART);
-	sunxi_gpio_set_pull(SUNXI_GPL(3), SUNXI_GPIO_PULL_UP);
+#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN50I)
+	sunxi_gpio_set_cfgpin(SUNXI_GPD(2), SUN50I_GPD_UART4);
+	sunxi_gpio_set_cfgpin(SUNXI_GPD(3), SUN50I_GPD_UART4);
+	sunxi_gpio_set_pull(SUNXI_GPD(3), SUNXI_GPIO_PULL_UP);
 #else
 #error Unsupported console port number. Please fix pin mux settings in board.c
 #endif
   diff -ruN uboot-2020.04_original/configs/a64-olinuxino_defconfig uboot-2020.04_uart4/configs/a64-olinuxino_defconfig
--- uboot-2020.04_original/configs/a64-olinuxino_defconfig	2020-06-05 08:59:24.545769870 +0300
+++ uboot-2020.04_uart4/configs/a64-olinuxino_defconfig	2020-06-05 09:07:53.789459652 +0300
@@ -9,3 +9,4 @@
 CONFIG_SUN8I_EMAC=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_OHCI_HCD=y
+CONFIG_CONS_INDEX=5
\ No newline at end of file

 

Finally configure uart4 base address for CONS_INDEX

diff -ruN uboot-2020.04_original/include/configs/sunxi-common.h uboot-2020.04_uart4/include/configs/sunxi-common.h
--- uboot-2020.04_original/include/configs/sunxi-common.h	2020-06-05 08:59:24.661771061 +0300
+++ uboot-2020.04_uart4/include/configs/sunxi-common.h	2020-06-05 09:07:55.001409242 +0300
@@ -246,8 +246,8 @@
 #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28400:115200"
 #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
 #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28800:115200"
-#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
-#define OF_STDOUT_PATH		"/soc@01c00000/serial@01f02800:115200"
+#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN50I)
+#define OF_STDOUT_PATH		"/soc@01c00000/serial@01c29000:115200"
 #else
 #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
 #endif

And I set console ttys4 but I could not take any data from uart4.

Is there a way to do this for uart4? What points might I be missing?

 

Thanks for helping.

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