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Please confirm H3 hardware support for SPI 4 slaves per SPI master


Wowbagger

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Attempting to connect ILI9341 LCD with XPT2046 Touch to NanoPi NEO Core2 and then migrate to NanoPi Duo2. The ILI9341 / XPT2046 peripheral board has shared SPI with a separate slave chip select for the screen and touch controllers.

 

Starting with hardware datasheet for the H3 I see there is lots of support for different chip select implementations. This makes me think I am on good footing from a hardware perspective.

 

What is not clear to me is how the register support for four slave chip selects translates into pin assignments.

 

Reading through spi-sun6i.c., for example, static int sun6i_spi_transfer_one( ... ) uses SUN6I_TFR_CTL_CS_MANUAL which implies software control but I don't understand where the software control is actually done. I'm sure devtree helps configure the drivers but I'm a bit lost wrt hardware support of four slave devices.

 

I suspect that SPI1 Slave 0 is the default mapping assigned to pin 23. Can the hardware default be changed with hardware support or is this always controlled through driver software?

 

Any pointers would help.

 

WoW

 

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