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uart rts gpio (rs485 tx enable)


Mike R9FT

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AFAIK for the mainline kernel if UART controller that you selected has RTS and CTS GPIOs wired to the pin header, it's enough to just set up the pinmux.

For recent enough mainline Armbian images it's enough to add something like

param_uart2_rtscts=1

to /boot/armbianEnv.txt (assuming uart2 overlay was activated already)

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I guess it needs modification in drivers/tty/serial/8250/

 

For example it is done in the omap-serial.c, here is some chunk of code:

 

static void serial_omap_start_tx(struct uart_port *port)
{
	struct uart_omap_port *up = to_uart_omap_port(port);
	int res;

	pm_runtime_get_sync(up->dev);

	/* Handle RS-485 */
	if (port->rs485.flags & SER_RS485_ENABLED) {
		/* Fire THR interrupts when FIFO is below trigger level */
		up->scr &= ~OMAP_UART_SCR_TX_EMPTY;
		serial_out(up, UART_OMAP_SCR, up->scr);

		/* if rts not already enabled */
		res = (port->rs485.flags & SER_RS485_RTS_ON_SEND) ? 1 : 0;
		if (gpio_get_value(up->rts_gpio) != res) {
			gpio_set_value(up->rts_gpio, res);
			if (port->rs485.delay_rts_before_send > 0)
				mdelay(port->rs485.delay_rts_before_send);
		}
	}

	if ((port->rs485.flags & SER_RS485_ENABLED) &&
	    !(port->rs485.flags & SER_RS485_RX_DURING_TX))
		serial_omap_stop_rx(port);

	serial_omap_enable_ier_thri(up);
	pm_runtime_mark_last_busy(up->dev);
	pm_runtime_put_autosuspend(up->dev);
}

 

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I need it because of hardware 40pin connector compatibility with another board.

 

Tried the following overlay, but no luck

 

/dts-v1/;
/plugin/;

/ {
        compatible = "allwinner,sun8i-h3";

        fragment@0 {
                target-path = "/aliases";
                __overlay__ {
                        serial3 = "/soc/serial@01c28c00";
                };
        };

        fragment@1 {
                target = <&uart3>;
                 __overlay__ {
                        pinctrl-names = "default";
                        pinctrl-0 = <&uart3_pins>;
                        uart-has-rtscts;
                        rts-gpios = <&pio 3 14 0>; /* PD14 */
                        status = "okay";

                };
        };
};

 

Overlay applied:

ls -l /sys/devices/platform/serial8250/subsystem/devices/1c28c00.serial/of_node/
total 0
-r--r--r-- 1 root root  8 May 22 04:57 clocks
-r--r--r-- 1 root root 17 May 22 04:57 compatible
-r--r--r-- 1 root root  6 May 22 04:57 dma-names
-r--r--r-- 1 root root 16 May 22 04:57 dmas
-r--r--r-- 1 root root 12 May 22 04:57 interrupts
-r--r--r-- 1 root root  4 May 22 04:57 linux,phandle
-r--r--r-- 1 root root  7 May 22 04:57 name
-r--r--r-- 1 root root  4 May 22 04:57 phandle
-r--r--r-- 1 root root  4 May 22 04:57 pinctrl-0
-r--r--r-- 1 root root  8 May 22 04:57 pinctrl-names
-r--r--r-- 1 root root  8 May 22 04:57 reg
-r--r--r-- 1 root root  4 May 22 04:57 reg-io-width
-r--r--r-- 1 root root  4 May 22 04:57 reg-shift
-r--r--r-- 1 root root  8 May 22 04:57 resets
-r--r--r-- 1 root root 16 May 22 04:57 rts-gpios
-r--r--r-- 1 root root  5 May 22 04:57 status
-r--r--r-- 1 root root  0 May 22 04:57 uart-has-rtscts

 

May be it needs pin mux setup

 

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Quote

  - uart-has-rtscts: The presence of this property indicates that the
    UART has dedicated lines for RTS/CTS hardware flow control, and that
    they are available for use (wired and enabled by pinmux configuration).
    This depends on both the UART hardware and the board wiring.
    Note that this property is mutually-exclusive with "cts-gpios" and
    "rts-gpios" above, unless support is provided to switch between modes
    dynamically.

 

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Unless you wish to get you feet wet into kernel code, current kernel, even Mainline, doesn't have the code yet for kernel side HalfDuplex control for AllWinner UARTs (compatible = "snps,dw-apb-uart").

Some other type of UARTs have this functionality such Texas Instrument OMAP, STM32or EXAR.

Personally, I've created a patch for DW-APB-UART, it seems working, but it is not well tested yet ...

In the mean time, you still need to control it via GPIO ...

 

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