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OV5640 camera with dev branch


xeniter

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Hi

 

i try to get a ov5640 camera running on a banana pi m2 plus board.

 

i builded the csi driver and it gets loaded, however i am not able to take picture:

root@bananapim2plus:~/cap-v4l2# ./cap 1280 768 4 1 -999 -1 -1
---- cap parameters -----
width: 1280
height: 768
v4l2 buffers: 4
exposure: -999
hflip: -1
vflip: -1
Mode: V4L2_MODE_VIDEO
Driver: "sun6i-video"
Card: "sun6i-csi"
Bus: "platform:camera"
Version: 1.0
Capabilities: 84200001
v4l2: unable to enumerate input.
v4l2: failed to init camera.
root@bananapim2plus:~/cap-v4l2# dmesg
[23141.993618] sun6i-csi 1cb0000.camera: -> sun6i_csi_set_power()
[23141.993653] sun6i-csi 1cb0000.camera: -> sun6i_csi_set_power() =>DONE_1
[23142.007416] sun6i-csi 1cb0000.camera: -> sun6i_csi_set_power()
[23142.007451] sun6i-csi 1cb0000.camera: -> sun6i_csi_set_power() =>DONE_2

 

Does anyone know how the video 4 linux call path is for initializing a camera?

I loaded the ov6540 module but it never gets probed.

 

i assume the i2c must be somehow linked in the dts file together, but i wasn't able to find a complete working example.

my dts file now, which loads at least the sun6i-csi driver but it should be insert i2c section, if i put it there, i does not get loaded.

		csi {
			status = "okay";

			port {
				#address-cells = <1>;
				#size-cells = <0>;

				// Parallel bus endpoint
				csi_from_ov5640: endpoint {
					remote-endpoint = <&ov5640_to_csi>;
					bus-width = <8>;
					data-shift = <2>;
					hsync-active = <1>; // Active high
					vsync-active = <0>; // Active low
					data-active = <1>;  // Active high
					pclk-sample = <1>;  // Rising
				};
			};
		};
				
		camera@1cb0000 {
			compatible = "allwinner,sun8i-h3-csi", "allwinner,sun6i-a31-csi";
			reg = <0x1cb0000 0x1000>;
			interrupts = <0x0 0x54 0x4>;
			clocks = <0x3 0x2d 0x3 0x6a 0x3 0x62>;
			clock-names = "bus", "mod", "ram";
			resets = <0x3 0x1e>;
			pinctrl-names = "default";		
			pinctrl-0 = <0x27>;
			status = "okay";
			phandle = <0x63>;
			
			// powerdown-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
			// reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
			//powerdown-gpios = <0xc 0x3 0xd 0x0>; // PD14 active high ??
			
			port {
				  ov5640_to_csi: endpoint {
					  remote-endpoint = <&csi_from_ov5640>;
					  bus-width = <8>;
					  data-shift = <2>;
					  hsync-active = <1>; // Active high
					  vsync-active = <0>; // Active low
					  data-active = <1>;  // Active high
					  pclk-sample = <1>;  // Rising
				  };
			 };
		};

 

According to the kernel doku:

https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/media/video-interfaces.txt

it should be a device node from the i2c, but then it doesn't load the camera modul.

If i add compatible="ovti,ov5640" the ov5640 modul get loaded but does not to anything. no even a simple print,

which modul/function/program should call the i2c probing?

 

when i load i2c normal, the modul works (i2cdetect does probe something on the i2 lines).

 

Next isse i have, the V4L2 looks like changed to a builtin modul, is it somehow possible to change it back to a modul? would like to printk debug the v4l2 async file.

When i set it back in the config file to "m" it asks again and says this is a invalid option?

 

 

Anyone an idea? or have a working dts file for a ovXXXX camera with i2c running with the sun6i-csi modul?

 

 

 

 

 

 

 

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got it finally running, still some issues got first picture

main problem was DTS setup (clocks and pins configuration)

 

if anyone would like to get it running (OV5640 on a banana pi m2 plus board (sun8i-h3 allwinner) with latest dev kernel (4.18.11))

 

build armbian for banana with dev branch:

 ./compile.sh KERNEL_ONLY=no BUILD_DESKTOP=no INSTALL_HEADERS=yes BRANCH=dev RELEASE=stretch BOARD=bananapim2plus -j4

choose change kernel config, choose following as modul:

CONFIG_VIDEO_OV5640=m

CONFIG_VIDEO_SUN6I_CSI=m

i prefer moduls for debug purposes

 

adjust DTS file for Camera and CSI interface, not sure if its completely correct, at least i got a picture

/dts-v1/;

/ {
	interrupt-parent = <0x1>;
	#address-cells = <0x1>;
	#size-cells = <0x1>;
	model = "Banana Pi BPI-M2-Plus";
	compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";

	chosen {
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges;
		stdout-path = "serial0:115200n8";

		framebuffer-hdmi {
			compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
			allwinner,pipeline = "mixer0-lcd0-hdmi";
			clocks = <0x2 0x6 0x3 0x66 0x3 0x6f>;
			status = "disabled";
		};

		framebuffer-tve {
			compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
			allwinner,pipeline = "mixer1-lcd1-tve";
			clocks = <0x2 0x7 0x3 0x67>;
			status = "disabled";
		};
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,format = "i2s";
		simple-audio-card,name = "allwinner,hdmi";
		simple-audio-card,mclk-fs = <0x100>;
		status = "disabled";
		phandle = <0x34>;

		simple-audio-card,codec {
			sound-dai = <0x4>;
		};

		simple-audio-card,cpu {
			sound-dai = <0x5>;
		};
	};

	clocks {
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges;

		osc24M_clk {
			#clock-cells = <0x0>;
			compatible = "fixed-clock";
			clock-frequency = <0x16e3600>;
			clock-output-names = "osc24M";
			phandle = <0x13>;
		};

		osc32k_clk {
			#clock-cells = <0x0>;
			compatible = "fixed-clock";
			clock-frequency = <0x8000>;
			clock-output-names = "osc32k";
			phandle = <0x14>;
		};

		internal-osc-clk {
			#clock-cells = <0x0>;
			compatible = "fixed-clock";
			clock-frequency = <0xf42400>;
			clock-accuracy = <0x11e1a300>;
			clock-output-names = "iosc";
			phandle = <0x28>;
		};
	};

	display-engine {
		compatible = "allwinner,sun8i-h3-display-engine";
		allwinner,pipelines = <0x6>;
		status = "okay";
		phandle = <0x35>;
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges;

		clock@1000000 {
			reg = <0x1000000 0x100000>;
			clocks = <0x3 0x65 0x3 0x30>;
			clock-names = "mod", "bus";
			resets = <0x3 0x22>;
			#clock-cells = <0x1>;
			#reset-cells = <0x1>;
			compatible = "allwinner,sun8i-h3-de2-clk";
			phandle = <0x2>;
		};

		mixer@1100000 {
			compatible = "allwinner,sun8i-h3-de2-mixer-0";
			reg = <0x1100000 0x100000>;
			clocks = <0x2 0x0 0x2 0x6>;
			clock-names = "bus", "mod";
			resets = <0x2 0x0>;
			phandle = <0x6>;

			ports {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				port@1 {
					reg = <0x1>;
					phandle = <0x36>;

					endpoint {
						remote-endpoint = <0x7>;
						phandle = <0x8>;
					};
				};
			};
		};

		syscon@1c00000 {
			compatible = "allwinner,sun8i-h3-system-controller", "syscon";
			reg = <0x1c00000 0x1000>;
			phandle = <0x15>;
		};

		dma-controller@1c02000 {
			compatible = "allwinner,sun8i-h3-dma";
			reg = <0x1c02000 0x1000>;
			interrupts = <0x0 0x32 0x4>;
			clocks = <0x3 0x15>;
			resets = <0x3 0x6>;
			#dma-cells = <0x1>;
			phandle = <0x1a>;
		};

		lcd-controller@1c0c000 {
			compatible = "allwinner,sun8i-h3-tcon-tv", "allwinner,sun8i-a83t-tcon-tv";
			reg = <0x1c0c000 0x1000>;
			interrupts = <0x0 0x56 0x4>;
			clocks = <0x3 0x2a 0x3 0x66>;
			clock-names = "ahb", "tcon-ch1";
			resets = <0x3 0x1b>;
			reset-names = "lcd";
			phandle = <0x37>;

			ports {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				port@0 {
					reg = <0x0>;
					phandle = <0x38>;

					endpoint {
						remote-endpoint = <0x8>;
						phandle = <0x7>;
					};
				};

				port@1 {
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					reg = <0x1>;
					phandle = <0x39>;

					endpoint@1 {
						reg = <0x1>;
						remote-endpoint = <0x9>;
						phandle = <0x25>;
					};
				};
			};
		};

		mmc@1c0f000 {
			reg = <0x1c0f000 0x1000>;
			pinctrl-names = "default";
			pinctrl-0 = <0xa>;
			resets = <0x3 0x7>;
			reset-names = "ahb";
			interrupts = <0x0 0x3c 0x4>;
			status = "okay";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			compatible = "allwinner,sun7i-a20-mmc";
			clocks = <0x3 0x16 0x3 0x47 0x3 0x49 0x3 0x48>;
			clock-names = "ahb", "mmc", "output", "sample";
			vmmc-supply = <0xb>;
			bus-width = <0x4>;
			cd-gpios = <0xc 0x5 0x6 0x1>;
			phandle = <0x3a>;
		};

		mmc@1c10000 {
			reg = <0x1c10000 0x1000>;
			pinctrl-names = "default";
			pinctrl-0 = <0xd>;
			resets = <0x3 0x8>;
			reset-names = "ahb";
			interrupts = <0x0 0x3d 0x4>;
			status = "okay";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			compatible = "allwinner,sun7i-a20-mmc";
			clocks = <0x3 0x17 0x3 0x4a 0x3 0x4c 0x3 0x4b>;
			clock-names = "ahb", "mmc", "output", "sample";
			vmmc-supply = <0xb>;
			vqmmc-supply = <0xb>;
			mmc-pwrseq = <0xe>;
			bus-width = <0x4>;
			non-removable;
			phandle = <0x3b>;

			wifi@1 {
				reg = <0x1>;
				compatible = "brcm,bcm4329-fmac";
				interrupt-parent = <0xc>;
				interrupts = <0x6 0xa 0x8>;
				interrupt-names = "host-wake";
				phandle = <0x3c>;
			};
		};

		mmc@1c11000 {
			reg = <0x1c11000 0x1000>;
			resets = <0x3 0x9>;
			reset-names = "ahb";
			interrupts = <0x0 0x3e 0x4>;
			status = "okay";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			compatible = "allwinner,sun7i-a20-mmc";
			clocks = <0x3 0x18 0x3 0x4d 0x3 0x4f 0x3 0x4e>;
			clock-names = "ahb", "mmc", "output", "sample";
			pinctrl-names = "default";
			pinctrl-0 = <0xf>;
			vmmc-supply = <0xb>;
			vqmmc-supply = <0xb>;
			bus-width = <0x8>;
			non-removable;
			phandle = <0x3d>;
		};

		usb@1c19000 {
			compatible = "allwinner,sun8i-h3-musb";
			reg = <0x1c19000 0x400>;
			clocks = <0x3 0x20>;
			resets = <0x3 0x11>;
			interrupts = <0x0 0x47 0x4>;
			interrupt-names = "mc";
			phys = <0x10 0x0>;
			phy-names = "usb";
			extcon = <0x10 0x0>;
			status = "okay";
			dr_mode = "otg";
			phandle = <0x3e>;
		};

		eeprom@01c14000 {
			compatible = "allwinner,sun8i-h3-sid";
			reg = <0x1c14000 0x400>;
			phandle = <0x3f>;
		};

		phy@1c19400 {
			compatible = "allwinner,sun8i-h3-usb-phy";
			reg = <0x1c19400 0x2c 0x1c1a800 0x4 0x1c1b800 0x4 0x1c1c800 0x4 0x1c1d800 0x4>;
			reg-names = "phy_ctrl", "pmu0", "pmu1", "pmu2", "pmu3";
			clocks = <0x3 0x58 0x3 0x59 0x3 0x5a 0x3 0x5b>;
			clock-names = "usb0_phy", "usb1_phy", "usb2_phy", "usb3_phy";
			resets = <0x3 0x0 0x3 0x1 0x3 0x2 0x3 0x3>;
			reset-names = "usb0_reset", "usb1_reset", "usb2_reset", "usb3_reset";
			status = "okay";
			#phy-cells = <0x1>;
			usb0_id_det-gpios = <0x11 0x0 0x6 0x0>;
			usb0_vbus-supply = <0x12>;
			phandle = <0x10>;
		};

		usb@1c1a000 {
			compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
			reg = <0x1c1a000 0x100>;
			interrupts = <0x0 0x48 0x4>;
			clocks = <0x3 0x21 0x3 0x25>;
			resets = <0x3 0x12 0x3 0x16>;
			status = "okay";
			phandle = <0x40>;
		};

		usb@1c1a400 {
			compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
			reg = <0x1c1a400 0x100>;
			interrupts = <0x0 0x49 0x4>;
			clocks = <0x3 0x21 0x3 0x25 0x3 0x5c>;
			resets = <0x3 0x12 0x3 0x16>;
			status = "okay";
			phandle = <0x41>;
		};

		usb@1c1b000 {
			compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
			reg = <0x1c1b000 0x100>;
			interrupts = <0x0 0x4a 0x4>;
			clocks = <0x3 0x22 0x3 0x26>;
			resets = <0x3 0x13 0x3 0x17>;
			phys = <0x10 0x1>;
			phy-names = "usb";
			status = "okay";
			phandle = <0x42>;
		};

		usb@1c1b400 {
			compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
			reg = <0x1c1b400 0x100>;
			interrupts = <0x0 0x4b 0x4>;
			clocks = <0x3 0x22 0x3 0x26 0x3 0x5d>;
			resets = <0x3 0x13 0x3 0x17>;
			phys = <0x10 0x1>;
			phy-names = "usb";
			status = "okay";
			phandle = <0x43>;
		};

		usb@1c1c000 {
			compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
			reg = <0x1c1c000 0x100>;
			interrupts = <0x0 0x4c 0x4>;
			clocks = <0x3 0x23 0x3 0x27>;
			resets = <0x3 0x14 0x3 0x18>;
			phys = <0x10 0x2>;
			phy-names = "usb";
			status = "okay";
			phandle = <0x44>;
		};

		usb@1c1c400 {
			compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
			reg = <0x1c1c400 0x100>;
			interrupts = <0x0 0x4d 0x4>;
			clocks = <0x3 0x23 0x3 0x27 0x3 0x5e>;
			resets = <0x3 0x14 0x3 0x18>;
			phys = <0x10 0x2>;
			phy-names = "usb";
			status = "okay";
			phandle = <0x45>;
		};

		usb@1c1d000 {
			compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
			reg = <0x1c1d000 0x100>;
			interrupts = <0x0 0x4e 0x4>;
			clocks = <0x3 0x24 0x3 0x28>;
			resets = <0x3 0x15 0x3 0x19>;
			phys = <0x10 0x3>;
			phy-names = "usb";
			status = "disabled";
			phandle = <0x46>;
		};

		usb@1c1d400 {
			compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
			reg = <0x1c1d400 0x100>;
			interrupts = <0x0 0x4f 0x4>;
			clocks = <0x3 0x24 0x3 0x28 0x3 0x5f>;
			resets = <0x3 0x15 0x3 0x19>;
			phys = <0x10 0x3>;
			phy-names = "usb";
			status = "disabled";
			phandle = <0x47>;
		};

		ccu: clock@1c20000 {
			reg = <0x1c20000 0x400>;
			clocks = <0x13 0x14>;
			clock-names = "hosc", "losc";
			#clock-cells = <0x1>;
			#reset-cells = <0x1>;
			compatible = "allwinner,sun8i-h3-ccu";
			phandle = <0x3>;
		};

		pinctrl@1c20800 {
			reg = <0x1c20800 0x400>;
			interrupts = <0x0 0xb 0x4 0x0 0x11 0x4>;
			clocks = <0x3 0x36 0x13 0x14>;
			clock-names = "apb", "hosc", "losc";
			gpio-controller;
			#gpio-cells = <0x3>;
			interrupt-controller;
			#interrupt-cells = <0x3>;
			compatible = "allwinner,sun8i-h3-pinctrl";
			phandle = <0xc>;

			csi {
				pins = "PE0", "PE1", "PE2", "PE3", "PE4", "PE5", "PE6", "PE7", "PE8", "PE9", "PE10", "PE11";
				function = "csi";
				phandle = <0x27>;
			};

			emac0 {
				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD7", "PD8", "PD9", "PD10", "PD12", "PD13", "PD15", "PD16", "PD17";
				function = "emac";
				drive-strength = <0x28>;
				phandle = <0x16>;
			};

			i2c0 {
				pins = "PA11", "PA12";
				function = "i2c0";
				phandle = <0x21>;
			};

			i2c1 {
				pins = "PA18", "PA19";
				function = "i2c1";
				phandle = <0x22>;
			};

			i2c2 {
				pins = "PE12", "PE13";
				function = "i2c2";
				phandle = <0x23>;
			};

			i2s0 {
				pins = "PA18", "PA19", "PA20", "PA21";
				function = "i2s0";
				phandle = <0x48>;
			};

			i2s1 {
				pins = "PG10", "PG11", "PG12", "PG13";
				function = "i2s1";
				phandle = <0x49>;
			};

			mmc0 {
				pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
				function = "mmc0";
				drive-strength = <0x1e>;
				bias-pull-up;
				phandle = <0xa>;
			};

			mmc1 {
				pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5";
				function = "mmc1";
				drive-strength = <0x1e>;
				bias-pull-up;
				phandle = <0xd>;
			};

			mmc2_8bit {
				pins = "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16";
				function = "mmc2";
				drive-strength = <0x1e>;
				bias-pull-up;
				phandle = <0xf>;
			};

			spdif {
				pins = "PA17";
				function = "spdif";
				phandle = <0x4a>;
			};

			spi0 {
				pins = "PC0", "PC1", "PC2", "PC3";
				function = "spi0";
				phandle = <0x1b>;
			};

			spi1 {
				pins = "PA15", "PA16", "PA14", "PA13";
				function = "spi1";
				phandle = <0x1c>;
			};

			uart0 {
				pins = "PA4", "PA5";
				function = "uart0";
				phandle = <0x1e>;
			};

			uart1 {
				pins = "PG6", "PG7";
				function = "uart1";
				phandle = <0x1f>;
			};

			uart1_rts_cts {
				pins = "PG8", "PG9";
				function = "uart1";
				phandle = <0x20>;
			};

			uart2 {
				pins = "PA0", "PA1";
				function = "uart2";
				phandle = <0x4b>;
			};

			uart3 {
				pins = "PA13", "PA14";
				function = "uart3";
				phandle = <0x4c>;
			};

			uart3_rts_cts {
				pins = "PA15", "PA16";
				function = "uart3";
				phandle = <0x4d>;
			};			
		};

		timer@1c20c00 {
			compatible = "allwinner,sun4i-a10-timer";
			reg = <0x1c20c00 0xa0>;
			interrupts = <0x0 0x12 0x4 0x0 0x13 0x4>;
			clocks = <0x13>;
		};

		ethernet@1c30000 {
			compatible = "allwinner,sun8i-h3-emac";
			syscon = <0x15>;
			reg = <0x1c30000 0x10000>;
			interrupts = <0x0 0x52 0x4>;
			interrupt-names = "macirq";
			resets = <0x3 0xc>;
			reset-names = "stmmaceth";
			clocks = <0x3 0x1b>;
			clock-names = "stmmaceth";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			status = "okay";
			pinctrl-names = "default";
			pinctrl-0 = <0x16>;
			phy-supply = <0x17>;
			phy-handle = <0x18>;
			phy-mode = "rgmii";
			phandle = <0x4e>;

			mdio {
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				compatible = "snps,dwmac-mdio";
				phandle = <0x19>;
			};

			mdio-mux {
				compatible = "allwinner,sun8i-h3-mdio-mux";
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				mdio-parent-bus = <0x19>;

				mdio@1 {
					compatible = "allwinner,sun8i-h3-mdio-internal";
					reg = <0x1>;
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					phandle = <0x4f>;

					ethernet-phy@1 {
						compatible = "ethernet-phy-ieee802.3-c22";
						reg = <0x1>;
						clocks = <0x3 0x43>;
						resets = <0x3 0x27>;
						phandle = <0x50>;
					};
				};

				mdio@2 {
					reg = <0x2>;
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					phandle = <0x51>;

					ethernet-phy@1 {
						compatible = "ethernet-phy-ieee802.3-c22";
						reg = <0x0>;
						phandle = <0x18>;
					};
				};
			};
		};

		spi@1c68000 {
			compatible = "allwinner,sun8i-h3-spi";
			reg = <0x1c68000 0x1000>;
			interrupts = <0x0 0x41 0x4>;
			clocks = <0x3 0x1e 0x3 0x52>;
			clock-names = "ahb", "mod";
			dmas = <0x1a 0x17 0x1a 0x17>;
			dma-names = "rx", "tx";
			pinctrl-names = "default";
			pinctrl-0 = <0x1b>;
			resets = <0x3 0xf>;
			status = "disabled";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			phandle = <0x52>;
		};

		spi@1c69000 {
			compatible = "allwinner,sun8i-h3-spi";
			reg = <0x1c69000 0x1000>;
			interrupts = <0x0 0x42 0x4>;
			clocks = <0x3 0x1f 0x3 0x53>;
			clock-names = "ahb", "mod";
			dmas = <0x1a 0x18 0x1a 0x18>;
			dma-names = "rx", "tx";
			pinctrl-names = "default";
			pinctrl-0 = <0x1c>;
			resets = <0x3 0x10>;
			status = "disabled";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			phandle = <0x53>;
		};

		watchdog@1c20ca0 {
			compatible = "allwinner,sun6i-a31-wdt";
			reg = <0x1c20ca0 0x20>;
			interrupts = <0x0 0x19 0x4>;
			phandle = <0x54>;
		};

		spdif@1c21000 {
			#sound-dai-cells = <0x0>;
			compatible = "allwinner,sun8i-h3-spdif";
			reg = <0x1c21000 0x400>;
			interrupts = <0x0 0xc 0x4>;
			clocks = <0x3 0x35 0x3 0x57>;
			resets = <0x3 0x29>;
			clock-names = "apb", "spdif";
			dmas = <0x1a 0x2>;
			dma-names = "tx";
			status = "disabled";
			phandle = <0x55>;
		};

		pwm@1c21400 {
			compatible = "allwinner,sun8i-h3-pwm";
			reg = <0x1c21400 0x8>;
			clocks = <0x13>;
			#pwm-cells = <0x3>;
			status = "disabled";
			phandle = <0x56>;
		};

		i2s@1c22000 {
			#sound-dai-cells = <0x0>;
			compatible = "allwinner,sun8i-h3-i2s";
			reg = <0x1c22000 0x400>;
			interrupts = <0x0 0xd 0x4>;
			clocks = <0x3 0x38 0x3 0x54>;
			clock-names = "apb", "mod";
			dmas = <0x1a 0x3 0x1a 0x3>;
			resets = <0x3 0x2b>;
			dma-names = "rx", "tx";
			status = "disabled";
			phandle = <0x57>;
		};

		i2s@1c22400 {
			#sound-dai-cells = <0x0>;
			compatible = "allwinner,sun8i-h3-i2s";
			reg = <0x1c22400 0x400>;
			interrupts = <0x0 0xe 0x4>;
			clocks = <0x3 0x39 0x3 0x55>;
			clock-names = "apb", "mod";
			dmas = <0x1a 0x4 0x1a 0x4>;
			resets = <0x3 0x2c>;
			dma-names = "rx", "tx";
			status = "disabled";
			phandle = <0x58>;
		};

		i2s@1c22800 {
			#sound-dai-cells = <0x0>;
			compatible = "allwinner,sun8i-h3-i2s";
			reg = <0x1c22800 0x400>;
			interrupts = <0x0 0xf 0x4>;
			clocks = <0x3 0x3a 0x3 0x56>;
			clock-names = "apb", "mod";
			dmas = <0x1a 0x1b>;
			resets = <0x3 0x2d>;
			dma-names = "tx";
			status = "disabled";
			phandle = <0x5>;
		};

		codec@1c22c00 {
			#sound-dai-cells = <0x0>;
			compatible = "allwinner,sun8i-h3-codec";
			reg = <0x1c22c00 0x400>;
			interrupts = <0x0 0x1d 0x4>;
			clocks = <0x3 0x34 0x3 0x6d>;
			clock-names = "apb", "codec";
			resets = <0x3 0x28>;
			dmas = <0x1a 0xf 0x1a 0xf>;
			dma-names = "rx", "tx";
			allwinner,codec-analog-controls = <0x1d>;
			status = "disabled";
			phandle = <0x59>;
		};

		serial@1c28000 {
			compatible = "snps,dw-apb-uart";
			reg = <0x1c28000 0x400>;
			interrupts = <0x0 0x0 0x4>;
			reg-shift = <0x2>;
			reg-io-width = <0x4>;
			clocks = <0x3 0x3e>;
			resets = <0x3 0x31>;
			dmas = <0x1a 0x6 0x1a 0x6>;
			dma-names = "rx", "tx";
			status = "okay";
			pinctrl-names = "default";
			pinctrl-0 = <0x1e>;
			phandle = <0x5a>;
		};

		serial@1c28400 {
			compatible = "snps,dw-apb-uart";
			reg = <0x1c28400 0x400>;
			interrupts = <0x0 0x1 0x4>;
			reg-shift = <0x2>;
			reg-io-width = <0x4>;
			clocks = <0x3 0x3f>;
			resets = <0x3 0x32>;
			dmas = <0x1a 0x7 0x1a 0x7>;
			dma-names = "rx", "tx";
			status = "okay";
			pinctrl-names = "default";
			pinctrl-0 = <0x1f 0x20>;
			phandle = <0x5b>;
		};

		serial@1c28800 {
			compatible = "snps,dw-apb-uart";
			reg = <0x1c28800 0x400>;
			interrupts = <0x0 0x2 0x4>;
			reg-shift = <0x2>;
			reg-io-width = <0x4>;
			clocks = <0x3 0x40>;
			resets = <0x3 0x33>;
			dmas = <0x1a 0x8 0x1a 0x8>;
			dma-names = "rx", "tx";
			status = "disabled";
			phandle = <0x5c>;
		};

		serial@1c28c00 {
			compatible = "snps,dw-apb-uart";
			reg = <0x1c28c00 0x400>;
			interrupts = <0x0 0x3 0x4>;
			reg-shift = <0x2>;
			reg-io-width = <0x4>;
			clocks = <0x3 0x41>;
			resets = <0x3 0x34>;
			dmas = <0x1a 0x9 0x1a 0x9>;
			dma-names = "rx", "tx";
			status = "disabled";
			phandle = <0x5d>;
		};

		i2c@1c2ac00 {
			compatible = "allwinner,sun6i-a31-i2c";
			reg = <0x1c2ac00 0x400>;
			interrupts = <0x0 0x6 0x4>;
			clocks = <0x3 0x3b>;
			resets = <0x3 0x2e>;
			pinctrl-names = "default";
			pinctrl-0 = <0x21>;
			status = "disabled";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			phandle = <0x5e>;
		};

		i2c@1c2b000 {
			compatible = "allwinner,sun6i-a31-i2c";
			reg = <0x1c2b000 0x400>;
			interrupts = <0x0 0x7 0x4>;
			clocks = <0x3 0x3c>;
			resets = <0x3 0x2f>;
			pinctrl-names = "default";
			pinctrl-0 = <0x22>;
			status = "disabled";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			phandle = <0x5f>;
		};



		
		
		
		
		csi@1cb0000 {
			compatible = "allwinner,sun8i-h3-csi", "allwinner,sun6i-a31-csi";
			reg = <0x1cb0000 0x1000>;
			interrupts = <0x0 0x54 0x4>;
			clocks = <0x3 0x2d 0x3 0x6a 0x3 0x62>;		// 0x3==ccu	0x2d=45=CLK_BUS_CSI	0x6a=106=CLK_CSI_SCLK	0x62=98=CLK_DRAM_CSI
			
			
			// #define CLK_DRAM_VE	97
			// #define CLK_VE	108

			clock-names = "bus", "mod", "ram";
			
			resets = <0x3 0x1e>;	// 0x3==ccu 	// #define RST_BUS_CSI	30
			
			pinctrl-names = "default";
			pinctrl-0 = <0x27>;
			status = "okay";
			phandle = <0x63>;
			
			port {
				#address-cells = <1>;
				#size-cells = <0>;

				// Parallel bus endpoint
				csi_from_ov5640: endpoint {
					remote-endpoint = <&ov5640_to_csi>;
					bus-width = <8>;
					data-shift = <2>;
					hsync-active = <1>; // Active high
					vsync-active = <0>; // Active low
					data-active = <1>;  // Active high
					pclk-sample = <1>;  // Rising
				};
			};
	
		};
		
		// SDA = PE13
		// SCK = PE12
		
		// clock / resets
		// https://github.com/torvalds/linux/blob/master/include/dt-bindings/reset/sun8i-h3-ccu.h
		// https://github.com/torvalds/linux/blob/master/include/dt-bindings/clock/sun8i-h3-ccu.h
		
		i2c@1c2b400 {
			compatible = "allwinner,sun6i-a31-i2c";
			reg = <0x1c2b400 0x400>;
			interrupts = <0x0 0x8 0x4>;
			
			
			clocks = <0x3 0x3d>;	// 0x03=ccu	// #define CLK_BUS_I2C2	61
			resets = <0x3 0x30>;	// 0x03=ccu	// #define RST_BUS_I2C2	48
			
			
			pinctrl-names = "default";
			pinctrl-0 = <0x23>;
			status = "okay";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			phandle = <0x60>;
				
			ov5640: camera@3c {
			      compatible = "ovti,ov5640";
			      reg = <0x3c>;
	
			      clocks = <&ccu 107>;				// 0x3=&ccu	#define CLK_CSI_MCLK		107
			      clock-names = "xclk";
			      assigned-clock-rates = <24000000>;
			      assigned-clocks = <&ccu 107>;			// 0x3=&ccu	#define CLK_CSI_MCLK		107
	      
			      pinctrl-names = "default";
			      reset-gpio = 	<0xc 4 14 1>;	// PE14		// 0xc phandle pinctrl, 	GPIO_ACTIVE_LOW=1
			      pwdn-gpio = 	<0xc 4 15 0>;	// PE15		// 0xc phandle pinctrl, 	GPIO_ACTIVE_HIGH=0			      

			      /*
			      enable-gpios =    <0xc 3 14 1>;	// PD14		// 0xc phandle pinctrl, 	GPIO_ACTIVE_HIGH=0
			      #define GPIO_ACTIVE_HIGH 0
			      #define GPIO_ACTIVE_LOW 1
			      */			      
				    
			      
			      port {
					  ov5640_to_csi: endpoint {
						  remote-endpoint = <&csi_from_ov5640>;
						  bus-width = <8>;
						  data-shift = <2>;
						  hsync-active = <1>; // Active high
						  vsync-active = <0>; // Active low
						  data-active = <1>;  // Active high
						  pclk-sample = <1>;  // Rising
					  };
				};
			};
		};
		
		
		
		
		
		/*i2c@1c2b400 {
			compatible = "allwinner,sun6i-a31-i2c";
			reg = <0x1c2b400 0x400>;
			interrupts = <0x0 0x8 0x4>;
			clocks = <0x3 0x3d>;
			resets = <0x3 0x30>;
			pinctrl-names = "default";
			pinctrl-0 = <0x23>;
			status = "disabled";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			phandle = <0x60>;
		};*/
		
		/*camera@1cb0000 {
			compatible = "allwinner,sun8i-h3-csi", "allwinner,sun6i-a31-csi";
			reg = <0x1cb0000 0x1000>;
			interrupts = <0x0 0x54 0x4>;
			clocks = <0x3 0x2d 0x3 0x6a 0x3 0x62>;
			clock-names = "bus", "mod", "ram";
			resets = <0x3 0x1e>;
			pinctrl-names = "default";
			pinctrl-0 = <0x27>;
			status = "disabled";
			phandle = <0x63>;
		};*/

		
		
		
		
		
		
		
		
		interrupt-controller@1c81000 {
			compatible = "arm,gic-400";
			reg = <0x1c81000 0x1000 0x1c82000 0x2000 0x1c84000 0x2000 0x1c86000 0x2000>;
			interrupt-controller;
			#interrupt-cells = <0x3>;
			interrupts = <0x1 0x9 0xf04>;
			phandle = <0x1>;
		};

		hdmi@1ee0000 {
			#sound-dai-cells = <0x0>;
			compatible = "allwinner,sun8i-h3-dw-hdmi", "allwinner,sun8i-a83t-dw-hdmi";
			reg = <0x1ee0000 0x10000>;
			reg-io-width = <0x1>;
			interrupts = <0x0 0x58 0x4>;
			clocks = <0x3 0x2f 0x3 0x70 0x3 0x6f>;
			clock-names = "iahb", "isfr", "tmds";
			resets = <0x3 0x21>;
			reset-names = "ctrl";
			phys = <0x24>;
			phy-names = "hdmi-phy";
			status = "okay";
			phandle = <0x4>;

			ports {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				port@0 {
					reg = <0x0>;
					phandle = <0x61>;

					endpoint {
						remote-endpoint = <0x25>;
						phandle = <0x9>;
					};
				};

				port@1 {
					reg = <0x1>;
					phandle = <0x62>;

					endpoint {
						remote-endpoint = <0x26>;
						phandle = <0x33>;
					};
				};
			};
		};

		hdmi-phy@1ef0000 {
			compatible = "allwinner,sun8i-h3-hdmi-phy";
			reg = <0x1ef0000 0x10000>;
			clocks = <0x3 0x2f 0x3 0x70 0x3 0x6>;
			clock-names = "bus", "mod", "pll-0";
			resets = <0x3 0x20>;
			reset-names = "phy";
			#phy-cells = <0x0>;
			phandle = <0x24>;
		};

		rtc@1f00000 {
			compatible = "allwinner,sun6i-a31-rtc";
			reg = <0x1f00000 0x54>;
			interrupts = <0x0 0x28 0x4 0x0 0x29 0x4>;
			phandle = <0x64>;
		};

		clock@1f01400 {
			compatible = "allwinner,sun8i-h3-r-ccu";
			reg = <0x1f01400 0x100>;
			clocks = <0x13 0x14 0x28 0x3 0x9>;
			clock-names = "hosc", "losc", "iosc", "pll-periph";
			#clock-cells = <0x1>;
			#reset-cells = <0x1>;
			phandle = <0x29>;
		};

		codec-analog@1f015c0 {
			compatible = "allwinner,sun8i-h3-codec-analog";
			reg = <0x1f015c0 0x4>;
			phandle = <0x1d>;
		};

		ir@1f02000 {
			compatible = "allwinner,sun5i-a13-ir";
			clocks = <0x29 0x4 0x29 0xb>;
			clock-names = "apb", "ir";
			resets = <0x29 0x0>;
			interrupts = <0x0 0x25 0x4>;
			reg = <0x1f02000 0x400>;
			status = "okay";
			pinctrl-names = "default";
			pinctrl-0 = <0x2a>;
			phandle = <0x65>;
		};

		i2c@1f02400 {
			compatible = "allwinner,sun6i-a31-i2c";
			reg = <0x1f02400 0x400>;
			interrupts = <0x0 0x2c 0x4>;
			pinctrl-names = "default";
			pinctrl-0 = <0x2b>;
			clocks = <0x29 0x9>;
			resets = <0x29 0x5>;
			status = "disabled";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			phandle = <0x66>;
		};

		pinctrl@1f02c00 {
			compatible = "allwinner,sun8i-h3-r-pinctrl";
			reg = <0x1f02c00 0x400>;
			interrupts = <0x0 0x2d 0x4>;
			clocks = <0x29 0x3 0x13 0x14>;
			clock-names = "apb", "hosc", "losc";
			gpio-controller;
			#gpio-cells = <0x3>;
			interrupt-controller;
			#interrupt-cells = <0x3>;
			phandle = <0x11>;

			ir {
				pins = "PL11";
				function = "s_cir_rx";
				phandle = <0x2a>;
			};

			r-i2c {
				pins = "PL0", "PL1";
				function = "s_i2c";
				phandle = <0x2b>;
			};
		};

		thermal-sensor@1c25000 {
			compatible = "allwinner,sun8i-h3-ths";
			reg = <0x1c25000 0x100>;
			clocks = <0x3 0x37 0x3 0x45>;
			clock-names = "bus", "mod";
			resets = <0x3 0x2a>;
			#thermal-sensor-cells = <0x0>;
			#io-channel-cells = <0x0>;
			phandle = <0x2d>;
		};

		gpu@1c40000 {
			compatible = "allwinner,sun8i-h3-mali", "arm,mali-400";
			reg = <0x1c40000 0x10000>;
			interrupts = <0x0 0x61 0x4 0x0 0x62 0x4 0x0 0x63 0x4 0x0 0x64 0x4 0x0 0x66 0x4 0x0 0x67 0x4 0x0 0x65 0x4>;
			interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1", "ppmmu1", "pmu";
			clocks = <0x3 0x31 0x3 0x72>;
			clock-names = "bus", "core";
			resets = <0x3 0x23>;
			assigned-clocks = <0x3 0x72>;
			assigned-clock-rates = <0x16e36000>;
			phandle = <0x67>;
		};
	};

	opp_table0 {
		compatible = "operating-points-v2";
		opp-shared;
		phandle = <0x2c>;

		opp@648000000 {
			opp-hz = <0x0 0x269fb200>;
			opp-microvolt = <0xfde80 0xfde80 0x13d620>;
			clock-latency-ns = <0x3b9b0>;
		};

		opp@816000000 {
			opp-hz = <0x0 0x30a32c00>;
			opp-microvolt = <0x10c8e0 0x10c8e0 0x13d620>;
			clock-latency-ns = <0x3b9b0>;
		};

		opp@1008000000 {
			opp-hz = <0x0 0x3c14dc00>;
			opp-microvolt = <0x124f80 0x124f80 0x13d620>;
			clock-latency-ns = <0x3b9b0>;
		};
	};

	cpus {
		#address-cells = <0x1>;
		#size-cells = <0x0>;

		cpu@0 {
			compatible = "arm,cortex-a7";
			device_type = "cpu";
			reg = <0x0>;
			clocks = <0x3 0xe>;
			clock-names = "cpu";
			operating-points-v2 = <0x2c>;
			#cooling-cells = <0x2>;
			phandle = <0x2f>;
		};

		cpu@1 {
			compatible = "arm,cortex-a7";
			device_type = "cpu";
			reg = <0x1>;
			operating-points-v2 = <0x2c>;
		};

		cpu@2 {
			compatible = "arm,cortex-a7";
			device_type = "cpu";
			reg = <0x2>;
			operating-points-v2 = <0x2c>;
		};

		cpu@3 {
			compatible = "arm,cortex-a7";
			device_type = "cpu";
			reg = <0x3>;
			operating-points-v2 = <0x2c>;
		};
	};

	iio-hwmon {
		compatible = "iio-hwmon";
		io-channels = <0x2d>;
	};

	thermal-zones {

		cpu-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x2d>;

			trips {

				cpu_warm {
					temperature = <0xfde8>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x2e>;
				};

				cpu_hot_pre {
					temperature = <0x11170>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x30>;
				};

				cpu_hot {
					temperature = <0x124f8>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x31>;
				};

				cpu_very_hot_pre {
					temperature = <0x14c08>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x68>;
				};

				cpu_very_hot {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x32>;
				};

				cpu_crit {
					temperature = <0x19a28>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0x69>;
				};
			};

			cooling-maps {

				cpu_warm_limit_cpu {
					trip = <0x2e>;
					cooling-device = <0x2f 0xffffffff 0x2>;
				};

				cpu_hot_pre_limit_cpu {
					trip = <0x30>;
					cooling-device = <0x2f 0x2 0x3>;
				};

				cpu_hot_limit_cpu {
					trip = <0x31>;
					cooling-device = <0x2f 0x3 0x4>;
				};

				cpu_very_hot_pre_limit_cpu {
					trip = <0x32>;
					cooling-device = <0x2f 0x5 0x6>;
				};

				cpu_very_hot_limit_cpu {
					trip = <0x32>;
					cooling-device = <0x2f 0x7 0xffffffff>;
				};
			};
		};
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08 0x1 0xb 0xf08 0x1 0xa 0xf08>;
	};

	ahci-5v {
		compatible = "regulator-fixed";
		regulator-name = "ahci-5v";
		regulator-min-microvolt = <0x4c4b40>;
		regulator-max-microvolt = <0x4c4b40>;
		regulator-boot-on;
		enable-active-high;
		gpio = <0xc 0x1 0x8 0x0>;
		status = "disabled";
		phandle = <0x6a>;
	};

	usb0-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb0-vbus";
		regulator-min-microvolt = <0x4c4b40>;
		regulator-max-microvolt = <0x4c4b40>;
		enable-active-high;
		gpio = <0xc 0x3 0xb 0x0>;
		status = "okay";
		phandle = <0x12>;
	};

	usb1-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb1-vbus";
		regulator-min-microvolt = <0x4c4b40>;
		regulator-max-microvolt = <0x4c4b40>;
		regulator-boot-on;
		enable-active-high;
		gpio = <0xc 0x7 0x6 0x0>;
		status = "disabled";
		phandle = <0x6b>;
	};

	usb2-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb2-vbus";
		regulator-min-microvolt = <0x4c4b40>;
		regulator-max-microvolt = <0x4c4b40>;
		regulator-boot-on;
		enable-active-high;
		gpio = <0xc 0x7 0x3 0x0>;
		status = "disabled";
		phandle = <0x6c>;
	};

	vcc3v0 {
		compatible = "regulator-fixed";
		regulator-name = "vcc3v0";
		regulator-min-microvolt = <0x2dc6c0>;
		regulator-max-microvolt = <0x2dc6c0>;
		phandle = <0x6d>;
	};

	vcc3v3 {
		compatible = "regulator-fixed";
		regulator-name = "vcc3v3";
		regulator-min-microvolt = <0x325aa0>;
		regulator-max-microvolt = <0x325aa0>;
		phandle = <0xb>;
	};

	vcc5v0 {
		compatible = "regulator-fixed";
		regulator-name = "vcc5v0";
		regulator-min-microvolt = <0x4c4b40>;
		regulator-max-microvolt = <0x4c4b40>;
		phandle = <0x6e>;
	};

	aliases {
		ethernet0 = "/soc/ethernet@1c30000";
		serial0 = "/soc/serial@1c28000";
		serial1 = "/soc/serial@1c28400";
	};

	connector {
		compatible = "hdmi-connector";
		type = [61 00];

		port {

			endpoint {
				remote-endpoint = <0x33>;
				phandle = <0x26>;
			};
		};
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";

		pwr_led {
			label = "bananapi-m2-plus:red:pwr";
			gpios = <0x11 0x0 0xa 0x0>;
			default-state = "on";
		};
	};

	gpio_keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";

		sw4 {
			label = "power";
			linux,code = <0x100>;
			gpios = <0x11 0x0 0x3 0x1>;
		};
	};

	gmac-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "gmac-3v3";
		regulator-min-microvolt = <0x325aa0>;
		regulator-max-microvolt = <0x325aa0>;
		startup-delay-us = <0x186a0>;
		enable-active-high;
		gpio = <0xc 0x3 0x6 0x0>;
		phandle = <0x17>;
	};

	wifi_pwrseq {
		compatible = "mmc-pwrseq-simple";
		pinctrl-names = "default";
		reset-gpios = <0x11 0x0 0x7 0x1>;
		phandle = <0xe>;
	};

	__symbols__ {
		sound_hdmi = "/sound";
		osc24M = "/clocks/osc24M_clk";
		osc32k = "/clocks/osc32k_clk";
		iosc = "/clocks/internal-osc-clk";
		de = "/display-engine";
		display_clocks = "/soc/clock@1000000";
		mixer0 = "/soc/mixer@1100000";
		mixer0_out = "/soc/mixer@1100000/ports/port@1";
		mixer0_out_tcon0 = "/soc/mixer@1100000/ports/port@1/endpoint";
		syscon = "/soc/syscon@1c00000";
		dma = "/soc/dma-controller@1c02000";
		tcon0 = "/soc/lcd-controller@1c0c000";
		tcon0_in = "/soc/lcd-controller@1c0c000/ports/port@0";
		tcon0_in_mixer0 = "/soc/lcd-controller@1c0c000/ports/port@0/endpoint";
		tcon0_out = "/soc/lcd-controller@1c0c000/ports/port@1";
		tcon0_out_hdmi = "/soc/lcd-controller@1c0c000/ports/port@1/endpoint@1";
		mmc0 = "/soc/mmc@1c0f000";
		mmc1 = "/soc/mmc@1c10000";
		brcmf = "/soc/mmc@1c10000/wifi@1";
		mmc2 = "/soc/mmc@1c11000";
		usb_otg = "/soc/usb@1c19000";
		sid = "/soc/eeprom@01c14000";
		usbphy = "/soc/phy@1c19400";
		ehci0 = "/soc/usb@1c1a000";
		ohci0 = "/soc/usb@1c1a400";
		ehci1 = "/soc/usb@1c1b000";
		ohci1 = "/soc/usb@1c1b400";
		ehci2 = "/soc/usb@1c1c000";
		ohci2 = "/soc/usb@1c1c400";
		ehci3 = "/soc/usb@1c1d000";
		ohci3 = "/soc/usb@1c1d400";
		ccu = "/soc/clock@1c20000";
		pio = "/soc/pinctrl@1c20800";
		csi_pins = "/soc/pinctrl@1c20800/csi";
		emac_rgmii_pins = "/soc/pinctrl@1c20800/emac0";
		i2c0_pins = "/soc/pinctrl@1c20800/i2c0";
		i2c1_pins = "/soc/pinctrl@1c20800/i2c1";
		i2c2_pins = "/soc/pinctrl@1c20800/i2c2";
		i2s0_pins = "/soc/pinctrl@1c20800/i2s0";
		i2s1_pins = "/soc/pinctrl@1c20800/i2s1";
		mmc0_pins = "/soc/pinctrl@1c20800/mmc0";
		mmc1_pins = "/soc/pinctrl@1c20800/mmc1";
		mmc2_8bit_pins = "/soc/pinctrl@1c20800/mmc2_8bit";
		spdif_tx_pins_a = "/soc/pinctrl@1c20800/spdif";
		spi0_pins = "/soc/pinctrl@1c20800/spi0";
		spi1_pins = "/soc/pinctrl@1c20800/spi1";
		uart0_pins_a = "/soc/pinctrl@1c20800/uart0";
		uart1_pins = "/soc/pinctrl@1c20800/uart1";
		uart1_rts_cts_pins = "/soc/pinctrl@1c20800/uart1_rts_cts";
		uart2_pins = "/soc/pinctrl@1c20800/uart2";
		uart3_pins = "/soc/pinctrl@1c20800/uart3";
		uart3_rts_cts_pins = "/soc/pinctrl@1c20800/uart3_rts_cts";
		emac = "/soc/ethernet@1c30000";
		mdio = "/soc/ethernet@1c30000/mdio";
		internal_mdio = "/soc/ethernet@1c30000/mdio-mux/mdio@1";
		int_mii_phy = "/soc/ethernet@1c30000/mdio-mux/mdio@1/ethernet-phy@1";
		external_mdio = "/soc/ethernet@1c30000/mdio-mux/mdio@2";
		ext_rgmii_phy = "/soc/ethernet@1c30000/mdio-mux/mdio@2/ethernet-phy@1";
		spi0 = "/soc/spi@1c68000";
		spi1 = "/soc/spi@1c69000";
		wdt0 = "/soc/watchdog@1c20ca0";
		spdif = "/soc/spdif@1c21000";
		pwm = "/soc/pwm@1c21400";
		i2s0 = "/soc/i2s@1c22000";
		i2s1 = "/soc/i2s@1c22400";
		i2s2 = "/soc/i2s@1c22800";
		codec = "/soc/codec@1c22c00";
		uart0 = "/soc/serial@1c28000";
		uart1 = "/soc/serial@1c28400";
		uart2 = "/soc/serial@1c28800";
		uart3 = "/soc/serial@1c28c00";
		i2c0 = "/soc/i2c@1c2ac00";
		i2c1 = "/soc/i2c@1c2b000";
		i2c2 = "/soc/i2c@1c2b400";
		gic = "/soc/interrupt-controller@1c81000";
		hdmi = "/soc/hdmi@1ee0000";
		hdmi_in = "/soc/hdmi@1ee0000/ports/port@0";
		hdmi_in_tcon0 = "/soc/hdmi@1ee0000/ports/port@0/endpoint";
		hdmi_out = "/soc/hdmi@1ee0000/ports/port@1";
		hdmi_out_con = "/soc/hdmi@1ee0000/ports/port@1/endpoint";
		hdmi_phy = "/soc/hdmi-phy@1ef0000";
		csi = "/soc/camera@1cb0000";
		rtc = "/soc/rtc@1f00000";
		r_ccu = "/soc/clock@1f01400";
		codec_analog = "/soc/codec-analog@1f015c0";
		ir = "/soc/ir@1f02000";
		r_i2c = "/soc/i2c@1f02400";
		r_pio = "/soc/pinctrl@1f02c00";
		ir_pins_a = "/soc/pinctrl@1f02c00/ir";
		r_i2c_pins = "/soc/pinctrl@1f02c00/r-i2c";
		ths = "/soc/thermal-sensor@1c25000";
		mali = "/soc/gpu@1c40000";
		cpu0_opp_table = "/opp_table0";
		cpu0 = "/cpus/cpu@0";
		cpu_warm = "/thermal-zones/cpu-thermal/trips/cpu_warm";
		cpu_hot_pre = "/thermal-zones/cpu-thermal/trips/cpu_hot_pre";
		cpu_hot = "/thermal-zones/cpu-thermal/trips/cpu_hot";
		cpu_very_hot_pre = "/thermal-zones/cpu-thermal/trips/cpu_very_hot_pre";
		cpu_very_hot = "/thermal-zones/cpu-thermal/trips/cpu_very_hot";
		cpu_crit = "/thermal-zones/cpu-thermal/trips/cpu_crit";
		reg_ahci_5v = "/ahci-5v";
		reg_usb0_vbus = "/usb0-vbus";
		reg_usb1_vbus = "/usb1-vbus";
		reg_usb2_vbus = "/usb2-vbus";
		reg_vcc3v0 = "/vcc3v0";
		reg_vcc3v3 = "/vcc3v3";
		reg_vcc5v0 = "/vcc5v0";
		hdmi_con_in = "/connector/port/endpoint";
		reg_gmac_3v3 = "/gmac-3v3";
		wifi_pwrseq = "/wifi_pwrseq";
	};
};

 

 

Still does not work at start, because it does not set power enable pin, still have to set i manually:

 

#define SUNXI_PD_BASE    96
#define SUNXI_PE_BASE    128

 

# POWER ENABLE = 1  PIN PD14
echo "110" > /sys/class/gpio/export
echo "out" > /sys/class/gpio/gpio110/direction
echo "1" > /sys/class/gpio/gpio110/value

# CSI PWDN = 0 (no power down), PIN PE15
echo "143" > /sys/class/gpio/export
echo "out" > /sys/class/gpio/gpio143/direction
echo "0" > /sys/class/gpio/gpio143/value

 

 

check if it worked, load modul again:

 

root@bananapim2plus:~# modprobe ov5640

[ 1594.303237] ov5640 1-003c: 1-003c supply DOVDD not found, using dummy regulator
[ 1594.303349] ov5640 1-003c: 1-003c supply DVDD not found, using dummy regulator
[ 1594.303442] ov5640 1-003c: 1-003c supply AVDD not found, using dummy regulator
[ 1594.335815] ov5640_find_mode fps=1 width=1280 height=720 nearest=1

 

 

root@bananapim2plus:~#  v4l2-ctl -d /dev/video0  -D

Driver Info (not using libv4l2):
        Driver name   : sun6i-video
        Card type     : sun6i-csi
        Bus info      : platform:csi
        Driver version: 4.18.11
        Capabilities  : 0x84200001
                Video Capture
                Streaming
                Extended Pix Format
                Device Capabilities
        Device Caps   : 0x04200001
                Video Capture
                Streaming
                Extended Pix Format

 

root@bananapim2plus:~# v4l2-ctl --all -d /dev/video0

Driver Info (not using libv4l2):
        Driver name   : sun6i-video
        Card type     : sun6i-csi
        Bus info      : platform:csi
        Driver version: 4.18.11
        Capabilities  : 0x84200001
                Video Capture
                Streaming
                Extended Pix Format                                                                                                                                                                                                                                            
                Device Capabilities                                                                                                                                                                                                                                            
        Device Caps   : 0x04200001                                                                                                                                                                                                                                             
                Video Capture                                                                                                                                                                                                                                                  
                Streaming                                                                                                                                                                                                                                                      
                Extended Pix Format                                                                                                                                                                                                                                            
Priority: 2                                                                                                                                                                                                                                                                    
Video input : 0 (ov5640 1-003c: ok)                                                                                                                                                                                                                                            
Format Video Capture:                                                                                                                                                                                                                                                          
        Width/Height      : 1280/720                                                                                                                                                                                                                                           
        Pixel Format      : 'UYVY'                                                                                                                                                                                                                                             
        Field             : Unknown (001fffff)                                                                                                                                                                                                                                 
        Bytes per Line    : 2560                                                                                                                                                                                                                                               
        Size Image        : 1843200                                                                                                                                                                                                                                            
        Colorspace        : sRGB                                                                                                                                                                                                                                               
        Transfer Function : sRGB                                                                                                                                                                                                                                               
        YCbCr/HSV Encoding: ITU-R 601                                                                                                                                                                                                                                          
        Quantization      : Full Range                                                                                                                                                                                                                                         
        Flags             : c0caee48                                                                                                                                                                                                                                           
                                                                                                                                                                                                                                                                               
User Controls                                                                                                                                                                                                                                                                  
                                                                                                                                                                                                                                                                               
                       contrast (int)    : min=0 max=255 step=1 default=0 value=0 flags=slider                                                                                                                                                                                 
                     saturation (int)    : min=0 max=255 step=1 default=64 value=64 flags=slider                                                                                                                                                                               
                            hue (int)    : min=0 max=359 step=1 default=0 value=0 flags=slider                                                                                                                                                                                 
        white_balance_automatic (bool)   : default=1 value=1 flags=update                                                                                                                                                                                                      
                    red_balance (int)    : min=0 max=4095 step=1 default=0 value=0 flags=inactive, slider                                                                                                                                                                      
                   blue_balance (int)    : min=0 max=4095 step=1 default=0 value=0 flags=inactive, slider                                                                                                                                                                      
                       exposure (int)    : min=0 max=65535 step=1 default=0 value=1 flags=inactive, volatile                                                                                                                                                                   
                 gain_automatic (bool)   : default=1 value=1 flags=update                                                                                                                                                                                                      
                           gain (int)    : min=0 max=1023 step=1 default=0 value=22 flags=inactive, volatile                                                                                                                                                                   
           power_line_frequency (menu)   : min=0 max=3 default=1 value=1                                                                                                                                                                                                       
                                                                                                                                                                                                                                                                               
Camera Controls                                                                                                                                                                                                                                                                
                                                                                                                                                                                                                                                                               
                  auto_exposure (menu)   : min=0 max=1 default=0 value=0 flags=update                                                                                                                                                                                          
                                                                                                                                                                                                                                                                               
Image Processing Controls                                                                                                                                                                                                                                                      
                                                                                                                                                                                                                                                                               
                   test_pattern (menu)   : min=0 max=1 default=0 value=0 

 

cap example from github did not work for me, have to find out why

root@bananapim2plus:~/cap-v4l2# ./cap 1280 720 4 1 -999 -1 -1

https://github.com/avafinger/gc2035/issues/4

---- cap parameters -----
width: 1280
height: 720
v4l2 buffers: 4
exposure: -999
hflip: -1
vflip: -1
Mode: V4L2_MODE_VIDEO
Driver: "sun6i-video"
Card: "sun6i-csi"
Bus: "platform:csi"
Version: 1.0
Capabilities: 84200001
Input: 0
v4l2: unable to set stream parm.
v4l2: failed to init camera.

 

python example worked (=

https://stackoverflow.com/questions/48793174/why-is-my-ov5640-camera-picture-vertical-bars-when-using-python-and-opencv

 

Finally got a picture (:

 

test3.thumb.jpg.21d8e5f419e8519255ab6b19863370ca.jpg

 

 

 

 

 

 

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