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gurzixo

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Posts posted by gurzixo

  1. Hi again KSilva,

     

    Using RKDevTool (RKT) for bringing back the box alive, and flash an android image:

    1. UNPLUG the box, and do NOT plug it now. The Power will come from USB.
    2. You can switch RKT in english by editing config.ini and changing Selected=2 (use an 8bit editor such as VSCode).
    3. Start RKT, connect the box. If you hear a Windows DingDong, you have won, and you see "LOADER Mode" or a "MASKROM mode" in RKT. In that case you can plug power so that the box stays in that mode and go to 6). Otherwise you have to put the chip in one of those modes.
    4. The best thing is Loader (ie. Rockchip) mode. With Rockchip/Android (opposed to Armbian) with a normal flash image (at least if the bootloader is not erased), you can enter this mode by pressing the "Rockchip button" while connecting the USB. This button is usually located behind the audio jack, you can use a wood toothpick (cut both ends as it hurts...) for that. This is NOT the case if there is an Armbian image; in that case, the only way to enter loader mode is to interrupt the boot from the serial console (BTW, RK/android is 1500000000-N-8-1 (yes, 1.5MB/s), Armbian is 115000-N-8-1)
    5. If this does not work, the MASKROM mode is your last resort.  The hardware of the chip automatically enters this mode at boot if the flash is erased or not accessible. Technically, the flash is a serial memory accessed synchronously using a clock line, so the trick is to short this line to ground while connecting the USB. Most boxes have some pads for that, or the PCB can receive a Nand memory in a QFP package; in that case you have to short pins 8 and 9 with the small screwdriver and a good magnifier (see here for a video). Unfortunately, typically now the emmc chips use BGA packages, and I had to throw away a bricked box where I could not find the clock line on the PCB (or maybe the DRAM was dead... ;)) You have to be perseverant, as it does not work  each time, but eventually you will be rewarded by a Windows DingDong!. This is where we can help with the pictures of your PCB.
    6. In either mode, select "upgrade firmware" tab, load the android image from disk with the "Firmware" button (you have to wait 20seconds for the firmware to be decoded), erase the memory, and flash the firmware.

    If you boot in Armbian mode, unfortunately the toothpick trick does not work, and the only way to enter LOADER mode is to interrupt the boot from the serial line, and from the u-boot monitor in RAM, erase the u-boot in flash so that when rebooting, it enters LOADER mode. You can find details here  (mmc erase 0x4000 0x2000)

     

    If you enter Maskrom mode, and don't want to burn a complete image, but at least a bootloader, so that it is a lot more easier to enter back loader mode with a toothpick.

     

    I recommand that you bring back your box alive with stock firmware before installing Linux.

     

    Unfortunately, your box has NO sdcard, and that's a pity as it helps A LOT. Next time, buy a box WITH AN SDCARD!

    I was in the same case, and was not able to flash an u-boot allowing the box to continue booting on USB, as described in the 1st post. So I had to flash images directly in emmc, which is not good in case of problems,

     

    In order to install LInux on such a system, it is best to switch from Windows to Linux as I have not found a way to burn an Armbian image with RKT, and use rkdeveloptool, got from here . This is a CLI program, of lower level, which is agnostic about what it burns. There are instructions how to use it in the 1st post.

     

    Just a remark which costed me a few hours of headscratching: when being in Maskrom, the ONLY command accepted is to download a bootloder (rkdeveloptool WL bootloader.bin). ONLY after that you can use the other commands.

     

    Jock, Fabiobassa, balbes150 and others have done a tremendous job in creating armbian images, and the multitool, and they work most of the time. But I had a couple of boxes (called T96 Mini) where even the old (4.4) kernel panicked (serial console is mandatory to see what's going on...). In that case, fabiobassa was kind enough to help me install manually an even older kernel manually using RKT, but this is a complex process and the resulting system is NOT very stable, so I don't recommand that. 

     

    Just FYI, I have standardised now on those 2 boxes (Q96 HOME 4K and V88 4K - beware, rhe 4G/32G is in fact a 1G/8G!!!) which, despite having a small memory, have 4 usb (enough for a WIFI dongle and some USB SSD), and are perfect as small headless Linux servers with the 4.4 kernel, and extremely stable :

    stress-ng --sequential 0

    runs for 24H without crash, but it is a good idea to add a small heat-sink on the processor as it throttles speed above 105C celsius...)

     

    Just my 2 cents, and welcome to the club!

  2. Boa noite KSilva! (I'm French, but I live in Algarve...)

    I was in the same case as you, knew nothing about those boxes and rochchip, but, with the STRONG help of fabiobassa, I have been able to resuscitate a few of thoses boxes, and at least for some of them, able to have a stable Linux.

     

    A few questions:

    - Are you "fluent" in Linux and windows, do you have a windows system available?

    - Do you have some experience in electronics, microprocessors and microcomputers?

    - Do you have experience with serial connexions?

     

    My recommendation for you:

    - grab a male-male A-A usb cable, a micro (I mean MICRO) screwdriver, and a high magnification magnifying glass.

    - Open your box, take good quality pictures of both sides of the PCB and  put them on the forum.

    - The 2 next steps are: put the box either in Rockchip (ie. Loader) mode or in Maskrom mode, and try to connect a serial line to the box serial connection (1500000-N-8-1) to get console log, as this helps A LOT. (all cards have 3 or 4 plots for that: Gnd, Tx, Rx, Vcc . We can help you find that on the pictures; you will need a serial adapter, some thin wires that you have usually to solder on some pads and a com program - minicom works very well)

    - After that, you will have to flash some firmware using the USB to USB OTG cable.

    - Even if you prefer Linux (that'salso my case...), I suggest that you use windows for bringing back your box alive, as W tools are A LOT more complete, and also windows emits a sound when a new USB device is recognized, which helps a lot.

     

    This page explains the boot process.

    You can grab your stock firmware on this page . The archive of firmware contains RKDevelopTool.exe, which is used for flashing firmware.

    You can grab also some more Rockchip tools here

     

    Here are the main points that I understood:

    - Armbian and Rockchip/android firmwares are RADICALLY different, and their boot process are INCOMPATIBLE. Conceptually, they are similar, but takes very different approaches.

    - Let's detail the RK approach, which is very basic, unsophisticated and pragmatic. The image in flash contains the following elements at FIXED addresses, from bottom to top of flash:

    - A "partition table", (Parameter in RKDevTool) which indicates the addresses of the following blobs (with extension .img)

    - Loader, closed source called after reset by the HW of the processor.

    - The "trusted bloc", closed source, which performs some needed magic... started by the loader

    - The RK uboot, started by the trust module, which is similar to the BIOS for PC, and contains an interactive monitor, that you can start by entering a char on the serial console; otherwise it continues the boot.

    - The Device Tree Block (DTB, called "Resource" in RKDevTool)): this is a binary blob  which contains all the details and parameters of the hardware. it is compiled from source, and is COMPLETELY INCOMPATIBLE with the Armbian DTB. This allows to have a standard kernel, which is the same for all boxes.

    - The Linux kernel, started by the uboot, with a command line indicating where in flash to find the DTB, the Boot partition and the root file system.

    - The Boot partition

    - The Root partition (called "System" in RKDevTool), containing the Linux userland.

     

    On android, there are other blobs, used for backup and recovery, in case something goes wrong.

    All those blobs are usually packed together by the above RK tools, to create a complete image.

    RKDevtool allows you to flash each of those blobs in a specific place in memory, erase the memory, do some low level tests or flash a complete image.

    I will detail some practical instructions on a next post.

     

     

     

     

     

  3. I have a couple of questions:

    - Is this storage map the one used by android, multitool, legacy and up-to-date armbian, or are they each using different maps?

    - I found very few information about the GPT partition table, what to put inside and how to build the parameter_gpt.txt  file used by rkdeveloptool. Are there some pointers available?

     

    I have also a strange thing: I am able to enter loader mode by wiping emmc, and everything works well (ie. test chip, read id, etc.). But when I enter maskrom mode, I have the correct PID/VID on USB, but all rkdevelop commands block (ie I have to press ^C to come back to shell).

    This is the case either when I reboot by software (rkdevelop rd 3) or by hardware (ie. short emmc pins)

    And when I reload multitool in emmc, it still gives kernel panic.

    strange...

     

     

     

  4. Thanks to all of you for your kind words! I also forget to thank all the other who helped ;)

     

    FYI I am French, 62, living now in Portugal, *soldered* my first computer (a Z80 Nascom ;) ) at 19, and I have a good experience in embedded systems, electronics, network and system programming on various OSes.

     

    @fabiobassa @Jock :

    I tried to extract the dtb using PabloCastellano's extract_dtb.py, but it gave weird things. Thanks for your tool (I work on Linux and there was also a Linux version!). Using it with 2nd level decoding, and then using linux's dtc on Image/resource.img.dump/rk-kernel.dtb for my working android image gave:

    Spoiler

    <stdout>: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name
    <stdout>: Warning (unit_address_vs_reg): /clocks: node has a reg or ranges property, but no unit name
    <stdout>: Warning (unit_address_vs_reg): /clocks/clock_regs: node has a reg or ranges property, but no unit name
    <stdout>: Warning (unit_address_vs_reg): /gpu: node has a reg or ranges property, but no unit name
    <stdout>: Warning (unit_address_vs_reg): /vop_mmu: node has a reg or ranges property, but no unit name
    <stdout>: Warning (unit_address_vs_reg): /vpu_mmu: node has a reg or ranges property, but no unit name
    <stdout>: Warning (unit_address_vs_reg): /iep_mmu: node has a reg or ranges property, but no unit name
    <stdout>: Warning (unit_address_vs_reg): /vdec_mmu: node has a reg or ranges property, but no unit name
    <stdout>: Warning (unit_address_vs_reg): /tve: node has a reg or ranges property, but no unit name
    <stdout>: Warning (unit_address_vs_reg): /phy/usb-phy0: node has a reg or ranges property, but no unit name
    <stdout>: Warning (unit_address_vs_reg): /phy/usb-phy1: node has a reg or ranges property, but no unit name
    <stdout>: Warning (unit_address_vs_reg): /phy/usb-phy2: node has a reg or ranges property, but no unit name
    <stdout>: Warning (unit_address_vs_reg): /regulators/regulator@0: node has a unit name, but no reg property
    <stdout>: Warning (unit_address_vs_reg): /regulators/regulator@1: node has a unit name, but no reg property
    <stdout>: Warning (unit_address_vs_reg): /pwm-regulator1/regulators/regulator@0: node has a unit name, but no reg property
    <stdout>: Warning (unit_address_vs_reg): /pwm-regulator2/regulators/regulator@1: node has a unit name, but no reg property
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/pll_cons/pll-clk@0000: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/pll_cons/pll-clk@000c: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/pll_cons/pll-clk@0018: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/pll_cons/pll-clk@0024: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@0044: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@0048: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@004c: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@0050: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@0054: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@0058: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@005c: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@0060: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@0064: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@0068: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@006c: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@0070: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@0074: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@0078: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@007c: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@0080: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@0084: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@0088: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@008c: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@0090: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@0094: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@0098: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@009c: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@00a0: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@00a4: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@00a8: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@00ac: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@00b0: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@00b4: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@00b8: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@00bc: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@00c0: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@00c4: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@00c8: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@00cc: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_sel_cons/sel-con@0134: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_gate_cons/gate-clk@00d0: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_gate_cons/gate-clk@00d4: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_gate_cons/gate-clk@00d8: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_gate_cons/gate-clk@00dc: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_gate_cons/gate-clk@00e0: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_gate_cons/gate-clk@00e4: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_gate_cons/gate-clk@00e8: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_gate_cons/gate-clk@00ec: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_gate_cons/gate-clk@00f0: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_gate_cons/gate-clk@00f4: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_gate_cons/gate-clk@00f8: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_gate_cons/gate-clk@00fc: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_gate_cons/gate-clk@0100: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_gate_cons/gate-clk@0104: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_gate_cons/gate-clk@0108: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /clocks/clock_regs/clk_gate_cons/gate-clk@010c: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /spi@11090000/spi_test@00: unit name should not have leading 0s
    <stdout>: Warning (unit_address_format): /spi@11090000/spi_test@01: unit name should not have leading 0s
    <stdout>: Warning (simple_bus_reg): /regulators/regulator@0: missing or empty reg/ranges property
    <stdout>: Warning (simple_bus_reg): /regulators/regulator@1: missing or empty reg/ranges property
    <stdout>: Warning (spi_bus_reg): /spi@11090000/spi_test@00: SPI bus unit address format error, expected "0"
    <stdout>: Warning (spi_bus_reg): /spi@11090000/spi_test@01: SPI bus unit address format error, expected "1"
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@0044: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@0048: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@004c: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@0050: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@0054: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@0058: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@005c: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@0060: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@0064: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@0068: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@006c: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@0070: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@0074: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@0078: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@007c: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@0080: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@0084: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@0088: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@008c: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@0090: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@0094: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@0098: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@009c: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@00a0: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@00a4: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@00a8: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@00ac: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@00b0: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@00b4: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@00b8: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@00bc: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@00c0: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@00c4: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@00c8: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@00cc: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /clocks/clock_regs/clk_sel_cons/sel-con@0134: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /rockchip-ion: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /regulators: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /pwm-regulator1/regulators: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    <stdout>: Warning (avoid_unnecessary_addr_size): /pwm-regulator2/regulators: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    /dts-v1/;

    / {
        #address-cells = <0x01>;
        #size-cells = <0x01>;
        compatible = "rockchip,rk3229";
        interrupt-parent = <0x01>;

        chosen {
            bootargs = "vmalloc=496M psci=enable rockchip_jtag";
        };

        aliases {
            serial0 = "/serial@11010000";
            serial1 = "/serial@11020000";
            serial2 = "/serial@11030000";
            i2c0 = "/i2c@11050000";
            i2c1 = "/i2c@11060000";
            i2c2 = "/i2c@11070000";
            i2c3 = "/i2c@11080000";
            lcdc0 = "/vop@20050000";
            spi0 = "/spi@11090000";
        };

        memory {
            device_type = "memory";
            reg = <0x00 0x00>;
        };

        clocks {
            compatible = "rockchip,rk-clocks";
            #address-cells = <0x01>;
            #size-cells = <0x01>;
            ranges = <0x00 0x110e0000 0x1000>;

            fixed_rate_cons {
                compatible = "rockchip,rk-fixed-rate-cons";

                xin24m {
                    compatible = "rockchip,rk-fixed-clock";
                    clock-output-names = "xin24m";
                    clock-frequency = <0x16e3600>;
                    #clock-cells = <0x00>;
                    linux,phandle = <0x02>;
                    phandle = <0x02>;
                };

                xin12m {
                    compatible = "rockchip,rk-fixed-clock";
                    clocks = <0x02>;
                    clock-output-names = "xin12m";
                    clock-frequency = <0xb71b00>;
                    #clock-cells = <0x00>;
                    linux,phandle = <0x14>;
                    phandle = <0x14>;
                };

                hdmiphy_out {
                    compatible = "rockchip,rk-fixed-clock";
                    clock-output-names = "hdmiphy_out";
                    clock-frequency = <0x2367b880>;
                    #clock-cells = <0x00>;
                    linux,phandle = <0x45>;
                    phandle = <0x45>;
                };

                usbphy0_480m {
                    compatible = "rockchip,rk-fixed-clock";
                    clock-output-names = "usbphy0_480m";
                    clock-frequency = <0x1c9c3800>;
                    #clock-cells = <0x00>;
                    linux,phandle = <0x46>;
                    phandle = <0x46>;
                };

                usbphy1_480m {
                    compatible = "rockchip,rk-fixed-clock";
                    clock-output-names = "usbphy1_480m";
                    clock-frequency = <0x1c9c3800>;
                    #clock-cells = <0x00>;
                    linux,phandle = <0x47>;
                    phandle = <0x47>;
                };

                jtag_clkin {
                    compatible = "rockchip,rk-fixed-clock";
                    clock-output-names = "jtag_clkin";
                    clock-frequency = <0x00>;
                    #clock-cells = <0x00>;
                    linux,phandle = <0x4c>;
                    phandle = <0x4c>;
                };

                dummy {
                    compatible = "rockchip,rk-fixed-clock";
                    clock-output-names = "dummy";
                    clock-frequency = <0x00>;
                    #clock-cells = <0x00>;
                    linux,phandle = <0x19>;
                    phandle = <0x19>;
                };

                gmac_clkin {
                    compatible = "rockchip,rk-fixed-clock";
                    clock-output-names = "gmac_clkin";
                    clock-frequency = <0x7735940>;
                    #clock-cells = <0x00>;
                    linux,phandle = <0x3c>;
                    phandle = <0x3c>;
                };

                phy_50m_out {
                    compatible = "rockchip,rk-fixed-clock";
                    clock-output-names = "phy_50m_out";
                    clock-frequency = <0x00>;
                    #clock-cells = <0x00>;
                    linux,phandle = <0x3d>;
                    phandle = <0x3d>;
                };

                phy_rx_out {
                    compatible = "rockchip,rk-fixed-clock";
                    clock-output-names = "phy_rx_out";
                    clock-frequency = <0x00>;
                    #clock-cells = <0x00>;
                };

                phy_tx_out {
                    compatible = "rockchip,rk-fixed-clock";
                    clock-output-names = "phy_tx_out";
                    clock-frequency = <0x00>;
                    #clock-cells = <0x00>;
                };

                clkin_hsadc_tsp {
                    compatible = "rockchip,rk-fixed-clock";
                    clock-output-names = "clkin_hsadc_tsp";
                    clock-frequency = <0x00>;
                    #clock-cells = <0x00>;
                    linux,phandle = <0x53>;
                    phandle = <0x53>;
                };

                i2s_clkin {
                    compatible = "rockchip,rk-fixed-clock";
                    clock-output-names = "i2s_clkin";
                    clock-frequency = <0x00>;
                    #clock-cells = <0x00>;
                    linux,phandle = <0x13>;
                    phandle = <0x13>;
                };
            };

            fixed_factor_cons {
                compatible = "rockchip,rk-fixed-factor-cons";

                hclk_rkvdec {
                    compatible = "rockchip,rk-fixed-factor-clock";
                    clocks = <0x03>;
                    clock-output-names = "hclk_rkvdec";
                    clock-div = <0x04>;
                    clock-mult = <0x01>;
                    #clock-cells = <0x00>;
                    linux,phandle = <0x58>;
                    phandle = <0x58>;
                };

                hclk_vpu {
                    compatible = "rockchip,rk-fixed-factor-clock";
                    clocks = <0x04>;
                    clock-output-names = "hclk_vpu";
                    clock-div = <0x04>;
                    clock-mult = <0x01>;
                    #clock-cells = <0x00>;
                    linux,phandle = <0x96>;
                    phandle = <0x96>;
                };

                xin32k_out {
                    compatible = "rockchip,rk-fixed-clock";
                    clocks = <0x05>;
                    clock-output-names = "xin32k_out";
                    clock-div = <0x01>;
                    clock-mult = <0x01>;
                    #clock-cells = <0x00>;
                };
            };

            clock_regs {
                compatible = "rockchip,rk-clock-regs";
                #address-cells = <0x01>;
                #size-cells = <0x01>;
                reg = <0x00 0x1000>;
                ranges;

                pll_cons {
                    compatible = "rockchip,rk-pll-cons";
                    #address-cells = <0x01>;
                    #size-cells = <0x01>;
                    ranges;

                    pll-clk@0000 {
                        compatible = "rockchip,rk3188-pll-clk";
                        reg = <0x00 0x10>;
                        mode-reg = <0x40 0x00>;
                        status-reg = <0x04 0x0a>;
                        clocks = <0x02>;
                        clock-output-names = "clk_apll";
                        rockchip,pll-type = <0x40>;
                        #clock-cells = <0x00>;
                        linux,phandle = <0x07>;
                        phandle = <0x07>;
                    };

                    pll-clk@000c {
                        compatible = "rockchip,rk3188-pll-clk";
                        reg = <0x0c 0x10>;
                        mode-reg = <0x40 0x04>;
                        status-reg = <0x10 0x0a>;
                        clocks = <0x02>;
                        clock-output-names = "clk_dpll";
                        rockchip,pll-type = <0x80>;
                        #clock-cells = <0x00>;
                        linux,phandle = <0x09>;
                        phandle = <0x09>;
                    };

                    pll-clk@0018 {
                        compatible = "rockchip,rk3188-pll-clk";
                        reg = <0x18 0x10>;
                        mode-reg = <0x40 0x08>;
                        status-reg = <0x1c 0x0a>;
                        clocks = <0x02>;
                        clock-output-names = "clk_cpll";
                        rockchip,pll-type = <0x100>;
                        #clock-cells = <0x00>;
                        #clock-init-cells = <0x01>;
                        linux,phandle = <0x0b>;
                        phandle = <0x0b>;
                    };

                    pll-clk@0024 {
                        compatible = "rockchip,rk3188-pll-clk";
                        reg = <0x24 0x10>;
                        mode-reg = <0x40 0x0c>;
                        status-reg = <0x28 0x0a>;
                        clocks = <0x02>;
                        clock-output-names = "clk_gpll";
                        rockchip,pll-type = <0x100>;
                        #clock-cells = <0x00>;
                        #clock-init-cells = <0x01>;
                        linux,phandle = <0x08>;
                        phandle = <0x08>;
                    };
                };

                clk_sel_cons {
                    compatible = "rockchip,rk-sel-cons";
                    #address-cells = <0x01>;
                    #size-cells = <0x01>;
                    ranges;

                    sel-con@0044 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x44 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        clk_core_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x05>;
                            clocks = <0x06>;
                            clock-output-names = "clk_core";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x0b>;
                            rockchip,flags = <0xc0>;
                        };

                        clk_core_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x06 0x02>;
                            clocks = <0x07 0x08 0x09>;
                            clock-output-names = "clk_core";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x06>;
                            phandle = <0x06>;
                        };

                        aclk_bus_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x08 0x05>;
                            clocks = <0x0a>;
                            clock-output-names = "aclk_bus";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x100>;
                            linux,phandle = <0x0d>;
                            phandle = <0x0d>;
                        };

                        aclk_bus_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0d 0x02>;
                            clocks = <0x0b 0x08 0x0c>;
                            clock-output-names = "aclk_bus";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x0a>;
                            phandle = <0x0a>;
                        };
                    };

                    sel-con@0048 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x48 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        pclk_dbg_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x04>;
                            clocks = <0x06>;
                            clock-output-names = "pclk_dbg";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x0c>;
                            linux,phandle = <0x60>;
                            phandle = <0x60>;
                        };

                        aclk_core_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x04 0x03>;
                            clocks = <0x06>;
                            clock-output-names = "aclk_core";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x0c>;
                            linux,phandle = <0x44>;
                            phandle = <0x44>;
                        };

                        hclk_bus_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x08 0x02>;
                            clocks = <0x0d>;
                            clock-output-names = "hclk_bus";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x51>;
                            phandle = <0x51>;
                        };

                        pclk_bus_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x0c 0x03>;
                            clocks = <0x0d>;
                            clock-output-names = "pclk_bus";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x4f>;
                            phandle = <0x4f>;
                        };
                    };

                    sel-con@004c {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x4c 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        hclk_vio_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x05>;
                            clocks = <0x0e>;
                            clock-output-names = "hclk_vio";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x57>;
                            phandle = <0x57>;
                        };

                        clk_nandc_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x08 0x05>;
                            clocks = <0x0f>;
                            clock-output-names = "clk_nandc";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x100>;
                        };

                        clk_nandc_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0e 0x01>;
                            clocks = <0x0b 0x08>;
                            clock-output-names = "clk_nandc";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x0f>;
                            phandle = <0x0f>;
                        };
                    };

                    sel-con@0050 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x50 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        clk_i2s1_pll_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x07>;
                            clocks = <0x10>;
                            clock-output-names = "clk_i2s1_pll";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x180>;
                            linux,phandle = <0x11>;
                            phandle = <0x11>;
                        };

                        clk_i2s1_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x08 0x02>;
                            clocks = <0x11 0x12 0x13 0x14>;
                            clock-output-names = "clk_i2s1";
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x0e>;
                            rockchip,flags = <0x04>;
                            linux,phandle = <0x15>;
                            phandle = <0x15>;
                        };

                        clk_i2s1_out_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0c 0x01>;
                            clocks = <0x15 0x14>;
                            clock-output-names = "clk_i2s1_out";
                            #clock-cells = <0x00>;
                            linux,phandle = <0x4b>;
                            phandle = <0x4b>;
                        };

                        i2s1_pll_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0f 0x01>;
                            clocks = <0x0b 0x08>;
                            clock-output-names = "clk_i2s1_pll";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x10>;
                            phandle = <0x10>;
                        };
                    };

                    sel-con@0054 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x54 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        testclk_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x05>;
                            clocks = <0x16>;
                            clock-output-names = "testclk";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                        };

                        clk_24m_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x08 0x05>;
                            clocks = <0x02>;
                            clock-output-names = "clk_24m";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                        };
                    };

                    sel-con@0058 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x58 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        clk_mac_pll_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x05>;
                            clocks = <0x17>;
                            clock-output-names = "clk_mac_pll";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x100>;
                            linux,phandle = <0x3e>;
                            phandle = <0x3e>;
                        };

                        clk_mac_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x05 0x01>;
                            clocks = <0x17 0x18>;
                            clock-output-names = "clk_mac";
                            #clock-cells = <0x00>;
                            rockchip,flags = <0x04>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x4e>;
                            phandle = <0x4e>;
                        };

                        clk_mac_pll_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x07 0x01>;
                            clocks = <0x19 0x08>;
                            clock-output-names = "clk_mac_pll";
                            #clock-cells = <0x00>;
                            linux,phandle = <0x17>;
                            phandle = <0x17>;
                        };

                        clk_gmac_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x08 0x05>;
                            clocks = <0x1a>;
                            clock-output-names = "clk_gmac";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x100>;
                        };

                        clk_gmac_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0f 0x01>;
                            clocks = <0x0b 0x08>;
                            clock-output-names = "clk_gmac";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x1a>;
                            phandle = <0x1a>;
                        };
                    };

                    sel-con@005c {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x5c 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        spdif_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x07>;
                            clocks = <0x1b>;
                            clock-output-names = "clk_spdif_pll";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x180>;
                            linux,phandle = <0x1c>;
                            phandle = <0x1c>;
                        };

                        spdif_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x08 0x02>;
                            clocks = <0x1c 0x1d 0x14>;
                            clock-output-names = "clk_spdif";
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x0e>;
                            rockchip,flags = <0x04>;
                            linux,phandle = <0x8b>;
                            phandle = <0x8b>;
                        };

                        spdif_pll_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0f 0x01>;
                            clocks = <0x0b 0x08>;
                            clock-output-names = "clk_spdif_pll";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x1b>;
                            phandle = <0x1b>;
                        };
                    };

                    sel-con@0060 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x60 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        i2s1_frac {
                            compatible = "rockchip,rk3188-frac-con";
                            clocks = <0x11>;
                            clock-output-names = "i2s1_frac";
                            rockchip,bits = <0x00 0x20>;
                            rockchip,clkops-idx = <0x05>;
                            #clock-cells = <0x00>;
                            linux,phandle = <0x12>;
                            phandle = <0x12>;
                        };
                    };

                    sel-con@0064 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x64 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        i2s0_frac {
                            compatible = "rockchip,rk3188-frac-con";
                            clocks = <0x1e>;
                            clock-output-names = "i2s0_frac";
                            rockchip,bits = <0x00 0x20>;
                            rockchip,clkops-idx = <0x05>;
                            #clock-cells = <0x00>;
                            linux,phandle = <0x20>;
                            phandle = <0x20>;
                        };
                    };

                    sel-con@0068 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x68 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        clk_i2s0_pll_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x07>;
                            clocks = <0x1f>;
                            clock-output-names = "clk_i2s0_pll";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x180>;
                            linux,phandle = <0x1e>;
                            phandle = <0x1e>;
                        };

                        clk_i2s0_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x08 0x02>;
                            clocks = <0x1e 0x20 0x13 0x14>;
                            clock-output-names = "clk_i2s0";
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x0e>;
                            rockchip,flags = <0x04>;
                            linux,phandle = <0x49>;
                            phandle = <0x49>;
                        };

                        i2s0_pll_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0f 0x01>;
                            clocks = <0x0b 0x08>;
                            clock-output-names = "clk_i2s0_pll";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x1f>;
                            phandle = <0x1f>;
                        };
                    };

                    sel-con@006c {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x6c 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        aclk_peri_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x05>;
                            clocks = <0x21>;
                            clock-output-names = "aclk_peri";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x100>;
                        };

                        hclk_peri_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x08 0x02>;
                            clocks = <0x21>;
                            clock-output-names = "hclk_peri";
                            rockchip,div-type = <0x80>;
                            rockchip,div-relations = <0x00 0x01 0x01 0x02 0x02 0x04>;
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x54>;
                            phandle = <0x54>;
                        };

                        aclk_peri_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0a 0x02>;
                            clocks = <0x0b 0x08 0x0c>;
                            clock-output-names = "aclk_peri";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x21>;
                            phandle = <0x21>;
                        };

                        pclk_peri_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x0c 0x02>;
                            clocks = <0x21>;
                            clock-output-names = "pclk_peri";
                            rockchip,div-type = <0x80>;
                            rockchip,div-relations = <0x00 0x01 0x01 0x02 0x02 0x04 0x03 0x08>;
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x55>;
                            phandle = <0x55>;
                        };
                    };

                    sel-con@0070 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x70 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        clk_sdmmc0_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x08>;
                            clocks = <0x22>;
                            clock-output-names = "clk_sdmmc0";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x03>;
                            rockchip,flags = <0x100>;
                        };

                        clk_sdmmc0_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x08 0x02>;
                            clocks = <0x0b 0x08 0x02 0x23>;
                            clock-output-names = "clk_sdmmc0";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x22>;
                            phandle = <0x22>;
                        };

                        clk_sdio_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0a 0x02>;
                            clocks = <0x0b 0x08 0x02 0x23>;
                            clock-output-names = "clk_sdio";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x24>;
                            phandle = <0x24>;
                        };

                        clk_emmc_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0c 0x02>;
                            clocks = <0x0b 0x08 0x02 0x23>;
                            clock-output-names = "clk_emmc";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x25>;
                            phandle = <0x25>;
                        };
                    };

                    sel-con@0074 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x74 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        clk_sdio_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x08>;
                            clocks = <0x24>;
                            clock-output-names = "clk_sdio";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x03>;
                            rockchip,flags = <0x100>;
                        };

                        clk_emmc_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x08 0x08>;
                            clocks = <0x25>;
                            clock-output-names = "clk_emmc";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x03>;
                            rockchip,flags = <0x100>;
                        };
                    };

                    sel-con@0078 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x78 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        clk_uart0_pll_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x07>;
                            clocks = <0x26>;
                            clock-output-names = "clk_uart0_pll";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,flags = <0x100>;
                            linux,phandle = <0x27>;
                            phandle = <0x27>;
                        };

                        clk_uart0_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x08 0x02>;
                            clocks = <0x27 0x28 0x02>;
                            clock-output-names = "clk_uart0";
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x0e>;
                            rockchip,flags = <0x04>;
                            linux,phandle = <0x69>;
                            phandle = <0x69>;
                        };

                        clk_uart0_pll_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0c 0x02>;
                            clocks = <0x0b 0x08 0x23>;
                            clock-output-names = "clk_uart0_pll";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x26>;
                            phandle = <0x26>;
                        };
                    };

                    sel-con@007c {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x7c 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        clk_uart1_pll_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x07>;
                            clocks = <0x29>;
                            clock-output-names = "clk_uart1_pll";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,flags = <0x100>;
                            linux,phandle = <0x2a>;
                            phandle = <0x2a>;
                        };

                        clk_uart1_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x08 0x02>;
                            clocks = <0x2a 0x2b 0x02>;
                            clock-output-names = "clk_uart1";
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x0e>;
                            rockchip,flags = <0x04>;
                            linux,phandle = <0x6e>;
                            phandle = <0x6e>;
                        };

                        clk_uart1_pll_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0c 0x02>;
                            clocks = <0x0b 0x08 0x23>;
                            clock-output-names = "clk_uart1_pll";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x29>;
                            phandle = <0x29>;
                        };
                    };

                    sel-con@0080 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x80 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        clk_uart2_pll_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x07>;
                            clocks = <0x2c>;
                            clock-output-names = "clk_uart2_pll";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,flags = <0x100>;
                            linux,phandle = <0x31>;
                            phandle = <0x31>;
                        };

                        clk_uart2_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x08 0x02>;
                            clocks = <0x2c 0x2d 0x02>;
                            clock-output-names = "clk_uart2";
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x0e>;
                            rockchip,flags = <0x04>;
                            linux,phandle = <0x71>;
                            phandle = <0x71>;
                        };

                        clk_uart2_pll_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0c 0x02>;
                            clocks = <0x0b 0x08 0x23>;
                            clock-output-names = "clk_uart2_pll";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x2c>;
                            phandle = <0x2c>;
                        };
                    };

                    sel-con@0084 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x84 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        i2s2_pll_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x07>;
                            clocks = <0x2e>;
                            clock-output-names = "clk_i2s2_pll";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x180>;
                            linux,phandle = <0x2f>;
                            phandle = <0x2f>;
                        };

                        clk_i2s2_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x08 0x02>;
                            clocks = <0x2f 0x30 0x13 0x14>;
                            clock-output-names = "clk_i2s2";
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x0e>;
                            rockchip,flags = <0x04>;
                            linux,phandle = <0x4a>;
                            phandle = <0x4a>;
                        };

                        i2s2_pll_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0f 0x01>;
                            clocks = <0x0b 0x08>;
                            clock-output-names = "clk_i2s2_pll";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x2e>;
                            phandle = <0x2e>;
                        };
                    };

                    sel-con@0088 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x88 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        uart0_frac {
                            compatible = "rockchip,rk3188-frac-con";
                            clocks = <0x27>;
                            clock-output-names = "uart0_frac";
                            rockchip,bits = <0x00 0x20>;
                            rockchip,clkops-idx = <0x05>;
                            #clock-cells = <0x00>;
                            linux,phandle = <0x28>;
                            phandle = <0x28>;
                        };
                    };

                    sel-con@008c {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x8c 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        uart1_frac {
                            compatible = "rockchip,rk3188-frac-con";
                            clocks = <0x2a>;
                            clock-output-names = "uart1_frac";
                            rockchip,bits = <0x00 0x20>;
                            rockchip,clkops-idx = <0x05>;
                            #clock-cells = <0x00>;
                            linux,phandle = <0x2b>;
                            phandle = <0x2b>;
                        };
                    };

                    sel-con@0090 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x90 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        uart2_frac {
                            compatible = "rockchip,rk3188-frac-con";
                            clocks = <0x31>;
                            clock-output-names = "uart2_frac";
                            rockchip,bits = <0x00 0x20>;
                            rockchip,clkops-idx = <0x05>;
                            #clock-cells = <0x00>;
                            linux,phandle = <0x2d>;
                            phandle = <0x2d>;
                        };
                    };

                    sel-con@0094 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x94 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        spdif_frac {
                            compatible = "rockchip,rk3188-frac-con";
                            clocks = <0x1c>;
                            clock-output-names = "spdif_frac";
                            rockchip,bits = <0x00 0x20>;
                            rockchip,clkops-idx = <0x05>;
                            #clock-cells = <0x00>;
                            linux,phandle = <0x1d>;
                            phandle = <0x1d>;
                        };
                    };

                    sel-con@0098 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x98 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        clk_hdmi_cec_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x0e>;
                            clocks = <0x02>;
                            clock-output-names = "clk_hdmi_cec";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            linux,phandle = <0x05>;
                            phandle = <0x05>;
                        };
                    };

                    sel-con@009c {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x9c 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        clk_rga_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x05>;
                            clocks = <0x32>;
                            clock-output-names = "clk_rga";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x100>;
                        };

                        clk_tsp_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x08 0x05>;
                            clocks = <0x33>;
                            clock-output-names = "clk_tsp";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x100>;
                        };

                        clk_tsp_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0f 0x01>;
                            clocks = <0x0b 0x08>;
                            clock-output-names = "clk_tsp";
                            #clock-cells = <0x00>;
                            linux,phandle = <0x33>;
                            phandle = <0x33>;
                        };
                    };

                    sel-con@00a0 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0xa0 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        clk_wifi_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x05>;
                            clocks = <0x34>;
                            clock-output-names = "clk_wifi";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x100>;
                        };

                        clk_wifi_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x05 0x02>;
                            clocks = <0x0b 0x08 0x23>;
                            clock-output-names = "clk_wifi";
                            #clock-cells = <0x00>;
                            linux,phandle = <0x34>;
                            phandle = <0x34>;
                        };

                        clk_hdcp_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x08 0x06>;
                            clocks = <0x35>;
                            clock-output-names = "clk_hdcp";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x100>;
                        };

                        clk_hdcp_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0e 0x02>;
                            clocks = <0x0b 0x08 0x0c>;
                            clock-output-names = "clk_hdcp";
                            #clock-cells = <0x00>;
                            linux,phandle = <0x35>;
                            phandle = <0x35>;
                        };
                    };

                    sel-con@00a4 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0xa4 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        clk_crypto_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x05>;
                            clocks = <0x36>;
                            clock-output-names = "clk_crypto";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            rockchip,flags = <0x100>;
                        };

                        clk_crypto_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x05 0x01>;
                            clocks = <0x0b 0x08>;
                            clock-output-names = "clk_crypto";
                            #clock-cells = <0x00>;
                            linux,phandle = <0x36>;
                            phandle = <0x36>;
                        };

                        clk_tsadc_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x06 0x0a>;
                            clocks = <0x02>;
                            clock-output-names = "clk_tsadc";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x4d>;
                            phandle = <0x4d>;
                        };
                    };

                    sel-con@00a8 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0xa8 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        clk_spi0_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x07>;
                            clocks = <0x37>;
                            clock-output-names = "clk_spi0";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x100>;
                        };

                        clk_spi0_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x08 0x01>;
                            clocks = <0x0b 0x08>;
                            clock-output-names = "clk_spi0";
                            #clock-cells = <0x00>;
                            linux,phandle = <0x37>;
                            phandle = <0x37>;
                        };
                    };

                    sel-con@00ac {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0xac 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        clk_ddr_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x02>;
                            clocks = <0x38>;
                            clock-output-names = "clk_ddr";
                            rockchip,div-type = <0x80>;
                            rockchip,div-relations = <0x00 0x01 0x01 0x02 0x03 0x04>;
                            #clock-cells = <0x00>;
                            rockchip,flags = <0xc0>;
                            rockchip,clkops-idx = <0x12>;
                            linux,phandle = <0x50>;
                            phandle = <0x50>;
                        };

                        clk_ddr_pll_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x08 0x02>;
                            clocks = <0x09 0x08 0x07>;
                            clock-output-names = "clk_ddr";
                            #clock-cells = <0x00>;
                            linux,phandle = <0x38>;
                            phandle = <0x38>;
                        };
                    };

                    sel-con@00b0 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0xb0 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        dclk_vop0_pll_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x00 0x01>;
                            clocks = <0x08 0x0b>;
                            clock-output-names = "dclk_vop0_pll";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x39>;
                            phandle = <0x39>;
                        };

                        dclk_vop0_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x01 0x01>;
                            clocks = <0x0c 0x19>;
                            clock-output-names = "dclk_vop0";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x5f>;
                            phandle = <0x5f>;
                        };

                        dclk_vop0_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x08 0x08>;
                            clocks = <0x39>;
                            clock-output-names = "dclk_vop0";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                        };
                    };

                    sel-con@00b4 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0xb4 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        aclk_rkvdec_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x05>;
                            clocks = <0x03>;
                            clock-output-names = "aclk_rkvdec";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x100>;
                        };

                        aclk_rkvdec_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x06 0x02>;
                            clocks = <0x0b 0x08 0x0c 0x23>;
                            clock-output-names = "aclk_rkvdec";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x03>;
                            phandle = <0x03>;
                        };

                        clk_vdec_cabac_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x08 0x05>;
                            clocks = <0x3a>;
                            clock-output-names = "clk_vdec_cabac";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x100>;
                        };

                        clk_vdec_cabac_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0e 0x02>;
                            clocks = <0x0b 0x08 0x0c 0x23>;
                            clock-output-names = "clk_vdec_cabac";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x3a>;
                            phandle = <0x3a>;
                        };
                    };

                    sel-con@00b8 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0xb8 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        dclk_hdmiphy_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x03>;
                            clocks = <0x39>;
                            clock-output-names = "dclk_hdmiphy";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                        };

                        clk_macphy_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x08 0x03>;
                            clocks = <0x3b>;
                            clock-output-names = "clk_macphy";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                        };

                        mac_clkin {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0a 0x01>;
                            clocks = <0x3c 0x3d>;
                            clock-output-names = "mac_clkin";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x18>;
                            phandle = <0x18>;
                        };

                        clk_macphy_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0c 0x01>;
                            clocks = <0x3e 0x3c>;
                            clock-output-names = "clk_macphy";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x3b>;
                            phandle = <0x3b>;
                        };
                    };

                    sel-con@00bc {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0xbc 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        i2s2_frac {
                            compatible = "rockchip,rk3188-frac-con";
                            clocks = <0x2f>;
                            clock-output-names = "i2s2_frac";
                            rockchip,bits = <0x00 0x20>;
                            rockchip,clkops-idx = <0x05>;
                            #clock-cells = <0x00>;
                            linux,phandle = <0x30>;
                            phandle = <0x30>;
                        };
                    };

                    sel-con@00c0 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0xc0 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        aclk_iep_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x05>;
                            clocks = <0x0e>;
                            clock-output-names = "aclk_iep";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x100>;
                        };

                        aclk_iep_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x05 0x02>;
                            clocks = <0x0b 0x08 0x0c 0x23>;
                            clock-output-names = "aclk_iep";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x0e>;
                            phandle = <0x0e>;
                        };

                        aclk_hdcp_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x08 0x05>;
                            clocks = <0x3f>;
                            clock-output-names = "aclk_hdcp";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x100>;
                        };

                        aclk_hdcp_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0d 0x02>;
                            clocks = <0x0b 0x08 0x0c 0x23>;
                            clock-output-names = "aclk_hdcp";
                            #clock-cells = <0x00>;
                            linux,phandle = <0x3f>;
                            phandle = <0x3f>;
                        };
                    };

                    sel-con@00c4 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0xc4 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        aclk_vpu_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x05>;
                            clocks = <0x04>;
                            clock-output-names = "aclk_vpu";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x100>;
                        };

                        aclk_vpu_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x05 0x02>;
                            clocks = <0x0b 0x08 0x0c 0x23>;
                            clock-output-names = "aclk_vpu";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x04>;
                            phandle = <0x04>;
                        };
                    };

                    sel-con@00c8 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0xc8 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        aclk_vop_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x05>;
                            clocks = <0x40>;
                            clock-output-names = "aclk_vop";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x100>;
                        };

                        aclk_vop_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x05 0x02>;
                            clocks = <0x0b 0x08 0x0c 0x23>;
                            clock-output-names = "aclk_vop";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x40>;
                            phandle = <0x40>;
                        };

                        aclk_rga_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x08 0x05>;
                            clocks = <0x32>;
                            clock-output-names = "aclk_rga";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x100>;
                        };

                        aclk_rga_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0d 0x02>;
                            clocks = <0x0b 0x08 0x0c 0x23>;
                            clock-output-names = "aclk_rga";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x32>;
                            phandle = <0x32>;
                        };
                    };

                    sel-con@00cc {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0xcc 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        clk_gpu_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x00 0x05>;
                            clocks = <0x41>;
                            clock-output-names = "clk_gpu";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x100>;
                        };

                        clk_gpu_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x05 0x02>;
                            clocks = <0x0b 0x08 0x0c 0x23>;
                            clock-output-names = "clk_gpu";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x41>;
                            phandle = <0x41>;
                        };

                        clk_vdec_core_div {
                            compatible = "rockchip,rk3188-div-con";
                            rockchip,bits = <0x08 0x05>;
                            clocks = <0x42>;
                            clock-output-names = "clk_vdec_core";
                            rockchip,div-type = <0x00>;
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x01>;
                            rockchip,flags = <0x100>;
                        };

                        clk_vdec_core_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0d 0x02>;
                            clocks = <0x0b 0x08 0x0c 0x23>;
                            clock-output-names = "clk_vdec_core";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x42>;
                            phandle = <0x42>;
                        };
                    };

                    sel-con@0134 {
                        compatible = "rockchip,rk3188-selcon";
                        reg = <0x134 0x04>;
                        #address-cells = <0x01>;
                        #size-cells = <0x01>;

                        testclk_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x08 0x04>;
                            clocks = <0x34 0x19 0x06 0x43 0x00 0x0e 0x41 0x21 0x44>;
                            clock-output-names = "testclk";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x16>;
                            phandle = <0x16>;
                        };

                        hdmi_phy_clk_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0d 0x01>;
                            clocks = <0x45 0x02>;
                            clock-output-names = "hdmi_phy_clk";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x0c>;
                            phandle = <0x0c>;
                        };

                        usb480m_phy_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0e 0x01>;
                            clocks = <0x46 0x47>;
                            clock-output-names = "usb480m_phy";
                            #clock-cells = <0x00>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x48>;
                            phandle = <0x48>;
                        };

                        usb480m_mux {
                            compatible = "rockchip,rk3188-mux-con";
                            rockchip,bits = <0x0f 0x01>;
                            clocks = <0x48 0x02>;
                            clock-output-names = "usb480m";
                            #clock-cells = <0x00>;
                            rockchip,clkops-idx = <0x0f>;
                            #clock-init-cells = <0x01>;
                            linux,phandle = <0x23>;
                            phandle = <0x23>;
                        };
                    };
                };

                clk_gate_cons {
                    compatible = "rockchip,rk-gate-cons";
                    #address-cells = <0x01>;
                    #size-cells = <0x01>;
                    ranges;

                    gate-clk@00d0 {
                        compatible = "rockchip,rk3188-gate-clk";
                        reg = <0xd0 0x04>;
                        clocks = <0x19 0x19 0x19 0x1f 0x20 0x49 0x19 0x2e 0x30 0x4a 0x10 0x12 0x19 0x4b 0x15 0x16>;
                        clock-output-names = "reserved\0reserved\0reserved\0clk_i2s0_pll\0i2s0_frac\0clk_i2s0\0reserved\0clk_i2s2_pll\0i2s2_frac\0clk_i2s2\0clk_i2s1_pll\0i2s1_frac\0reserved\0clk_i2s1_out\0clk_i2s1\0testclk";
                        #clock-cells = <0x01>;
                    };

                    gate-clk@00d4 {
                        compatible = "rockchip,rk3188-gate-clk";
                        reg = <0xd4 0x04>;
                        clocks = <0x0f 0x40 0x32 0x4c 0x3f 0x02 0x02 0x17 0x26 0x28 0x29 0x2b 0x2c 0x2d 0x19 0x19>;
                        clock-output-names = "clk_nandc\0aclk_vop\0aclk_rga\0clk_jtag\0aclk_hdcp\0clk_otgphy0\0clk_otgphy1\0clk_mac_pll\0clk_uart0_pll\0uart0_frac\0clk_uart1_pll\0uart1_frac\0clk_uart2_pll\0uart2_frac\0reserved\0reserved";
                        #clock-cells = <0x01>;
                        linux,phandle = <0x68>;
                        phandle = <0x68>;
                    };

                    gate-clk@00d8 {
                        compatible = "rockchip,rk3188-gate-clk";
                        reg = <0xd8 0x04>;
                        clocks = <0x19 0x19 0x1a 0x19 0x19 0x19 0x33 0x36 0x4d 0x37 0x1b 0x22 0x1d 0x24 0x25 0x34>;
                        clock-output-names = "reserved\0clk_ddrmon\0clk_gmac\0reserved\0reserved\0reserved\0clk_tsp\0clk_crypto\0clk_tsadc\0clk_spi0\0clk_spdif_pll\0clk_sdmmc0\0spdif_frac\0clk_sdio\0clk_emmc\0clk_wifi";
                        #clock-cells = <0x01>;
                        linux,phandle = <0x85>;
                        phandle = <0x85>;
                    };

                    gate-clk@00dc {
                        compatible = "rockchip,rk3188-gate-clk";
                        reg = <0xdc 0x04>;
                        clocks = <0x0e 0x19 0x03 0x3a 0x42 0x35 0x32 0x02 0x05 0x19 0x19 0x04 0x19 0x19 0x19 0x19>;
                        clock-output-names = "aclk_iep\0dclk_vop0\0aclk_rkvdec\0clk_vdec_cabac\0clk_vdec_core\0clk_hdcp\0clk_rga\0clk_hdmi_hdcp\0clk_hdmi_cec\0reserved\0reserved\0aclk_vpu\0reserved\0clk_gpu\0reserved\0reserved";
                        #clock-cells = <0x01>;
                        linux,phandle = <0x97>;
                        phandle = <0x97>;
                    };

                    gate-clk@00e0 {
                        compatible = "rockchip,rk3188-gate-clk";
                        reg = <0xe0 0x04>;
                        clocks = <0x06 0x06 0x44 0x19 0x04 0x03 0x19 0x19 0x19 0x19 0x19 0x19 0x19 0x19 0x19 0x19>;
                        clock-output-names = "aclk_core\0pclk_dbg\0aclk_gic400\0reserved\0hclk_vpu\0hclk_rkvdec\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved";
                        #clock-cells = <0x01>;
                        linux,phandle = <0x61>;
                        phandle = <0x61>;
                    };

                    gate-clk@00e4 {
                        compatible = "rockchip,rk3188-gate-clk";
                        reg = <0xe4 0x04>;
                        clocks = <0x21 0x21 0x21 0x4e 0x4e 0x4e 0x4e 0x3b 0x19 0x19 0x19 0x19 0x19 0x19 0x19 0x19>;
                        clock-output-names = "aclk_peri\0hclk_peri\0pclk_peri\0clk_mac_ref\0clk_mac_refout\0clk_mac_rx\0clk_mac_tx\0clk_macphy\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved";
                        #clock-cells = <0x01>;
                        linux,phandle = <0xa8>;
                        phandle = <0xa8>;
                    };

                    gate-clk@00e8 {
                        compatible = "rockchip,rk3188-gate-clk";
                        reg = <0xe8 0x04>;
                        clocks = <0x0d 0x0d 0x0d 0x4f 0x4f 0x02 0x02 0x02 0x02 0x02 0x02 0x19 0x19 0x4f 0x19 0x19>;
                        clock-output-names = "aclk_bus\0hclk_bus\0pclk_bus\0pclk_bus_pre\0pclk_phy\0clk_timer0\0clk_timer1\0clk_timer2\0clk_timer3\0clk_timer4\0clk_timer5\0reserved\0reserved\0pclk_ddr\0reserved\0reserved";
                        #clock-cells = <0x01>;
                        linux,phandle = <0x52>;
                        phandle = <0x52>;
                    };

                    gate-clk@00ec {
                        compatible = "rockchip,rk3188-gate-clk";
                        reg = <0xec 0x04>;
                        clocks = <0x50 0x50 0x19 0x19 0x19 0x19 0x19 0x19 0x19 0x19 0x19 0x19 0x19 0x19 0x19 0x43 0x0e>;
                        clock-output-names = "clk_ddrphy\0clk4x_ddrphy\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0g_aclk_gpu\0g_aclk_gpu_noc";
                        #clock-cells = <0x01>;
                        linux,phandle = <0x43>;
                        phandle = <0x43>;
                    };

                    gate-clk@00f0 {
                        compatible = "rockchip,rk3188-gate-clk";
                        reg = <0xf0 0x04>;
                        clocks = <0x0d 0x0d 0x0d 0x51 0x52 0x0d 0x43 0x00 0x52 0x0d 0x51 0x51 0x51 0x51 0x51 0x51 0x4f 0x4f 0x4f>;
                        clock-output-names = "g_aclk_intmem\0g_intmem_mbist\0g_aclk_dmac_bus\0g_hclk_rom\0g_p_ddrupctl\0g_clk_ddrupctl\0g_p_ddrmon\0g_h_i2s0_8ch\0g_h_i2s1_8ch\0g_h_i2s2_2ch\0g_h_spdif_8ch\0g_h_crypto_mst\0g_h_crypto_slv\0g_p_efuse_1024\0g_p_efuse_256\0g_pclk_i2c0";
                        #clock-cells = <0x01>;
                        linux,phandle = <0x62>;
                        phandle = <0x62>;
                    };

                    gate-clk@00f4 {
                        compatible = "rockchip,rk3188-gate-clk";
                        reg = <0xf4 0x04>;
                        clocks = <0x4f 0x4f 0x4f 0x19 0x4f 0x4f 0x4f 0x4f 0x4f 0x4f 0x4f 0x4f 0x4f 0x4f 0x4f 0x4f>;
                        clock-output-names = "g_pclk_i2c1\0g_pclk_i2c2\0g_pclk_i2c3\0reserved\0g_pclk_timer0\0g_pclk_stimer\0g_pclk_spi0\0g_pclk_rk_pwm\0g_pclk_gpio0\0g_pclk_gpio1\0g_pclk_gpio2\0g_pclk_gpio3\0g_pclk_uart0\0g_pclk_uart1\0g_pclk_uart2\0g_pclk_tsadc";
                        #clock-cells = <0x01>;
                        linux,phandle = <0x64>;
                        phandle = <0x64>;
                    };

                    gate-clk@00f8 {
                        compatible = "rockchip,rk3188-gate-clk";
                        reg = <0xf8 0x04>;
                        clocks = <0x4f 0x0d 0x52 0x0d 0x52 0x04 0x4f 0x52 0x04 0x4f 0x52 0x04 0x52 0x04 0x52 0x04 0x4f 0x51 0x53 0x19 0x19 0x19>;
                        clock-output-names = "g_pclk_grf\0g_aclk_bus\0g_p_mschniu\0g_p_ddrphy\0g_pclk_cru\0g_p_acodecphy\0g_pclk_sgrf\0g_p_hdmiphy\0g_p_vdacphy\0g_p_phy_noc\0g_pclk_sim\0g_hclk_tsp\0clk_hsadc_tsp\0reserved\0reserved\0reserved";
                        #clock-cells = <0x01>;
                        linux,phandle = <0x63>;
                        phandle = <0x63>;
                    };

                    gate-clk@00fc {
                        compatible = "rockchip,rk3188-gate-clk";
                        reg = <0xfc 0x04>;
                        clocks = <0x54 0x54 0x54 0x54 0x21 0x55 0x54 0x54 0x54 0x54 0x54 0x19 0x54 0x54 0x54 0x19>;
                        clock-output-names = "g_hclk_sdmmc\0g_hclk_sdio\0g_clk_emmc\0g_clk_nandc\0g_aclk_gmac\0g_pclk_gmac\0g_hclk_host0\0g_h_host0_arb\0g_hclk_host1\0g_h_host1_arb\0g_hclk_host2\0reserved\0g_hclk_otg\0g_hclk_otg_pmu\0g_h_host2_arb\0reserved";
                        #clock-cells = <0x01>;
                        linux,phandle = <0x66>;
                        phandle = <0x66>;
                    };

                    gate-clk@0100 {
                        compatible = "rockchip,rk3188-gate-clk";
                        reg = <0x100 0x04>;
                        clocks = <0x21 0x54 0x55 0x19 0x19 0x19 0x19 0x19 0x19 0x19 0x19 0x19 0x19 0x19 0x19 0x19>;
                        clock-output-names = "g_a_peri_noc\0g_h_peri_noc\0g_p_peri_noc\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved";
                        #clock-cells = <0x01>;
                        linux,phandle = <0x65>;
                        phandle = <0x65>;
                    };

                    gate-clk@0104 {
                        compatible = "rockchip,rk3188-gate-clk";
                        reg = <0x104 0x04>;
                        clocks = <0x56 0x0b 0x57 0x56 0x09 0x57 0x19 0x40 0x57 0x56 0x08 0x57 0x0e 0x3f 0x32 0x40 0x57 0x19 0x19>;
                        clock-output-names = "g_aclk_rga\0g_hclk_rga\0g_aclk_iep\0g_hclk_iep\0reserved\0g_aclk_vop\0g_hclk_vop\0g_h_vio_ahbarbi\0g_h_vio_noc\0g_a_iep_noc\0g_a_hdcp_noc\0g_a_rga_noc\0g_a_vop_noc\0g_h_vop_noc\0reserved\0reserved";
                        #clock-cells = <0x01>;
                        linux,phandle = <0x56>;
                        phandle = <0x56>;
                    };

                    gate-clk@0108 {
                        compatible = "rockchip,rk3188-gate-clk";
                        reg = <0x108 0x04>;
                        clocks = <0x19 0x19 0x19 0x19 0x19 0x19 0x57 0x57 0x19 0x19 0x3f 0x57 0x57 0x19 0x19 0x19>;
                        clock-output-names = "reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0g_p_hdmi_ctrl\0g_h_vio_h2p\0reserved\0reserved\0g_aclk_hdcp\0g_pclk_hdcp\0g_h_hdcp_mmu\0reserved\0reserved\0reserved";
                        #clock-cells = <0x01>;
                        linux,phandle = <0x67>;
                        phandle = <0x67>;
                    };

                    gate-clk@010c {
                        compatible = "rockchip,rk3188-gate-clk";
                        reg = <0x10c 0x04>;
                        clocks = <0x19 0x19 0x03 0x58 0x59 0x00 0x59 0x01 0x59 0x02 0x59 0x03 0x19 0x19 0x19 0x19 0x19 0x19 0x19 0x19>;
                        clock-output-names = "g_aclk_vpu\0g_hclk_vpu\0g_a_rkvdec\0g_h_rkvdec\0g_a_vpu_noc\0g_h_vpu_noc\0g_a_rkvdec_noc\0g_h_rkvdec_noc\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved\0reserved";
                        #clock-cells = <0x01>;
                        linux,phandle = <0x59>;
                        phandle = <0x59>;
                    };
                };
            };
        };

        dram_timing {
            compatible = "rockchip,dram-timing";
            dram_spd_bin = <0x15>;
            sr_idle = <0x18>;
            pd_idle = <0x20>;
            dram_dll_disb_freq = <0xc8>;
            phy_dll_disb_freq = <0xc8>;
            dram_odt_disb_freq = <0x85>;
            phy_odt_disb_freq = <0x85>;
            ddr3_drv = <0x02>;
            ddr3_odt = <0x40>;
            lpddr3_drv = <0x01>;
            lpddr3_odt = <0x03>;
            lpddr2_drv = <0x01>;
            phy_ddr3_clk_drv = <0x15>;
            phy_ddr3_cmd_drv = <0x15>;
            phy_ddr3_dqs_drv = <0x15>;
            phy_ddr3_odt = <0x02>;
            phy_lp23_clk_drv = <0x13>;
            phy_lp23_cmd_drv = <0x16>;
            phy_lp23_dqs_drv = <0x16>;
            phy_lp3_odt = <0x02>;
            linux,phandle = <0x5e>;
            phandle = <0x5e>;
        };

        cpus {
            #address-cells = <0x01>;
            #size-cells = <0x00>;

            cpu@0 {
                device_type = "cpu";
                compatible = "arm,cortex-a7";
                reg = <0xf00>;
            };

            cpu@1 {
                device_type = "cpu";
                compatible = "arm,cortex-a7";
                reg = <0xf01>;
            };

            cpu@2 {
                device_type = "cpu";
                compatible = "arm,cortex-a7";
                reg = <0xf02>;
            };

            cpu@3 {
                device_type = "cpu";
                compatible = "arm,cortex-a7";
                reg = <0xf03>;
            };
        };

        psci {
            compatible = "arm,psci";
            method = "smc";
            cpu_suspend = <0x84000001>;
            cpu_off = <0x84000002>;
            cpu_on = <0x84000003>;
        };

        interrupt-controller@32010000 {
            compatible = "arm,cortex-a15-gic";
            interrupt-controller;
            #interrupt-cells = <0x03>;
            #address-cells = <0x00>;
            reg = <0x32011000 0x1000 0x32012000 0x1000>;
            linux,phandle = <0x01>;
            phandle = <0x01>;
        };

        syscon@10140000 {
            compatible = "rockchip,rk322x-sgrf\0rockchip,sgrf\0syscon";
            reg = <0x10140000 0x1000>;
        };

        syscon@11000000 {
            compatible = "rockchip,rk322x-grf\0rockchip,grf\0syscon";
            reg = <0x11000000 0x1000>;
            linux,phandle = <0x5b>;
            phandle = <0x5b>;
        };

        syscon@110e0000 {
            compatible = "rockchip,rk322x-cru\0rockchip,cru\0syscon";
            reg = <0x110e0000 0x1000>;
        };

        syscon@11200000 {
            compatible = "rockchip,rk322x-ddrpctl\0syscon";
            reg = <0x11200000 0x400>;
        };

        syscon@31020000 {
            compatible = "rockchip,rk322x-msch\0rockchip,msch\0syscon";
            reg = <0x31020000 0x3000>;
        };

        arm-pmu {
            compatible = "arm,cortex-a7-pmu";
            interrupts = <0x00 0x4c 0x04 0x00 0x4d 0x04 0x00 0x4e 0x04 0x00 0x4f 0x04>;
        };

        reset@110e0110 {
            compatible = "rockchip,reset";
            reg = <0x110e0110 0x20>;
            rockchip,reset-flag = <0x01>;
            #reset-cells = <0x01>;
            linux,phandle = <0x8e>;
            phandle = <0x8e>;
        };

        timer {
            compatible = "arm,armv7-timer";
            interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04>;
            clock-frequency = <0x16e3600>;
        };

        timer@110c0000 {
            compatible = "rockchip,timer";
            reg = <0x110c0000 0x20>;
            interrupts = <0x00 0x2b 0x04>;
            rockchip,broadcast = <0x01>;
        };

        fiq-debugger {
            compatible = "rockchip,fiq-debugger";
            rockchip,serial-id = <0x02>;
            rockchip,signal-irq = <0x9f>;
            rockchip,wake-irq = <0x00>;
            rockchip,irq-mode-enable = <0x00>;
            rockchip,baudrate = <0x16e360>;
            pinctrl-names = "default";
            pinctrl-0 = <0x5a>;
            status = "okay";
        };

        io-domains {
            compatible = "rockchip,rk322x-io-voltage-domain";
            rockchip,grf = <0x5b>;
            status = "okay";
            vccio1-supply = <0x5c>;
            vccio2-supply = <0x5d>;
            vccio4-supply = <0x5c>;
        };

        dvfs {

            vd_arm {
                regulator_name = "vdd_arm";

                pd_core {

                    clk_core {
                        operating-points = <0x927c0 0xf4240 0xc7380 0xf4240 0xf6180 0x11edd8 0x124f80 0x137478 0x13c680 0x1437c8 0x153d80 0x14fb18 0x1656c0 0x155cc0>;
                        max-volt = <0x1437c8>;
                        temp-limit-enable = <0x01>;
                        target-temp = <0x61>;
                        min_temp_limit = <0x639c0>;
                        normal-temp-limit = <0x03 0x17700 0x06 0x23280 0x09 0x2ee00 0x0f 0x5dc00>;
                        performance-temp-limit = <0x6e 0xc7380>;
                        status = "okay";
                        regu-mode-table = <0xf6180 0x04 0x00 0x03>;
                        regu-mode-en = <0x00>;
                        lkg_adjust_volt_en = <0x01>;
                        channel = <0x00>;
                        tsadc-ch = <0x00>;
                        def_table_lkg = <0x08>;
                        min_adjust_freq = <0xf6180>;
                        lkg_adjust_volt_table = <0x14 0xc350 0x3c 0x124f8>;
                    };
                };
            };

            vd_logic {
                regulator_name = "vdd_logic";

                pd_ddr {

                    clk_ddr {
                        operating-points = <0x493e0 0x112a88 0x9a8a8 0x112a88 0xaae60 0x118c30 0xc3500 0x118c30>;
                        lkg_adjust_volt_en = <0x01>;
                        channel = <0x02>;
                        def_table_lkg = <0x05>;
                        min_adjust_freq = <0x493e0>;
                        lkg_adjust_volt_table = <0x07 0xc350 0x3c 0x186a0>;
                        temp-limit-enable = <0x01>;
                        status = "okay";
                        freq-table = <0x01 0x9a8a8 0x10 0xaae60 0x10000 0xbfe50>;
                    };
                };

                pd_gpu {

                    clk_gpu {
                        operating-points = <0x30d40 0x100590 0x493e0 0x100590 0x7a120 0x118c30>;
                        temp-limit-enable = <0x01>;
                        target-temp = <0x5f>;
                        min_temp_limit = <0x186a0>;
                        normal-temp-limit = <0x03 0x186a0>;
                        channel = <0x02>;
                        status = "okay";
                        regu-mode-table = <0x30d40 0x04 0x00 0x03>;
                        regu-mode-en = <0x00>;
                    };
                };
            };
        };

        rockchip-ion {
            compatible = "rockchip,ion";
            #address-cells = <0x01>;
            #size-cells = <0x00>;

            system-heap {
                compatible = "rockchip,ion-heap";
                rockchip,ion_heap = <0x00>;
            };
        };

        dram {
            compatible = "rockchip,rk322x-dram";
            status = "okay";
            dram_freq = <0x1dcd6500>;
            rockchip,dram_timing = <0x5e>;
        };

        clocks-init {
            compatible = "rockchip,clocks-init";
            rockchip,clocks-init-parent = <0x1f 0x08 0x10 0x08 0x2e 0x08 0x1b 0x08 0x41 0x0b 0x5f 0x0c 0x22 0x0b 0x25 0x0b 0x24 0x0b 0x04 0x0b 0x0c 0x45 0x23 0x48 0x03 0x0b>;
            rockchip,clocks-init-rate = <0x08 0x47868c00 0x06 0x29b92700 0x0b 0x1dcd6500 0x0d 0x8f0d180 0x51 0x8f0d180 0x4f 0x47868c0 0x21 0x8f0d180 0x54 0x8f0d180 0x55 0x47868c0 0x4e 0x7735940 0x0e 0xee6b280 0x57 0x7735940 0x32 0xee6b280 0x41 0xee6b280 0x04 0x17d7840 0x42 0xee6b280 0x3a 0xee6b280 0x03 0xf42400 0x40 0x17d78400>;
        };

        clocks-enable {
            compatible = "rockchip,clocks-enable";
            clocks = <0x07 0x09 0x08 0x0b 0x06 0x60 0x44 0x61 0x02 0x52 0x03 0x43 0x01 0x62 0x05 0x62 0x00 0x62 0x01 0x62 0x02 0x63 0x01 0x62 0x03 0x62 0x04 0x62 0x06 0x64 0x04 0x64 0x05 0x64 0x08 0x63 0x00 0x63 0x04 0x63 0x06 0x63 0x03 0x63 0x09 0x63 0x02 0x65 0x00 0x65 0x01 0x65 0x02 0x66 0x0d 0x56 0x07 0x67 0x07 0x52 0x05 0x52 0x06 0x59 0x04 0x59 0x06 0x59 0x05 0x59 0x07 0x56 0x0b 0x43 0x0f 0x56 0x09 0x56 0x0c 0x56 0x0a 0x56 0x08 0x56 0x0d 0x68 0x03>;
        };

        serial@11010000 {
            compatible = "rockchip,serial";
            reg = <0x11010000 0x100>;
            interrupts = <0x00 0x37 0x04>;
            clock-frequency = <0x16e3600>;
            clocks = <0x69 0x64 0x0c>;
            clock-names = "sclk_uart\0pclk_uart";
            reg-shift = <0x02>;
            reg-io-width = <0x04>;
            dmas = <0x6a 0x02 0x6a 0x03>;
            #dma-cells = <0x02>;
            pinctrl-names = "default";
            pinctrl-0 = <0x6b 0x6c 0x6d>;
            status = "disabled";
        };

        serial@11020000 {
            compatible = "rockchip,serial";
            reg = <0x11020000 0x100>;
            interrupts = <0x00 0x38 0x04>;
            clock-frequency = <0x16e3600>;
            clocks = <0x6e 0x64 0x0d>;
            clock-names = "sclk_uart\0pclk_uart";
            reg-shift = <0x02>;
            reg-io-width = <0x04>;
            dmas = <0x6a 0x04 0x6a 0x05>;
            #dma-cells = <0x02>;
            pinctrl-names = "default";
            pinctrl-0 = <0x6f 0x70>;
            status = "okay";
            dma-names = "!tx\0!rx";
        };

        serial@11030000 {
            compatible = "rockchip,serial";
            reg = <0x11030000 0x100>;
            interrupts = <0x00 0x39 0x04>;
            clock-frequency = <0x16e3600>;
            clocks = <0x71 0x64 0x0e>;
            clock-names = "sclk_uart\0pclk_uart";
            reg-shift = <0x02>;
            reg-io-width = <0x04>;
            dmas = <0x6a 0x06 0x6a 0x07>;
            #dma-cells = <0x02>;
            pinctrl-names = "default";
            pinctrl-0 = <0x5a>;
            status = "disabled";
        };

        i2c@11050000 {
            compatible = "rockchip,rk30-i2c";
            reg = <0x11050000 0x1000>;
            interrupts = <0x00 0x24 0x04>;
            #address-cells = <0x01>;
            #size-cells = <0x00>;
            pinctrl-names = "default\0gpio\0sleep";
            pinctrl-0 = <0x72>;
            pinctrl-1 = <0x73>;
            pinctrl-2 = <0x74>;
            gpios = <0x75 0x01 0x01 0x75 0x00 0x01>;
            clocks = <0x62 0x0f>;
            rockchip,check-idle = <0x01>;
            status = "okay";

            rtc@51 {
                compatible = "rtc,hym8563";
                reg = <0x51>;
            };
        };

        i2c@11060000 {
            compatible = "rockchip,rk30-i2c";
            reg = <0x11060000 0x1000>;
            interrupts = <0x00 0x25 0x04>;
            #address-cells = <0x01>;
            #size-cells = <0x00>;
            pinctrl-names = "default\0gpio\0sleep";
            pinctrl-0 = <0x76>;
            pinctrl-1 = <0x77>;
            pinctrl-2 = <0x78>;
            gpios = <0x75 0x03 0x01 0x75 0x02 0x01>;
            clocks = <0x64 0x00>;
            rockchip,check-idle = <0x01>;
            status = "disabled";

            nau8540@1c {
                compatible = "nuvoton,nau8540";
                reg = <0x1c>;
                linux,phandle = <0xbe>;
                phandle = <0xbe>;
            };

            nau8540@1d {
                compatible = "nuvoton,nau8540";
                reg = <0x1d>;
            };
        };

        i2c@11070000 {
            compatible = "rockchip,rk30-i2c";
            reg = <0x11070000 0x1000>;
            interrupts = <0x00 0x26 0x04>;
            #address-cells = <0x01>;
            #size-cells = <0x00>;
            pinctrl-names = "default\0gpio\0sleep";
            pinctrl-0 = <0x79>;
            pinctrl-1 = <0x7a>;
            pinctrl-2 = <0x7b>;
            gpios = <0x7c 0x14 0x01 0x7c 0x15 0x01>;
            clocks = <0x64 0x01>;
            rockchip,check-idle = <0x01>;
            status = "disabled";
        };

        i2c@11080000 {
            compatible = "rockchip,rk30-i2c";
            reg = <0x11080000 0x1000>;
            interrupts = <0x00 0x27 0x04>;
            #address-cells = <0x01>;
            #size-cells = <0x00>;
            pinctrl-names = "default\0gpio\0sleep";
            pinctrl-0 = <0x7d>;
            pinctrl-1 = <0x7e>;
            pinctrl-2 = <0x7f>;
            gpios = <0x75 0x07 0x01 0x75 0x06 0x01>;
            clocks = <0x64 0x02>;
            rockchip,check-idle = <0x01>;
            status = "disabled";
        };

        spi@11090000 {
            compatible = "rockchip,rockchip-spi";
            reg = <0x11090000 0x1000>;
            interrupts = <0x00 0x31 0x04>;
            #address-cells = <0x01>;
            #size-cells = <0x00>;
            pinctrl-names = "default";
            pinctrl-0 = <0x80 0x81 0x82 0x83 0x84>;
            rockchip,spi-src-clk = <0x00>;
            num-cs = <0x02>;
            clocks = <0x85 0x09 0x64 0x06>;
            clock-names = "spi\0pclk_spi0";
            status = "disabled";
            max-freq = <0x2dc6c00>;

            spi_test@00 {
                compatible = "rockchip,spi_test_bus0_cs0";
                reg = <0x00>;
                spi-max-frequency = <0xb71b00>;
                poll_mode = <0x00>;
                type = <0x00>;
            };

            spi_test@01 {
                compatible = "rockchip,spi_test_bus0_cs1";
                reg = <0x01>;
                spi-max-frequency = <0xb71b00>;
                spi-cpha;
                spi-cpol;
                poll_mode = <0x00>;
                type = <0x00>;
            };
        };

        wdt@110a0000 {
            compatible = "rockchip,watch dog";
            reg = <0x110a0000 0x100>;
            clocks = <0x52 0x03>;
            clock-names = "pclk_wdt";
            interrupts = <0x00 0x28 0x04>;
            rockchip,irq = <0x01>;
            rockchip,timeout = <0x3c>;
            rockchip,atboot = <0x01>;
            rockchip,debug = <0x00>;
            status = "disabled";
        };

        amba {
            #address-cells = <0x01>;
            #size-cells = <0x01>;
            compatible = "arm,amba-bus";
            interrupt-parent = <0x01>;
            ranges;

            pdma@110f0000 {
                compatible = "arm,pl330\0arm,primecell";
                reg = <0x110f0000 0x4000>;
                clocks = <0x62 0x02>;
                clock-names = "apb_pclk";
                interrupts = <0x00 0x00 0x04 0x00 0x01 0x04>;
                #dma-cells = <0x01>;
                linux,phandle = <0x6a>;
                phandle = <0x6a>;
            };
        };

        crypto@100a0000 {
            compatible = "rockchip-crypto";
            reg = <0x100a0000 0x10000>;
            interrupts = <0x00 0x1e 0x04>;
            interrupt-names = "irq_crypto";
            clocks = <0x36 0x62 0x0c 0x62 0x0b>;
            clock-names = "clk_crypto\0hclk_crypto\0aclk_crypto";
            status = "disabled";
        };

        i2s0@100c0000 {
            compatible = "rockchip-i2s";
            reg = <0x100c0000 0x1000>;
            i2s-id = <0x00>;
            clocks = <0x49 0x62 0x07>;
            clock-names = "i2s_clk\0i2s_hclk";
            interrupts = <0x00 0x1a 0x04>;
            dmas = <0x6a 0x0b 0x6a 0x0c>;
            #dma-cells = <0x02>;
            dma-names = "tx\0rx";
            status = "okay";
            linux,phandle = <0xbd>;
            phandle = <0xbd>;
        };

        i2s1@100b0000 {
            compatible = "rockchip-i2s";
            reg = <0x100b0000 0x1000>;
            i2s-id = <0x01>;
            clocks = <0x15 0x4b 0x62 0x08>;
            clock-names = "i2s_clk\0i2s_mclk\0i2s_hclk";
            interrupts = <0x00 0x1b 0x04>;
            dmas = <0x6a 0x0e 0x6a 0x0f>;
            #dma-cells = <0x02>;
            dma-names = "tx\0rx";
            status = "okay";
            linux,phandle = <0xb9>;
            phandle = <0xb9>;
        };

        i2s2@100e0000 {
            compatible = "rockchip-i2s";
            reg = <0x100e0000 0x1000>;
            i2s-id = <0x02>;
            clocks = <0x4a 0x62 0x09>;
            clock-names = "i2s_clk\0i2s_hclk";
            interrupts = <0x00 0x1c 0x04>;
            dmas = <0x6a 0x00 0x6a 0x01>;
            #dma-cells = <0x02>;
            dma-names = "tx\0rx";
            pinctrl-names = "default\0sleep";
            pinctrl-0 = <0x86 0x87 0x88 0x89>;
            pinctrl-1 = <0x8a>;
            status = "disabled";
        };

        spdif@100d0000 {
            compatible = "rockchip-spdif";
            reg = <0x100d0000 0x1000>;
            clocks = <0x8b 0x62 0x0a>;
            clock-names = "spdif_mclk\0spdif_hclk";
            interrupts = <0x00 0x1d 0x04>;
            dmas = <0x6a 0x0a>;
            #dma-cells = <0x01>;
            dma-names = "tx";
            pinctrl-names = "default";
            pinctrl-0 = <0x8c>;
            status = "okay";
            linux,phandle = <0xbb>;
            phandle = <0xbb>;
        };

        codec@12010000 {
            compatible = "rockchip,rk322x-codec";
            reg = <0x12010000 0x1000>;
            clocks = <0x63 0x05>;
            clock-names = "g_pclk_acodec";
            spk_ctl_io = <0x8d 0x03 0x00>;
            status = "okay";
            spk_depop_time = <0x64>;
            linux,phandle = <0xb8>;
            phandle = <0xb8>;
        };

        codec-spdif {
            compatible = "hdmi-spdif";
            status = "okay";
            linux,phandle = <0xba>;
            phandle = <0xba>;
        };

        codec-hdmi-i2s {
            compatible = "hdmi-i2s";
            status = "okay";
            linux,phandle = <0xbc>;
            phandle = <0xbc>;
        };

        tsadc@11150000 {
            compatible = "rockchip,rk322x-tsadc";
            reg = <0x11150000 0x100>;
            interrupts = <0x00 0x3a 0x04>;
            clock-frequency = <0x8000>;
            clocks = <0x4d 0x64 0x0f>;
            clock-names = "tsadc\0pclk_tsadc";
            resets = <0x8e 0x57>;
            reset-names = "tsadc-apb";
            #io-channel-cells = <0x01>;
            io-channel-ranges;
            pinctrl-names = "default";
            pinctrl-0 = <0x8f>;
            tsadc-ht-temp = <0x78>;
            tsadc-ht-reset-cru = <0x01>;
            tsadc-ht-pull-gpio = <0x00>;
            status = "okay";
        };

        gpu {
            compatible = "arm,mali400";
            reg = <0x20001000 0x200 0x20000000 0x100 0x20003000 0x100 0x20008000 0x1100 0x20004000 0x100 0x2000a000 0x1100 0x20005000 0x100>;
            reg-names = "Mali_L2\0Mali_GP\0Mali_GP_MMU\0Mali_PP0\0Mali_PP0_MMU\0Mali_PP1\0Mali_PP1_MMU";
            interrupts = <0x00 0x06 0x04 0x00 0x05 0x04 0x00 0x04 0x04 0x00 0x05 0x04 0x00 0x04 0x04 0x00 0x05 0x04>;
            interrupt-names = "Mali_GP_IRQ\0Mali_GP_MMU_IRQ\0Mali_PP0_IRQ\0Mali_PP0_MMU_IRQ\0Mali_PP1_IRQ\0Mali_PP1_MMU_IRQ";
        };

        fb {
            compatible = "rockchip,rk-fb";
            rockchip,disp-mode = <0x00>;
            rockchip,disp-policy = <0x01>;
            rockchip,uboot-logo-on = <0x01>;
        };

        rk_screen {
            compatible = "rockchip,screen";
            display-timings = <0x90>;
        };

        pwm@110b0000 {
            compatible = "rockchip,rk-pwm";
            reg = <0x110b0000 0x10>;
            interrupts = <0x00 0x32 0x04>;
            #pwm-cells = <0x02>;
            pinctrl-names = "default";
            pinctrl-0 = <0x91>;
            clocks = <0x64 0x07>;
            clock-names = "pclk_pwm";
            status = "disabled";
        };

        pwm@110b0010 {
            compatible = "rockchip,rk-pwm";
            reg = <0x110b0010 0x10>;
            interrupts = <0x00 0x32 0x04>;
            #pwm-cells = <0x02>;
            pinctrl-names = "default";
            pinctrl-0 = <0x92>;
            clocks = <0x64 0x07>;
            clock-names = "pclk_pwm";
            status = "okay";
            linux,phandle = <0xb6>;
            phandle = <0xb6>;
        };

        pwm@110b0020 {
            compatible = "rockchip,rk-pwm";
            reg = <0x110b0020 0x10>;
            interrupts = <0x00 0x32 0x04>;
            #pwm-cells = <0x02>;
            pinctrl-names = "default";
            pinctrl-0 = <0x93>;
            clocks = <0x64 0x07>;
            clock-names = "pclk_pwm";
            status = "okay";
            linux,phandle = <0xb7>;
            phandle = <0xb7>;
        };

        pwm@110b0030 {
            compatible = "rockchip,remotectl-pwm";
            reg = <0x110b0030 0x10>;
            interrupts = <0x00 0x32 0x04>;
            #pwm-cells = <0x02>;
            pinctrl-names = "default";
            pinctrl-0 = <0x94>;
            clocks = <0x64 0x07>;
            clock-names = "pclk_pwm";
            remote-gpios = <0x75 0x03 0x00>;
            suspend1-gpios = <0x8d 0x07 0x00>;
            suspend2-gpios = <0x95 0x15 0x01>;
            net1-gpios = <0x7c 0x0e 0x01>;
            status = "okay";
            remote_pwm_id = <0x03>;
            handle_cpu_id = <0x01>;

            ir_key1 {
                rockchip,usercode = <0xfd01>;
                rockchip,key_table = <0x31 0xe8 0x29 0x9e 0x2e 0x9e 0x35 0x67 0x2d 0x6c 0x66 0x69 0x3e 0x6a 0x6a 0x66 0x7a 0x73 0x79 0x72 0x23 0x74 0x76 0x71 0x3a 0x8b 0x72 0x184 0x6d 0x02 0x6c 0x03 0x33 0x04 0x71 0x05 0x70 0x06 0x37 0x07 0x75 0x08 0x74 0x09 0x3b 0x0a 0x78 0x0b 0x2c 0x0e 0x65 0x8d 0x22 0x67 0x73 0x6c>;
            };

            ir_key2 {
                rockchip,usercode = <0x7f80>;
                rockchip,key_table = <0xec 0xe8 0xd8 0x9e 0xc7 0x67 0xbf 0x6c 0xc8 0x69 0xc6 0x6a 0x8c 0x66 0x78 0x73 0x76 0x72 0x7e 0x74 0x7c 0x8b 0xb7 0x184>;
            };

            ir_key3 {
                rockchip,usercode = <0x1dcc>;
                rockchip,key_table = <0xee 0xe8 0xf0 0x9e 0xf8 0x67 0xbb 0x6c 0xef 0x69 0xed 0x6a 0xfc 0x66 0xf1 0x73 0xfd 0x72 0xb7 0xd9 0xff 0x74 0xf3 0x71 0xbf 0x8b 0xf9 0x191 0xf5 0x192 0xb3 0x184 0xbe 0x02 0xba 0x03 0xb2 0x04 0xbd 0x05 0xf9 0x06 0xb1 0x07 0xfc 0x08 0xf8 0x09 0xb0 0x0a 0xb6 0x0b 0xb5 0x0e>;
            };

            ir_key4 {
                rockchip,usercode = <0xfe01>;
                rockchip,key_table = <0xec 0xe8 0xe6 0x9e 0xe9 0x67 0xe5 0x6c 0xae 0x69 0xaf 0x6a 0xee 0x66 0xe7 0x73 0xef 0x72 0xea 0xd9 0xbf 0x74 0xbe 0x71 0xb3 0x8b 0xf9 0x191 0xf5 0x192 0xff 0x184 0xb1 0x02 0xf2 0x03 0xf3 0x04 0xb5 0x05 0xf6 0x06 0xf7 0x07 0xb9 0x08 0xfa 0x09 0xfb 0x0a 0xfe 0x0b 0xbd 0x0e 0xbc 0x8d 0xb4 0xf2 0xb0 0xf1 0xf0 0x3b 0xbb 0x3c 0xaa 0xa8 0xab 0x9f 0xa5 0xa4 0xad 0x80>;
            };
        };

        net_power_led {
            compatible = "net_led";
            net_power,pin1 = <0x7c 0x0e 0x01>;
            status = "okay";
        };

        remote_power_led {
            compatible = "remote_led";
            remote_power,pin = <0x75 0x03 0x00>;
            status = "okay";
        };

        suspend_power_led {
            compatible = "suspend_led";
            suspend_power,pin1 = <0x8d 0x07 0x00>;
            suspend_power,pin2 = <0x95 0x15 0x01>;
            status = "okay";
        };

        vpu_service@20020000 {
            compatible = "vpu_service";
            rockchip,grf = <0x5b>;
            iommu_enabled = <0x01>;
            reg = <0x20020000 0x800>;
            interrupts = <0x00 0x09 0x04 0x00 0x0b 0x04>;
            interrupt-names = "irq_dec\0irq_enc";
            clocks = <0x04 0x96>;
            clock-names = "aclk_vcodec\0hclk_vcodec";
            resets = <0x8e 0x71 0x8e 0x70>;
            reset-names = "video_h\0video_a";
            dev_mode = <0x00>;
            status = "okay";
        };

        rkvdec@20030000 {
            compatible = "rockchip,rkvdec";
            rockchip,grf = <0x5b>;
            iommu_enabled = <0x01>;
            reg = <0x20030000 0x400>;
            interrupts = <0x00 0x07 0x04>;
            interrupt-names = "irq_dec";
            clocks = <0x03 0x58 0x3a 0x42>;
            clock-names = "aclk_vcodec\0hclk_vcodec\0clk_cabac\0clk_core";
            resets = <0x8e 0x78 0x8e 0x76>;
            reset-names = "video_h\0video_a";
            dev_mode = <0x02>;
            status = "okay";
        };

        vop@20050000 {
            compatible = "rockchip,rk322x-lcdc";
            rockchip,prop = <0x01>;
            rockchip,cabc_mode = <0x00>;
            rockchip,pwr18 = <0x00>;
            rockchip,iommu-enabled = <0x01>;
            reg = <0x20050000 0x2000>;
            interrupts = <0x00 0x20 0x04>;
            clocks = <0x56 0x05 0x5f 0x56 0x06 0x56 0x0c 0x56 0x0d>;
            clock-names = "aclk_vop\0dclk_vop\0hclk_vop\0aclk_vop_noc\0hclk_vop_noc";
        };

        rga@20060000 {
            compatible = "rockchip,rga2";
            reg = <0x20060000 0x1000>;
            interrupts = <0x00 0x21 0x04>;
            clocks = <0x56 0x00 0x56 0x01 0x32>;
            clock-names = "aclk_rga\0hclk_rga\0pd_rga";
        };

        iep@20070000 {
            compatible = "rockchip,iep";
            iommu_enabled = <0x01>;
            reg = <0x20070000 0x800>;
            interrupts = <0x00 0x1f 0x04>;
            clocks = <0x56 0x02 0x56 0x03>;
            clock-names = "aclk_iep\0hclk_iep";
            version = <0x03>;
            status = "okay";
        };

        vop_mmu {
            dbgname = "vop";
            compatible = "rockchip,vop_mmu";
            reg = <0x20053f00 0x100>;
            interrupts = <0x00 0x20 0x04>;
            interrupt-names = "vop_mmu";
        };

        vpu_mmu {
            dbgname = "vpu";
            compatible = "rockchip,vpu_mmu";
            reg = <0x20020800 0x100>;
            interrupts = <0x00 0x0a 0x04>;
            interrupt-names = "vpu_mmu";
        };

        iep_mmu {
            dbgname = "iep";
            compatible = "rockchip,iep_mmu";
            reg = <0x20070800 0x100>;
            interrupts = <0x00 0x1f 0x04>;
            interrupt-names = "iep_mmu";
        };

        vdec_mmu {
            dbgname = "vdec";
            compatible = "rockchip,vdec_mmu";
            reg = <0x20030480 0x40 0x200304c0 0x40>;
            interrupts = <0x00 0x08 0x04>;
            interrupt-names = "vdec_mmu";
        };

        hdmi@200a0000 {
            compatible = "rockchip,rk322x-hdmi";
            reg = <0x200a0000 0x20000 0x12030000 0x10000>;
            interrupts = <0x00 0x23 0x04 0x00 0x47 0x04>;
            clocks = <0x97 0x07 0x67 0x06 0x63 0x07 0x05>;
            clock-names = "hdcp_clk_hdmi\0pclk_hdmi\0pclk_hdmi_phy\0cec_clk_hdmi";
            pinctrl-names = "default\0gpio";
            pinctrl-0 = <0x98 0x99 0x9a>;
            pinctrl-1 = <0x7e>;
            resets = <0x8e 0x60>;
            reset-names = "hdmi";
            rockchip,grf = <0x5b>;
            rockchip,hdmi_audio_source = <0x00>;
            rockchip,hdcp_enable = <0x00>;
            rockchip,cec_enable = <0x00>;
            status = "okay";
            rockchip,phy_table = <0x9d5b340 0x00 0x00 0x04 0x04 0x04 0x04 0xd693a40 0x00 0x00 0x06 0x06 0x06 0x06 0x1443fd00 0x01 0x00 0x06 0x0a 0x0a 0x0a 0x2367b880 0x01 0x00 0x07 0x0a 0x0a 0x0a>;
        };

        hdmi_hdcp2@20090000 {
            compatible = "rockchip,rk322x-hdmi-hdcp2";
            reg = <0x20090000 0x10000>;
            interrupts = <0x00 0x22 0x04>;
            clocks = <0x56 0x0a 0x67 0x0c 0x67 0x0b 0x67 0x0a 0x35>;
            clock-names = "aclk_noc_hdcp2\0hclk_hdcp2_mmu\0pclk_hdcp2\0aclk_hdcp2\0hdcp2_clk_hdmi";
            status = "disabled";
        };

        tve {
            compatible = "rockchip,rk322x-tve";
            reg = <0x20053e00 0x100 0x12020000 0x10000>;
            clocks = <0x63 0x08>;
            clock-names = "pclk_vdac";
            saturation = <0x305b46>;
            brightcontrast = <0x9900>;
            adjtiming = <0xd6c00880>;
            lumafilter0 = <0x2ff0001>;
            lumafilter1 = <0xf40200fe>;
            lumafilter2 = <0xf332d910>;
            daclevel = <0x15>;
            dac1level = <0x07>;
            status = "okay";
        };

        rksdmmc@30020000 {
            compatible = "rockchip,rk_mmc\0rockchip,rk322x-sdmmc";
            reg = <0x30020000 0x10000>;
            interrupts = <0x00 0x0e 0x04>;
            #address-cells = <0x01>;
            #size-cells = <0x00>;
            clocks = <0x25 0x66 0x02>;
            clock-names = "clk_mmc\0hclk_mmc";
            num-slots = <0x01>;
            fifo-depth = <0x100>;
            bus-width = <0x08>;
            tune_regsbase = <0x1d8>;
            resets = <0x8e 0x53>;
            reset-names = "mmc_ahb_reset";
            clock-frequency = <0x7735940>;
            clock-freq-min-max = <0x61a80 0x7735940>;
            supports-highspeed;
            supports-emmc;
            bootpart-no-access;
            supports-DDR_MODE;
            caps2-mmc-hs200;
            ignore-pm-notify;
            keep-power-in-suspend;
            status = "okay";
        };

        rksdmmc@30000000 {
            compatible = "rockchip,rk_mmc\0rockchip,rk322x-sdmmc";
            reg = <0x30000000 0x10000>;
            interrupts = <0x00 0x0c 0x04>;
            #address-cells = <0x01>;
            #size-cells = <0x00>;
            pinctrl-names = "default\0idle";
            pinctrl-0 = <0x9b 0x9c 0x9d 0x9e 0x9f>;
            pinctrl-1 = <0xa0>;
            cd-gpios = <0x8d 0x11 0x00>;
            clocks = <0x22 0x66 0x00>;
            clock-names = "clk_mmc\0hclk_mmc";
            num-slots = <0x01>;
            fifo-depth = <0x100>;
            bus-width = <0x04>;
            resets = <0x8e 0x51>;
            reset-names = "mmc_ahb_reset";
            clock-frequency = <0x23c3460>;
            clock-freq-min-max = <0x61a80 0x23c3460>;
            supports-highspeed;
            supports-sd;
            broken-cd;
            card-detect-delay = <0xc8>;
            ignore-pm-notify;
            keep-power-in-suspend;
            power-inverted;
            status = "okay";
        };

        rksdmmc@30010000 {
            compatible = "rockchip,rk_mmc\0rockchip,rk322x-sdmmc";
            reg = <0x30010000 0x10000>;
            interrupts = <0x00 0x0d 0x04>;
            #address-cells = <0x01>;
            #size-cells = <0x00>;
            pinctrl-names = "default\0idle";
            pinctrl-0 = <0xa1 0xa2 0xa3>;
            pinctrl-1 = <0xa4>;
            clocks = <0x24 0x66 0x01>;
            clock-names = "clk_mmc\0hclk_mmc";
            num-slots = <0x01>;
            fifo-depth = <0x100>;
            bus-width = <0x04>;
            tune_regsbase = <0x1c8>;
            resets = <0x8e 0x52>;
            reset-names = "mmc_ahb_reset";
            clock-frequency = <0x23c3460>;
            clock-freq-min-max = <0x30d40 0x23c3460>;
            supports-highspeed;
            supports-sdio;
            ignore-pm-notify;
            keep-power-in-suspend;
            cap-sdio-irq;
            status = "okay";
        };

        nandc@30030000 {
            compatible = "rockchip,rk-nandc";
            reg = <0x30030000 0x4000>;
            interrupts = <0x00 0x0f 0x04>;
            nandc_id = <0x00>;
            clocks = <0x0f 0x68 0x00 0x66 0x03>;
            clock-names = "clk_nandc\0g_clk_nandc\0hclk_nandc";
            status = "okay";
        };

        phy {
            compatible = "rockchip,rk322x-usb-phy";
            rockchip,grf = <0x5b>;
            #address-cells = <0x01>;
            #size-cells = <0x00>;

            usb-phy0 {
                #phy-cells = <0x00>;
                reg = <0x764>;
                linux,phandle = <0xa5>;
                phandle = <0xa5>;
            };

            usb-phy1 {
                #phy-cells = <0x00>;
                reg = <0x800>;
                linux,phandle = <0xa6>;
                phandle = <0xa6>;
            };

            usb-phy2 {
                #phy-cells = <0x00>;
                reg = <0x804>;
                linux,phandle = <0xa7>;
                phandle = <0xa7>;
            };
        };

        otg@30040000 {
            compatible = "rockchip,rk322x_usb20_otg";
            reg = <0x30040000 0x40000>;
            interrupts = <0x00 0x17 0x04>;
            clocks = <0x68 0x05 0x66 0x0c 0x66 0x0d>;
            clock-names = "clk_usbphy0\0hclk_otg\0hclk_otg_pmu";
            resets = <0x8e 0x45 0x8e 0x67 0x8e 0x46>;
            reset-names = "otg_ahb\0otg_phy\0otg_controller";
            rockchip,usb-mode = <0x01>;
        };

        ehci0@30080000 {
            compatible = "generic-ehci";
            reg = <0x30080000 0x20000>;
            interrupts = <0x00 0x10 0x04>;
            clocks = <0x68 0x05 0x66 0x06 0x66 0x07>;
            clock-names = "clk_usbphy0\0hclk_host0\0hclk_host0_arb";
            phys = <0xa5>;
            phy-names = "usb";
            resets = <0x8e 0x47 0x8e 0x68 0x8e 0x48>;
            reset-names = "host_ahb\0host_phy\0host_controller";
        };

        ohci0@300a0000 {
            compatible = "generic-ohci";
            reg = <0x300a0000 0x20000>;
            interrupts = <0x00 0x11 0x04>;
        };

        ehci1@300c0000 {
            compatible = "generic-ehci";
            reg = <0x300c0000 0x20000>;
            interrupts = <0x00 0x13 0x04>;
            clocks = <0x68 0x06 0x66 0x08 0x66 0x09>;
            clock-names = "clk_usbphy1\0hclk_host1\0hclk_host1_arb";
            phys = <0xa6>;
            phy-names = "usb";
            resets = <0x8e 0x49 0x8e 0x69 0x8e 0x4a>;
            reset-names = "host_ahb\0host_phy\0host_controller";
        };

        ohci1@300e0000 {
            compatible = "generic-ohci";
            reg = <0x300e0000 0x20000>;
            interrupts = <0x00 0x14 0x04>;
        };

        ehci2@30100000 {
            compatible = "generic-ehci";
            reg = <0x30100000 0x20000>;
            interrupts = <0x00 0x42 0x04>;
            clocks = <0x68 0x06 0x66 0x0a 0x66 0x0e>;
            clock-names = "clk_usbphy1\0hclk_host2\0hck_host2_arb";
            phys = <0xa7>;
            phy-names = "usb";
            resets = <0x8e 0x4b 0x8e 0x6a 0x8e 0x4c>;
            reset-names = "host_ahb\0host_phy\0host_controller";
        };

        ohci2@30120000 {
            compatible = "generic-ohci";
            reg = <0x30120000 0x20000>;
            interrupts = <0x00 0x43 0x04>;
        };

        eth@30200000 {
            compatible = "rockchip,rk322x-gmac";
            reg = <0x30200000 0x10000>;
            rockchip,grf = <0x5b>;
            interrupts = <0x00 0x18 0x04>;
            interrupt-names = "macirq";
            clocks = <0x4e 0xa8 0x05 0xa8 0x06 0xa8 0x03 0xa8 0x04 0x66 0x04 0x66 0x05>;
            clock-names = "clk_mac\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac";
            resets = <0x8e 0x3f>;
            reset-names = "mac-phy";
            phy-mode = "rmii";
            pinctrl-names = "default";
            pinctrl-0 = <0xa9>;
            status = "okay";
            link-gpio = <0x75 0x0e 0x00>;
            led-gpio = <0x7c 0x08 0x00>;
            clock_in_out = "output";
            tx_delay = <0x26>;
            rx_delay = <0x11>;
            phy-type = "internal";
        };

        rockchip_suspend {
            rockchip,ctrbits = <0x11806>;
        };

        pinctrl {
            compatible = "rockchip,rk322x-pinctrl";
            rockchip,grf = <0x5b>;
            #address-cells = <0x01>;
            #size-cells = <0x01>;
            ranges;

            gpio0@11110000 {
                compatible = "rockchip,gpio-bank";
                reg = <0x11110000 0x100>;
                interrupts = <0x00 0x33 0x04>;
                clocks = <0x64 0x09>;
                gpio-controller;
                #gpio-cells = <0x02>;
                interrupt-controller;
                #interrupt-cells = <0x02>;
                linux,phandle = <0x75>;
                phandle = <0x75>;
            };

            gpio1@11120000 {
                compatible = "rockchip,gpio-bank";
                reg = <0x11120000 0x100>;
                interrupts = <0x00 0x34 0x04>;
                clocks = <0x64 0x09>;
                gpio-controller;
                #gpio-cells = <0x02>;
                interrupt-controller;
                #interrupt-cells = <0x02>;
                linux,phandle = <0x8d>;
                phandle = <0x8d>;
            };

            gpio2@11130000 {
                compatible = "rockchip,gpio-bank";
                reg = <0x11130000 0x100>;
                interrupts = <0x00 0x35 0x04>;
                clocks = <0x64 0x0a>;
                gpio-controller;
                #gpio-cells = <0x02>;
                interrupt-controller;
                #interrupt-cells = <0x02>;
                linux,phandle = <0x7c>;
                phandle = <0x7c>;
            };

            gpio3@11140000 {
                compatible = "rockchip,gpio-bank";
                reg = <0x11140000 0x100>;
                interrupts = <0x00 0x36 0x04>;
                clocks = <0x64 0x0b>;
                gpio-controller;
                #gpio-cells = <0x02>;
                interrupt-controller;
                #interrupt-cells = <0x02>;
                linux,phandle = <0x95>;
                phandle = <0x95>;
            };

            pcfg-pull-up {
                bias-pull-up;
                linux,phandle = <0xac>;
                phandle = <0xac>;
            };

            pcfg-pull-down {
                bias-pull-down;
                linux,phandle = <0xb2>;
                phandle = <0xb2>;
            };

            pcfg-pull-none {
                bias-disable;
                linux,phandle = <0xaa>;
                phandle = <0xaa>;
            };

            pcfg-pull-none-drv-8ma {
                drive-strength = <0x08>;
                linux,phandle = <0xaf>;
                phandle = <0xaf>;
            };

            pcfg-pull-none-drv-12ma {
                drive-strength = <0x0c>;
                linux,phandle = <0xb1>;
                phandle = <0xb1>;
            };

            pcfg-pull-up-drv-8ma {
                bias-pull-up;
                drive-strength = <0x08>;
                linux,phandle = <0xb0>;
                phandle = <0xb0>;
            };

            pcfg-pull-none-drv-4ma {
                drive-strength = <0x04>;
                linux,phandle = <0xad>;
                phandle = <0xad>;
            };

            pcfg-pull-up-drv-4ma {
                bias-pull-up;
                drive-strength = <0x04>;
                linux,phandle = <0xae>;
                phandle = <0xae>;
            };

            pcfg-pull-down-drv-12ma {
                bias-pull-down;
                drive-strength = <0x0c>;
            };

            pcfg-output-high {
                output-high;
            };

            pcfg-output-low {
                output-low;
            };

            pcfg-input-high {
                bias-pull-up;
                input-enable;
                linux,phandle = <0xab>;
                phandle = <0xab>;
            };

            i2c0 {

                i2c0-xfer {
                    rockchip,pins = <0x00 0x00 0x01 0xaa 0x00 0x01 0x01 0xaa>;
                    linux,phandle = <0x72>;
                    phandle = <0x72>;
                };

                i2c0-gpio {
                    rockchip,pins = <0x00 0x00 0x00 0xaa 0x00 0x01 0x00 0xaa>;
                    linux,phandle = <0x73>;
                    phandle = <0x73>;
                };

                i2c0-sleep {
                    rockchip,pins = <0x00 0x00 0x00 0xab 0x00 0x01 0x00 0xab>;
                    linux,phandle = <0x74>;
                    phandle = <0x74>;
                };
            };

            i2c1 {

                i2c1-xfer {
                    rockchip,pins = <0x00 0x02 0x01 0xaa 0x00 0x03 0x01 0xaa>;
                    linux,phandle = <0x76>;
                    phandle = <0x76>;
                };

                i2c1-gpio {
                    rockchip,pins = <0x00 0x02 0x00 0xaa 0x00 0x03 0x00 0xaa>;
                    linux,phandle = <0x77>;
                    phandle = <0x77>;
                };

                i2c1-sleep {
                    rockchip,pins = <0x00 0x02 0x00 0xab 0x00 0x03 0x00 0xab>;
                    linux,phandle = <0x78>;
                    phandle = <0x78>;
                };
            };

            i2c2 {

                i2c2-xfer {
                    rockchip,pins = <0x02 0x15 0x01 0xaa 0x02 0x14 0x01 0xaa>;
                    linux,phandle = <0x79>;
                    phandle = <0x79>;
                };

                i2c2-gpio {
                    rockchip,pins = <0x02 0x15 0x00 0xaa 0x02 0x14 0x00 0xaa>;
                    linux,phandle = <0x7a>;
                    phandle = <0x7a>;
                };

                i2c2-sleep {
                    rockchip,pins = <0x02 0x15 0x00 0xab 0x02 0x14 0x00 0xab>;
                    linux,phandle = <0x7b>;
                    phandle = <0x7b>;
                };
            };

            i2c3 {

                i2c3-xfer {
                    rockchip,pins = <0x00 0x06 0x01 0xaa 0x00 0x07 0x01 0xaa>;
                    linux,phandle = <0x7d>;
                    phandle = <0x7d>;
                };

                i2c3-gpio {
                    rockchip,pins = <0x00 0x06 0x00 0xaa 0x00 0x07 0x00 0xaa>;
                    linux,phandle = <0x7e>;
                    phandle = <0x7e>;
                };

                i2c3-sleep {
                    rockchip,pins = <0x00 0x06 0x00 0xab 0x00 0x07 0x00 0xab>;
                    linux,phandle = <0x7f>;
                    phandle = <0x7f>;
                };
            };

            uart0 {

                uart0-xfer {
                    rockchip,pins = <0x02 0x1a 0x01 0xac 0x02 0x1b 0x01 0xaa>;
                    linux,phandle = <0x6b>;
                    phandle = <0x6b>;
                };

                uart0-cts {
                    rockchip,pins = <0x02 0x1d 0x01 0xaa>;
                    linux,phandle = <0x6c>;
                    phandle = <0x6c>;
                };

                uart0-rts {
                    rockchip,pins = <0x00 0x11 0x01 0xaa>;
                    linux,phandle = <0x6d>;
                    phandle = <0x6d>;
                };

                uart0-rts-gpio {
                    rockchip,pins = <0x00 0x11 0x00 0xaa>;
                };
            };

            uart1-0 {

                uart1-xfer {
                    rockchip,pins = <0x01 0x0a 0x01 0xac 0x01 0x09 0x01 0xaa>;
                };

                uart1-cts {
                    rockchip,pins = <0x01 0x08 0x01 0xaa>;
                };

                uart1-rts {
                    rockchip,pins = <0x01 0x0b 0x01 0xaa>;
                };

                uart1-rts-gpio {
                    rockchip,pins = <0x01 0x0b 0x00 0xaa>;
                };
            };

            uart1-1 {

                uart11-xfer {
                    rockchip,pins = <0x03 0x0e 0x01 0xac 0x03 0x0d 0x01 0xaa>;
                    linux,phandle = <0x6f>;
                    phandle = <0x6f>;
                };

                uart11-cts {
                    rockchip,pins = <0x03 0x07 0x01 0xaa>;
                    linux,phandle = <0x70>;
                    phandle = <0x70>;
                };

                uart11-rts {
                    rockchip,pins = <0x03 0x06 0x01 0xaa>;
                    linux,phandle = <0xb4>;
                    phandle = <0xb4>;
                };

                uart11-rts-gpio {
                    rockchip,pins = <0x03 0x06 0x00 0xaa>;
                    linux,phandle = <0xb5>;
                    phandle = <0xb5>;
                };
            };

            uart2-0 {

                uart2-xfer {
                    rockchip,pins = <0x01 0x12 0x02 0xac 0x01 0x13 0x02 0xaa>;
                };

                uart2-cts {
                    rockchip,pins = <0x00 0x19 0x01 0xaa>;
                };

                uart2-rts {
                    rockchip,pins = <0x00 0x18 0x01 0xaa>;
                };
            };

            uart2-1 {

                uart21-xfer {
                    rockchip,pins = <0x01 0x0a 0x02 0xac 0x01 0x09 0x02 0xaa>;
                    linux,phandle = <0x5a>;
                    phandle = <0x5a>;
                };
            };

            spi-0 {

                spi0-clk {
                    rockchip,pins = <0x00 0x09 0x02 0xac>;
                    linux,phandle = <0x80>;
                    phandle = <0x80>;
                };

                spi0-cs0 {
                    rockchip,pins = <0x00 0x0e 0x02 0xac>;
                    linux,phandle = <0x83>;
                    phandle = <0x83>;
                };

                spi0-tx {
                    rockchip,pins = <0x00 0x0b 0x02 0xac>;
                    linux,phandle = <0x81>;
                    phandle = <0x81>;
                };

                spi0-rx {
                    rockchip,pins = <0x00 0x0d 0x02 0xac>;
                    linux,phandle = <0x82>;
                    phandle = <0x82>;
                };

                spi0-cs1 {
                    rockchip,pins = <0x01 0x0c 0x01 0xac>;
                    linux,phandle = <0x84>;
                    phandle = <0x84>;
                };
            };

            spi-1 {

                spi1-clk {
                    rockchip,pins = <0x00 0x17 0x02 0xac>;
                };

                spi1-cs0 {
                    rockchip,pins = <0x02 0x02 0x02 0xac>;
                };

                spi1-rx {
                    rockchip,pins = <0x02 0x00 0x02 0xac>;
                };

                spi1-tx {
                    rockchip,pins = <0x02 0x01 0x02 0xac>;
                };

                spi1-cs1 {
                    rockchip,pins = <0x02 0x03 0x02 0xac>;
                };
            };

            i2s {

                i2s-mclk {
                    rockchip,pins = <0x00 0x08 0x01 0xaa>;
                };

                i2s-sclk {
                    rockchip,pins = <0x00 0x09 0x01 0xaa>;
                };

                i2s-lrckrx {
                    rockchip,pins = <0x00 0x0b 0x01 0xaa>;
                };

                i2s-lrcktx {
                    rockchip,pins = <0x00 0x0c 0x01 0xaa>;
                };

                i2s-sdi {
                    rockchip,pins = <0x00 0x0e 0x01 0xaa>;
                };

                i2s-sdo0 {
                    rockchip,pins = <0x00 0x0d 0x01 0xaa>;
                };

                i2s-sdo1 {
                    rockchip,pins = <0x01 0x02 0x02 0xaa>;
                };

                i2s-sdo2 {
                    rockchip,pins = <0x01 0x04 0x02 0xaa>;
                };

                i2s-sdo3 {
                    rockchip,pins = <0x01 0x05 0x02 0xaa>;
                };

                i2s-sleep {
                    rockchip,pins = <0x00 0x08 0x00 0xab 0x00 0x09 0x00 0xab 0x00 0x0b 0x00 0xab 0x00 0x0c 0x00 0xab 0x00 0x0e 0x00 0xab 0x00 0x0d 0x00 0xab 0x01 0x02 0x00 0xab 0x01 0x04 0x00 0xab 0x01 0x05 0x00 0xab>;
                };
            };

            pcm {

                pcm-rx {
                    rockchip,pins = <0x00 0x1a 0x02 0xaa>;
                    linux,phandle = <0x86>;
                    phandle = <0x86>;
                };

                pcm-tx {
                    rockchip,pins = <0x00 0x1b 0x02 0xaa>;
                    linux,phandle = <0x87>;
                    phandle = <0x87>;
                };

                pcm-clk {
                    rockchip,pins = <0x03 0x0b 0x01 0xaa>;
                    linux,phandle = <0x88>;
                    phandle = <0x88>;
                };

                pcm-sync {
                    rockchip,pins = <0x03 0x0c 0x01 0xaa>;
                    linux,phandle = <0x89>;
                    phandle = <0x89>;
                };

                pcm-sleep {
                    rockchip,pins = <0x00 0x1a 0x00 0xab 0x00 0x1b 0x00 0xab 0x03 0x0b 0x00 0xab 0x03 0x0c 0x00 0xab>;
                    linux,phandle = <0x8a>;
                    phandle = <0x8a>;
                };
            };

            spdif0 {

                spdif0-tx {
                    rockchip,pins = <0x03 0x1b 0x01 0xaa>;
                };
            };

            spdif1 {

                spdif1-tx {
                    rockchip,pins = <0x03 0x1f 0x02 0xaa>;
                    linux,phandle = <0x8c>;
                    phandle = <0x8c>;
                };
            };

            sdmmc {

                sdmmc-clk {
                    rockchip,pins = <0x01 0x10 0x01 0xad>;
                    linux,phandle = <0x9b>;
                    phandle = <0x9b>;
                };

                sdmmc-cmd {
                    rockchip,pins = <0x01 0x0f 0x01 0xae>;
                    linux,phandle = <0x9c>;
                    phandle = <0x9c>;
                };

                sdmmc-dectn {
                    rockchip,pins = <0x01 0x11 0x01 0xae>;
                    linux,phandle = <0x9d>;
                    phandle = <0x9d>;
                };

                sdmmc-wrprt {
                    rockchip,pins = <0x01 0x07 0x01 0xae>;
                };

                sdmmc-pwren {
                    rockchip,pins = <0x01 0x0e 0x01 0xae>;
                    linux,phandle = <0x9f>;
                    phandle = <0x9f>;
                };

                sdmmc-bus1 {
                    rockchip,pins = <0x01 0x12 0x01 0xae>;
                };

                sdmmc-bus4 {
                    rockchip,pins = <0x01 0x12 0x01 0xae 0x01 0x13 0x01 0xae 0x01 0x14 0x01 0xae 0x01 0x15 0x01 0xae>;
                    linux,phandle = <0x9e>;
                    phandle = <0x9e>;
                };

                sdmmc-gpio {
                    rockchip,pins = <0x01 0x10 0x00 0xae 0x01 0x0f 0x00 0xae 0x01 0x11 0x00 0xae 0x01 0x07 0x00 0xae 0x01 0x0e 0x00 0xae 0x01 0x12 0x00 0xae 0x01 0x13 0x00 0xae 0x01 0x14 0x00 0xae 0x01 0x15 0x00 0xae>;
                    linux,phandle = <0xa0>;
                    phandle = <0xa0>;
                };
            };

            sdio-0 {

                sdio-bus1 {
                    rockchip,pins = <0x01 0x01 0x01 0xae>;
                };

                sdio-bus4 {
                    rockchip,pins = <0x01 0x01 0x01 0xae 0x01 0x02 0x01 0xae 0x01 0x04 0x01 0xae 0x01 0x05 0x01 0xae>;
                };

                sdio-cmd {
                    rockchip,pins = <0x00 0x03 0x02 0xae>;
                };

                sdio-clk {
                    rockchip,pins = <0x01 0x00 0x01 0xad>;
                };

                sdio-pwren {
                    rockchip,pins = <0x00 0x1e 0x01 0xac>;
                };

                sdio-gpio {
                    rockchip,pins = <0x00 0x03 0x00 0xae 0x01 0x00 0x00 0xae 0x00 0x1e 0x00 0xae 0x01 0x01 0x00 0xae 0x01 0x02 0x00 0xae 0x01 0x03 0x00 0xae 0x01 0x04 0x00 0xae>;
                };
            };

            sdio-1 {

                sdio1-bus1 {
                    rockchip,pins = <0x03 0x02 0x01 0xae>;
                };

                sdio1-bus4 {
                    rockchip,pins = <0x03 0x02 0x01 0xae 0x03 0x03 0x01 0xae 0x03 0x04 0x01 0xae 0x03 0x05 0x01 0xae>;
                    linux,phandle = <0xa3>;
                    phandle = <0xa3>;
                };

                sdio1-cmd {
                    rockchip,pins = <0x03 0x01 0x01 0xae>;
                    linux,phandle = <0xa1>;
                    phandle = <0xa1>;
                };

                sdio1-clk {
                    rockchip,pins = <0x03 0x00 0x01 0xad>;
                    linux,phandle = <0xa2>;
                    phandle = <0xa2>;
                };

                sdio1-gpio {
                    rockchip,pins = <0x03 0x03 0x00 0xae 0x03 0x00 0x00 0xae 0x03 0x01 0x00 0xae 0x03 0x02 0x00 0xae 0x03 0x03 0x00 0xae 0x03 0x04 0x00 0xae>;
                    linux,phandle = <0xa4>;
                    phandle = <0xa4>;
                };
            };

            emmc-0 {

                emmc-clk {
                    rockchip,pins = <0x02 0x07 0x02 0xaf>;
                };

                emmc-cmd {
                    rockchip,pins = <0x01 0x16 0x02 0xb0>;
                };

                emmc-pwren {
                    rockchip,pins = <0x02 0x05 0x02 0xaa>;
                };

                emmc_rstnout {
                    rockchip,pins = <0x01 0x17 0x02 0xaa>;
                };

                emmc-bus1 {
                    rockchip,pins = <0x01 0x18 0x02 0xb0>;
                };

                emmc-bus4 {
                    rockchip,pins = <0x01 0x18 0x02 0xb0 0x01 0x19 0x02 0xb0 0x01 0x1a 0x02 0xb0 0x01 0x1b 0x02 0xb0>;
                };

                emmc-bus8 {
                    rockchip,pins = <0x01 0x18 0x02 0xb0 0x01 0x19 0x02 0xb0 0x01 0x1a 0x02 0xb0 0x01 0x1b 0x02 0xb0 0x01 0x1c 0x02 0xb0 0x01 0x1d 0x02 0xb0 0x01 0x1e 0x02 0xb0 0x01 0x1f 0x02 0xb0>;
                };
            };

            emmc-1 {

                emmc1-clk {
                    rockchip,pins = <0x02 0x07 0x02 0xaf>;
                };

                emmc1-cmd {
                    rockchip,pins = <0x02 0x04 0x02 0xb0>;
                };

                emmc1-pwren {
                    rockchip,pins = <0x02 0x05 0x02 0xaa>;
                };

                emmc1_rstnout {
                    rockchip,pins = <0x01 0x17 0x02 0xaa>;
                };

                emmc1-bus1 {
                    rockchip,pins = <0x01 0x18 0x02 0xb0>;
                };

                emmc1-bus4 {
                    rockchip,pins = <0x01 0x18 0x02 0xb0 0x01 0x19 0x02 0xb0 0x01 0x1a 0x02 0xb0 0x01 0x1b 0x02 0xb0>;
                };

                emmc1-bus8 {
                    rockchip,pins = <0x01 0x18 0x02 0xb0 0x01 0x19 0x02 0xb0 0x01 0x1a 0x02 0xb0 0x01 0x1b 0x02 0xb0 0x01 0x1c 0x02 0xb0 0x01 0x1d 0x02 0xb0 0x01 0x1e 0x02 0xb0 0x01 0x1f 0x02 0xb0>;
                };
            };

            pwm0-0 {

                pwm0-pin {
                    rockchip,pins = <0x00 0x1a 0x01 0xaa>;
                };
            };

            pwm0-1 {

                pwm01-pin {
                    rockchip,pins = <0x03 0x15 0x01 0xaa>;
                    linux,phandle = <0x91>;
                    phandle = <0x91>;
                };
            };

            pwm1-0 {

                pwm1-pin {
                    rockchip,pins = <0x00 0x1b 0x01 0xaa>;
                };
            };

            pwm1-1 {

                pwm11-pin {
                    rockchip,pins = <0x00 0x1e 0x02 0xaa>;
                    linux,phandle = <0x92>;
                    phandle = <0x92>;
                };
            };

            pwm2-0 {

                pwm2-pin {
                    rockchip,pins = <0x00 0x1c 0x01 0xaa>;
                };
            };

            pwm2-1 {

                pwm21-pin {
                    rockchip,pins = <0x01 0x0c 0x02 0xaa>;
                    linux,phandle = <0x93>;
                    phandle = <0x93>;
                };
            };

            pwmir-0 {

                pwmir-pin {
                    rockchip,pins = <0x03 0x1a 0x01 0xaa>;
                };
            };

            pwmir-1 {

                pwmir1-pin {
                    rockchip,pins = <0x01 0x0b 0x02 0xaa>;
                    linux,phandle = <0x94>;
                    phandle = <0x94>;
                };
            };

            gmac {

                rgmii-pins {
                    rockchip,pins = <0x02 0x0e 0x01 0xaa 0x02 0x0c 0x01 0xaa 0x02 0x19 0x01 0xaa 0x02 0x13 0x01 0xb1 0x02 0x12 0x01 0xb1 0x02 0x16 0x01 0xb1 0x02 0x17 0x01 0xb1 0x02 0x09 0x01 0xb1 0x02 0x0d 0x01 0xb1 0x02 0x11 0x01 0xaa 0x02 0x10 0x01 0xaa 0x02 0x15 0x02 0xaa 0x02 0x14 0x02 0xaa 0x02 0x0b 0x01 0xaa 0x02 0x08 0x01 0xaa>;
                };

                rmii-pins {
                    rockchip,pins = <0x02 0x0e 0x01 0xaa 0x02 0x0c 0x01 0xaa 0x02 0x19 0x01 0xaa 0x02 0x13 0x01 0xb1 0x02 0x12 0x01 0xb1 0x02 0x0d 0x01 0xb1 0x02 0x11 0x01 0xaa 0x02 0x10 0x01 0xaa 0x02 0x08 0x01 0xaa 0x02 0x0f 0x01 0xaa>;
                };

                phy-pins {
                    rockchip,pins = <0x02 0x0e 0x02 0xaa 0x02 0x08 0x02 0xaa>;
                    linux,phandle = <0xa9>;
                    phandle = <0xa9>;
                };
            };

            tsadc_pin {

                tsadc-int {
                    rockchip,pins = <0x00 0x18 0x02 0xaa>;
                };

                tsadc-gpio {
                    rockchip,pins = <0x00 0x18 0x00 0xaa>;
                    linux,phandle = <0x8f>;
                    phandle = <0x8f>;
                };
            };

            hdmi_pin {

                hdmi-cec {
                    rockchip,pins = <0x00 0x14 0x01 0xaa>;
                    linux,phandle = <0x98>;
                    phandle = <0x98>;
                };

                hdmi-hpd {
                    rockchip,pins = <0x00 0x0f 0x01 0xb2>;
                    linux,phandle = <0x9a>;
                    phandle = <0x9a>;
                };
            };

            hdmi_i2c {

                hdmii2c-xfer {
                    rockchip,pins = <0x00 0x06 0x02 0xaa 0x00 0x07 0x02 0xaa>;
                    linux,phandle = <0x99>;
                    phandle = <0x99>;
                };
            };
        };

        power_ctr {
        };

        display-timings {
            native-mode = <0xb3>;
            linux,phandle = <0x90>;
            phandle = <0x90>;

            timing0 {
                screen-type = <0x01>;
                out-face = <0x00>;
                color-mode = <0x02>;
                clock-frequency = <0x46cf710>;
                hactive = <0x780>;
                vactive = <0x438>;
                hback-porch = <0xdc>;
                hfront-porch = <0x6e>;
                vback-porch = <0x14>;
                vfront-porch = <0x05>;
                hsync-len = <0x28>;
                vsync-len = <0x05>;
                hsync-active = <0x01>;
                vsync-active = <0x01>;
                de-active = <0x00>;
                pixelclk-active = <0x00>;
                swap-rb = <0x00>;
                swap-rg = <0x00>;
                swap-gb = <0x00>;
                linux,phandle = <0xb3>;
                phandle = <0xb3>;
            };

            timing1 {
                screen-type = <0x01>;
                out-face = <0x00>;
                color-mode = <0x02>;
                clock-frequency = <0x8d9ee20>;
                hactive = <0x780>;
                vactive = <0x438>;
                hback-porch = <0x94>;
                hfront-porch = <0x58>;
                vback-porch = <0x24>;
                vfront-porch = <0x04>;
                hsync-len = <0x2c>;
                vsync-len = <0x05>;
                hsync-active = <0x01>;
                vsync-active = <0x01>;
                de-active = <0x00>;
                pixelclk-active = <0x00>;
                swap-rb = <0x00>;
                swap-rg = <0x00>;
                swap-gb = <0x00>;
            };

            timing2 {
                screen-type = <0x01>;
                out-face = <0x00>;
                color-mode = <0x02>;
                clock-frequency = <0x11b3dc40>;
                hactive = <0xf00>;
                vactive = <0x870>;
                hback-porch = <0x128>;
                hfront-porch = <0xb0>;
                vback-porch = <0x48>;
                vfront-porch = <0x08>;
                hsync-len = <0x58>;
                vsync-len = <0x0a>;
                hsync-active = <0x01>;
                vsync-active = <0x01>;
                de-active = <0x00>;
                pixelclk-active = <0x00>;
                swap-rb = <0x00>;
                swap-rg = <0x00>;
                swap-gb = <0x00>;
            };

            timing3 {
                screen-type = <0x05>;
                out-face = <0x00>;
                color-mode = <0x02>;
                clock-frequency = <0x19bfcc0>;
                hactive = <0x2d0>;
                vactive = <0x1e0>;
                hback-porch = <0x2b>;
                hfront-porch = <0x21>;
                vback-porch = <0x13>;
                vfront-porch = <0x00>;
                hsync-len = <0x3e>;
                vsync-len = <0x03>;
                hsync-active = <0x01>;
                vsync-active = <0x01>;
                de-active = <0x00>;
                pixelclk-active = <0x01>;
                swap-rb = <0x00>;
                swap-rg = <0x00>;
                swap-gb = <0x00>;
                interlaced;
            };

            timing4 {
                screen-type = <0x05>;
                out-face = <0x00>;
                color-mode = <0x02>;
                clock-frequency = <0x19bfcc0>;
                hactive = <0x2d0>;
                vactive = <0x240>;
                hback-porch = <0x30>;
                hfront-porch = <0x21>;
                vback-porch = <0x13>;
                vfront-porch = <0x02>;
                hsync-len = <0x3f>;
                vsync-len = <0x03>;
                hsync-active = <0x01>;
                vsync-active = <0x01>;
                de-active = <0x00>;
                pixelclk-active = <0x01>;
                swap-rb = <0x00>;
                swap-rg = <0x00>;
                swap-gb = <0x00>;
                interlaced;
            };
        };

        wireless-wlan {
            compatible = "wlan-platdata";
            wifi_chip_type = "rtl8189es";
            sdio_vref = <0x708>;
            WIFI,poweren_gpio = <0x7c 0x1a 0x00>;
            WIFI,host_wake_irq = <0x75 0x1c 0x00>;
            status = "okay";
        };

        wireless-bluetooth {
            compatible = "bluetooth-platdata";
            uart_rts_gpios = <0x95 0x06 0x01>;
            pinctrl-names = "default\0rts_gpio";
            pinctrl-0 = <0xb4>;
            pinctrl-1 = <0xb5>;
            BT,power_gpio = <0x7c 0x1d 0x00>;
            BT,wake_gpio = <0x95 0x1b 0x00>;
            BT,wake_host_irq = <0x95 0x1a 0x00>;
            status = "disabled";
        };

        regulators {
            compatible = "simple-bus";
            #address-cells = <0x01>;
            #size-cells = <0x00>;

            regulator@0 {
                compatible = "regulator-fixed";
                regulator-name = "vccio_1v8";
                regulator-min-microvolt = <0x1b7740>;
                regulator-max-microvolt = <0x1b7740>;
                regulator-always-on;
                linux,phandle = <0x5d>;
                phandle = <0x5d>;
            };

            regulator@1 {
                compatible = "regulator-fixed";
                regulator-name = "vccio_3v3";
                regulator-min-microvolt = <0x325aa0>;
                regulator-max-microvolt = <0x325aa0>;
                regulator-always-on;
                linux,phandle = <0x5c>;
                phandle = <0x5c>;
            };
        };

        pwm-regulator1 {
            compatible = "rockchip_pwm_regulator";
            pwms = <0xb6 0x00 0x1388>;
            rockchip,pwm_id = <0x01>;
            rockchip,pwm_voltage_map = <0xe7ef0 0xee098 0xf4240 0xfa3e8 0x100590 0x106738 0x10c8e0 0x112a88 0x118c30 0x11edd8 0x124f80 0x12b128 0x1312d0 0x137478 0x13d620 0x1437c8 0x149970 0x14fb18 0x155cc0>;
            rockchip,pwm_voltage = <0x10c8e0>;
            rockchip,pwm_min_voltage = <0xe7ef0>;
            rockchip,pwm_max_voltage = <0x155cc0>;
            rockchip,pwm_suspend_voltage = <0xe7ef0>;
            rockchip,pwm_coefficient = <0x1c2>;
            status = "okay";

            regulators {
                #address-cells = <0x01>;
                #size-cells = <0x00>;

                regulator@0 {
                    regulator-compatible = "pwm_dcdc1";
                    regulator-name = "vdd_arm";
                    regulator-min-microvolt = <0xe7ef0>;
                    regulator-max-microvolt = <0x155cc0>;
                    regulator-always-on;
                    regulator-boot-on;
                };
            };
        };

        pwm-regulator2 {
            compatible = "rockchip_pwm_regulator";
            pwms = <0xb7 0x00 0x1388>;
            rockchip,pwm_id = <0x02>;
            rockchip,pwm_voltage_map = <0xf4240 0xfa3e8 0x100590 0x106738 0x10c8e0 0x112a88 0x118c30 0x11edd8 0x124f80 0x12b128 0x1312d0 0x137478 0x13d620>;
            rockchip,pwm_voltage = <0x124f80>;
            rockchip,pwm_min_voltage = <0xf4240>;
            rockchip,pwm_max_voltage = <0x13d620>;
            rockchip,pwm_suspend_voltage = <0x1312d0>;
            rockchip,pwm_coefficient = <0x12c>;
            status = "okay";

            regulators {
                #address-cells = <0x01>;
                #size-cells = <0x00>;

                regulator@1 {
                    regulator-compatible = "pwm_dcdc2";
                    regulator-name = "vdd_logic";
                    regulator-min-microvolt = <0xf4240>;
                    regulator-max-microvolt = <0x13d620>;
                    regulator-always-on;
                    regulator-boot-on;
                };
            };
        };

        usb_control {
            compatible = "rockchip,rk322x-usb-control";
            rockchip,remote_wakeup;
            rockchip,usb_irq_wakeup;
            host_drv_gpio = <0x95 0x14 0x01>;
            otg_drv_gpio = <0x95 0x16 0x01>;
        };

        rockchip_audio {
            compatible = "rockchip,rk322x-audio";

            dais {

                dai0 {
                    audio-codec = <0xb8>;
                    audio-controller = <0xb9>;
                    format = "i2s";
                };
            };
        };

        rockchip_spdif_card {
            compatible = "rockchip-spdif-card";

            dais {

                dai0 {
                    audio-codec = <0xba>;
                    audio-controller = <0xbb>;
                };
            };
        };

        rockchip_hdmi_i2s {
            compatible = "rockchip-hdmi-i2s";

            dais {

                dai0 {
                    audio-codec = <0xbc>;
                    audio-controller = <0xbd>;
                    format = "i2s";
                };
            };
        };

        rockchip_nau8540 {
            status = "disabled";
            compatible = "rockchip,nau8540-audio";

            dais {

                dai0 {
                    audio-codec = <0xbe>;
                    audio-controller = <0xb9>;
                    format = "i2s";
                };
            };
        };

        power-led {
            compatible = "gpio-leds";

            green {
                gpios = <0x95 0x15 0x00>;
                default-state = "on";
            };

            red {
                gpios = <0x75 0x08 0x00>;
                default-state = "off";
            };
        };
    };

     

    But before taking the dtb route, I would like to fully reprogram this board from scratch, as I am sure that I did some mistakes somewhere.

    especially:

    GPT 0x63337df8 signature is wrong
    recovery gpt...
    GPT 0x63337df8 signature is wrong
    recovery gpt fail!

    At the beginning of the boot seems very bad!

     

    I am new to those boards, knowing nothing from them 2 weeks ago, and the information is scattered in lots of places (is there a WIKI somewhere, as it is BADLY needed?), so this is what I understood:

    • The RK322X chips are done by Rockchip which assembles IP blocs licenced by ARM to make a SoC. ARM and the communauty provides compilers, linkers and the like.
    • The box is intended by Rockchip to run under Android, and Rockchip tools are heavily biaised toward this environnement, with a lot of specific tools, and an old kernel (3.x and maybe 4.x).
    • Armbian is a Debian distribution, adapted to run on Arm chips, which makes for a very diverse ecosystem, and follows the Linux track (new kernels, etc). Both environments do the same job, but there are many places where armbian and rk/android tools are not compatible.
    • The box has a (set of) processors, RAM and flash plus various peripherals, some of them being integrated in the SoC. The flash can be Nand, or eMMC (which is nand plus a controller taking care of many details, including bad blocks and wear levelling). As seen from the software, flash is a linear vector of blocks (of typically 512K each) which can be R/W with only this granularity. All of them have a (usually hidden) serial line, that runs @ 115200 bauds, and gives lots of system information.
    • Putting Linux on this box consists in reprogramming fully the flash, and this is done using an *image* (extension ".img"). It can be flashed using RK tools (rkdeveloptool for linux) directly on the chip through USB, or by crafting an sdCard which will do the job.
    • The RK322X has 2 reset modes:
      • Loader mode which allows only access to flash above 0x2000*0x200
      • maskrom mode which allows for full access. The chip enters maskrom mode when it cannot read flash; that can be accomplished  in a wild way by shorting pins 8 and 9 of the eMMC chip at boot (which is why RK322X chips are nearly unbrickable)
    • The boot sequence is complex:
      • Execution starts first with a miniloader (? at a certain offset in flash?) whose job is to load a 2nd level loader (?located at another offset in flash?) called u-boot.
      • U-boot is based on Das U-Boot modified by many people. All of them are more or less compatible, with subtle differences. They have one thing in common, which is that a ^C on the serial line stops the boot and gives a CLI. The Job of uboot is to load the Linux kernel in memory, and start it using a command line with various parameters.
      • One important parameter is the DTB, which indicates to the kernel (drivers) the hardware details. This is a binary blob (.dtb) compiled from various source modules (.dts). The armbian and android dtb are similar but not compatible. They can be decompiled by (mostly uncompatible) compilers (dtc in linux).
      • Another important parameter is the offset in flash of various filesystems.
      • Then he kernel starts...
    • An image is the concatenation of various blobs according to a certain format. Armbian and RK images are NOT compatible, as they don't have the same numbers and type of blobs, and so require different sets of tools (?which ones?)
    • Is the 1st-level loader (?located at offset 0 in flash?) part of the armbian image

    So, in order in order to *fully* reflash my box:

    1. Manage to enter maskrom
    2. rkdeveloptool db rk322x_loader.bin
    3. rkdeveloptool ul rk322x_loader.bin
    4. rkdeveloptool wl 0 multitool.img

    Am I right or should I have missed something?

     

    Michel

     

     

  5. Dear all,

    I have a few TV boxes, both amlogic and rockchip, and was able to install Armbian on many of them (with lots of blood, sweat and tears... Thanks a lot to Balbes150, Jock and Fabiobassa for all the superb work and the gold nuggets that they left in the various threads!!!).

    I am struggling now with a T96mini_V1.0 (  see https://pasteboard.co/JTEA7XS.jpg  - I don't know why I can't insert pic in post...) which has an RK3228A (2G-16G). And has NO sdcard, I followed advice from the 1st post, but black screen...

    I want to use it as a headless linux server, so I don't care about media performance, but WIFI would be appreciable (see pic of chip: https://pasteboard.co/JTELgqj.jpg )

    OK, so I found the serial console, soldered some wires, and saw  a boot entirely in chinese... so no cues about dtb. I still have an android image that boots ok, so maybe I could extract DTB?.

    (Very) long story short, I was able to burn multitlool in emmc, and boot either from usb or emmc, but I get kernel panics every time (see below). I suspect that I have a wrong DTB, which does bad things...

    Here is the boot log, using a toothpick to boot the multitool image from usb:

     

    Spoiler
    
    Script started on 2021-03-21 15:38:14+00:00 [TERM="xterm-256color" TTY="/dev/pts/0" COLUMNS="168" LINES="99"]
    microcom -p /dev/ttyUSB0 -s 115200
    connected to /dev/ttyUSB0
    Escape character: Ctrl-\
    Type the escape character to get to the prompt.
    DDR Version V1.10 20190926
    In
    ID:0xFFF
    660MHz
    DDR3
    Bus Width=16 Col=11 Bank=8 Row=16 CS=1 Die Bus-Width=16 Size=2048MB
    mach:3
    OUT
    Boot1 Release Time: May 13 2019 17:02:59, version: 2.56
    ChipType = 0xc, 268
    WR_REL_SET is 0 4
    mmc2:cmd19,100
    SdmmcInit=2 0
    BootCapSize=2000
    UserCapSize=14800MB
    FwPartOffset=2000 , 2000
    SdmmcInit=0 NOT PRESENT
    StorageInit ok = 170836
    SecureMode = 0
    SecureInit ret = 0, SecureMode = 0
    atags_set_bootdev: ret:(0)
    GPT 0x63337df8 signature is wrong
    recovery gpt...
    GPT 0x63337df8 signature is wrong
    recovery gpt fail!
    LOADER Check OK! 0x61000000, 253161
    TOS    Check OK! 0x68400000, 275234
    Enter Trust OS
    INF [0x0] TEE-CORE:init_primary_helper:377: Initializing (1.1.0-333-gc9d95d1 #2 2018年 08月 17日 星期五 03:32:22 UTC arm)
    
    INF [0x0] TEE-CORE:init_primary_helper:378: Release version: 2.0
    
    INF [0x0] TEE-CORE:init_primary_helper:379: Next entry point address: 0x61000000
    
    INF [0x0] TEE-CORE:init_teecore:83: teecore inits done
    
    
    U-Boot 2020.10-armbian+ (Mar 12 2021 - 13:38:05 +0000)
    
    Model: Generic Rockchip rk322x TV Box board
    DRAM:  2 GiB
    MMC:   dwmmc@30000000: 1, dwmmc@30020000: 0
    Loading Environment from EXT4... 
    ** Unable to use mmc 0:auto for loading the env **
    In:    serial@11030000
    Out:   serial@11030000
    Err:   serial@11030000
    Model: Generic Rockchip rk322x TV Box board
    Net:   eth0: ethernet@30200000
    starting USB...
    Bus usb@30040000: USB DWC2
    Bus usb@30080000: USB EHCI 1.00
    Bus usb@300c0000: USB EHCI 1.00
    Bus usb@30100000: USB EHCI 1.00
    scanning bus usb@30040000 for devices... 2 USB Device(s) found
    scanning bus usb@30080000 for devices... 1 USB Device(s) found
    scanning bus usb@300c0000 for devices... 1 USB Device(s) found
    scanning bus usb@30100000 for devices... 1 USB Device(s) found
           scanning usb for storage devices... 1 Storage Device(s) found
    Hit any key to stop autoboot:  0 
    Card did not respond to voltage select!
    
    Device 0: Vendor: SteelRam Rev: PMAP Prod: A01             
                Type: Removable Hard Disk
                Capacity: 118272.0 MB = 115.5 GB (242221056 x 512)
    ... is now current device
    Scanning usb 0:1...
    Found /extlinux/extlinux.conf
    Retrieving file: /extlinux/extlinux.conf
    175 bytes read in 13 ms (12.7 KiB/s)
    1:	Multitool 
    Retrieving file: /kernel.img
    8719272 bytes read in 258 ms (32.2 MiB/s)
    append: boot=PARTUUID=35cf475d-01 root=PARTUUID=35cf475d-02 rootwait console=ttyS2,115200 verbose=1 consoleblank=0
    Retrieving file: /rk322x-box.dtb
    46636 bytes read in 10 ms (4.4 MiB/s)
    ## Flattened Device Tree blob at 61f00000
       Booting using the fdt blob at 0x61f00000
    EHCI failed to shut down host controller.
    EHCI failed to shut down host controller.
       Loading Device Tree to 683f1000, end 683ff62b ... OK
    
    Starting kernel ...
    
    [    0.000000] Booting Linux on physical CPU 0xf00
    [    0.000000] Initializing cgroup subsys cpuset
    [    0.000000] Initializing cgroup subsys cpu
    [    0.000000] Initializing cgroup subsys cpuacct
    [    0.000000] Linux version 4.4.194-rk322x (root@armbianbuild) (gcc version 8.3.0 (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) ) #47 SMP Thu Apr 9 17:37:46 UTC 2020
    [    0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), cr=10c5387d
    [    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
    [    0.000000] Machine model: Generic RK322x TV Box board
    [    0.000000] cma: Reserved 128 MiB at 0xd8000000
    [    0.000000] Memory policy: Data cache writealloc
    [    0.000000] On node 0 totalpages: 520704
    [    0.000000] free_area_init_node: node 0, pgdat b1236b40, node_mem_map eedfa000
    [    0.000000]   Normal zone: 2304 pages used for memmap
    [    0.000000]   Normal zone: 0 pages reserved
    [    0.000000]   Normal zone: 258560 pages, LIFO batch:31
    [    0.000000]   HighMem zone: 262144 pages, LIFO batch:31
    [    0.000000] psci: probing for conduit method from DT.
    [    0.000000] psci: PSCIv65535.65535 detected in firmware.
    [    0.000000] psci: Using standard PSCI v0.2 function IDs
    [    0.000000] psci: MIGRATE_INFO_TYPE not supported.
    [    0.000000] PERCPU: Embedded 14 pages/cpu @eed94000 s24856 r8192 d24296 u57344
    [    0.000000] pcpu-alloc: s24856 r8192 d24296 u57344 alloc=14*4096
    [    0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 
    [    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 518400
    [    0.000000] Kernel command line: boot=PARTUUID=35cf475d-01 root=PARTUUID=35cf475d-02 rootwait console=ttyS2,115200 verbose=1 consoleblank=0
    [    0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes)
    [    0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
    [    0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
    [    0.000000] Memory: 1911292K/2082816K available (12820K kernel code, 875K rwdata, 3224K rodata, 796K init, 1219K bss, 40452K reserved, 131072K cma-reserved, 917504K highmem)
    [    0.000000] Virtual kernel memory layout:
    [    0.000000]     vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    [    0.000000]     fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
    [    0.000000]     vmalloc : 0xf0800000 - 0xff800000   ( 240 MB)
    [    0.000000]     lowmem  : 0xb0000000 - 0xf0000000   (1024 MB)
    [    0.000000]     pkmap   : 0xafe00000 - 0xb0000000   (   2 MB)
    [    0.000000]     modules : 0xaf000000 - 0xafe00000   (  14 MB)
    [    0.000000]       .text : 0xb0008000 - 0xb0c8d53c   (12822 kB)
    [    0.000000]       .init : 0xb10a1000 - 0xb1168000   ( 796 kB)
    [    0.000000]       .data : 0xb1168000 - 0xb1242e94   ( 876 kB)
    [    0.000000]        .bss : 0xb1244000 - 0xb1374ee4   (1220 kB)
    [    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
    [    0.000000] Hierarchical RCU implementation.
    [    0.000000] 	Build-time adjustment of leaf fanout to 32.
    [    0.000000] NR_IRQS:16 nr_irqs:16 16
    [    0.000000] Architected cp15 timer(s) running at 24.00MHz (phys).
    [    0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x588fe9dc0, max_idle_ns: 440795202592 ns
    [    0.000008] sched_clock: 56 bits at 24MHz, resolution 41ns, wraps every 4398046511097ns
    [    0.000023] Switching to timer-based delay loop, resolution 41ns
    [    0.001666] Console: colour dummy device 80x30
    [    0.001703] Calibrating delay loop (skipped), value calculated using timer frequency.. 48.00 BogoMIPS (lpj=96000)
    [    0.001724] pid_max: default: 32768 minimum: 301
    [    0.001854] Security Framework initialized
    [    0.001868] Yama: becoming mindful.
    [    0.001945] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
    [    0.001961] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
    [    0.002841] Initializing cgroup subsys io
    [    0.002878] Initializing cgroup subsys memory
    [    0.002919] Initializing cgroup subsys devices
    [    0.002939] Initializing cgroup subsys freezer
    [    0.002957] Initializing cgroup subsys net_cls
    [    0.002973] Initializing cgroup subsys perf_event
    [    0.002991] Initializing cgroup subsys net_prio
    [    0.003019] Initializing cgroup subsys pids
    [    0.003088] CPU: Testing write buffer coherency: ok
    [    0.003135] ftrace: allocating 41720 entries in 123 pages
    [    0.082000] /cpus/cpu@f00 missing clock-frequency property
    [    0.082031] /cpus/cpu@f01 missing clock-frequency property
    [    0.082049] /cpus/cpu@f02 missing clock-frequency property
    [    0.082069] /cpus/cpu@f03 missing clock-frequency property
    [    0.082081] CPU0: update cpu_capacity 430
    [    0.082092] CPU0: thread -1, cpu 0, socket 15, mpidr 80000f00
    [    0.082170] Setting up static identity map for 0x60008280 - 0x600082d8
    [    0.084972] CPU1: update cpu_capacity 430
    [    0.084981] CPU1: thread -1, cpu 1, socket 15, mpidr 80000f01
    [    0.086076] CPU2: update cpu_capacity 430
    [    0.086084] CPU2: thread -1, cpu 2, socket 15, mpidr 80000f02
    [    0.087099] CPU3: update cpu_capacity 430
    [    0.087106] CPU3: thread -1, cpu 3, socket 15, mpidr 80000f03
    [    0.087241] Brought up 4 CPUs
    [    0.087278] SMP: Total of 4 processors activated (192.00 BogoMIPS).
    [    0.087287] CPU: All CPU(s) started in SVC mode.
    [    0.088755] devtmpfs: initialized
    [    0.106081] VFP support v0.3: implementor 41 architecture 2 part 30 variant 7 rev 5
    [    0.106599] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
    [    0.106636] futex hash table entries: 1024 (order: 4, 65536 bytes)
    [    0.112611] xor: measuring software checksum speed
    [    0.149973]    arm4regs  :  1011.000 MB/sec
    [    0.190081]    8regs     :   705.000 MB/sec
    [    0.230186]    32regs    :   684.000 MB/sec
    [    0.270287]    neon      :  1018.000 MB/sec
    [    0.270297] xor: using function: neon (1018.000 MB/sec)
    [    0.270335] pinctrl core: initialized pinctrl subsystem
    [    0.271890] NET: Registered protocol family 16
    [    0.274614] DMA: preallocated 2048 KiB pool for atomic coherent allocations
    [    0.286444] cpuidle: using governor ladder
    [    0.298457] cpuidle: using governor menu
    [    0.314528] gpiochip_add_data: registered GPIOs 0 to 31 on device: gpio0
    [    0.314736] gpiochip_add_data: registered GPIOs 32 to 63 on device: gpio1
    [    0.314882] gpiochip_add_data: registered GPIOs 64 to 95 on device: gpio2
    [    0.315036] gpiochip_add_data: registered GPIOs 96 to 127 on device: gpio3
    [    0.320654] console [pstore-1] enabled
    [    0.320666] pstore: Registered ramoops as persistent store backend
    [    0.320679] ramoops: attached 0xf0000@0x62e00000, ecc: 0/0
    [    0.323549] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers.
    [    0.323568] hw-breakpoint: maximum watchpoint size is 8 bytes.
    [    0.419291] raid6: int32x1  gen()   133 MB/s
    [    0.487363] raid6: int32x1  xor()   131 MB/s
    [    0.555636] raid6: int32x2  gen()   166 MB/s
    [    0.623705] raid6: int32x2  xor()   136 MB/s
    [    0.692057] raid6: int32x4  gen()   163 MB/s
    [    0.760317] raid6: int32x4  xor()   137 MB/s
    [    0.828474] raid6: int32x8  gen()   166 MB/s
    [    0.896737] raid6: int32x8  xor()   113 MB/s
    [    0.964878] raid6: neonx1   gen()   382 MB/s
    [    1.033018] raid6: neonx1   xor()   290 MB/s
    [    1.101243] raid6: neonx2   gen()   519 MB/s
    [    1.169377] raid6: neonx2   xor()   376 MB/s
    [    1.237588] raid6: neonx4   gen()   581 MB/s
    [    1.305812] raid6: neonx4   xor()   400 MB/s
    [    1.374105] raid6: neonx8   gen()   560 MB/s
    [    1.442290] raid6: neonx8   xor()   391 MB/s
    [    1.442303] raid6: using algorithm neonx4 gen() 581 MB/s
    [    1.442313] raid6: .... xor() 400 MB/s, rmw enabled
    [    1.442323] raid6: using intx1 recovery algorithm
    [    1.443269] rockchip-pm rockchip-suspend: not set wakeup-config
    [    1.443290] rockchip-pm rockchip-suspend: not set pwm-regulator-config
    [    1.443631] of_get_named_gpiod_flags: can't parse 'gpio' property of node '/regulators/regulator@0[0]'
    [    1.444114] of_get_named_gpiod_flags: can't parse 'gpio' property of node '/regulators/regulator@1[0]'
    [    1.444716] of_get_named_gpiod_flags: parsed 'gpio' property of node '/vcc-host-regulator[0]' - status (0)
    [    1.445326] of_get_named_gpiod_flags: parsed 'gpio' property of node '/otg-vbus-regulator[0]' - status (0)
    [    1.445809] of_get_named_gpiod_flags: can't parse 'gpio' property of node '/vcc-phy-regulator[0]'
    [    1.446681] iommu: Adding device 20020000.vpu-service to group 0
    [    1.446783] iommu: Adding device 20030000.rkvdec to group 1
    [    1.446874] iommu: Adding device 20050000.vop to group 2
    [    1.446962] iommu: Adding device 20070000.iep to group 3
    [    1.447492] rk_iommu 20020800.iommu: can't get sclk
    [    1.448068] rk_iommu 20030480.iommu: can't get sclk
    [    1.448304] rk_iommu 20053f00.iommu: can't get sclk
    [    1.448448] rk_iommu 20070800.iommu: can't get aclk
    [    1.448467] rk_iommu 20070800.iommu: can't get hclk
    [    1.448483] rk_iommu 20070800.iommu: can't get sclk
    [    1.449214] SCSI subsystem initialized
    [    1.449612] usbcore: registered new interface driver usbfs
    [    1.449712] usbcore: registered new interface driver hub
    [    1.449831] usbcore: registered new device driver usb
    [    1.450042] media: Linux media interface: v0.10
    [    1.450120] Linux video capture interface: v2.00
    [    1.450385] pps_core: LinuxPPS API ver. 1 registered
    [    1.450399] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
    [    1.450440] PTP clock support registered
    [    1.452303] Advanced Linux Sound Architecture Driver Initialized.
    [    1.453364] Bluetooth: Core ver 2.21
    [    1.453432] NET: Registered protocol family 31
    [    1.453445] Bluetooth: HCI device and connection manager initialized
    [    1.453467] Bluetooth: HCI socket layer initialized
    [    1.453484] Bluetooth: L2CAP socket layer initialized
    [    1.453538] Bluetooth: SCO socket layer initialized
    [    1.454406] NetLabel: Initializing
    [    1.454426] NetLabel:  domain hash size = 128
    [    1.454435] NetLabel:  protocols = UNLABELED CIPSOv4
    [    1.454509] NetLabel:  unlabeled traffic allowed by default
    [    1.455499] clocksource: Switched to clocksource arch_sys_counter
    [    1.550263] NET: Registered protocol family 2
    [    1.551115] TCP established hash table entries: 8192 (order: 3, 32768 bytes)
    [    1.551229] TCP bind hash table entries: 8192 (order: 5, 163840 bytes)
    [    1.551665] TCP: Hash tables configured (established 8192 bind 8192)
    [    1.551776] UDP hash table entries: 512 (order: 2, 24576 bytes)
    [    1.551846] UDP-Lite hash table entries: 512 (order: 2, 24576 bytes)
    [    1.552194] NET: Registered protocol family 1
    [    1.552855] RPC: Registered named UNIX socket transport module.
    [    1.552877] RPC: Registered udp transport module.
    [    1.552888] RPC: Registered tcp transport module.
    [    1.552898] RPC: Registered tcp NFSv4.1 backchannel transport module.
    [    1.553751] hw perfevents: enabled with armv7_cortex_a7 PMU driver, 5 counters available
    [    1.556685] Initialise system trusted keyring
    [    1.570718] VFS: Disk quotas dquot_6.6.0
    [    1.571030] VFS: Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
    [    1.573821] squashfs: version 4.0 (2009/01/31) Phillip Lougher
    [    1.577334] NFS: Registering the id_resolver key type
    [    1.577400] Key type id_resolver registered
    [    1.577412] Key type id_legacy registered
    [    1.577445] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
    [    1.577537] ntfs: driver 2.1.32 [Flags: R/W].
    [    1.578460] JFS: nTxBlock = 8192, nTxLock = 65536
    [    1.587750] SGI XFS with security attributes, no debug enabled
    [    1.596454] NET: Registered protocol family 38
    [    1.596509] Key type asymmetric registered
    [    1.596531] Asymmetric key parser 'x509' registered
    [    1.596658] bounce: pool size: 64 pages
    [    1.597007] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 246)
    [    1.597353] io scheduler noop registered
    [    1.597385] io scheduler deadline registered
    [    1.597465] io scheduler cfq registered (default)
    [    1.600655] phy phy-11000000.syscon:usb2-phy@800.2: Failed to get VBUS supply regulator
    [    1.605545] rk-vcodec 20020000.vpu-service: no regulator for vcodec
    [    1.605974] rk-vcodec 20020000.vpu-service: probe device
    [    1.606394] rk-vcodec 20020000.vpu-service: drm allocator with mmu enabled
    [    1.607643] rk-vcodec 20020000.vpu-service: could not find power_model node
    [    1.607672] rk-vcodec 20020000.vpu-service: init success
    [    1.608000] rk-vcodec 20030000.rkvdec: vcodec regulator not ready, retry
    [    1.612013] dma-pl330 110f0000.pdma: Loaded driver for PL330 DMAC-241330
    [    1.612040] dma-pl330 110f0000.pdma: 	DBUFF-128x8bytes Num_Chans-8 Num_Peri-20 Num_Events-16
    [    1.613098] rockchip-system-monitor rockchip-system-monitor: system monitor probe
    [    1.613549] pwm-regulator vdd-arm-regulator: GPIO lookup for consumer enable
    [    1.613569] pwm-regulator vdd-arm-regulator: using device tree for GPIO lookup
    [    1.613586] of_get_named_gpiod_flags: can't parse 'enable-gpios' property of node '/vdd-arm-regulator[0]'
    [    1.613600] of_get_named_gpiod_flags: can't parse 'enable-gpio' property of node '/vdd-arm-regulator[0]'
    [    1.613614] pwm-regulator vdd-arm-regulator: using lookup tables for GPIO lookup
    [    1.613628] pwm-regulator vdd-arm-regulator: lookup for GPIO enable failed
    [    1.614246] pwm-regulator vdd-log-regulator: GPIO lookup for consumer enable
    [    1.614267] pwm-regulator vdd-log-regulator: using device tree for GPIO lookup
    [    1.614283] of_get_named_gpiod_flags: can't parse 'enable-gpios' property of node '/vdd-log-regulator[0]'
    [    1.614298] of_get_named_gpiod_flags: can't parse 'enable-gpio' property of node '/vdd-log-regulator[0]'
    [    1.614311] pwm-regulator vdd-log-regulator: using lookup tables for GPIO lookup
    [    1.614325] pwm-regulator vdd-log-regulator: lookup for GPIO enable failed
    [    1.615306] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
    [    1.616189] 11030000.serial: ttyS2 at MMIO 0x11030000 (irq = 30, base_baud = 1500000) is a 16550A
    [    1.619508] Unable to handle kernel paging request at virtual address aff54678
    [    1.619512] pgd = b0004000
    [    1.619524] [aff54678] *pgd=9fffc811, *pte=00000000, *ppte=00000000
    [    1.619534] Internal error: Oops: 80000007 [#1] SMP ARM
    [    1.619541] Modules linked in:
    [    1.619550] CPU: 2 PID: 0 Comm: swapper/2 Not tainted 4.4.194-rk322x #47
    [    1.619553] Hardware name: Generic DT based system
    [    1.619557] task: ee94d540 task.stack: ee974000
    [    1.619568] PC is at update_rq_clock+0x20/0x28
    [    1.619577] LR is at update_blocked_averages+0x54/0x1d24
    [    1.619584] pc : [<b005466c>]    lr : [<b0060268>]    psr: 60000193
    [    1.619584] sp : ee975c90  ip : ee975ca0  fp : ee975c9c
    [    1.619588] r10: b11664c0  r9 : 00000003  r8 : b116f75c
    [    1.619593] r7 : ffff172d  r6 : b116a100  r5 : eedc34c0  r4 : 00000003
    [    1.619598] r3 : 00000000  r2 : 00000002  r1 : 02c002bf  r0 : eedc34c0
    [    1.619604] Flags: nZCv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment none
    [    1.619610] Control: 10c5387d  Table: 6000406a  DAC: 00000051
    [    1.619614] Process swapper/2 (pid: 0, stack limit = 0xee974250)
    [    1.619619] Stack: (0xee975c90 to 0xee976000)
    [    1.619628] 5c80:                                     ee975d8c ee975ca0 b0060268 b0054658
    [    1.619639] 5ca0: b005cda4 b0c8cdd4 00000000 000001ae ee975ccc ee975cc0 b0c8cdd4 b0086350
    [    1.619649] 5cc0: ee975d8c ee975cd0 b0072f2c b0c8cdc8 eedb03bc 00000002 ee803200 60000113
    [    1.619660] 5ce0: eedc34c0 ee803200 00000000 b116e60c b116a100 b11664c0 20000113 eed994c0
    [    1.619670] 5d00: eed99a4c 00000000 fffedc90 00000000 b11664c0 ee803200 eed994c0 00000000
    [    1.619680] 5d20: 00000002 eedb54c0 ee8ab114 00000000 00000000 0000020a 00000002 eedb03bc
    [    1.619690] 5d40: 00000008 00000003 00000020 00000002 00000002 00000003 ee975d58 b0c8cd18
    [    1.619701] 5d60: 60000193 00000003 ffff172d b116a100 ffff172d b116f75c 00000003 b11664c0
    [    1.619711] 5d80: ee975dec ee975d90 b00734c4 b0060220 b116a100 b116f75c 00000003 b11664c0
    [    1.619722] 5da0: 00000003 ee975db0 eedc34c0 b00b3a84 00000000 ee975dc0 b0052328 00000001
    [    1.619732] 5dc0: eedc34c0 eedc34c0 ffff172d eedb54c0 b116a100 b116f75c 00000003 b11664c0
    [    1.619743] 5de0: ee975e3c ee975df0 b00738c8 b0073484 ffffe000 b1245500 b116eeac 00000001
    [    1.619753] 5e00: 00000000 00000000 00000000 00000002 ee975e2c b116a09c 00000007 b123c92c
    [    1.619763] 5e20: 00000008 00000100 ffffe000 00000080 ee975e9c ee975e40 b0009614 b0073778
    [    1.619774] 5e40: 00000000 20000193 00000000 00200040 b0c8f73c b116a100 fffedc96 b0c8f730
    [    1.619784] 5e60: 0000000a b1244940 b1161390 b116a080 ffffe000 ffffe000 b116f75c eedb54c0
    [    1.619795] 5e80: ee974000 00000002 f0805000 00000000 ee975eb4 ee975ea0 b002c650 b00094e4
    [    1.619805] 5ea0: b11664c0 b116f75c ee975edc ee975eb8 b0057fe4 b002c5d8 b116364c 00000002
    [    1.619816] 5ec0: 00000000 00000002 b123c8c8 f0805000 ee975f14 ee975ee0 b0016dbc b0057f68
    [    1.619826] 5ee0: ee975f58 20000093 00000000 b116f9a0 b11d2540 f080400c f0804000 ee975f40
    [    1.619837] 5f00: f0805000 00000000 ee975f3c ee975f18 b00094d4 b0016cec b0010aec 60000013
    [    1.619847] 5f20: ffffffff ee975f74 b116e634 b116e63c ee975f9c ee975f40 b0014dd4 b0009448
    [    1.619857] 5f40: 00000001 00000000 00000000 b0022720 ffffe000 00000000 b123d05c b0c8f730
    [    1.619868] 5f60: b116e634 b116e63c 00000000 ee975f9c ee975fa0 ee975f90 b0010ae8 b0010aec
    [    1.619879] 5f80: 60000013 ffffffff 00000051 b007cdbc ee975fac ee975fa0 b007cdbc b0010ab0
    [    1.619889] 5fa0: ee975fdc ee975fb0 b007d150 b007cd90 ee975fdc b0e68ea8 b11613e8 b1165930
    [    1.619900] 5fc0: b116e5d4 b123c56e 10c0387d b1244300 ee975ff4 ee975fe0 b0016a6c b007ce28
    [    1.619910] 5fe0: 9e96006a 00000051 00000000 ee975ff8 600098cc b0016924 00000000 00000000
    [    1.619934] [<b005466c>] (update_rq_clock) from [<b0060268>] (update_blocked_averages+0x54/0x1d24)
    [    1.619948] [<b0060268>] (update_blocked_averages) from [<b00734c4>] (rebalance_domains+0x4c/0x2f4)
    [    1.619960] [<b00734c4>] (rebalance_domains) from [<b00738c8>] (run_rebalance_domains+0x15c/0x1d8)
    [    1.619972] [<b00738c8>] (run_rebalance_domains) from [<b0009614>] (__do_softirq+0x13c/0x368)
    [    1.619985] [<b0009614>] (__do_softirq) from [<b002c650>] (irq_exit+0x84/0x12c)
    [    1.619998] [<b002c650>] (irq_exit) from [<b0057fe4>] (scheduler_ipi+0x88/0x144)
    [    1.620010] [<b0057fe4>] (scheduler_ipi) from [<b0016dbc>] (handle_IPI+0xdc/0x2bc)
    [    1.620021] [<b0016dbc>] (handle_IPI) from [<b00094d4>] (gic_handle_irq+0x98/0x9c)
    [    1.620032] [<b00094d4>] (gic_handle_irq) from [<b0014dd4>] (__irq_svc+0x54/0x70)
    [    1.620037] Exception stack(0xee975f40 to 0xee975f88)
    [    1.620048] 5f40: 00000001 00000000 00000000 b0022720 ffffe000 00000000 b123d05c b0c8f730
    [    1.620058] 5f60: b116e634 b116e63c 00000000 ee975f9c ee975fa0 ee975f90 b0010ae8 b0010aec
    [    1.620063] 5f80: 60000013 ffffffff
    [    1.620077] [<b0014dd4>] (__irq_svc) from [<b0010aec>] (arch_cpu_idle+0x48/0x4c)
    [    1.620092] [<b0010aec>] (arch_cpu_idle) from [<b007cdbc>] (default_idle_call+0x38/0x3c)
    [    1.620105] [<b007cdbc>] (default_idle_call) from [<b007d150>] (cpu_startup_entry+0x334/0x374)
    [    1.620118] [<b007d150>] (cpu_startup_entry) from [<b0016a6c>] (secondary_start_kernel+0x154/0x160)
    [    1.620129] [<b0016a6c>] (secondary_start_kernel) from [<600098cc>] (0x600098cc)
    [    1.620141] Code: e8bd4000 e5903534 e3130002 189da800 (ebfff725) 
    [    1.620174] ---[ end trace 6d85e22c3794cdf2 ]---
    [    1.621531] Kernel panic - not syncing: Fatal exception in interrupt
    [    1.621543] CPU1: stopping
    [    1.621554] CPU: 1 PID: 0 Comm: swapper/1 Tainted: G      D         4.4.194-rk322x #47
    [    1.621557] Hardware name: Generic DT based system
    [    1.621581] [<b001898c>] (unwind_backtrace) from [<b0014468>] (show_stack+0x20/0x24)
    [    1.621598] [<b0014468>] (show_stack) from [<b052e520>] (dump_stack+0x90/0xa4)
    [    1.621612] [<b052e520>] (dump_stack) from [<b0016f70>] (handle_IPI+0x290/0x2bc)
    [    1.621623] [<b0016f70>] (handle_IPI) from [<b00094d4>] (gic_handle_irq+0x98/0x9c)
    [    1.621633] [<b00094d4>] (gic_handle_irq) from [<b0014dd4>] (__irq_svc+0x54/0x70)
    [    1.621638] Exception stack(0xee973f40 to 0xee973f88)
    [    1.621650] 3f40: 00000001 00000000 00000000 b0022720 ffffe000 00000000 b123d05c b0c8f730
    [    1.621661] 3f60: b116e634 b116e63c 00000000 ee973f9c ee973fa0 ee973f90 b0010ae8 b0010aec
    [    1.621666] 3f80: 60000013 ffffffff
    [    1.621679] [<b0014dd4>] (__irq_svc) from [<b0010aec>] (arch_cpu_idle+0x48/0x4c)
    [    1.621692] [<b0010aec>] (arch_cpu_idle) from [<b007cdbc>] (default_idle_call+0x38/0x3c)
    [    1.621706] [<b007cdbc>] (default_idle_call) from [<b007d150>] (cpu_startup_entry+0x334/0x374)
    [    1.621718] [<b007d150>] (cpu_startup_entry) from [<b0016a6c>] (secondary_start_kernel+0x154/0x160)
    [    1.621729] [<b0016a6c>] (secondary_start_kernel) from [<600098cc>] (0x600098cc)
    [    1.625820] CPU0: stopping
    [    1.625828] CPU: 0 PID: 1 Comm: swapper/0 Tainted: G      D         4.4.194-rk322x #47
    [    1.625831] Hardware name: Generic DT based system
    [    1.625850] [<b001898c>] (unwind_backtrace) from [<b0014468>] (show_stack+0x20/0x24)
    [    1.625864] [<b0014468>] (show_stack) from [<b052e520>] (dump_stack+0x90/0xa4)
    [    1.625876] [<b052e520>] (dump_stack) from [<b0016f70>] (handle_IPI+0x290/0x2bc)
    [    1.625887] [<b0016f70>] (handle_IPI) from [<b00094d4>] (gic_handle_irq+0x98/0x9c)
    [    1.625898] [<b00094d4>] (gic_handle_irq) from [<b0014dd4>] (__irq_svc+0x54/0x70)
    [    1.625902] Exception stack(0xee8b7a80 to 0xee8b7ac8)
    [    1.625914] 7a80: b1350968 ee948000 00000095 60000013 b1249638 00000000 b1246848 00000006
    [    1.625924] 7aa0: 00000031 00000000 b1247178 ee8b7b2c ee8b7a00 ee8b7ad0 b0c8cdf4 b008cd00
    [    1.625929] 7ac0: 60000013 ffffffff
    [    1.625943] [<b0014dd4>] (__irq_svc) from [<b008cd00>] (console_unlock+0x36c/0x4c8)
    [    1.625956] [<b008cd00>] (console_unlock) from [<b008d884>] (register_console+0x1dc/0x3b8)
    [    1.625972] [<b008d884>] (register_console) from [<b05e7fe8>] (uart_add_one_port+0x3c8/0x498)
    [    1.625988] [<b05e7fe8>] (uart_add_one_port) from [<b05e9edc>] (serial8250_register_8250_port+0x27c/0x3b4)
    [    1.626003] [<b05e9edc>] (serial8250_register_8250_port) from [<b05ef980>] (dw8250_probe+0x408/0x668)
    [    1.626016] [<b05ef980>] (dw8250_probe) from [<b0668f9c>] (platform_drv_probe+0x60/0xbc)
    [    1.626028] [<b0668f9c>] (platform_drv_probe) from [<b066713c>] (driver_probe_device+0x1e0/0x2ec)
    [    1.626040] [<b066713c>] (driver_probe_device) from [<b06672dc>] (__driver_attach+0x94/0x98)
    [    1.626053] [<b06672dc>] (__driver_attach) from [<b0665254>] (bus_for_each_dev+0x88/0xac)
    [    1.626068] [<b0665254>] (bus_for_each_dev) from [<b06669e8>] (driver_attach+0x2c/0x30)
    [    1.626082] [<b06669e8>] (driver_attach) from [<b0666624>] (bus_add_driver+0x1d0/0x214)
    [    1.626095] [<b0666624>] (bus_add_driver) from [<b0667d10>] (driver_register+0x88/0x104)
    [    1.626106] [<b0667d10>] (driver_register) from [<b0668ee8>] (__platform_driver_register+0x50/0x58)
    [    1.626120] [<b0668ee8>] (__platform_driver_register) from [<b10d7c20>] (dw8250_platform_driver_init+0x1c/0x20)
    [    1.626133] [<b10d7c20>] (dw8250_platform_driver_init) from [<b0009a68>] (do_one_initcall+0xa0/0x1f8)
    [    1.626148] [<b0009a68>] (do_one_initcall) from [<b10a1f78>] (kernel_init_freeable+0x1d0/0x264)
    [    1.626162] [<b10a1f78>] (kernel_init_freeable) from [<b0c88020>] (kernel_init+0x18/0x100)
    [    1.626176] [<b0c88020>] (kernel_init) from [<b00101e8>] (ret_from_fork+0x14/0x2c)
    [    2.788203] SMP: failed to stop secondary CPUs
    [    2.788207] CRU:
    [    2.788225] 00000000: 00002044 00001441 00000000 00001037 00001441 00000001 0000307d 00001442
    [    2.788238] 00000020: 00000001 00001032 00001441 00000000 00000000 00000000 00000000 00000000
    [    2.788251] 00000040: 00001111 00002700 00001013 00004203 0000001f 00000003 00000309 0000021f
    [    2.788265] 00000060: 0bb8ea60 0bb8ea60 0000001f 00001407 0000121d 00000517 0000021f 0000021f
    [    2.788278] 00000080: 0000021f 0000001f 0bb8ea60 0bb8ea60 0bb8ea60 0bb8ea60 0000c2dc 00000f01
    [    2.788291] 000000a0: 0000412f 000003e2 0000011f 00000000 00000100 00004141 00000000 0bb8ea60
    [    2.788303] 000000c0: 00002121 0000001f 00002122 00002121 00000000 00000000 00000000 00000000
    [    2.788315] 000000e0: 00000000 00000000 00000000 00000000 00004000 00000f00 00000000 00001540
    [    2.788327] 00000100: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [    2.788340] 00000120: 00000000 00000000 00000000 00000000 00000000 0000a000 00000000 00000000
    [    2.788352] 00000140: 3a980064 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [    2.788364] 00000160: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [    2.788376] 00000180: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [    2.788388] 000001a0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [    2.788400] 000001c0: 00000004 00000000 00000004 00000000 00000000 00000000 00000004 00000000
    [    2.788410] 000001e0: 00000000 00000000 00000000 00000000 00000000 00000000
    [    2.788413] PMU:
    [    2.788426] 00000000: 00000000 00000000 00004000 00002000 00000000 00004228 0000a551 0000aaaa
    [    2.788438] 00000020: 00009955 00002002 00000000 00000000 00000000 00000000 00000000 00000000
    [    2.788451] 00000040: 00000000 00000000 00000000 00000000 00008106 00000000 00000000 00000000
    [    2.788463] 00000060: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [    2.788474] 00000080: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [    2.788486] 000000a0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [    2.788498] 000000c0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [    2.788510] 000000e0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [    5.077457] ---[ end Kernel panic - not syncing: Fatal exception in interrupt
    [    8.619503] BUG: spinlock lockup suspected on CPU#3, swapper/3/0
    [    8.625517]  lock: 0xeedc34c0, .magic: dead4ead, .owner: swapper/2/0, .owner_cpu: 2
    [    8.633169] CPU: 3 PID: 0 Comm: swapper/3 Tainted: G      D         4.4.194-rk322x #47
    [    8.641077] Hardware name: Generic DT based system
    [    8.645884] [<b001898c>] (unwind_backtrace) from [<b0014468>] (show_stack+0x20/0x24)
    [    8.653632] [<b0014468>] (show_stack) from [<b052e520>] (dump_stack+0x90/0xa4)
    [    8.660859] [<b052e520>] (dump_stack) from [<b01112f8>] (spin_dump+0x98/0xa0)
    [    8.668001] [<b01112f8>] (spin_dump) from [<b0086210>] (do_raw_spin_lock+0x10c/0x1d8)
    [    8.675836] [<b0086210>] (do_raw_spin_lock) from [<b0c8cd58>] (_raw_spin_lock+0x18/0x1c)
    [    8.683928] [<b0c8cd58>] (_raw_spin_lock) from [<b005608c>] (try_to_wake_up+0xc8/0x3f0)
    [    8.691932] [<b005608c>] (try_to_wake_up) from [<b0056488>] (wake_up_process+0x24/0x28)
    [    8.699935] [<b0056488>] (wake_up_process) from [<b00a0ab0>] (process_timeout+0x18/0x1c)
    [    8.708026] [<b00a0ab0>] (process_timeout) from [<b00a0b04>] (call_timer_fn+0x50/0x1a0)
    [    8.716030] [<b00a0b04>] (call_timer_fn) from [<b00a0e38>] (run_timer_softirq+0x1e4/0x304)
    [    8.724293] [<b00a0e38>] (run_timer_softirq) from [<b0009614>] (__do_softirq+0x13c/0x368)
    [    8.732471] [<b0009614>] (__do_softirq) from [<b002c650>] (irq_exit+0x84/0x12c)
    [    8.739784] [<b002c650>] (irq_exit) from [<b008e230>] (__handle_domain_irq+0x70/0xc4)
    [    8.747614] [<b008e230>] (__handle_domain_irq) from [<b0009494>] (gic_handle_irq+0x58/0x9c)
    [    8.755965] [<b0009494>] (gic_handle_irq) from [<b0014dd4>] (__irq_svc+0x54/0x70)
    [    8.763441] Exception stack(0xee977f40 to 0xee977f88)
    [    8.768497] 7f40: 00000001 00000000 00000000 b0022720 ffffe000 00000000 b123d05c b0c8f730
    [    8.776671] 7f60: b116e634 b116e63c 00000000 ee977f9c ee977fa0 ee977f90 b0010ae8 b0010aec
    [    8.784842] 7f80: 60000013 ffffffff
    [    8.788339] [<b0014dd4>] (__irq_svc) from [<b0010aec>] (arch_cpu_idle+0x48/0x4c)
    [    8.795737] [<b0010aec>] (arch_cpu_idle) from [<b007cdbc>] (default_idle_call+0x38/0x3c)
    [    8.803828] [<b007cdbc>] (default_idle_call) from [<b007d150>] (cpu_startup_entry+0x334/0x374)
    [    8.812439] [<b007d150>] (cpu_startup_entry) from [<b0016a6c>] (secondary_start_kernel+0x154/0x160)
    [    8.821481] [<b0016a6c>] (secondary_start_kernel) from [<600098cc>] (0x600098cc)
    [    8.828872] Sending NMI to all CPUs:
    [    8.833731] NMI backtrace for cpu 2
    [    8.837222] CPU: 2 PID: 0 Comm: swapper/2 Tainted: G      D         4.4.194-rk322x #47
    [    8.845129] Hardware name: Generic DT based system
    [    8.849916] task: ee94d540 task.stack: ee974000
    [    8.854444] PC is at arch_timer_read_counter_long+0x4/0x28
    [    8.859923] LR is at __timer_delay+0x4c/0x68
    [    8.864190] pc : [<b0017cd4>]    lr : [<b052c2a8>]    psr: a0000113
    [    8.870451] sp : ee975a70  ip : ee975a70  fp : ee975a8c
    [    8.875671] r10: 0ffffe38  r9 : 00000035  r8 : b11d21cc
    [    8.880891] r7 : 00000ed8  r6 : 00005dbf  r5 : 17f3db8c  r4 : b12b02a8
    [    8.887411] r3 : b0017cd0  r2 : fd640800  r1 : 00000000  r0 : b1244324
    [    8.893931] Flags: NzCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
    [    8.901058] Control: 10c5387d  Table: 6000406a  DAC: 00000051
    [    8.906799] CPU: 2 PID: 0 Comm: swapper/2 Tainted: G      D         4.4.194-rk322x #47
    [    8.914706] Hardware name: Generic DT based system
    [    8.919493] [<b001898c>] (unwind_backtrace) from [<b0014468>] (show_stack+0x20/0x24)
    [    8.927227] [<b0014468>] (show_stack) from [<b052e520>] (dump_stack+0x90/0xa4)
    [    8.934442] [<b052e520>] (dump_stack) from [<b0010d88>] (show_regs+0x1c/0x20)
    [    8.941569] [<b0010d88>] (show_regs) from [<b0532c30>] (nmi_cpu_backtrace+0xa0/0xd4)
    [    8.949303] [<b0532c30>] (nmi_cpu_backtrace) from [<b0016da4>] (handle_IPI+0xc4/0x2bc)
    [    8.957211] [<b0016da4>] (handle_IPI) from [<b00094d4>] (gic_handle_irq+0x98/0x9c)
    [    8.964772] [<b00094d4>] (gic_handle_irq) from [<b0014dd4>] (__irq_svc+0x54/0x70)
    [    8.972246] Exception stack(0xee975a20 to 0xee975a68)
    [    8.977293] 5a20: b1244324 00000000 fd640800 b0017cd0 b12b02a8 17f3db8c 00005dbf 00000ed8
    [    8.985461] 5a40: b11d21cc 00000035 0ffffe38 ee975a8c ee975a70 ee975a70 b052c2a8 b0017cd4
    [    8.993627] 5a60: a0000113 ffffffff
    [    8.997115] [<b0014dd4>] (__irq_svc) from [<b0017cd4>] (arch_timer_read_counter_long+0x4/0x28)
    [    9.005716] [<b0017cd4>] (arch_timer_read_counter_long) from [<b052c2f4>] (__timer_const_udelay+0x30/0x34)
    [    9.015358] [<b052c2f4>] (__timer_const_udelay) from [<b0110d20>] (panic+0x1f8/0x210)
    [    9.023179] [<b0110d20>] (panic) from [<b0014680>] (die+0x214/0x354)
    [    9.029527] [<b0014680>] (die) from [<b001ec9c>] (__do_kernel_fault.part.0+0x74/0x84)
    [    9.037349] [<b001ec9c>] (__do_kernel_fault.part.0) from [<b001f058>] (do_pabt_page_fault+0x0/0x84)
    [    9.046383] [<b001f058>] (do_pabt_page_fault) from [<b001f0b8>] (do_pabt_page_fault+0x60/0x84)
    [    9.054983] [<b001f0b8>] (do_pabt_page_fault) from [<b0009304>] (do_PrefetchAbort+0x48/0xa8)
    [    9.063410] [<b0009304>] (do_PrefetchAbort) from [<b0014ecc>] (__pabt_svc+0x4c/0x80)
    [    9.071143] Exception stack(0xee975c40 to 0xee975c88)
    [    9.076191] 5c40: eedc34c0 02c002bf 00000002 00000000 00000003 eedc34c0 b116a100 ffff172d
    [    9.084358] 5c60: b116f75c 00000003 b11664c0 ee975c9c ee975ca0 ee975c90 b0060268 b005466c
    [    9.092525] 5c80: 60000193 ffffffff
    [    9.096011] [<b0014ecc>] (__pabt_svc) from [<b005466c>] (update_rq_clock+0x20/0x28)
    [    9.103659] [<b005466c>] (update_rq_clock) from [<b0060268>] (update_blocked_averages+0x54/0x1d24)
    [    9.112606] [<b0060268>] (update_blocked_averages) from [<b00734c4>] (rebalance_domains+0x4c/0x2f4)
    [    9.121641] [<b00734c4>] (rebalance_domains) from [<b00738c8>] (run_rebalance_domains+0x15c/0x1d8)
    [    9.130588] [<b00738c8>] (run_rebalance_domains) from [<b0009614>] (__do_softirq+0x13c/0x368)
    [    9.139102] [<b0009614>] (__do_softirq) from [<b002c650>] (irq_exit+0x84/0x12c)
    [    9.146403] [<b002c650>] (irq_exit) from [<b0057fe4>] (scheduler_ipi+0x88/0x144)
    [    9.153790] [<b0057fe4>] (scheduler_ipi) from [<b0016dbc>] (handle_IPI+0xdc/0x2bc)
    [    9.161351] [<b0016dbc>] (handle_IPI) from [<b00094d4>] (gic_handle_irq+0x98/0x9c)
    [    9.168912] [<b00094d4>] (gic_handle_irq) from [<b0014dd4>] (__irq_svc+0x54/0x70)
    [    9.176386] Exception stack(0xee975f40 to 0xee975f88)
    [    9.181433] 5f40: 00000001 00000000 00000000 b0022720 ffffe000 00000000 b123d05c b0c8f730
    [    9.189601] 5f60: b116e634 b116e63c 00000000 ee975f9c ee975fa0 ee975f90 b0010ae8 b0010aec
    [    9.197767] 5f80: 60000013 ffffffff
    [    9.201255] [<b0014dd4>] (__irq_svc) from [<b0010aec>] (arch_cpu_idle+0x48/0x4c)
    [    9.208643] [<b0010aec>] (arch_cpu_idle) from [<b007cdbc>] (default_idle_call+0x38/0x3c)
    [    9.216723] [<b007cdbc>] (default_idle_call) from [<b007d150>] (cpu_startup_entry+0x334/0x374)
    [    9.225324] [<b007d150>] (cpu_startup_entry) from [<b0016a6c>] (secondary_start_kernel+0x154/0x160)
    [    9.234358] [<b0016a6c>] (secondary_start_kernel) from [<600098cc>] (0x600098cc)
    [    9.241745] NMI backtrace for cpu 3
    [    9.245233] CPU: 3 PID: 0 Comm: swapper/3 Tainted: G      D         4.4.194-rk322x #47
    [    9.253140] Hardware name: Generic DT based system
    [    9.257927] [<b001898c>] (unwind_backtrace) from [<b0014468>] (show_stack+0x20/0x24)
    [    9.265661] [<b0014468>] (show_stack) from [<b052e520>] (dump_stack+0x90/0xa4)
    [    9.272876] [<b052e520>] (dump_stack) from [<b0532c60>] (nmi_cpu_backtrace+0xd0/0xd4)
    [    9.280697] [<b0532c60>] (nmi_cpu_backtrace) from [<b001656c>] (raise_nmi+0x70/0x74)
    [    9.288431] [<b001656c>] (raise_nmi) from [<b0532a48>] (nmi_trigger_all_cpu_backtrace+0x128/0x270)
    [    9.297379] [<b0532a48>] (nmi_trigger_all_cpu_backtrace) from [<b001710c>] (arch_trigger_all_cpu_backtrace+0x20/0x24)
    [    9.307974] [<b001710c>] (arch_trigger_all_cpu_backtrace) from [<b0086218>] (do_raw_spin_lock+0x114/0x1d8)
    [    9.317615] [<b0086218>] (do_raw_spin_lock) from [<b0c8cd58>] (_raw_spin_lock+0x18/0x1c)
    [    9.325696] [<b0c8cd58>] (_raw_spin_lock) from [<b005608c>] (try_to_wake_up+0xc8/0x3f0)
    [    9.333690] [<b005608c>] (try_to_wake_up) from [<b0056488>] (wake_up_process+0x24/0x28)
    [    9.341685] [<b0056488>] (wake_up_process) from [<b00a0ab0>] (process_timeout+0x18/0x1c)
    [    9.349765] [<b00a0ab0>] (process_timeout) from [<b00a0b04>] (call_timer_fn+0x50/0x1a0)
    [    9.357760] [<b00a0b04>] (call_timer_fn) from [<b00a0e38>] (run_timer_softirq+0x1e4/0x304)
    [    9.366014] [<b00a0e38>] (run_timer_softirq) from [<b0009614>] (__do_softirq+0x13c/0x368)
    [    9.374181] [<b0009614>] (__do_softirq) from [<b002c650>] (irq_exit+0x84/0x12c)
    [    9.381483] [<b002c650>] (irq_exit) from [<b008e230>] (__handle_domain_irq+0x70/0xc4)
    [    9.389303] [<b008e230>] (__handle_domain_irq) from [<b0009494>] (gic_handle_irq+0x58/0x9c)
    [    9.397644] [<b0009494>] (gic_handle_irq) from [<b0014dd4>] (__irq_svc+0x54/0x70)
    [    9.405118] Exception stack(0xee977f40 to 0xee977f88)
    [    9.410165] 7f40: 00000001 00000000 00000000 b0022720 ffffe000 00000000 b123d05c b0c8f730
    [    9.418332] 7f60: b116e634 b116e63c 00000000 ee977f9c ee977fa0 ee977f90 b0010ae8 b0010aec
    [    9.426498] 7f80: 60000013 ffffffff
    [    9.429985] [<b0014dd4>] (__irq_svc) from [<b0010aec>] (arch_cpu_idle+0x48/0x4c)
    [    9.437373] [<b0010aec>] (arch_cpu_idle) from [<b007cdbc>] (default_idle_call+0x38/0x3c)
    [    9.445454] [<b007cdbc>] (default_idle_call) from [<b007d150>] (cpu_startup_entry+0x334/0x374)
    [    9.454055] [<b007d150>] (cpu_startup_entry) from [<b0016a6c>] (secondary_start_kernel+0x154/0x160)
    [    9.463088] [<b0016a6c>] (secondary_start_kernel) from [<600098cc>] (0x600098cc)
    
    Enter command. Try 'help' for a list of builtin commands
    -> quit
    exiting
    exit
    
    Script done on 2021-03-21 15:38:58+00:00 [COMMAND_EXIT_CODE="0"]
    
    

     

     

    When booting from emmc, most of the time I have nothing after "Booting kernel, and sometimes some kernel traps.

     

    Any suggestions or pointers?

     

    Cheers,

     

    Michel

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