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Nick A

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  1. That's more android related. You would have to ask the XDA forums. You could make a backup using Armbian. But you would need to boot Armbian first. Do you have the correct drivers install on windows for your CH340? Putty should be set to 115200 baud rate. To check if your UART is working try booting into android first. You should see the android u-boot messages. Then try the non secure boot armbian images.
  2. Your box is looking for the brcmfmac4334-sdio firmware. /lib/firmware/brcm/brcmfmac4334-sdio.transpeed,8k618-t.bin /lib/firmware/brcm/brcmfmac4334-sdio.txt Armbian already has the firmware for it. You need to rename these files. cp brcmfmac4334-sdio.bin brcmfmac4334-sdio.transpeed,8k618-t.bin cp brcmfmac4334-sdio.rockchip,rk3318-box.txt brcmfmac4334-sdio.txt [ 7.570071] sunxi-ir 7040000.ir: initialized sunXi IR driver [ 7.641713] brcmfmac: brcmf_fw_alloc_request: using brcm/brcmfmac4334-sdio for chip BCM4334/3 [ 7.644004] brcmfmac mmc0:0001:1: Direct firmware load for brcm/brcmfmac4334-sdio.transpeed,8k618-t.bin failed with error -2
  3. Your TX0 and RX0 wires need to be crossed over. TX0 red connects to RX0 and RX0 white connects to TX0.
  4. I haven't tried this.. but maybe this extension will work for you. ytdl server Chrome extension and Firefox add-on that adds context menu option to play youtube videos with mpv (or other external player). https://github.com/agiz/youtube-mpv?tab=readme-ov-file
  5. Your box probably has secure boot enabled... Give this image a try. Let me know if you get any output from the UART. https://github.com/NickAlilovic/build/releases/download/v20240716/Armbian-20240716-unofficial_24.5.0-trunk_Transpeed-8k618-t_bookworm_edge_6.7.12_xfce_desktop_Secure_Boot.img.tar.xz
  6. Try this miniarch image. If it boots then you can port over the files needed to boot armbian. https://github.com/warpme/miniarch https://github.com/warpme/miniarch/releases/download/v20240916/MiniArch-20240715-6.10.10-board-h616.tanix_tx6s_axp313-SD-Image.img.xz You should also install a serial console to you UART port. You can see the UART pins (GND, TX0, RX0) top left corner of second picture. https://linux-sunxi.org/UART
  7. I have been looking at the code and there's been a lot of changes between H3/H5 and H616/H618 SOC's. H616/H618 now has a TVE_TOP register. H616/H618 uses the first DAC and moved the DAC MAP to TVE_TOP. https://linux-sunxi.org/images/2/24/H616_User_Manual_V1.0_cleaned.pdf Module Name Base Address TVE_TOP 0x06520000 TVE 0x06524000 Register Name Offset Description TVE_DAC_MAP 0x0020 TV Encoder DAC MAP Register TVE_DAC_STATUS 0x0024 TV Encoder DAC STAUTS Register TVE_DAC_CFG0 0x0028 TV Encoder DAC CFG0 Register TVE_DAC_CFG1 0x002C TV Encoder DAC CFG1 Register TVE_DAC_CFG2 0x0030 TV Encoder DAC CFG2 Register TVE_DAC_CFG3 0x0034 TV Encoder DAC CFG2 Register TVE_DAC_TEST 0x00F0 TV Encoder DAC TEST Register H3/H5 TV Encoder Enable Register use to handle the DAC mapping. If you look at the two pdf's you can see the changes. https://linux-sunxi.org/images/1/1e/Allwinner_A10_User_manual_V1.5.pdf Module Name Base Address TVE 0x01C0A000 Register Name Offset Description TVE_000_REG 0x0000 TV Encoder Enable Register We need to modify the kernel TVE driver. https://github.com/torvalds/linux/blob/master/drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_TOP_DAC_MAP 0x020 #define SUN4I_TVE_TOP_EN_DAC_MAP_MASK GENMASK(6, 4) #define SUN4I_TVE_TOP_EN_DAC_MAP(dac, out) (((out) & 0xf) << (dac + 1) * 4) #define SUN4I_TVE_TOP_DAC_TEST 0x0F0 if (tv->quirks->hastvtop) { /* Enable and map the DAC to the output */ regmap_update_bits(tv->top_regs, SUN4I_TVE_TOP_DAC_MAP, SUN4I_TVE_TOP_EN_DAC_MAP_MASK, SUN4I_TVE_TOP_EN_DAC_MAP(0, 1) | SUN4I_TVE_TOP_EN_DAC_MAP(1, 2) | SUN4I_TVE_TOP_EN_DAC_MAP(2, 3) | SUN4I_TVE_TOP_EN_DAC_MAP(3, 4)); } else { /* Enable and map the DAC to the output */ regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG, SUN4I_TVE_EN_DAC_MAP_MASK, SUN4I_TVE_EN_DAC_MAP(0, 1) | SUN4I_TVE_EN_DAC_MAP(1, 2) | SUN4I_TVE_EN_DAC_MAP(2, 3) | SUN4I_TVE_EN_DAC_MAP(3, 4)); } I still need to modify this part... /* Configure the DAC for a composite output */ regmap_write(tv->regs, SUN4I_TVE_DAC0_REG, SUN4I_TVE_DAC0_DAC_EN(0) | (tv_mode->dac3_en ? SUN4I_TVE_DAC0_DAC_EN(3) : 0) | SUN4I_TVE_DAC0_INTERNAL_DAC_37_5_OHMS | SUN4I_TVE_DAC0_CHROMA_0_75 | SUN4I_TVE_DAC0_LUMA_0_4 | SUN4I_TVE_DAC0_CLOCK_INVERT | (tv_mode->dac_bit25_en ? BIT(25) : 0) | BIT(30)); To access the TVE_TOP DAC MAP Register we need to first enable the TVE_TOP clocks. (in function sun4i_tv_bind()) static const struct regmap_config sun4i_tv_top_regmap_config = { .reg_bits = 32, .val_bits = 32, .reg_stride = 4, .max_register = SUN4I_TVE_TOP_DAC_TEST, .name = "tv-top", }; /* tve top */ if (tv->quirks->hastvtop) { top_regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(top_regs)) { dev_err(dev, "Couldn't map the TV TOP registers\n"); return PTR_ERR(top_regs); } tv->top_regs = devm_regmap_init_mmio(dev, top_regs, &sun4i_tv_top_regmap_config); if (IS_ERR(tv->top_regs)) { dev_err(dev, "Couldn't create the TV TOP regmap\n"); return PTR_ERR(tv->top_regs); } tv->top_reset = devm_reset_control_get(dev, "rst_bus_tve_top"); if (IS_ERR(tv->top_reset)) { dev_err(dev, "Couldn't get our reset line\n"); return PTR_ERR(tv->top_reset); } ret = reset_control_deassert(tv->top_reset); if (ret) { dev_err(dev, "Couldn't deassert our reset line\n"); return ret; } tv->top_clk = devm_clk_get(dev, "clk_bus_tve_top"); if (IS_ERR(tv->top_clk)) { dev_err(dev, "Couldn't get the TV TOP clock\n"); ret = PTR_ERR(tv->top_clk); goto err_assert_reset; } clk_prepare_enable(tv->top_clk); } This is from the H616 user manual. Figure 7- 10. DAC Calibration 10-bit calibration value is burned into efuse. Every time software can read the 10-bit calibration value from efuse, to control BIAS current and BIAS current switch, then a specific BIAS current is generated to calibrate maximum output voltage of DAC. We need to extract the DAC calibration value (tvout 32) from SID. https://linux-sunxi.org/SID_Register_Guide hexdump -C /sys/bus/nvmem/devices/sunxi-sid0/nvmem H6 Name Offset Size Description CHIPID 0x00 128 bit Chip-ID, also known as SID BROM_CONFIG 0x10 32 bit unknown, "16 bits config, 16 bits try" THERMAL_SENSOR 0x14 64 bit Thermal sensor calibration data TF_ZONE 0x1c 128 bit unknown, probably reserved for Trusted Firmware OEM_PROGRAM 0x2c 160 bit unknown, "emac 16 + tvout 32 + reserv 112" Add quirks for h616. Not sure if .unknown is needed?? static const struct sun4i_tv_quirks h616_quirks = { .calibration = 0x?????????????, .unknown = 1, .hastvtop = true, }; static const struct of_device_id sun4i_tv_of_table[] = { { .compatible = "allwinner,sun4i-a10-tv-encoder", .data = &a10_quirks }, { .compatible = "allwinner,sun8i-h3-tv-encoder", .data = &h3_quirks }, { .compatible = "allwinner,sun50i-h5-tv-encoder", .data = &h5_quirks }, { .compatible = "allwinner,sun50i-h616-tv-encoder", .data = &h616_quirks }, { /* sentinel */ }, }; The dtsi might look similar to this. Not sure if it's correct. I think we need to add <&ccu CLK_TVE> to tcon_tv0 clocks. tcon_tv0: lcd-controller@6515000 { compatible = "allwinner,sun50i-h6-tcon-tv", "allwinner,sun8i-r40-tcon-tv"; reg = <0x06515000 0x1000>; interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_TCON_TV0>, <&tcon_top CLK_TCON_TOP_TV0>; clock-names = "ahb", "tcon-ch1"; resets = <&ccu RST_BUS_TCON_TV0>; reset-names = "lcd"; ports { #address-cells = <1>; #size-cells = <0>; tcon_tv0_in: port@0 { reg = <0>; tcon_tv0_in_tcon_top_mixer0: endpoint@0 { reg = <0>; remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>; }; }; tcon_tv0_out: port@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; tcon_tv0_out_tve: endpoint@0 { reg = <0>; remote-endpoint = <&tve_in_tcon_tv0>; }; tcon_tv0_out_tcon_top: endpoint@1 { reg = <1>; remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>; }; }; }; }; tve: tv-encoder@6520000 { compatible = "allwinner,sun50i-h616-tv-encoder"; reg = <0x06520000 0x100>, <0x06524000 0x3fc>; clocks =<&ccu CLK_BUS_TVE_TOP>, <&ccu CLK_BUS_TVE0>; clock-names = "clk_bus_tve_top", "clk_bus_tve"; resets = <&ccu RST_BUS_TVE_TOP>, <&ccu RST_BUS_TVE0>; reset-names = "rst_bus_tve_top", "rst_bus_tve"; status = "disabled"; port { tve_in_tcon_tv0: endpoint { remote-endpoint = <&tcon_tv0_out_tve>; }; }; }; I haven't looked into the mixer1 part of the patch. Not sure if H616/H618 has one. I can't find the base address in the H616 user manual. BSP kernel code that might help us. https://github.com/AvaotaSBC/linux/tree/main/bsp/drivers/video/sunxi/disp2/tv https://github.com/AvaotaSBC/linux/tree/main/bsp/drivers/video/sunxi/disp2/disp/de
  8. This patch is in all my builds. For orangepiezero3 I would use my main branch. I haven't test the other branches with zero3. If you are using my main branch, you can disable any patch by adding (-) infront of the patch list files series.armbian and series.conf located in https://github.com/NickAlilovic/build/tree/main/patch/kernel/archive/sunxi-6.7
  9. This patch is a problem for ffmpeg7.1 v4l2_request miniarch 6.11 kernel "disable cedrus afbc as it not works wth ffmpeg7.1 v4l2_request" https://github.com/warpme/minimyth2/commit/c9743d01be4b20d44ae5bf8bf59e04e3a238598b#diff-8cd76cccf3166ac60fa54f50e375720ff39bbf2d3e9765ee3f787c94b81a3894R110 My Armbian build 6.10 kernel https://github.com/NickAlilovic/build/blob/v20241007/patch/kernel/archive/sunxi-6.10/patches.armbian/0551-media-cedrus-Implement-AFBC-YUV420-formats-for-H265.patch
  10. You can change your edge kernel in config/sources/families/include/sunxi64_common.inc case $BRANCH in legacy) declare -g KERNEL_MAJOR_MINOR="6.1" # Major and minor versions of this kernel. declare -g KERNELBRANCH="tag:v6.1.104" ;; current) declare -g KERNEL_MAJOR_MINOR="6.6" # Major and minor versions of this kernel. declare -g KERNELBRANCH="tag:v6.6.44" ;; edge) declare -g KERNEL_MAJOR_MINOR="6.10" # Major and minor versions of this kernel. declare -g KERNELBRANCH="tag:v6.10.9" ;; esac
  11. Thanks for the update afiftyp. I'll give it a try. I thought maybe the issue was with my dts settings. Bluetooth only works when I boot into android and enable bluetooth. Then reboot back to Armbian. I don't use bluetooth much so I haven't looked into it. This code is from orange pi zero 2. https://github.com/NickAlilovic/build/blob/74d622f5b071acae4b61904e15f3da2f055c2167/patch/kernel/archive/sunxi-6.1/patches.armbian/arm64-dts-h616-add-wifi-support-for-orange-pi-zero-2.patch#L43 wifi_pwrseq: wifi-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rtc 1>; + clock-names = "osc32k-out"; + reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */ + post-power-on-delay-ms = <200>; + }; My code is similar to orange pie. But I have a pinctrl-0 = <&x32clk_fanout_pin>; and no delay. https://github.com/NickAlilovic/build/blob/74d622f5b071acae4b61904e15f3da2f055c2167/patch/kernel/archive/sunxi-6.7/patches.armbian/arm64-dts-allwinner-h618-add-Transpeed-8K618-T-TV-box.patch#L121C1-L128C12 + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rtc CLK_OSC32K_FANOUT>; + clock-names = "ext_clock"; + pinctrl-0 = <&x32clk_fanout_pin>; + pinctrl-names = "default"; + reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */ + }; This part confuses me.. clock-names = "osc32k-out"; I think it should be clock-names = "ext_clock"; Only the Armbian patches use "osc32k-out" for wifi_pwrseq clock names. I guess you can name it whatever you like it will always use &rtc 1 or &rtc CLK_OSC32K_FANOUT. https://github.com/torvalds/linux/blob/8e929cb546ee42c9a61d24fae60605e9e3192354/include/dt-bindings/clock/sun6i-rtc.h https://github.com/torvalds/linux/blob/8e929cb546ee42c9a61d24fae60605e9e3192354/drivers/mmc/core/pwrseq_simple.c#L120C20-L120C50 pwrseq->ext_clk = devm_clk_get(dev, "ext_clock"); if (IS_ERR(pwrseq->ext_clk) && PTR_ERR(pwrseq->ext_clk) != -ENOENT) return dev_err_probe(dev, PTR_ERR(pwrseq->ext_clk), "external clock not ready\n"); However, I did find the clock name "osc32k-out" in the RTC portion of h6.dtsi. The h616.dtsi doesn't have any clock-output-names. rtc: rtc@7000000 { compatible = "allwinner,sun50i-h6-rtc"; reg = <0x07000000 0x400>; interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; clock-output-names = "osc32k", "osc32k-out", "iosc"; #clock-cells = <1>; }; Also here. https://github.com/torvalds/linux/blob/6485cf5ea253d40d507cd71253c9568c5470cd27/drivers/rtc/rtc-sun6i.c#L232 static void __init sun6i_rtc_clk_init(struct device_node *node, const struct sun6i_rtc_clk_data *data) { struct clk_hw_onecell_data *clk_data; struct sun6i_rtc_dev *rtc; struct clk_init_data init = { .ops = &sun6i_rtc_osc_ops, .name = "losc", }; const char *iosc_name = "rtc-int-osc"; const char *clkout_name = "osc32k-out"; const char *parents[2]; u32 reg; of_property_read_string_index(node, "clock-output-names", 1, &clkout_name); rtc->ext_losc = clk_register_gate(NULL, clkout_name, init.name, 0, rtc->base + SUN6I_LOSC_OUT_GATING, SUN6I_LOSC_OUT_GATING_EN_OFFSET, 0, &rtc->lock); Because the there's no "clock-output-names" in the h616.dtsi.. char *clkout_name = "osc32k-out"; does not change. Maybe you accidentally used the rtc-sun6i.c clock.
  12. Here are the Allwinner BSP kernel drivers if you want to dive deep into the rabbit hole. git clone https://github.com/AvaotaSBC/linux.git --depth=1 Have you tried a newer version of bluez? https://packages.debian.org/search?arch=arm64&keywords=bluez https://github.com/bluez/bluez/tree/master https://github.com/bluez/bluez/blob/bd7d49d54aa3aa490ebdd67b3dd2317d29213d45/monitor/bt.h#L1488 #define BT_HCI_CMD_WRITE_EXT_INQUIRY_RESPONSE 0x0c52 struct bt_hci_cmd_write_ext_inquiry_response { uint8_t fec; uint8_t data[240]; } __attribute__ ((packed)); https://github.com/bluez/bluez/blob/bd7d49d54aa3aa490ebdd67b3dd2317d29213d45/monitor/bt.h#L1271C1-L1274C28 #define BT_HCI_CMD_WRITE_CLASS_OF_DEV 0x0c24 struct bt_hci_cmd_write_class_of_dev { uint8_t dev_class[3]; } __attribute__ ((packed)); https://github.com/bluez/bluez/blob/bd7d49d54aa3aa490ebdd67b3dd2317d29213d45/monitor/packet.c#L5920 static void write_ext_inquiry_response_cmd(const void *data, uint8_t size) { const struct bt_hci_cmd_write_ext_inquiry_response *cmd = data; print_fec(cmd->fec); print_eir(cmd->data, sizeof(cmd->data), false); } https://kernel.googlesource.com/pub/scm/bluetooth/bluez/+/5.7/monitor/packet.c#4070 { 0x0c52, 137, "Write Extended Inquiry Response", write_ext_inquiry_response_cmd, 241, true, status_rsp, 1, true }, https://github.com/bluez/bluez/blob/bd7d49d54aa3aa490ebdd67b3dd2317d29213d45/monitor/packet.c#L5565 static void write_class_of_dev_cmd(uint16_t index, const void *data, uint8_t size) { const struct bt_hci_cmd_write_class_of_dev *cmd = data; print_dev_class(cmd->dev_class); } https://kernel.googlesource.com/pub/scm/bluetooth/bluez/+/5.7/monitor/packet.c#4015 { 0x0c24, 73, "Write Class of Device", write_class_of_dev_cmd, 3, true, status_rsp, 1, true }, You can ask the bluez developers for help. https://github.com/bluez/bluez/issues
  13. Try the firmware from here. https://forums.linuxmint.com/viewtopic.php?p=1994357#p1994357
  14. I think you used the wifi firmware from LibreElec. But the bluetooth firmware "BCM4334B0.hcd" was already existing in the Armbian firmware folder. The Armbian firmware might be different than LibreElec's version. Worth a try. I'm not sure if the sdio.txt file has bluetooth configuration settings in it. We can play with some of these settings.
  15. Maybe you'll have better luck with these. https://github.com/LibreELEC/brcmfmac_sdio-firmware
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