RSS Bot Posted April 2, 2023 Posted April 2, 2023 Description emmc and sdio clock registers on rk322x were not exactly properly configured in kernel source code, causing the clock to be not precisely aligned. This was particularly evident during initial detection of emmc and sdio devices and also was clashing with a recent addition to mainline kernel (this commit) This PR corrects the kernel code in current and edge branches (6.1 and 6.2) to fix the thing and possibly increase compatibility, going from this: [ 2.194866] mmc_host mmc2: card is non-removable. [ 2.206312] mmc_host mmc2: Bus speed (slot 0) = 2343750Hz (slot req 400000Hz, actual 390625HZ div = 3) [ 2.385689] mmc_host mmc2: Bus speed (slot 0) = 50000000Hz (slot req 52000000Hz, actual 50000000HZ div = 0) [ 2.386934] mmc2: new DDR MMC card at address 0001 [ 2.388824] mmcblk2: mmc2:0001 MMC08G 7.45 GiB [ 2.395831] mmcblk2boot0: mmc2:0001 MMC08G 2.00 MiB [ 2.400068] mmcblk2boot1: mmc2:0001 MMC08G 2.00 MiB [ 2.403912] mmcblk2rpmb: mmc2:0001 MMC08G 256 KiB, chardev (241:0) to this: [ 1.604887] mmc_host mmc2: card is non-removable. [ 1.615800] mmc_host mmc2: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0) [ 1.898259] mmc_host mmc2: Bus speed (slot 0) = 50000000Hz (slot req 52000000Hz, actual 50000000HZ div = 0) [ 1.899593] mmc2: new DDR MMC card at address 0001 [ 1.901394] mmcblk2: mmc2:0001 MMC08G 7.45 GiB [ 1.908235] mmcblk2boot0: mmc2:0001 MMC08G 2.00 MiB [ 1.912311] mmcblk2boot1: mmc2:0001 MMC08G 2.00 MiB [ 1.915123] mmcblk2rpmb: mmc2:0001 MMC08G 256 KiB, chardev (240:0) How Has This Been Tested? [x] Tested on a couple of live systems Checklist: [x] My code follows the style guidelines of this project [x] I have performed a self-review of my own code [x] I have commented my code, particularly in hard-to-understand areas [x] I have made corresponding changes to the documentation [x] My changes generate no new warnings [x] Any dependent changes have been merged and published in downstream modules View the full article
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