Orange Pi 5 Pro - extend SPI4 to 5 chipselect

[Rafael Junio]

I am trying to extend the chipselect from spi4. Because I will need to control more boards, so I tried to transform GPIO into chipselect (CS). This is the original SPI4:
 

/dts-v1/;

/ {

        fragment@0 {
                target = <0xffffffff>;

                __overlay__ {
                        status = "okay";
                        #address-cells = <0x01>;
                        #size-cells = <0x00>;
                        pinctrl-names = "default";
                        pinctrl-0 = <0xffffffff 0xffffffff 0xffffffff>;

                        spidev@0 {
                                compatible = "rockchip,spidev";
                                status = "okay";
                                reg = <0x00>;
                                spi-max-frequency = <0x2faf080>;
                        };

                        spidev@1 {
                                compatible = "rockchip,spidev";
                                status = "okay";
                                reg = <0x01>;
                                spi-max-frequency = <0x2faf080>;
                        };
                };
        };

        __fixups__ {
                spi4 = "/fragment@0:target:0";
                spi4m1_cs0 = "/fragment@0/__overlay__:pinctrl-0:0";
                spi4m1_cs1 = "/fragment@0/__overlay__:pinctrl-0:4";
                spi4m1_pins = "/fragment@0/__overlay__:pinctrl-0:8";
        };
};

And this is the my change that is compiling with warning:
 

/dts-v1/;

/ {
    fragment@0 {
        target = <0xffffffff>;

        __overlay__ {
            status = "okay";
            #address-cells = <1>;
            #size-cells = <0>;

            pinctrl-names = "default";
            pinctrl-0 = <0xffffffff 0xffffffff 0xffffffff>;

            cs-gpios = <
                0xffffffff 4 1   /* CS2: GPIO1_A4 */
                0xffffffff 6 1   /* CS3: GPIO1_A6 */
                0xffffffff 7 1   /* CS4: GPIO4_A7 */
            >;
            spidev@0 {
                compatible = "rockchip,spidev";
                reg = <0>;
                spi-max-frequency = <50000000>;
                status = "okay";
            };
            spidev@1 {
                compatible = "rockchip,spidev";
                reg = <1>;
                spi-max-frequency = <50000000>;
                status = "okay";
            };
            spidev@2 {
                compatible = "rockchip,spidev";
                reg = <2>;
                spi-max-frequency = <50000000>;
                status = "okay";
            };
            spidev@3 {
                compatible = "rockchip,spidev";
                reg = <3>;
                spi-max-frequency = <50000000>;
                status = "okay";
            };
            spidev@4 {
                compatible = "rockchip,spidev";
                reg = <4>;
                spi-max-frequency = <50000000>;
                status = "okay";
            };
        };
    };

    __fixups__ {
        spi4 = "/fragment@0:target:0";
        spi4m1_cs0 = "/fragment@0/__overlay__:pinctrl-0:0"; /* CS0 */
        spi4m1_cs1 = "/fragment@0/__overlay__:pinctrl-0:4"; /* CS1 */
        spi4m1_pins = "/fragment@0/__overlay__:pinctrl-0:8"; /* SCLK/MISO/MOSI */

        spi4m1_cs2 = "/fragment@0/__overlay__:cs-gpios:0";  /* CS2 */
        spi4m1_cs3 = "/fragment@0/__overlay__:cs-gpios:1";  /* CS3 */
        spi4m1_cs4 = "/fragment@0/__overlay__:cs-gpios:2";  /* CS4 */
    };
};