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Harvs

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  1. So I think I've narrowed the problem down, thanks to a random response on another forum. If one does a cat /proc/interrupts, the 6th column has the type of interrupt. The driver for that interrupt has to support remapping the CPU affinity, which GICv2 does, however sunxi_pio_edge evidently does not (writing to smp_affinity does not work on any of the sunxi_pio_edge interrupts but works on all the others.) So I guess I'll have a look into it, but it's a bit of a shame to not be able to link a external pin interrupt onto a specific core. CPU0 CPU1 CPU2 CPU3 17: 0 0 0 0 GICv2 50 Level timer@1c20c00 18: 0 0 0 0 GICv2 29 Level arch_timer 19: 27233 13443 11848 20818 GICv2 30 Level arch_timer 22: 0 0 0 0 GICv2 82 Level 1c02000.dma-controller 23: 702 0 0 0 GICv2 118 Level 1c0c000.lcd-controller 24: 7728 0 0 0 GICv2 92 Level sunxi-mmc 25: 0 0 0 0 GICv2 103 Level musb-hdrc.3.auto 26: 0 0 0 0 GICv2 104 Level ehci_hcd:usb1 27: 0 0 0 0 GICv2 105 Level ohci_hcd:usb2 28: 2 0 0 0 GICv2 106 Level ehci_hcd:usb3 29: 28 0 0 0 GICv2 107 Level ohci_hcd:usb4 32: 17757 131 0 0 GICv2 63 Level 1c25000.thermal-sensor 34: 980 215 0 0 GICv2 114 Level eth0 37: 10 0 0 0 GICv2 32 Level ttyS0 38: 259 0 0 0 GICv2 120 Level 1ee0000.hdmi, dw-hdmi-cec 39: 0 0 0 0 GICv2 72 Level 1f00000.rtc 42: 0 0 0 0 GICv2 129 Level gp 43: 0 0 0 0 GICv2 130 Level gpmmu 44: 0 0 0 0 GICv2 131 Level pp0 45: 0 0 0 0 GICv2 132 Level ppmmu0 46: 0 0 0 0 GICv2 134 Level pp1 47: 0 0 0 0 GICv2 135 Level ppmmu1 61: 47209 0 0 0 sunxi_pio_edge 12 Edge test 93: 1 0 0 0 sunxi_pio_edge 44 Edge usb0-id-det 116: 1 0 0 0 sunxi_pio_edge 3 Edge sw4 IPI0: 0 0 0 0 CPU wakeup interrupts IPI1: 0 0 0 0 Timer broadcast interrupts IPI2: 35531 78469 31490 33330 Rescheduling interrupts IPI3: 613 604 315 193 Function call interrupts IPI4: 0 0 0 0 CPU stop interrupts IPI5: 1698 1412 138 4746 IRQ work interrupts IPI6: 0 0 0 0 completion interrupts Err: 0
  2. Hi All, just discovered this great project. Awesome to see it's so well frequented. I'm trying to do some realtime data acquisition on a OPi one with Armbian Debian Stretch. Following on from the link at the bottom, I'm trying to set an interrupt handler in my loadable kernel module onto a seperate core that I've isolated from the normal scheduler (using isolcpus=2,3 in boot.cmd/.scr). I've built the kernel using the Vagrant instructions with the 4.19.50 RT22 realtime patches. But I've also tested with no luck on the standard build from the download page. I'm using the irq_set_affinity_hint in the following manner, but it has no effect on core affinity as seen by cat /proc/interrupts. The handler still runs on core 0 and cat /proc/irq/61/smp_affinity still reports 0xF (i.e. any core). result = request_irq(irq_number, (irq_handler_t) test_irq_handler, IRQF_TRIGGER_RISING, "test_irq_handler", NULL); irq_set_affinity_hint(irq_number, cpumask_of(3)); Also trying to change the IRQ affinity via the filesystem (i.e. sudo echo 3 >/proc/irq/61/smp_affinity) always just results in a permission error. EDIT: actually not a permission error as such, but "write error: Input/output error" In the link below ChrisK has a patch to enable irq_set_affinity_hint to work properly. However those changes have been incorporated as can be seen in manage.c. Looking through the kernel source I can't see a reason for it not working, so I'm wondering if there's some other service that's blocking it? I believe from reading around Ubuntu normally has an IRQ leveling service, but I can't see anything like that on Armbian Stretch (although I could easily be missing something.) Thanks!
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