Nyx_

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  1. Yep. Just confirming that it's working, building from sources. armbian@orangepioneplus:~/spidev-test$ sudo ./spidev_test -v [sudo] password for armbian: spi mode: 0x0 bits per word: 8 max speed: 500000 Hz (500 KHz) TX | FF FF FF FF FF FF 40 00 00 00 00 95 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF F0 0D | ......@....�..................�. RX | FF FF FF FF FF FF 40 00 00 00 00 95 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF F0 0D | ......@....�..................�.
  2. Wow Martin! Thanks for the investigation and solution. I'll build a new version incorporating those changes and It will probably work. I'll reply the results here. Thank you very much.
  3. Hello. Good day. I'm trying to use the SPI on a OragenPI One Plus (Allwinner H6), and, although I have enable it via the /boot/armbianEnv.txt configuration, communication is not working. Here's the armbianEnv.txt armbian@orangepioneplus:~$ cat /boot/armbianEnv.txt verbosity=1 bootlogo=false console=both disp_mode=1920x1080p60 overlay_prefix=sun50i-h6 rootdev=UUID=19c1886e-0b74-45b8-b9f5-5fbd4bdeb5c2 rootfstype=ext4 overlays=spi-spidev param_spidev_spi_bus=0 usbstoragequirks=0x2537:0x1066:u,0x2537:0x1068:u And here's the SPI device listed under /dev armbian@orangepioneplus:~$ ls -la /dev/sp* crw------- 1 root root 153, 0 nov 28 15:06 /dev/spidev0.0 To test it, I compiled the spidev_test.c (https://github.com/rm-hull/spidev-test) and I jumped the MISO and MOSI pins on the board. This is the response I'm getting when running the spidev_test: armbian@orangepioneplus:~/spidev-test$ sudo ./spidev_test -v spi mode: 0x0 bits per word: 8 max speed: 500000 Hz (500 KHz) TX | FF FF FF FF FF FF 40 00 00 00 00 95 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF F0 0D | ......@....�..................�. RX | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ................................ I tested it with both a Downloaded image from Armbian website as well as one that I built. Both behave the same way. To make sure this isn't a Hardware issue, I did the same test the a image from the OrangePi website. It worked fine. I'm running kernel 5.9.11. Searching on dmesg from SPI doesn't bring much. Here's it in any case: armbian@orangepioneplus:~/spidev-test$ dmesg | grep spi [ 2.693934] spidev spi0.0: probing from DT Any ideas where I can look next to solve the problem? I appreciate any suggestion/advice. Thank you.
  4. That's awesome! It worked. I formatted the sdcard creating without creating any partition, then I wrote the Armbian image. Thanks for the help! PS: How can we marked this as "solved"? Thank you.
  5. I was able to overcome that error by powering the board from the USB-C directly instead of the barrel jack power supply (!?). Doing that allowed me to boot the OPI image and I was able to transfer it to eMMC. My next step is to boot Armbian on this board and install in on eMMC. AT first, I wrote an sdcard an pre-built Armbian Opi RK3399 (Armbian_20.08_Orangepi-rk3399_bionic_legacy_4.4.213_desktop), but when I try to boot from that, using the setenv devnum 1 and run mmc_boot, I got the error below. I'm kind of lost on what to look next for solution. I'll continue trying different things but any pointers or suggestions is appreciated. Thank you. U-Boot 2017.09-g17808ce (Aug 21 2020 - 13:03:33 -0300) Model: Rockchip RK3399 Evaluation Board PreSerial: 2 DRAM: 3.8 GiB Sysmem: init Relocation Offset is: f5be5000 Using default environment dwmmc@fe320000: 1, sdhci@fe330000: 0 Bootdev(atags): mmc 0 MMC0: HS400, 150Mhz PartType: EFI get part misc fail -1 boot mode: None Load FDT from boot part DTB: rk-kernel.dtb Android header version 0 Hotkey: ctrl+c I2c speed: 400000Hz PMIC: RK808 vdd_center 900000 uV vdd_cpu_l 900000 uV LDO_REG4 init 3000000 uV vdd_log 1000000 uV Warn: can't find connect driver Model: OrangePi RK3399 Rockchip UBOOT DRM driver version: v1.0.1 CLK: (uboot. arml: enter 816000 KHz, init 816000 KHz, kernel 0N/A) CLK: (uboot. armb: enter 24000 KHz, init 24000 KHz, kernel 0N/A) aplll 816000 KHz apllb 24000 KHz dpll 800000 KHz cpll 24000 KHz gpll 800000 KHz npll 600000 KHz vpll 24000 KHz aclk_perihp 133333 KHz hclk_perihp 66666 KHz pclk_perihp 33333 KHz aclk_perilp0 266666 KHz hclk_perilp0 88888 KHz pclk_perilp0 44444 KHz hclk_perilp1 100000 KHz pclk_perilp1 50000 KHz Net: eth0: ethernet@fe300000 Hit key to stop autoboot('CTRL+C'): 0 => <INTERRUPT> => <INTERRUPT> => <INTERRUPT> => setenv devnum 1 => run mmc_boot RKPARM: Invalid parameter part table switch to partitions #0, OK mmc1 is current device Scanning mmc 1:1... Found U-Boot script /boot/boot.scr 3185 bytes read in 19 ms (163.1 KiB/s) ## Executing script at 00500000 Boot script loaded from mmc 1 116 bytes read in 16 ms (6.8 KiB/s) "Synchronous Abort" handler, esr 0x96000010 * Relocate offset = 00000000f5be5000 * ELR(PC) = 000000000028abf0 * LR = 0000000000289104 * SP = 00000000e9dd74e0 * ESR_EL2 = 0000000096000010 EC[31:26] == 100101, Exception from a Data abort, from current exception level IL[25] == 1, 32-bit instruction trapped * DAIF = 00000000000003c0 D[9] == 1, DBG masked A[8] == 1, ABORT masked I[7] == 1, IRQ masked F[6] == 1, FIQ masked * SPSR_EL2 = 0000000080000349 D[9] == 1, DBG masked A[8] == 1, ABORT masked I[7] == 0, IRQ not masked F[6] == 1, FIQ masked M[4] == 0, Exception taken from AArch64 M[3:0] == 1001, EL2h * SCTLR_EL2 = 0000000030c51835 I[12] == 1, Icaches enabled C[2] == 1, Dcache enabled M[0] == 1, MMU enabled * HCR_EL2 = 000000000800003a * VBAR_EL2 = 00000000f5de5800 * TTBR0_EL2 = 00000000f7ff0000 x0 : 00000000e9e5d6d0 x1 : 0000000009000000 x2 : 0000000000000074 x3 : 0000000000000000 x4 : 0000000000000070 x5 : 000000000000000e x6 : 0000000000000000 x7 : 0000000000000000 x8 : 00000000e9e5d660 x9 : 0000000000000008 x10: 00000000e9e5d6e0 x11: 00000000e9de4190 x12: 0000000000000000 x13: 0000000000000200 x14: 0000000008300000 x15: 00000000ffffffff x16: 000000002ef72001 x17: 00000000b0a20028 x18: 00000000e9ddcd10 x19: 0000000000000000 x20: 0000000000000074 x21: 0000000009000000 x22: 00000000e9e5d6d0 x23: 00000000f5eae4d8 x24: 0000000000000000 x25: 00000000e9e5d5e8 x26: 000000000000000a x27: 0000000000000001 x28: 0000000000000000 x29: 00000000e9dd76d0 SP: e9dd74e0: 00000000 00000000 00000000 00000000 e9dd74f0: 00000000 00000000 f5e9dedc 00000000 e9dd7500: 00000000 00000000 00000000 00000000 e9dd7510: f5e9df23 00000000 f5e9df49 00000000 e9dd7520: f5e9df96 00000000 f5e9dfe3 00000000 e9dd7530: f5e9e023 00000000 f5e9e063 00000000 e9dd7540: f5e9e0a0 00000000 00000000 00000000 e9dd7550: 00000000 00000000 f5e9e0dd 00000000 e9dd7560: e9dd76d0 00000000 f5de5a0c 00000000 e9dd7570: 00000000 00000000 09000000 00000000 e9dd7580: f7ff0000 00000000 0800003a 00000000 e9dd7590: 30c51835 00000000 e9dd74e0 00000000 e9dd75a0: 80000349 00000000 f5de5800 00000000 e9dd75b0: 000003c0 00000000 96000010 00000000 e9dd75c0: f5e6fbf0 00000000 e9e5d6d0 00000000 e9dd75d0: 09000000 00000000 00000074 00000000 Call trace: PC: [< 0028abf0 >] LR: [< 00289104 >] Stack: [< 0028abf0 >] [< 00210c5c >] [< 00228854 >] [< 00213a0c >] [< 00213bac >] [< 002132f8 >] [< 002137c8 >] [< 00213684 >] [< 00213bac >] [< 002132b0 >] [< 00227d84 >] [< 00205ea0 >] [< 00205fa8 >] [< 00228854 >] [< 00213a0c >] [< 00213bac >] [< 002132f8 >] [< 002137c8 >] [< 00213bac >] [< 002132b0 >] [< 00227e34 >] [< 00228854 >] [< 00213a0c >] [< 00213684 >] [< 00213684 >] [< 00213bac >] [< 002132b0 >] [< 00227e34 >] [< 00228854 >] [< 00213a0c >] [< 00213684 >] [< 00213bac >] [< 002132b0 >] [< 00227e34 >] [< 00228854 >] [< 00213a0c >] [< 00213684 >] [< 00213684 >] [< 00213bac >] [< 002132b0 >] [< 00227e34 >] [< 00228854 >] [< 00213a0c >] [< 00213684 >] [< 00213bac >] [< 002132b0 >] [< 00227e34 >] [< 00228854 >] [< 00213a0c >] [< 00213bac >] [< 002140f0 >] [< 00227f2c >] [< 00211ca0 >] [< 002147e8 >] [< 002727b4 >] [< 00214974 >] [< 0020196c >] Copy above stack info to a file(eg. dump.txt), and execute command in your U-Boot project: ./scripts/stacktrace.sh dump.txt Resetting CPU ... DDR Version 1.22 20190506 In soft reset SRX Channel 0: DDR3, 800MHz Bus Width=32 Col=10 Bank=8 Row=16 CS=1 Die Bus-Width=16 Size=2048MB Channel 1: DDR3, 800MHz Bus Width=32 Col=10 Bank=8 Row=16 CS=1 Die Bus-Width=16 Size=2048MB 256B stride ch 0 ddrconfig = 0x101, ddrsize = 0x40 ch 1 ddrconfig = 0x101, ddrsize = 0x40 pmugrf_os_reg[2] = 0x32C172C1, stride = 0xD OUT Boot1: 2019-03-14, version: 1.19 CPUId = 0x0 ChipType = 0x10, 308 SdmmcInit=2 0 BootCapSize=100000 UserCapSize=14910MB FwPartOffset=2000 , 100000 mmc0:cmd5,20 SdmmcInit=0 0 BootCapSize=0 UserCapSize=29983MB FwPartOffset=2000 , 0 StorageInit ok = 65576 SecureMode = 0 SecureInit read PBA: 0x4 SecureInit read PBA: 0x404 SecureInit read PBA: 0x804 SecureInit read PBA: 0xc04 SecureInit read PBA: 0x1004 SecureInit read PBA: 0x1404 SecureInit read PBA: 0x1804 SecureInit read PBA: 0x1c04 SecureInit ret = 0, SecureMode = 0 atags_set_bootdev: ret:(0) GPT part: 0, name: uboot, start:0x6000, size:0x2000 GPT part: 1, name: trust, start:0x8000, size:0x2000 GPT part: 2, name: boot, start:0xc000, size:0x10000 GPT part: 3, name: rootfs, start:0x5c000, size:0x3a337df find part:uboot OK. first_lba:0x6000. find part:trust OK. first_lba:0x8000. LoadTrust Addr:0x8000 LoadTrust Addr:0x8400 LoadTrust Addr:0x8800 LoadTrust Addr:0x8c00 LoadTrust Addr:0x9000 LoadTrust Addr:0x9400 LoadTrust Addr:0x9800 LoadTrust Addr:0x9c00 Addr:0x8000 No find trust.img! LoadTrustBL error:-3 SecureMode = 0 SecureInit read PBA: 0x4 SecureInit read PBA: 0x404 SecureInit read PBA: 0x804 SecureInit read PBA: 0xc04 SecureInit read PBA: 0x1004 SecureInit read PBA: 0x1404 SecureInit read PBA: 0x1804 SecureInit read PBA: 0x1c04 SecureInit ret = -2, SecureMode = 0
  6. Hi @Werner Thanks for the reply. I also tried with a pre-built Armbian image. The serial log when booting with a Armbian flash sd-card is below. Any suggestion/idea of what might be wrong? Thank you. Channel 0: DDR3, 666MHz Bus Width=32 Col=10 Bank=8 Row=16 CS=1 Die Bus-Width=16 Size=2048MB Channel 1: DDR3, 666MHz Bus Width=32 Col=10 Bank=8 Row=16 CS=1 Die Bus-Width=16 Size=2048MB 256B stride ch 0 ddrconfig = 0x101, ddrsize = 0x40 ch 1 ddrconfig = 0x101, ddrsize = 0x40 pmugrf_os_reg[2] = 0x32C172C1, stride = 0xD OUT Boot1: 2016-07-29, version: 1.05 CPUId = 0x0 ChipType = 10 1838 SdmmcInit=2 0 BootCapSize=100000 UserCapSize=14910MB FwPartOffset=2000 , 100000 SdmmcInit=0 0 BootCapSize=0 UserCapSize=29983MB FwPartOffset=2000 , 0 StorageInit ok = 135062 LoadTrustBL No find bl30.bin No find bl32.bin theLoader 200000 219165 LoaderFlag2: 0x0 Unhandled Exception in EL3. x30 = 0xUnhandled Exception in EL3. x30 = 0xUnhandled Exception in EL3. x30 = 0xUnhandled Exception in EL3. x30 = 0xUnhandled Exception in EL3. x30 = 0xUnhandled Exception in EL3. x30 = 0xUnhandled Exception in EL3. x30 = 0xUnhandled Exception in EL3. x30 = 0xUnhandled Exception in EL3. x30 = 0xUnhandled Exception in EL3. x30 = 0xUnhandled Exception in EL3. x30 = 0xUnhandled Exception in EL3. x30 = 0xUnhandled Exception in EL3. x30 = 0xUnhandled Exception in EL3. x30 = 0xUnhandled Exception in EL3. x30 = 0xUnhandled Exception in EL3. x30 = 0xUnhandled Exception in EL3. x30 = 0xUnhandled Exception in EL3. x30 = 0xUnhandled Exception in EL3. x30 = 0xUnhandled Exception in EL3. x30 = 0xUnhandled Exception in EL3. x30 = 0xUnhandled Exception in EL3. ...
  7. Hello. Good day. I managed to installed Android on the OrangePi RK3399 using the Linux_Upgrade_tool (v 1.49), but, I'm struggling to get the board to boot back to Linux. I created an sdcard from the debian image from the OragenPi website, but, when I try to boot is with the sdcard insert, I get the messages below on the serial terminal. Removing the sdcard boots normally on Android (installed on emmc). Pressing spacebard doesn't do anything during boot. Also, trying to flash the Linux image via the Linux_Upgrade_tool doesn't work (always return a fail). Any ideas how to make this board boot back on Linux? Thank you. DDR Version 1.07 20161103 In Channel 0: DDR3, 666MHz Bus Width=32 Col=10 Bank=8 Row=16 CS=1 Die Bus-Width=16 Size=2048MB Channel 1: DDR3, 666MHz Bus Width=32 Col=10 Bank=8 Row=16 CS=1 Die Bus-Width=16 Size=2048MB 256B stride ch 0 ddrconfig = 0x101, ddrsize = 0x40 ch 1 ddrconfig = 0x101, ddrsize = 0x40 pmugrf_os_reg[2] = 0x32C172C1, stride = 0xD OUT Boot1: 2016-07-29, version: 1.05 CPUId = 0x0 ChipType = 10 1835 SdmmcInit=2 0 BootCapSize=100000 UserCapSize=14910MB FwPartOffset=2000 , 100000 SdmmcInit=0 0 BootCapSize=0 UserCapSize=29983MB FwPartOffset=2000 , 0 StorageInit ok = 97615 LoadTrustBL LoadTrustBL error:-1 LoadTrustBL No find bl30.bin No find bl32.bin theLoader 200000 116015 LoaderFlag2: 0x0 WARNING: plat_rockchip_comm_sram_init:code:ff8d9000, 67000, ef0 NOTICE: BL31: v1.2(debug):b995f80 NOTICE: BL31: Built : 16:53:56, Nov 7 2016 INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3 INFO: boot cpu mask: 0 INFO: Vesion: 2016.0.01 INFO: plat_rockchip_pmu_init(1211): pd status 3e INFO: BL31: Initializing runtime services INFO: BL31: Preparing for EL3 exit to normal world INFO: Entry point address = 0x200000 INFO: SPSR = 0x3c9 U-Boot 2014.10-RK3399-10 (Jul 23 2020 - 18:40:21) CPU: rk3399 CPU's clock information: aplll = 816000000HZ apllb = 24000000HZ gpll = 594000000HZ aclk_periph_h = 148500000HZ, hclk_periph_h = 74250000HZ, pclk_periph_h = 37125000HZ aclk_periph_l0 = 99000000HZ, hclk_periph_l0 = 99000000HZ, pclk_periph_l0 = 49500000HZ hclk_periph_l1 = 99000000HZ, pclk_periph_l1 = 49500000HZ cpll = 800000000HZ dpll = 660000000HZ vpll = 24000000HZ npll = 24000000HZ ppll = 676000000HZ Board: Rockchip platform Board Uboot as second level loader DRAM: Found dram banks: 1 Adding bank:0000000000200000(00000000ffe00000) 128 MiB SdmmcInit = 0 0 SDCard Update. storage init OK! Using default environment GetParam W: Invalid Parameter's tag (0x00000000)! Invalid parameter No pmic detect. SecureBootEn = 0, SecureBootLock = 0 #Boot ver: 0000-00-00#0.00 empty serial no. normal boot. no fuel gauge found no fuel gauge found read logo on state from dts [0] no fuel gauge found 'recovery' does not seem to be a partition nor an address Unable to boot:recovery try to start backup 'backup' does not seem to be a partition nor an address Unable to boot:backup try to start rockusb
  8. Hi Igor. Thanks for the reply. I'm sorry if the post gave an idea that I'm trying to exploit the effort here for a commercial project. That's far off from the real situation. The final goal is related to public education where I'm trying to see if it's possible to use something like the OrangePi + Armbian instead of the classic RaspPi. I've been helping on several Open source projects in the past years, mainly on support and translation, but, you're right, Iḿ new on the Armbian community and I'm trying to have a holistic approach on how the get the overall goal achieved. I spend the last 5 weeks or so trying to understand and compile and test all the information I got, and, there are several things that are not making sense yet. Maybe I should simplify the questions and break down the problem in smaller pieces, this will result in the more posts but maybe it will benefit more people. Believe me. I'm eager on engage and help this community here too, but, as most new members, need some help to know how things work and start putting the puzzle together so others can benefit from it too. Thank you.
  9. Hello Folks, good day. I have a project where I need to use a OrangePi 4B and couple of hardware pieces connected to it. I'm having trouble putting together a Linux image where I have, at least the minimum functions required for the project working. I need an image where these items below are enable/working: - SPI - I2C - GPIO - PWM - 10.1 MIPI DSI LCD + TOUCH (available here) - MIPI CSI Webcam (OV13850) - 3D Acceleration (WebGL / OpenGl) using the Mali t860 - Bluetooth - Wifi Ideally, I would like to use the most recent Focal mainline kernel, but a legacy image will also be fine. I've been spending a lot of time building and testing many different images, I tested all available on the OrangePi website and the ones pre built on the Armbian too. Some peripheral works on some images, some others not, etc. I also built several images myself but, up to the moment I was not able to make a single one with all the features above working. I'm looking for help from the experts here on suggestions/guidance on how to accomplish the task of having a single, (preferably updated) linux image working on this project. Appreciate the help. Thank you.
  10. Hello Folks, Good day. I hope you're doing great. I'm trying to make the OrangePI 10.1 inch MIPI DSI (product page) work on the most recent (mainline) Armbian build. Building the image using the OrangePI source repositories and following the instructions on OPi4B manual enables the LCD and touch, However, my intention is to make the LCD + Touch work on the most recent Armbian Focal (mainline). I've setup my Armbian build env but I cannot see to find how to enable this MIPI screen on any build options. Here's the instructions from Page #20 of OPi 4B manual: Download the Linux source code and make the following changes in dts --- a/arch/arm64/boot/dts/rockchip/rk3399-orangepi-lcd.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi-lcd.dtsi @@ -40,12 +40,12 @@ max-x = <800>; max-y = <1280>; tp-size = <101>; // <911> for 8 inch // <101> for 10 inch - status = "disable"; + status = "okay"; }; }; &dsi { - status = "disable"; + status = "okay"; panel@1 { compatible = "simple-panel-dsi"; reg = <0>; That specific file doesn't exist on the Armbian build directory tree. I'm not familiar enough with the dts and dtsi files to be integrating it. I've been searching the forum for answers but, so far, I'm not able to make it work. I'm looking for help on enable it and appreciate any pointers or guidance that can help make the LCD + Touch work on a mainline kernel version. I linked some dts files from the OrangePI source repository that "might" help. I'm thankful for any help. Thank you.