To elaborate a little more on rsb/i2c - twi legacy
The de-compiled legacy dtb uses the two wire interface.
twi@0x07081400 {
#address-cells = <0x01>;
#size-cells = <0x00>;
compatible = "allwinner,sun50i-twi";
device_type = "twi5";
reg = <0x00 0x7081400 0x00 0x400>;
interrupts = <0x00 0x69 0x04>;
clocks = <0x4a>;
clock-frequency = <0x30d40>;
pinctrl-names = "default\0sleep";
pinctrl-0 = <0x4b>;
pinctrl-1 = <0x4c>;
status = "okay";
no_suspend = <0x01>;
linux,phandle = <0x126>;
phandle = <0x126>;
pmu {
compatible = "x-powers,axp1530";
reg = <0x36>;
wakeup-source;
linux,phandle = <0x127>;
phandle = <0x127>;
standby_param {
vcc-dram = <0x04>;
linux,phandle = <0x128>;
phandle = <0x128>;
};
Also noted that mainline initially was i2c bus.
Subject: [PATCH v2 21/21] arm64: dts: allwinner: Add OrangePi Zero 2 .dts
Date: Fri, 11 Dec 2020 01:19:34 +0000
&r_i2c {
+ status = "okay";
+
+ axp305: pmic@36 {
+ compatible = "x-powers,axp305", "x-powers,axp805",
+ "x-powers,axp806";
+ reg = <0x36>;