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When SiFive introduced its Performance P550 64-bit RISC-V processor in 2021, we were told that Intel would use it in the Horse Creek platform with “leading-edge interface IP such as DDR and PCIe” and manufactured with Intel’s 7nm process. We now have more details about the Horse Creek platform, as a development board was showcased for the first time in public at the Intel Innovation 2022 Developer Conference, and according to a report by Wikichip, the Cortex-A75 class quad-core RISC-V processor runs at up to 2.2 GHz, supports DDR5-5600 memory and eight PCIe 5.0 lanes, and was taped out with Intel 4 process. Horse Creek platform specifications: CPU – SiFive P500 quad-core RISC-V processor @ up to 2.2 GHz with a 13-stage, 3-issue, out-of-order (OoO) pipeline, private L2 cache, and common L3 cache Memory – DDR5-5600 interface PCIe – PCIe Gen5 through Intel’s PCIe PHY with 8 lanes, Synopsys PCIe [...] The post Intel Horse Creek platform showcased with SiFive P550 RISC-V CPU, 8GB DDR5, PCIe Gen5 appeared first on CNX Software - Embedded Systems News. View the full article

Pine64 Ox64 is an upcoming single board computer powered by Bouffalo Lab BL808 dual-core 64-bit/32-bit RISC-V processor with up to 64MB embedded RAM, multiple radios for WiFi 4, Bluetooth 5.0, and 802.15.4 (Zigbee), as well as an AI accelerator. The board also features up to 16MB XSPI NOR flash, a MicroSD card socket, a USB 2.0 OTG port, a 2-lane MIPI CSI connector, and a 26-pin GPIO header for expansion. It measures just 51 x 21mm, or in other words if even small than a Raspberry Pi Zero 2 W. Pine64 Ox64 specifications: SoC – Bouffalo Lab BL808 with: CPU Alibaba T-head C906 64-bit RISC-V core @ 480MHz Alibaba T-head E907 32-bit RISC-V core @ 320MHz Memory – 64MB embedded DRAM AI accelerator – NPU BLAI-100 (Bouffalo Lab AI engine) for video/audio detection/recognition Wireless 2.4 GHz 802.11 b/g/n Wi-Fi 4 Bluetooth 5.x dual mode (classic + BLE) IEEE 802.15.4 for [...] The post Pine64 Ox64 SBC to feature BL808 64-bit/32-bit RISC-V multi-protocol WiSoC with 64MB built-in RAM appeared first on CNX Software - Embedded Systems News. View the full article

We’ve just written about an open-source hardware Allwinner V851S camera board from YuzukiHD, but he/she has made another interesting board with the YuzukiLOHCC PRO HDMI to USB 3.2 video acquisition board based on MacroSilicon MS2130 HDMI to USB chip, as well as MS9332 one-to-two active splitter, and MS8003/MS8005 microcontroller. YuzukiLOHCC PRO stands for Yuzuki Loop Out HDMI Capture Card PRO, and there are two HDMI ports, one for input and one for output, as well as a USB Type-C port to connect to the host and capture the video input. YuzukiLOHCC PRO key features and specifications: Main chip – MacroSilicon/UltraSemi MS2130 USB 3.2 Gen 1 high-definition video and audio acquisition chip MCU – MacroSilicon MS8005/MS8003 8051-core MCU Splitter – MacroSilicon MS9332 one-to-two active splitter Video Input – HDMI up to 4Kp30 or 1080p60 Video Output – HDMI 2.0 YCbCr420 4Kp60 loop out, 10/12/16-bit deep color, adaptive input equalization, pre-programmed HDCP [...] The post $10 HDMI to USB 3.2 video acquisition board is based on MS2130 chip appeared first on CNX Software - Embedded Systems News. View the full article

Description Similar like #4266. Wrap the remains as function. Now, we have the completely same file structation as armbian-next. The next thing to do may be renaming? IMPORTANT: When merging this, please use "Rebase and Merge", do not squash, thanks! How Has This Been Tested? [X] Build Checklist: [ ] My code follows the style guidelines of this project [ ] I have performed a self-review of my own code [ ] I have commented my code, particularly in hard-to-understand areas [ ] I have made corresponding changes to the documentation [ ] My changes generate no new warnings [ ] Any dependent changes have been merged and published in downstream modules View the full article

Description ssv6051p is found as cheap wifi/802.11n only on some older rk3328 boards; some community members asked for it and here it is. Also make some tidying up for device tree overlays for rk3318-box and updates kernel configurations for current and edge rockchip64 kernels. Driver is complied as module and should not be harmful for any other board. How Has This Been Tested? Please describe the tests that you ran to verify your changes. Please also note any relevant details for your test configuration. [x] Compiled deb packages for edge kernel and tested on live rk3318-box installation [x] Compiled deb packages for current kernel and tested on live rk3318-box installation Checklist: [x] My code follows the style guidelines of this project [x] I have performed a self-review of my own code [x] I have commented my code, particularly in hard-to-understand areas [x] I have made corresponding changes to the documentation [x] My changes generate no new warnings [x] Any dependent changes have been merged and published in downstream modules View the full article

Description Current kernel on rockchip64 does not compile because some realtek drivers want ipx.h kernel header. Add a patch (taken from sunxi-5.15) to put back ipx.h in place. How Has This Been Tested? [x] Built kernel deb packages Checklist: [x] My code follows the style guidelines of this project [x] I have performed a self-review of my own code [x] I have commented my code, particularly in hard-to-understand areas [x] I have made corresponding changes to the documentation [x] My changes generate no new warnings [x] Any dependent changes have been merged and published in downstream modules View the full article

odroidm1.wip: hk's legacy= 4.19 and edge= mainline+tobetter's 5.19 rebased; requires skip_spiboot=true @TODO: family/etc naming is hard with vendor kernels. Sorry. Let me know what you prefer? @TODO: config is very probably incomplete. new boot-rockchip64-vendor.cmd: does not use fixed load_addr, instead use ramdisk_addr_r for everything load kernel and initrd as late as possible look for overlays twice: once: with prefix and folder twice: without prefix, nor folder; helps with vendor provided overlays like hk's and tobetter's wip: edge: tobetter's patchset rebased against 5.19.3 wip: edge: bump to tobetter's 5.19 legacy: .config CONFIG_ARM64_VA_BITS_48=y wip m1: update legacy config from odroid odroidm1: container/bpf stuff in legacy config View the full article

Copied from #4255 by @hzyitc - added shellfmt and .editorconfig for consistency Description I notice that the first commit of armbian-next contains too many things (armbian-next: huge refactor, shellfmt, codesplit, logging/error handling). It's really hard to find out what changes we do, because we both split /lib/*.sh and change the code in one commit. It will loss the association between master and armbian-next. This PR is just split /lib/*.sh without changing any codes (except the first commit and the remove of source in /lib/main.sh). So users can find out where the codes come and then following the original commit log. If we want to merge armbian-next, this PR can make us more easily to find out the differentiation and review. If we don't merge armbian-next, this PR can let us have a more clearing structure. And it change nothing, so it still work well. Note: Please just Create a merge commit instand of Squash and merge. So the commit logs can be kept. View the full article

Olimex has just launched the ESP32-C3-DevKit-Lipo board based on ESP32-C3 RISC-V wireless microcontroller offering WiFI 4 and Bluetooth 5.0 connectivity, some I/Os, as well as USB and JTAG. As its name implies, the board can be powered by a LiPo battery and charged through a USB Type-C port. It offers up to 15 GPIO for expansion and comes with an ICSP connector in case you need to reflash or debug the bootloader through a JTAG interface. ESP32-C3-DevKit-Lipo specifications: Wireless module – Espressif Systems ESP32-C3-MINI-1-N4 module with: ESP32-C3 (ESP32-C3FN4) 32-bit RISC-V single-core processor up to 160 MHz with 4 MB embedded flash, 384 KB ROM, 400 KB SRAM (16 KB for cache), 8 KB SRAM in RTC Connectivity – 2.4 GHz 802.11b/g/n Wi-Fi 4 1T1R up to 150 Mbps & Bluetooth LE 5.0 with PCB antenna USB – 1x USB Type-C port for programming and JTAG debugging Expansion – 2x 9-pin [...] The post Olimex ESP32-C3-DevKit-Lipo is a tiny RISC-V board with WiFi 4, Bluetooth 5.0, and a LiPo battery charger appeared first on CNX Software - Embedded Systems News. View the full article

AAEON’s UP Bridge the Gap has announced the UP Element i12 Edge fanless embedded computer based on the Intel NUC 12 Compute Element and designed for the autonomous mobile robot (AMR) and industrial automation markets. The computer is fitted with NUC 12 Compute Element equipped with 12th generation Alder Lake hybrid processor from Celeron 7350 to Intel Core i7-1255U hybrid processor, supports up to 32GB LPDDR5 memory, NVMe support, offers three Ethernet ports including one 2.5GbE, several USB ports, two RS232/422/485 interfaces, a DIO header, and more. UP Element i12 Edge specifications: System-on-module – Intel NUC 12 Compute Element with: Alder Lake SoC (one or the other) Intel Core i7-1255U 10-core processor with 2x Performance cores @ up to 4.7 GHz, 8x Efficiency cores @ up to 3.5 GHz, Intel Iris Xe Graphics; PBP: 15W Intel Core i5-1235U 10-core processor with 2x Performance cores @ up to 4.4 GHz, 8x [...] The post UP Element i12 Edge embedded computer is equipped with Intel’s NUC 12 Compute Element appeared first on CNX Software - Embedded Systems News. View the full article

Description We need to read at store it at boot. Now this works. This is the reason why headers install doesn't work on many installations. Jira reference number AR-1060 AR-1363 How Has This Been Tested? [x] Manual script execution Checklist: [x] My code follows the style guidelines of this project [x] I have performed a self-review of my own code [x] I have commented my code, particularly in hard-to-understand areas [ ] I have made corresponding changes to the documentation [x] My changes generate no new warnings [x] Any dependent changes have been merged and published in downstream modules View the full article

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The release of Linux 6.0 earlier this week brought a significant milestone: the H.265/HEVC user-space API was mainlined, the result of more than two years of efforts by our engineering team. View the full article

Canonical has launched free Ubuntu Pro subscriptions for individuals and small companies for up to five machines, enabling anybody to get longer-term support and features that were only reserved to paying enterprise customers so far. Canonical provides Ubuntu for free with LTS versions released every two years and supported for 5 years. The latest Ubuntu 22.04 LTS was released in April 2022, meaning it will be supported until April 2027. But if you’d like to get 10-year support and extra security features you can now do it for free through an Ubuntu Pro subscription for up to 5 machines. Let’s compare the key differences between Ubuntu LTS and Ubuntu Pro first. You’ll get 10 years of support instead of 5 with Ubuntu Pro and as well as improved security. If you are upgrading to the latest LTS soon after it is out, the 10-year support may not be worth much [...] The post Ubuntu Pro becomes free for individuals and small companies appeared first on CNX Software - Embedded Systems News. View the full article

Allwinner V851S/V851SE is a single-core Arm Cortex-A7 SoC with a RISC-V core, an H.265/H.264 video encoder, and a 0.5 TOPS NPU designed for Smart IP cameras with support for features such as human detection and crossing alarms. Both processors ship with 64MB DDR2 memory, and feature USB, Ethernet, and SDIO interfaces, but the V851S is designed for systems with a display, while the V851SE targets traditional headless IP cameras. Both processors are pretty similar, but here are the key differences between Allwinner V851S: Networking – 10/100 Mbps Ethernet port with RMII interface GPIO – 6x ports (PA, PC, PD, PE, PF, PH) Display LCD Parallel RGB, Serial RGB, i8080, BT656 2-lane MIPI DSI SPI – 4x SPI and Allwinner V851SE: Networking – SIP 100 Mbps EPHY GPIO – 5x ports (PA, PC, PE, PF, PH) Display – Not supported SPI – 3x SPI That means the Allwinner V851S requires an [...] The post Allwinner V851S/V851SE low-cost camera SoC embeds 64MB DDR2, a 0.5 TOPS NPU appeared first on CNX Software - Embedded Systems News. View the full article

Description Maintenance. @The-going @Heisath View the full article

Seon Rozenblum, better known as Unexpected Maker, has launched upgrades to its ESP32-S2 boards such as the TinyS2 with ESP32-S3 variants, namely TinyS3, FeatherS3, and ProS3 boards. The new boards share the same form factors as the TinyS2, FeatherS2, and ProS2, but they get a more powerful dual-core microcontroller with AI instructions and 512kB SRAM. The microcontroller also adds Bluetooth 5.0 Low Energy (BLE) connectivity with Bluetooth Mesh support, instead of just WiFi 4 connectivity found in the earlier boards. TinyS3, FeatherS3, and ProS3 boards share the following features: SoC – Espressif Systems’ ESP32-S3 with Dual-core 32bit Xtensa LX7 microcontroller up to 240MHz RISC-V ULP Co-processor 512KB SRAM 2.4GHz Wifi 4 (802.11b/g/n) Bluetooth 5.0 BLE + Mesh Memory – 8MB QSPI PSRAM Flash – 8MB to 16MB depending on the model. USB – 1x USB Type-C connector with reverse back-feed protection for power and programming Antenna – 3D high gain [...] The post Unexpected Maker TinyS3, FeatherS3 and ProS3 boards feature ESP32-S3 dual-core wireless MCU appeared first on CNX Software - Embedded Systems News. View the full article

Description Reenable test builds for JetHub H1/D1/D1+ devices Jira reference number [AR-9999] View the full article

Description Add a link to the page, where anyone can book a meeting with us. Non commercial cooperation type and professional consultation. temporally removing link to subscriptions as its not finished yet. Jira reference number MAN-114 How Has This Been Tested? [x] We are using this internally for awhile. Checklist: [ ] My code follows the style guidelines of this project [ ] I have performed a self-review of my own code [ ] I have commented my code, particularly in hard-to-understand areas [ ] I have made corresponding changes to the documentation [ ] My changes generate no new warnings [ ] Any dependent changes have been merged and published in downstream modules View the full article

CoreData Global, a Singapore-based research and development firm, has just introduced the RelayFi 4-channel relay board based on ESP32 and compatible with Tasmota open-source firmware, as well as Espressif’s ESP RainMaker cloud and ESP-NOW networking API. RelayFi is fitted with an ESP32-WROOM-32D WiFi and Bluetooth module, four relays capable of handling a load of 250 VAC/7A or 30 VDC/10A, and EL817C Optoisolators for safety. The board also comes with CH340C USB to TTL chip for programming, an I2C header for expansion, and some jumpers for relay selection. RelayFi specifications: Wireless module – Espressif Systems’ ESP32-WROOM-32D module with ESP32 dual-core Tensilica microcontroller, 32Mbit SPI flash, Wi-Fi 802.11 b/g/n up to 150 Mbps, Bluetooth 4.2 LE, and PCB antenna Relays 4x relays up to 250VAC/7A or 30VDC/10A 4x EL817C optocouplers for safety 4x relay status LEDs Screw terminals Relay selection jumper USB – 1x micro USB port for power and programming via [...] The post RelayFi – A Tastoma compatible 4-channel relay board (Crowdfunding) appeared first on CNX Software - Embedded Systems News. View the full article

Renesas has launched the RZ/V2MA dual-core Arm Cortex-A53 microprocessor with a low-power (1TOPS/W) DRP-AI accelerator and one OpenCV accelerator for rule-based image processing enabling vision AI applications. The MPU also supports H.265 and H.264 video decoding and encoding, offers LPDDR4 memory and eMMC flash interfaces, as well as Gigabit Ethernet, a USB 3.1 interface, PCIe Gen 2, and more. The RZ/V2MA microprocessor targets applications ranging from AI-equipped gateways to video servers, security gates, POS terminals, and robotic arms. Renesas RZ/V2MA specifications: CPU – 2x Arm Cortex-A53 up to 1.0GHz Memory – 32-bit LPDDR4-3200 Storage – 1x eMMC 4.5.1 flash interface Vision and Artificial Intelligence accelerator DRP-AI at 1.0 TOPS/W class OpenCV Accelerator (DRP) Video H.265/H.264 Multi Codec Encoding: h.265 up to 2160p, h.264 up to 1080p Decoding: h.265 up to 2160p, h.264 up to 1080p Networking – 1x Gigabit Ethernet USB – 1x USB 3.1 Gen1 host/peripheral up to 5 [...] The post Renesas RZ/V2MA microprocessor embeds AI & OpenCV accelerators for image processing appeared first on CNX Software - Embedded Systems News. View the full article

There are already Python editors such as Thonny, but the BBC thought those were not good enough and released a new web-based Python editor specifically designed for the micro:bit education board targeting 11 to 14 years old pupils. The micro:bit Python editor includes drag and drop code examples, code structure & error highlighting, auto-complete feature, a simulator to test the code before uploading it to the micro:bit board, and a Quick ideas section to help pupils get started with projects. The BBC’s micro:bit Python editor works with both the micro:bit V1 and V2, but note the simulator shows a micro:bit V2, so if you are using the previous generation micro:bit, some code may work on the simulator but not on your micro:bit V2 board. For that reason, the BBC marked the code that only works on a micro:bit V2 with ‘V2’ in the Reference section. While the BCC is a [...] The post The BBC has released a new web-based Python editor for the micro:bit board appeared first on CNX Software - Embedded Systems News. View the full article

Description Minor fixes to led-conf6, default phase shifting for emmc controller se to 90° instead of 180° that was causing some eMCP to be not detected even in high-speed mode How Has This Been Tested? Quick check directly on a live installation Checklist: [x] My code follows the style guidelines of this project [x] I have performed a self-review of my own code [x] I have commented my code, particularly in hard-to-understand areas [x] I have made corresponding changes to the documentation [x] My changes generate no new warnings [x] Any dependent changes have been merged and published in downstream modules View the full article

Say hello to a brand new, open-source Vulkan driver for NVIDIA hardware in Mesa, written almost entirely from scratch using the new official headers from NVIDIA. View the full article

The ROMA RISC-V laptop was announced this summer with an unnamed RISC-V processor with GPU and NPU. We now know it will be the Alibaba T-Head TH1520 quad-core Xuantie C910 processor clocked at up to 2.5GHz with a 4 TOPS NPU, and support for 64-bit DDR at up 4266 MT. The TH1520 is born out of the Wujian 600 platform unveiled by Alibaba in August 2022, and is capable of running desktop-level applications such as Firefox browser and LibreOffice office suite on OpenAnolis open-source Linux-based operating system launched by Alibaba in 2020. So that means we now have a better idea of the specifications of the ROMA RISC-V developer laptop: SoC – Alibaba T-Head quad-core RISC-V Xuantie C910 processor @ 2.5 GHz, unnamed Imagination GPU for graphics, 4 TOPS NPU for AI System Memory – Up to 16GB LPDDR4/LPDDR4X RAM Storage – Up to 256GB eMMC flash Display – 14.1-inch [...] The post Alibaba T-Head TH1520 RISC-V processor to power the ROMA laptop appeared first on CNX Software - Embedded Systems News. View the full article