rosario

You mean rebuild u-boot or modify script.bin (disabling mmc1 with "sdc_used=0") ? I can do last one. If I need to modify u-boot I don't know how to do it.

I attached my new 2.5" ssd disk. All worked fine. I run nand-sata-install script to move root on ssd. All goes fine. Now I have my OPI PLUS2 with boot on SD Card and root on my ssd disk. Just one question. Now emmc seems definively damaged can I unconfigure it. I don't know if kernel is trying to use it in any way. OPI seems not so fast. May be kernel try to discover emmc slowing OS (because it's damaged) ?

Hi, yesterday I powered off board for all the night. This morning I powerd on it and, again, no emmc is visible. At this point I think emmc is completely damaged and I proceed to use only SD. I bought a new 2.5" SSD disk and would like to try it on my OPI. I'll inform you on the results.

yes, board was unpowerd for about 3 days. 2 days ago I powered it again to apply release 5.20. So I have to break nand-sata-install script(it's still runing. now is 50%)?

I also configured script.bin with: [mmc0_para] sdc_used = 1 sdc_detmode = 1 sdc_buswidth = 4 ... [mmc1_para] sdc_used = 1 sdc_detmode = 4 sdc_buswidth = 4 ... [mmc2_para] sdc_used = 1 sdc_detmode = 1 sdc_buswidth = 8

After that nand-sata-install script detected emmc and now is running. The emmc is returning lots of errors so I suppose there are bad blocks on it. [90788.195587] end_request: I/O error, dev mmcblk1, sector 0 [90788.195653] Dev mmcblk1: unable to read RDB block 0 [90788.195796] mmcblk1: error -123 sending status command, retrying [90788.195823] mmcblk1: error -123 sending status command, retrying [90788.195847] mmcblk1: error -123 sending status command, aborting [90788.195871] end_request: I/O error, dev mmcblk1, sector 0 [90788.196031] mmcblk1: error -123 sending status command, retrying [90788.196058] mmcblk1: error -123 sending status command, retrying [90788.196082] mmcblk1: error -123 sending status command, aborting [90788.196106] end_request: I/O error, dev mmcblk1, sector 0 [90788.196301] mmcblk1: error -123 sending status command, retrying [90788.196328] mmcblk1: error -123 sending status command, retrying [90788.196364] mmcblk1: error -123 sending status command, aborting [90788.196400] end_request: I/O error, dev mmcblk1, sector 24 [90788.196607] mmcblk1: error -123 sending status command, retrying [90788.196637] mmcblk1: error -123 sending status command, retrying [90788.196661] mmcblk1: error -123 sending status command, aborting [90788.196696] end_request: I/O error, dev mmcblk1, sector 24 [90788.196930] mmcblk1: error -123 sending status command, retrying [90788.196957] mmcblk1: error -123 sending status command, retrying [90788.196986] mmcblk1: error -123 sending status command, aborting [90788.197020] end_request: I/O error, dev mmcblk1, sector 0 [90788.197269] mmcblk1: error -123 sending status command, retrying [90788.197306] mmcblk1: error -123 sending status command, retrying [90788.197340] mmcblk1: error -123 sending status command, aborting [90788.197372] end_request: I/O error, dev mmcblk1, sector 0 [90788.197451] mmcblk1: unable to read partition table [90788.208707] mmcblk1: error -123 sending status command, retrying [90788.208740] mmcblk1: error -123 sending status command, retrying [90788.208764] mmcblk1: error -123 sending status command, aborting [90788.208793] end_request: I/O error, dev mmcblk1, sector 30535552 [90788.208984] mmcblk1: error -123 sending status command, retrying [90788.209012] mmcblk1: error -123 sending status command, retrying [90788.209036] mmcblk1: error -123 sending status command, aborting [90788.209061] end_request: I/O error, dev mmcblk1, sector 30535552 nand-sata-install is running very slow.

few minutes ago appeared emmc device. I don't know what to think about it. I just left OPI board running alone and today, after last login I checked block devices with command lsblock and magically mmcblck1 was present. Those are last command: cat misc cat ioports cat filesystems modprobe btrfs lsmod root@orangepiplus:~# lsblk NAME MAJ:MIN RM SIZE RO TYPE MOUNTPOINT mmcblk1boot0 179:32 0 4M 1 disk mmcblk1boot1 179:48 0 4M 1 disk mmcblk0 179:0 0 57,7G 0 disk └─mmcblk0p1 179:1 0 57,7G 0 part / mmcblk1 179:16 0 14,6G 0 disk on dmesg I can see; [ 37.996764] ADDRCONF(NETDEV_UP): wlan0: link is not ready [73340.245054] [mmc]: mmc 2 detect change, present 1 [73340.740109] [mmc]: sdc2 set ios: clk 0Hz bm PP pm UP vdd 3.3V width 1 timing LEGACY(SDR12) dt B [73340.741680] [mmc]: sdc2 power_supply is null [73340.760086] [mmc]: sdc2 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B [73340.783333] [mmc]: sdc2 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B [73340.785946] [mmc]: sdc2 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B [73340.799319] [mmc]: sdc2 set ios: clk 400000Hz bm OD pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B [73340.799877] [mmc]: sdc2 set ios: clk 400000Hz bm OD pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B [73340.800163] [mmc]: sdc2 set ios: clk 400000Hz bm OD pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B [73340.800362] [mmc]: sdc2 set ios: clk 400000Hz bm OD pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B [73340.802971] [mmc]: sdc2 set ios: clk 400000Hz bm OD pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B [73340.821345] [mmc]: sdc2 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B [73340.833523] [mmc]: sdc2 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B [73340.834079] [mmc]: sdc2 set ios: clk 25000000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B [73340.834434] [mmc]: sdc2 set ios: clk 25000000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B [73340.834665] [mmc]: sdc2 set ios: clk 25000000Hz bm PP pm ON vdd 3.3V width 1 timing MMC-HS(SDR20) dt B [73340.834833] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 1 timing MMC-HS(SDR20) dt B [73340.835067] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 1 timing MMC-HS(SDR20) dt B [73340.835295] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing MMC-HS(SDR20) dt B [73340.835595] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing MMC-HS(SDR20) dt B [73340.835805] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.835973] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.836177] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.836393] mmc2: new high speed DDR MMC card at address 0001 [73340.837247] mmcblk1: mmc2:0001 AGND3R 14.5 GiB [73340.837517] mmcblk1boot0: mmc2:0001 AGND3R partition 1 4.00 MiB [73340.837844] mmcblk1boot1: mmc2:0001 AGND3R partition 2 4.00 MiB [73340.839932] mmcblk1: p1 p2 [73340.847645] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.851341] mmcblk1boot1: unknown partition table [73340.853286] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.854891] mmcblk1boot0: unknown partition table [73340.855018] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.855450] mmcblk mmc2:0001: Card claimed for testing. [73340.855483] mmc2:0001: AGND3R 14.5 GiB [73340.856103] *******************mmc init ok ******************* [73340.908074] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.908723] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.909068] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.909385] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.909685] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.909973] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.910786] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.911845] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.912326] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.913194] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.913608] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.913911] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.914234] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.914666] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.914980] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.915298] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.915615] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.915933] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.916250] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.917343] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.917854] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.919231] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.919597] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.921680] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.922120] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.922458] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.922781] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.923092] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.923403] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.923713] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.924026] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.924331] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.924635] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.924940] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.925243] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.925554] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.925874] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.926229] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.926555] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.926860] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.927168] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.927472] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.927782] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.928117] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.928432] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.928783] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.929082] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.929392] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.929706] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.929990] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.930393] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.930747] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.931073] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.931678] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.941253] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.941738] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.942172] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.942736] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.943606] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.943991] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.944786] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.945178] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.946025] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.946537] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.947471] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73340.947966] [mmc]: sdc2 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 8 timing UHS-DDR50 dt B [73341.027365] device label emmclinux devid 1 transid 17 /dev/mmcblk1p2 [73463.845042] [mmc]: mmc 2 detect change, present 0

I agree with you. fs is used later but I mentioned just because was last thing I did. I'm looking on some command to check hw integrity. I suppose emmc was damaged so I would like to run some check but I don't know how to do it or how to run a max debug level POST. I'll try to reinstall uboot

I increased voltages but still doesn't work. Just one more info. Last time I intalled OS on emmc I used btrfs. May be is this the problem? Those are my new values: [dvfs_table] pmuic_type = 2 pmu_gpio0 = port:PL06<1><1><2><1> pmu_level0 = 11300 pmu_level1 = 576 extremity_freq = 1296000000 max_freq = 1200000000 min_freq = 480000000 LV_count = 7 LV1_freq = 1296000000 LV1_volt = 1360 LV2_freq = 1200000000 LV2_volt = 1280 LV3_freq = 1104000000 LV3_volt = 1220 LV4_freq = 1008000000 LV4_volt = 1180 LV5_freq = 960000000 LV5_volt = 1120 LV6_freq = 816000000 LV6_volt = 1060 LV7_freq = 480000000 LV7_volt = 1020

I can add another log. When I connect UART cable for serial console I see this lines during POST: In UART log I've seen following lines: [mmc]: mmc driver ver 2014-12-10 21:20:39 [mmc]: ***Try SD card 2*** [mmc]: mmc 2 cmd 8 err 00000100 [mmc]: mmc 2 cmd 8 err 00000100 [mmc]: mmc 2 send if cond failed [mmc]: mmc 2 cmd 55 err 00000100 [mmc]: mmc 2 cmd 55 err 00000100 [mmc]: mmc 2 send app cmd failed [mmc]: ***Try MMC card 2*** [mmc]: 8bit ddr!!! [mmc]: MMC ver 5.0 [mmc]: SD/MMC Card: 8bit, capacity: 14910MB [mmc]: vendor: Man 00150100 Snr 01cd4ab8 [mmc]: product: AGND3 [mmc]: revision: 5.2 [mmc]: ***SD/MMC 2 init OK!!!** As you can see emmc is probed (SD/MMC Card: 8bit, capacity:14910MB) like SD card but when kernel cames up it configure only SD.

And this is armbianmonitor output: root@orangepiplus:~# armbianmonitor -u /var/log/armhwinfo.log has been uploaded to http://sprunge.us/ATDM Please post the URL in the Armbian forum where you've been asked for. root@orangepiplus:~#

here you are: root@orangepiplus:~# dpkg -l | egrep "armbian| linux-" ii armbian-hostapd 5.14 armhf Patched hostapd ii armbian-tools 5.14 armhf Armbian tools, sunxi, temper ii linux-firmware-image-sun8i 5.20 armhf Linux kernel firmware, version 3.4.112-sun8i ii linux-headers-sun8i 5.20 armhf Linux kernel headers for 3.4.112-sun8i on armhf ii linux-image-sun8i 5.20 armhf Linux kernel, version 3.4.112-sun8i ii linux-jessie-root-orangepiplus 5.20 armhf Armbian tweaks for jessie on orangepiplus (default branch) ii linux-libc-dev:armhf 3.16.36-1+deb8u1 armhf Linux support headers for userspace development ii linux-u-boot-orangepiplus-default 5.20 armhf Uboot loader 2016.09

This is what I receive when I run nand-sata-install script. -------------------------- root@orangepiplus:~# ls /dev/mmcblk0 mmcblk0 mmcblk0p1 root@orangepiplus:~# ls /dev/mmcblk* /dev/mmcblk0 /dev/mmcblk0p1 root@orangepiplus:~# ls /dev/n root@orangepiplus:~# nand-sata-install Armbian for Orange Pi+ install script, http://www.armbian.com| Author: Igor Pecovnik qqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqq lqqqqNAND, eMMC, SATA and USB Armbian installer v5.20qqqqqqk x x x There are no targets. Please check your drives. x x x mqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqj root@orangepiplus:~#

Hi, I upgraded my OPI PLUS2 to new 5.20. no change for the problem. The kernel doesn't see any nand device (should be 16GB in size). I looked for /dev/mmcblk1 o /dev/nand and they doesn't exists. From dmesg I can see: ..... [ 0.843290] calibrat: max_cpufreq 1200Mhz Type 0! [ 0.843614] [mmc]: SD/MMC/SDIO Host Controller Driver(v1.111 2015-4-13 15:24) Compiled in Sep 14 2016 at 20:28:08 [ 0.843651] [mmc]: get mmc0's sdc_power is null! [ 0.843681] [mmc]: get mmc1's sdc_power is null! [ 0.843691] [mmc]: get mmc1's 2xmode ok, val = 1 [ 0.843700] [mmc]: get mmc1's ddrmode ok, val = 1 [ 0.843716] [mmc]: get mmc2's IO(sdc_cd) failed [ 0.843738] [mmc]: get mmc2's sdc_power is null! [ 0.843747] [mmc]: get mmc2's 2xmode ok, val = 1 [ 0.843756] [mmc]: get mmc2's ddrmode ok, val = 1 [ 0.843769] [mmc]: MMC host used card: 0x7, boot card: 0x1, io_card 2 [ 0.844805] [mmc]: sdc0 set ios: clk 0Hz bm OD pm OFF vdd 3.3V width 1 timing LEGACY(SDR12) dt B [ 0.845917] [mmc]: sdc0 set ios: clk 0Hz bm PP pm UP vdd 3.3V width 1 timing LEGACY(SDR12) dt B [ 0.846503] [mmc]: sdc1 set ios: clk 0Hz bm OD pm OFF vdd 3.3V width 1 timing LEGACY(SDR12) dt B [ 0.847458] [mmc]: sdc0 power_supply is null [ 0.849827] [mmc]: sdc2 set ios: clk 0Hz bm OD pm OFF vdd 3.3V width 1 timing LEGACY(SDR12) dt B ...... I suppose emmc should be the mmc2 device. I notice this error with a failed message. Another thing. When I shutdown system I get a panic (the problem exists also in previous release). After some messages which say system is going down I see "Reached shutdown state" (or something like that) and cpu goes in panic (seems on something related to emmc) and reboot. No way to shutdown system. It always goes on reboot. So, how can I check emmc integrity? there is a way to check if it is broken? Thanks in advance Rosario

Ok. So, if I understood, I wait next armbian release which contains a new uboot. I'll upgade my system and after that I should be able to see correctly emmc. Am I right?