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About Maeur1

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  1. Aha I see, well I guess it might pay to open a new topic to discuss that then, as my problem for this one was just to get the SPI working in the first place. Sorry I can't help, but there are others in the forum who can!
  2. Looking at the Waveshare SPI LCD ( it looks like it runs off the default SPI bus that the raspberry pi runs off. Are you sure you have plugged it in so that the screen hangs off the side of the orangepi zero? Cause the connect is flipped compared with the raspberry pi, but its pin identical.
  3. Hey there! I have looked over the schematic, and you are right! it is super weird, cause it says at the top that PA10 is NC, but then in the schematic it says its connected to pin 26 of the GPIO. Is there any reason you need another Cable Enable (CE)? Would it not be possible to control that pin through GPIO control instead?
  4. Hey! You dont need the file that was at that link anymore as the github pull request was merged into the main development line. So if you download the latest version of armbian, it should already work out of the box!
  5. Well after using your script.bin, it seems to have the other SPI line in it (spidev1.0 and spidev0.0)! But I need to test whether it is working, so I shall try out both the NOR flash SPI and also the GPIO SPI once I get home. Thanks for that help EDIT: After getting home, and testing, both SPI lanes are working perfectly now! Thanks a bunch
  6. Building today, I shall report back at the end of the day after work.
  7. Hey there So I was planning on using the OPZero on a robot that I had already made, which took use of SPIdev, and it was doing calls to the spidev driver in C. Now I noticed that the OPZero has 2 SPI channels, one for the NOR flash (Which isnt populated) on the back and another that goes to the GPIO headers on the device. Now I ran my script, and turns out that /dev/spidev0.0 is actually writing SPI commands to the rear SPI channel. This is apparenly SPI0 according to the schematics. Now following the schematics again, I want to access SPI1, which currently does not exist as a