PaddleStroke

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Everything posted by PaddleStroke

  1. What is the difference between TCON, framebuffer, pipeline, front end, display ? I found that it seems that linux framebuffers have been replaced by DRM on mainline. But can't find much information about this. https://www.kernel.org/doc/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt Anyone familiar with framebuffers/display/... can give me the big picture on how this is organized ?
  2. After few reboots the value of battery voltage get reset to 0xc9 afterall... So something must be changing it while booting up.
  3. Great, have been trying to do my own scrip to read/write directly reg values with i2C. But changing parameters with i2Cset are overwriten after reboot, probably by the current driver... are those the current driver and armbian patch of it? https://github.com/armbian/build/blob/master/patch/kernel/sunxi-next/general-axp20x-sysfs-interface.patch https://github.com/torvalds/linux/blob/master/drivers/mfd/axp20x.c https://github.com/torvalds/linux/blob/master/include/linux/mfd/axp20x.h https://github.com/torvalds/linux/blob/master/drivers/input/misc/axp20x-pek.c https://github.com/torvalds/linux/blob/master/drivers/mfd/axp20x-i2c.c Or this one maybe who knows https://github.com/QSchulz/linux/commit/aa13f8990a2482e951f72d5c70c2f4cedf2684c6#diff-dfdc0dfa3d0d84a7e9a84c9baa75b869 My goal is to changes settings to : # - set the battery as 4.36V instead of 4.2V # - Remove boot when AC plugged in. # - Set GPIO as ADC Edit : Changing battery to 4.36V worked afterall. I was using i2cset from desktop on a command windows. That may be the reason it was not registering. However other register keep getting reseted... i2cset -y -f 0 0x34 0x33 0xE9 to set 4.36V works ok. i2cset -y -f 0 0x34 0x83 0x8C To enable GPIO ADC is ok. i2cset -y -f 0 0x34 0x90 0x04 i2cset -y -f 0 0x34 0x92 0x04 Those two should set the GPIO 0 and 1 functions as ADC. Those don't work they keep reseting to 0x02... About remooving auto-boot when AC plugged in, some one suggested on olimex forum to change bit6 of reg40h to 0. But strangely the reg40 reads 0x00 instead of normal default value of 0xD8...
  4. Is anyone know how to set HDMI and LCD simultaneously on mainline kernel? We use a 3.5" LCD for which we made a patch (see enclosed). Now I'd like to have both HDMI and LCD showing the same framebuffer. Currently HDMI is only showing the console while signal is OK on LCD. Any hint would be appreciated. u-boot-sunxi-next.patch kernel-sunxi-next.patch
  5. Hey guys, It seems that some graphics card (probably the one integrated in the a20 processor) are able to manage multiple memory buffer and thus several layers for one display. Is it possible to declare two framebuffers for the main display: like fb0 - layer1 / fb1 - layer2 with alpha channel? So it would be easier to implement overlay display for information about the battery or the brightness level of the screen.
  6. There are several topics about AXP209 driver: Where @zador.blood.stained you say : Are you talking about this patch ? (Which is the one from your github? https://github.com/zador-blood-stained/axp209-sysfs-interface ) If so this patch is deprecated right? If yes then where are the proper drivers you are talking about and how to use them to get current battery voltage, capacity%...? Thanks
  7. Bananapi boards are using AP6212 wifi+bt module. Maybe it's easier to use this module as it seem it already works on armbian. In your experience, is this module working correctly? Thanks!
  8. hey guys, Using legacy kernel I have trouble having dual output on LCD and HDMI. I tried to have a cloned dual output (same framebuffer for both) : [disp_init] disp_init_enable = 1 disp_mode = 4 screen0_output_type = 1 screen0_output_mode = 6 screen1_output_type = 3 screen1_output_mode = 4 fb0_width = 0 fb0_height = 0 fb0_framebuffer_num = 2 fb0_format = 10 fb0_pixel_sequence = 0 fb0_scaler_mode_enable = 0 fb1_width = 1024 fb1_height = 600 fb1_framebuffer_num = 2 fb1_format = 10 fb1_pixel_sequence = 0 fb1_scaler_mode_enable = 0 ... Also tried with 2 framebuffers : [disp_init] disp_init_enable = 1 disp_mode = 2 screen0_output_type = 1 screen0_output_mode = 6 screen1_output_type = 3 screen1_output_mode = 4 fb0_width = 0 fb0_height = 0 fb0_framebuffer_num = 2 fb0_format = 10 fb0_pixel_sequence = 0 fb0_scaler_mode_enable = 0 fb1_width = 0 fb1_height = 0 fb1_framebuffer_num = 2 fb1_format = 10 fb1_pixel_sequence = 0 fb1_scaler_mode_enable = 0 ... On both case when booting the signal is first on HDMI until kernel starts. Then the signal goes to LCD and HDMI turns off. Any hint? Full fex below :
  9. Hey guys, What is in your opinion the best solution to add WIFI/BT capability to a A20 board? Currently I tried to add ESP8266 connected with SDIO. (without much success so far). Then in order to add BT too I am thinking about ESP32 (with ESP-WROOM-32 module). Do you know if there are references of using this ESP32 solution to provide wifi and bt to a allwinner board/armbian ? Also this module have a lot of different interfaces available, which should be prefered? Or alternatively, do you know other armbian supported solution for wifi/bt? Best would be a solution that does not use USB ports as I need them. Thanks!
  10. Hey guys, Using a A20 board with AXP209, using mainline, I am trying to add a battery indicator as an overlay on video signal so that user can see remaining battery %. Something similar to smartphone battery indicator. Any idea how to do this? This shows how to get battery % but how to add an overlay? This sounds like something that probably have already been done. Do you know any existing reference ?
  11. Hi Tido, Thanks for your feedback. Finally the FJ035CI54-R40 could work on legacy. Without even timing values. So it seems timing values are not critical to get picture... The error was probably somewhere else, I still need to do some test to find out more precisely. Here's the fex that works with legacy and FJ035CI54-R40 for reference.
  12. Hey guys, Some questions about LCD interfacing. I have a A20 board and 2 LCD, one 640*480 3.5" (FJ035CI54-R40), one 320*240 3.5" (LQ035NC111, same as bananapi LCD). Both LCD have the same pinout, formfactor and ribbon so should be hardware compatible. 1 - LQ035NC111 I could get the LQ035NC111 to work on legacy kernel with the following script.fex (for reference) But can't get it to work with mainline. With mainline I get a white rectangle flashing on the left side of the screen. Interestingly I can reproduce the exact same bug with legacy by changing all the pin configurations from : lcdd0 = port:PD00<2><0><3><default> lcdd1... to lcdd0 = port:PD00<2><0><default><default> lcdd1... Looking at fex guide I see that the third parameter is "<drive capability> defines the output drive in mA, values are 0-3 corresponding to 10mA, 20mA, 30mA and 40mA." As the visual issue is exactly the same on mainline I guess the problem must come from this but I can't figure out how to change this drive capability in mainline. Any guess? 2 - FJ035CI54-R40 So for this LCD I can't get over a black screen (Backlight is working). The tricky part is that the datasheet (enclosed) is not clear for me. Also supplier gave me additional data which seem different than datasheet. #define HT 680 //Horizontal total period = (HT + 1) pixels #define HPS 2 //Horizontal Sync Pulse Start Position = (HPS + 1) pixels #define LPS 20 //Horizontal Display Period Start Position = LPS pixels #define HPW 20 //Horizontal Sync Pulse Width = (HPW + 1) pixels #define VT 550 //Vertical Total = (VT + 1) lines #define VPS 2 //Vertical Sync Pulse Start Position = VPS lines #define FPS 6 //Vertical Display Period Start Position = FPS lines #define VPW 12 //Vertical Sync Pulse Width = (VPW + 1) lines #define HSPW 2 #define HBPD 20 #define HFPD 20 #define VSPW 2 #define VBPD 6 #define VFPD 12 //DCLK=20MHZ On page 6 of datasheet the timing data looks different, but it may just be a misunderstanding from me. For instance datasheet say PCLK = 63.61MHz, but the file above say DCLK = 20MHZ (even if commented out). Do you know what is the difference between PCLK and DLCK? (The inconsistancy between LCD datasheets parameter names and symbols is killing me.) Also the datasheet say "The RGB only support the DE mode: HSYNC,VSYNC,DCLK and DE pin ." It seems from fex guide that mode can be set by "lcd_if" value. However there is no DE mode. Only : So I am unsure what to select. I can't find much documentation about those modes on internet. Also I can't understand what is this and how it should be set : "lcd_io_cfg0 = 268435456" I made several attemps with either datasheet or above code timing values but without luck so far. Only a black screen. Anyone has some experience with LCD interfacing on armbian could help me writing this fex? It would really really really be appreciated. Above is my last attempt of fex : FJ035CI54-R40.pdf
  13. Hi there, I am trying to download the lime2 legacy image : https://www.armbian.com/olimex-lime-2/#kernels-archive But the link is dead (error 404). Any chance to get this back up? Or can I use another legacy image and just change the script.bin or is there other things to modify? Thanks Edit : I just found the image on olimex website : ftp://staging.olimex.com/Allwinner_Images/A20-OLinuXino/2.legacy_images_kernel_3.4.x/
  14. Thanks for feedback! In chinese, do you mean that those commands are hardware coded in the allwinner chip? It's not something that is coded in armbian? I can handle chinese documentation if you have any. Or if you confirm allwinner could help I'll ask them, but I am not sure what to ask them right now as I thought it was a armbian feature.
  15. Thanks for feedback, anyway I found a way to hardware rotate LCD now. It was just for curiosity. What about the dispdbg commands? Do you know where I can find documentation about that? Or the source code of these commands? Any idea how to disable disp1 and enable disp0 ? I think perhaps it's not working because the switch command only changes the screen_output_type and mode but is not actually enabling/disabling screen0/screen1 I tried to enable both disp in my script.bin with : [disp_init] disp_init_enable = 1 disp_mode = 2 # dual head screen0_output_type = 0 # 0 should be NONE screen0_output_mode = 5 screen1_output_type = 2 screen1_output_mode = 14 But then I have not any signal on either screen. Maybe disp_mode= 4 (clone(screen0, screen1, fb0) (2 screens, one standard framebuffer) ) would work? Also I am not sure how to enable HDMI after disable TV (as I don't have screen anymore...). So I tried to make a bash file but not sure the syntax is correct. Can you tell me if something is wrong in the syntax? #!/bin/bash cd /sys/kernel/debug/dispdbg/ echo "switch" > command echo "disp1" > name echo "0 14" > param echo "1" > start sleep 2 cd /sys/kernel/debug/dispdbg/ echo "switch" > command echo "disp0" > name echo "4 5" > param echo "1" > start
  16. on another topic, I found this about LCD rotation : http://linux-sunxi.org/Display Can someone explain me what it means "supply" a kernel parameter and how to do it? Also I tried to echo on a booted device. sudo su cd /sys/class/graphics/fbcon echo "2" > rotate But nothing happenned, no error message. I am missing something? I am not sure to understand differences between sunxi-linux and armbian and how they interact...
  17. Ok after few tests : Currently my script.bin is as follow : [disp_init] disp_mode = 1 #(tv mode) screen0_output_type = 3 screen0_output_mode = 5 screen1_output_type = 2 screen1_output_mode = 14 hdmi_used = 0 tv_used = 1 Using "disp" --> does not work Using "disp1" --> works echo "switch" > command echo "disp1" > name echo "0" > param echo "1" > start --> turn off my TV signal. However enabling HDMI instead does not work. I tried : echo "switch" > command echo "disp1" > name echo "4 5" > param echo "1" > start and with "3 5" both don't work. It just turns OFF the TV signal but HDMI is not turning ON. I guess it's because HDMI should be set on disp0 and not disp1? Is there any documentation about this dispdbg commands? Can't find any on google. Then as I have no longer video signal I don't know how to know what happens afterwards and have to reboot the unit.
  18. Thanks!! It's indeed working with devmem2. There should have been something wrong in my mmap before. When I run devmem2 the value change when HDMI is connected or not. No HDMI : 266f0 0000 0000 0000 0010 0110 0110 1111 0000 HDMI : a66F0 0000 0000 0000 1010 0110 0110 1111 0000 The method you gave here, is working for legacy 3.4.113 correct? So I should do : Switch from TV (TNSC) to HDMI sudo su cd /sys/kernel/debug/dispdbg/ echo "switch" > command echo "disp" > name echo "4 5" > param echo "1" > start Why is it "4 5" ? Is it not as follow : "screen0_output_type screen0_output_mode" In script.bin HDMI output type is "3", "4" being VGA. (source here) Switch from HDMI to TV (TNSC) sudo su cd /sys/kernel/debug/dispdbg/ echo "switch" > command echo "disp" > name echo "2 14" > param echo "1" > start Or should I first disable the previous video output with : sudo su cd /sys/kernel/debug/dispdbg/ echo "switch" > command echo "disp" > name echo "0" > param echo "1" > start Or should I used disp0 and disp1 as you suggest? Then it would be as follow : Switch from TV (TNSC) to HDMI sudo su cd /sys/kernel/debug/dispdbg/ echo "switch" > command echo "disp1" > name echo "0 14" > param echo "1" > start echo "switch" > command echo "disp0" > name echo "4 5" > param echo "1" > start Switch from HDMI to TV (TNSC) sudo su cd /sys/kernel/debug/dispdbg/ echo "switch" > command echo "disp0" > name echo "0 5" > param echo "1" > start echo "switch" > command echo "disp1" > name echo "2 14" > param echo "1" > start PS : for those that might be interested, here is how to install devmem2 If you have internet access just do the following : wget http://free-electrons.com/pub/mirror/devmem2.c gcc ./devmem2.c sudo mv ./a.out /usr/local/bin/devmem2 Then to run devmem2 to read a value type : sudo devmem2 0x01EF0038 You can replace 0x01EF0038 by the address you want to read.
  19. Found the problem. It was a hardware issue on SD card detect line. A resistor that should not have been there... The units are booting correctly.
  20. Hey guys! So the boards are working relatively correctly now. I just have a boot problem that is happening sometimes. On about 1 boot every 3 or 4 times the unit will not boot. It's random so I am not sure what can be the reason. When the unit can't boot it says (see enclosed pictures too) : Then it seems to try to boot on USB then on PHY (which don't work as nothing is setup) Any idea why this could be happening and why it would be happening only sometimes? The boot config that I use is "orangepi_pc_plus_defconfig" could it be something in there that can be the problem? I can't understand much from this file, is there some explanations of that script content somewhere? Do you think it could be a trace impedance problem with the SD card reader?
  21. I think the guy made the mapping specific to opi PC, and so he left lot of GPIO not mapped. I had trouble with this so in the end I corrected the mapping by adding all the GPIO in the map file. However it is not mapped with connector module. So you should use the GPIO name (port.c) to call it "PA01" ... Find enclosed my pyH3 folder, see specifically the mapping.h file. Again I filled the connectors randomly (as it's different between each SbC I don't think it should be used anyway) so use port. pyH3-0.2.12.rar
  22. I found how to modify pyA20 to check the register value. I added this to gpio_lib.c and gpio_lib.h, then some other things in gpio.c to declare the new module. - added in gpio_lib.h #define HDMI_PHY_BASE 0x01ef0038 - added in gpio_lib.c int get_HDMI_HPD() { if (SUNXI_PHY_BASE == 0) return -1; uint32_t reg = (uint32_t *)SUNXI_PHY_BASE; return (reg & ( 1 << 19))>> 19; } However I still can't read the hpd status. At the beginning it just returned me 1, if HDMI connected or not. Then to further investigate I modified the function to : int get_HDMI_HPD() { if (SUNXI_PHY_BASE == 0) return -1; uint32_t reg = (uint32_t *)SUNXI_PHY_BASE; return reg & 1048575; #1048575 because it's 11111111111111111111 in binary. } So I could read the 20 first bits of the register, and see what happens. Then I have some very strange results. The value returned does not depend if HDMI is connected or not. So when I run my python script, it initialize pyA20 (so the mmap to dev/mem) Then whenever I check get_HDMI_HPD() I have the same number returned again and again. Even if I unconnect HDMI. For example - return = 11010010000000111000 (= 860216 in dec) - disconnect HDMI - return = 11010010000000111000 (= 860216 in dec) - wait 10 minutes - return = 11010010000000111000 (= 860216 in dec) Then if I close the python script and open again (so mmap is reinitialized) the number change : - return = 01010111000000111000 (356408) - disconnect HDMI - return = 01010111000000111000 (356408) ... I tested several times and each time mmap is reinitialized the number changes. HDMI has no effect what so ever. 11010010000000111000 860216 10111101000000111000 774200 11011111000000111000 913464 11001010000000111000 827448 01010111000000111000 356408 00000001000000111000 4152 the mmap seem correct : int sunxi_gpio_init(void) { int fd; unsigned int addr_start, addr_offset; unsigned int PageSize, PageMask; void *pc; void *pc2; fd = open("/dev/mem", O_RDWR); if (fd < 0) return -1; //mmap for GPIO PageSize = sysconf(_SC_PAGESIZE); PageMask = (~(PageSize - 1)); addr_start = SW_PORTC_IO_BASE & PageMask; addr_offset = SW_PORTC_IO_BASE & ~PageMask; pc = (void *)mmap(0, PageSize * 2, PROT_READ | PROT_WRITE, MAP_SHARED, fd, addr_start); if (pc == MAP_FAILED) return -1; SUNXI_PIO_BASE = (unsigned int)pc; SUNXI_PIO_BASE += addr_offset; //mmap for HPD addr_start = HDMI_PHY_BASE & PageMask; addr_offset = HDMI_PHY_BASE & ~PageMask; pc2 = (void *)mmap(0, PageSize * 2, PROT_READ, MAP_SHARED, fd, addr_start); if (pc2 == MAP_FAILED) return -1; SUNXI_PHY_BASE = (unsigned int)pc2; SUNXI_PHY_BASE += addr_offset; close(fd); return 0; } Do you see something wrong in my mmap? I used the same syntax with the GPIO mmap, and I tested the GPIO are still working correctly, even if the getHPD always give the same result. Are you sure about the register address for HPD? Or maybe it's not in the dev/mem file, I don't know how this file works. Is it the full register values? Enclosed are the modified pyA20 files. gpio.c gpio_lib.c gpio_lib.h
  23. Thanks! Is this the same with access rights 0666 ? If not how to enable this access? Also do you know how to read from registers? From my reading we can use dev/mem file right? In pyA20 there's an example but I am not sure to understand how it works. and how this mem file is structured. Any hints how to read a specific register address from it?
  24. Thanks for your reply jernej! I could fix my rotate problem by hardware modification of the LCD. However I have not yet got the HDMI/AV switch working. I think I have a total lack of understanding on how drv_hdmi and drv_tv work. Also I don't understand how this CONFIG_SWITCH works. But is it not possible to just use a simple daemon that would do something like : define last_read_HPD = 0 While 1 HDMI_HPD = read status directly from registry if HDMI_HPD =! last_read_HPD if HDMI_HPD = 1 turn OFF disp1 as you describe here turn ON disp0 if HDMI_HPD = 0 turn OFF disp0 turn ON disp1 last_read_HPD = HDMI_HPD However I don't know how to read the HDMI_HPD status. I checked the H3 datasheet but can't find HPD registry address. I have found there (line 114) a function that seem to be doing just that but I can't understand how it works. 114 static int sunxi_dw_hdmi_get_plug_in_status(void) 115 { 116 struct sunxi_hdmi_phy * const phy = 117 (struct sunxi_hdmi_phy *)(SUNXI_HDMI_BASE + HDMI_PHY_OFFS); 118 119 return !!(readl(&phy->status) & (1 << 19)); 120 } I can't find where is defined SUNXI_HDMI_BASE (and so it's value) to get the exact address. Also I don't understand the return. Do you know how to read HPD status from the daemon? Do you think this simple methode would work? Thanks!
  25. Thanks for your reply! Module you mean the chip does not have power? module will not install if IC is not responding is it so? It's bad, do you mean it's not working correctly or consumming too much or failling often or both? If so maybe I will remove it from the schematic! Is there a H3 board who has a correct wifi chip?