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I'm trying to use H6's ARISC (CPUS) core for my CNC project https://allwincnc.github.io/ There are no problems to switch ARISC (CPUS) clock source using H3 and H5 (latest Armbian Buster). I'm using R_PRCM (0x01F01400) > CPUS_CLK_REG (offset 0x0000) register to switch clock source to the PERIPH0 PLL. For the H3 I'm using uboot script, for the H5 - own kernel module. But for the H6 this register (R_PRCM) isn't properly documented. Found out this register was moved to the 0x07010000. But modifying this register at offset 0x0000 doesn't take any effect. Just checked this using uboot cmd and own kernel module. I need your help. guys. Any suggestions how to switch H6's ARISC (CPUS) clock to the PERIPH0 PLL? Is it possible this memory region is protected from uboot and linux kernel?

I think that the armbian image that I took doesn't even use the crust firmware yet? At least I don't see a firmware upload in the u-boot log messages and also find no reference elsewhere (arisc strings in dmesg, /lib/firmware, etc.). Maybe someone can confirm that. That would explain what I observe. On the other side the crust firmware seems to have support for GPIO based toggling of the 3 regulators. If the crust firmware isn't being used for this board/armbian image, what is the missing piece?

Mine i also V 1.4 https://nextcloud.lodz.webredirect.org/s/MH8SxkMfjZZQe5i @Ukhellfire This is what I get from UART starting your image U-Boot SPL 2021.10-armbian (Mar 14 2022 - 08:18:53 +0000) DRAM: 2048 MiB Trying to boot from MMC1 NOTICE: BL31: v2.2(debug):a04808c1-dirty NOTICE: BL31: Built : 08:18:34, Mar 14 2022 NOTICE: BL31: Detected Allwinner H6 SoC (1728) NOTICE: BL31: Found U-Boot DTB at 0xc07c170, model: OrangePi 3 LTS INFO: ARM GICv2 driver initialized NOTICE: PMIC: Probing AXP805 NOTICE: PMIC: AXP805 detected INFO: BL31: Platform setup done INFO: BL31: Initializing runtime services INFO: BL31: cortex_a53: CPU workaround for 855873 was applied INFO: BL31: Preparing for EL3 exit to normal world INFO: Entry point address = 0x4a000000 INFO: SPSR = 0x3c9 U-Boot 2021.10-armbian (Mar 14 2022 - 08:18:53 +0000) Allwinner Technology CPU: Allwinner H6 (SUN50I) Model: OrangePi 3 LTS DRAM: 2 GiB MMC: mmc@4020000: 0, mmc@4022000: 1 Loading Environment from FAT... Unable to use mmc 0:1... In: serial@5000000 Out: serial@5000000 Err: serial@5000000 Net: No ethernet found. Autoboot in 1 seconds, press <Space> to stop switch to partitions #0, OK mmc0 is current device Scanning mmc 0:1... Found U-Boot script /boot/boot.scr 3202 bytes read in 4 ms (781.3 KiB/s) ## Executing script at 4fc00000 U-boot loaded from SD Boot script loaded from mmc 154 bytes read in 3 ms (49.8 KiB/s) 35780 bytes read in 9 ms (3.8 MiB/s) 4191 bytes read in 6 ms (681.6 KiB/s) Applying kernel provided DT fixup script (sun50i-h6-fixup.scr) ## Executing script at 45000000 12462020 bytes read in 619 ms (19.2 MiB/s) 21735432 bytes read in 1077 ms (19.2 MiB/s) Moving Image from 0x40080000 to 0x40200000, end=41710000 ## Loading init Ramdisk from Legacy Image at 4ff00000 ... Image Name: uInitrd Image Type: AArch64 Linux RAMDisk Image (gzip compressed) Data Size: 12461956 Bytes = 11.9 MiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK ## Flattened Device Tree blob at 4fa00000 Booting using the fdt blob at 0x4fa00000 Loading Ramdisk to 4941d000, end 49fff784 ... OK Loading Device Tree to 00000000493ab000, end 000000004941cfff ... OK Starting kernel ... Hangs on "Starting kernel ..." What is checksum for that image? For reference this is Orangepi image booting that works [191]HELLO! BOOT0 is starting! [195]boot0 commit : b65841975dcb31f64a2c69344f60db12b98791ae [213]PMU: AXP806 [216]vdd-sys vol:980mv [219]set pll start [222]set pll end [224]DRAM VERSION IS V2_76 [227]PMU:Set DDR Vol 1200mV OK. [230]PMU:Set DDR Vol 1200mV OK. [1439]DRAM CLK =744 MHZ [1441]DRAM Type =7 (3:DDR3,4:DDR4,6:LPDDR2,7:LPDDR3) [1446]DRAM zq value: 003b3bfb [1750]IPRD=00710071--PGCR0=00000f5d--PLL=b0003d00 [1755]Actual DRAM SIZE =2048 M [1758]DRAM SIZE =2048 M,para1 = 000030fa,para2 = 08001000 [1769]DRAM simple test OK. [1772]dram size =2048 [1775]card no is 0 [1777][mmc]: mmc driver ver 2017-10-19 10:34:00 [1781][mmc]: sdc0 spd mode error, 2 [1785][mmc]: mmc 0 bias 00000000 [1793][mmc]: Wrong media type 0x00000000 [1797][mmc]: ***Try SD card 0*** [1807][mmc]: HSSDR52/SDR25 4 bit [1810][mmc]: 50000000 Hz [1813][mmc]: 14840 MB [1815][mmc]: ***SD/MMC 0 init OK!!!*** [1945]Loading boot-pkg Succeed(index=0). [1949]Entry_name = u-boot [1964]Entry_name = parameter [1967]Entry_name = monitor [1971]Entry_name = scp [1980]set arisc reset to de-assert state [1984]Entry_name = soc-cfg [1988]Entry_name = dtb [1992]Ready to disable icache. [1995]Jump to secend Boot. INFO: Configuring SPC Controller NOTICE: BL3-1: v1.0(debug):c5e8aec NOTICE: BL3-1: Built : 14:42:22, Apr 26 2018 NOTICE: BL3-1 commit: c5e8aec20ca8c6ce31078c5689cbdb1a7352c813 INFO: BL3-1: Initializing runtime services ERROR: Error initializing runtime service tspd_fast INFO: BL3-1: Preparing for EL3 exit to normal world INFO: BL3-1: Next image address = 0x4a000000 INFO: BL3-1: Next image spsr = 0x1d3 U-Boot 2014.07-orangepi (Dec 30 2021 - 09:15:17) Xunlong Software [2.043]uboot commit : b65841975dcb31f64a2c69344f60db12b98791ae [2.043]secure enable bit: 0 [2.043]normal mode: with secure monitor I2C: ready [2.044]pmbus: ready [2.044][ARISC] :arisc initialize [2.070][ARISC] :arisc para ok [SCP] :sunxi-arisc driver begin startup 2 [SCP] :arisc version: [] [SCP] :sunxi-arisc driver v1.10 is starting [2.084][ARISC] :sunxi-arisc driver startup succeeded [2.085]PMU: AXP806 [2.085]PMU: AXP806 found [2.085]bat_vol=0, ratio=0 [2.085]set pc_bias(1) bias:1800 [2.085]set pg_bias(5) bias:1800 [2.085]set power on vol to default [2.086]dcdca_vol = 1000, onoff=1 [2.090]aldo2_vol = 3300, onoff=1 [2.094]bldo3_vol = 1800, onoff=1 [2.098]cldo2_vol = 3300, onoff=1 [2.103]cldo3_vol = 3300, onoff=1 [2.107]find power_sply to end [2.107]cant find pll setting(1320M) from pll table,use default(408M) [2.109]PMU: cpux 408 Mhz,AXI=204 Mhz [2.109]PLL6=600 Mhz,AHB1=200 Mhz, APB1=100Mhz MBus=400Mhz [2.114]DRAM: 2 GiB [2.117]fdt addr: 0xb9ccb0e0 [2.118]gd->fdt_size: 0x1a6c0 [2.121]Relocation Offset is: 74d85000 [2.207]gic: sec monitor mode [2.207]line:180 func:check_ir_boot_recovery start [2.207]ir boot recovery not used [2.207][key recovery] no use [2.208][box standby] read rtc = 0x0 [2.208][box standby] start_type = 0x1 [2.208][box standby] to kernel [2.208]workmode = 0,storage type = 1 [2.210]MMC: 2 SUNXI SD/MMC: 2 [mmc]: [0-63|64] [mmc]: [0-54|55] [mmc]: [6-51|46] [mmc]: [0-13|14] [27-31|5] [36-53|18] [mmc]: [0-51|52] [59-59|1] [61-63|3] [mmc]: [0-28|29] [59-63|5] [mmc]: [0-61|62] [mmc]: [6-54|49] [56-61|6] [mmc]: [2-6|5] [9-58|50] [mmc]: [1-28|28] Normal [7.003]MMC: 0 SUNXI SD/MMC: 2, SUNXI SD/MMC: 0 [7.024]sunxi flash init ok [7.024]hdmi hdcp not enable! [7.024]display init start [7.024]drv_disp_init [7.041]init_clocks: finish init_clocks. [7.060]__clk_enable: clk is null. [7.060]hdmi cec clk enable failed! [7.066]request pwm success, pwm1:pwm1:0x300a000. [7.074]key emac have not been burned yet [7.074][ac200] tv_read_sid,line:188 [7.074]sunxi_efuse_readn failed:-1 [7.081]drv_disp_init finish [7.081]hdmi hdcp not enable! 200 bytes read in 14 ms (13.7 KiB/s) Set HDMI disp_mode to 1080p60 [7.099]hdmi hpd out, force open? 200 bytes read in 13 ms (14.6 KiB/s) Set fb0_width to 1280 Set fb0_height to 720 [7.116]display init end Using default environment bmp_name=/boot/boot.bmp 230456 bytes read in 26 ms (8.5 MiB/s) [7.153]show bmp on ok [7.153]inter uboot shell Hit any key to stop autoboot: 0 mmc0 is current device 2615 bytes read in 18 ms (141.6 KiB/s) ## Executing script at 43100000 U-boot loaded from SD Boot script loaded from mmc 200 bytes read in 14 ms (13.7 KiB/s) 102389 bytes read in 31 ms (3.1 MiB/s) 6551063 bytes read in 311 ms (20.1 MiB/s) 22480968 bytes read in 994 ms (21.6 MiB/s) ## Booting kernel from Legacy Image at 41000000 ... Image Name: Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 22480904 Bytes = 21.4 MiB Load Address: 41000000 Entry Point: 41000000 Verifying Checksum ... OK ## Loading init Ramdisk from Legacy Image at 43300000 ... Image Name: uInitrd Image Type: ARM Linux RAMDisk Image (gzip compressed) Data Size: 6550999 Bytes = 6.2 MiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK Loading Kernel Image ... OK reserving fdt memory region: addr=40020000 size=800 reserving fdt memory region: addr=48000000 size=1000000 reserving fdt memory region: addr=48100000 size=4000 reserving fdt memory region: addr=48104000 size=1000 reserving fdt memory region: addr=48105000 size=1000 reserving fdt memory region: addr=43000000 size=1a000 Loading Ramdisk to 499c0000, end 49fff5d7 ... OK Using Device Tree in place at 44000000, end 4401d6bf Starting kernel ... INFO: BL3-1: Next image address = 0x41000000 INFO: BL3-1: Next image spsr = 0x3c5 WARNING: Unimplemented Standard Service Call: 0xc0000026 Orange Pi 2.1.6 Buster ttyS0

New installed image: Armbian_5.14_Nanopim1_Ubuntu_xenial_3.4.112.raw [ 1321.621490] [cpu_freq] ERR:set cpu frequency to 240MHz failed! [ 1321.856382] [ARISC ERROR] :message process error [ 1321.874795] [ARISC ERROR] :message addr : f004b840 [ 1321.893322] [ARISC ERROR] :message state : 5 [ 1321.911038] [ARISC ERROR] :message attr : 2 [ 1321.928962] [ARISC ERROR] :message type : 30 [ 1321.946430] [ARISC ERROR] :message result : ff [ 1321.963905] [ARISC WARING] :callback not install

Hi, I noticed today that I'm getting those ARISC Errors again. I'm running the 5.05 server version which I ran apt-get upgrade on. I got the same when I tested out the new 5.10 image aswell. (Upgrading to 5.10 3.4.112 or using the new image wont let me compile the 'make scripts' either) [ 1424.305736] [ARISC ERROR] :message process error [ 1424.305763] [ARISC ERROR] :message addr : f004b840 [ 1424.305778] [ARISC ERROR] :message state : 5 [ 1424.305792] [ARISC ERROR] :message attr : 2 [ 1424.305805] [ARISC ERROR] :message type : 30 [ 1424.305818] [ARISC ERROR] :message result : ff [ 1424.305831] [ARISC WARING] :callback not install [ 1424.305849] [cpu_freq] ERR:set cpu frequency to 648MHz failed! Is this something I can fix myself or does it need to be done when compiling the Kernel?? Thanks Jungle

HI, Sorry for my poor english. I have installed armbian image on a sdcard (Armbian_21.05.0-trunk_Aw-h6-tv_focal_current_5.10.27_xfce_desktop.img.xz). I used tanix t6 dtb but the screen is black after starting the box. Here is the model of the tv box with allwinner h6 soc : When i connect my pc with usb wire, i'm able to connect it with adb. And i see that the board in the android box is configured with sun50iw6p1. In the balbes150 repositories this configuration don't exists. But i can find the dts files in github : https://github.com/Allwinner-Homlet/H6-BSP4.9-linux There are 4 dts files : sun50iw6p1-soc.dts sun50iw6p1.dtsi sun50iw6p1-clk.dtsi sun50iw6p1-pinctrl.dtsi The sun50iw6p1.dtsi file includes : arm-gic.h gpio.h The arm-gic.h file includes : irq.h Is there a way with device-tree-compiler to make the dtb file to integrate in the armbian installation ? If it is possible, how can i do ? Bests regards. PS : I joint the differents files : sun50iw6p1-soc.dts /* * Allwinner Technology CO., Ltd. sun50iw6p1 soc board. * * soc board support. */ /dts-v1/; #include "sun50iw6p1.dtsi" /{ soc@03000000 { }; wlan:wlan { compatible = "allwinner,sunxi-wlan"; wlan_busnum = <1>; wlan_usbnum = <3>; wlan_power; wlan_io_regulator; wlan_en; wlan_regon; wlan_hostwake; status = "disabled"; }; bt:bt { compatible = "allwinner,sunxi-bt"; clocks = <&clk_losc_out>; bt_power = "vcc-wifi"; bt_io_regulator = "vcc-wifi-io"; bt_rst_n = <&r_pio PM 4 1 0 0 0>; status = "okay"; }; btlpm:btlpm { compatible = "allwinner,sunxi-btlpm"; uart_index = <1>; bt_wake = <&r_pio PM 2 1 0 0 1>; bt_hostwake = <&r_pio PM 1 6 0 0 0>; status = "okay"; }; }; sun50iw6p1.dtsi /* * Allwinner Technology CO., Ltd. sun50iw6p1 platform * * modify base on juno.dts */ /* kernel used */ /memreserve/ 0x40020000 0x00000800; /* super standby range : [0x40020000~0x41020800], size = 2K */ /memreserve/ 0x48000000 0x01000000; /* atf : [0x48000000~0x49000000], size = 16M */ /* tf used */ /memreserve/ 0x48100000 0x00004000; /* arisc dram code space range: [0x48100000~0x48104000], size = 16K */ /memreserve/ 0x48104000 0x00001000; /* arisc para cfg range : [0x48104000~0x48105000], size = 4K */ /memreserve/ 0x48105000 0x00001000; /* arisc message pool range : [0x48105000~0x48106000], size = 4K */ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/gpio/gpio.h> #include "sun50iw6p1-clk.dtsi" #include "sun50iw6p1-pinctrl.dtsi" / { model = "sun50iw6"; compatible = "arm,sun50iw6p1"; interrupt-parent = <&gic>; #address-cells = <2>; #size-cells = <2>; aliases { serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; serial3 = &uart3; twi0 = &twi0; twi1 = &twi1; twi2 = &twi2; twi3 = &twi3; spi0 = &spi0; spi1 = &spi1; pcie = &pcie; scr0 = &scr0; scr1 = &scr1; gmac0 = &gmac0; global_timer0 = &soc_timer0; mmc0 = &sdc0; mmc2 = &sdc2; nand0 =&nand0; disp = &disp; lcd0 = &lcd0; lcd1 = &lcd1; hdmi = &hdmi; pwm = &pwm; pwm0 = &pwm0; pwm1 = &pwm1; tv0 = &tv0; s_pwm = &s_pwm; spwm0 = &spwm0; ac200 = &ac200; boot_disp = &boot_disp; charger0 = &charger0; regulator0 = &regulator0; }; chosen { bootargs = "earlyprintk=sunxi-uart,0x05000000 loglevel=8 initcall_debug=1 console=ttyS0 init=/init"; linux,initrd-start = <0x0 0x0>; linux,initrd-end = <0x0 0x0>; }; cpus { #address-cells = <2>; #size-cells = <0>; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x0>; enable-method = "psci"; clocks = <&clk_pll_cpu>; clock-latency = <2000000>; clock-frequency = <1320000000>; operating-points-v2 = <&cpu_opp_l_table0 &cpu_opp_l_table1 &cpu_opp_l_table2>; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0 &SYS_SLEEP_0>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x1>; enable-method = "psci"; clocks = <&clk_pll_cpu>; clock-frequency = <1320000000>; operating-points-v2 = <&cpu_opp_l_table0 &cpu_opp_l_table1 &cpu_opp_l_table2>; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0 &SYS_SLEEP_0>; }; cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x2>; enable-method = "psci"; clocks = <&clk_pll_cpu>; clock-frequency = <1320000000>; operating-points-v2 = <&cpu_opp_l_table0 &cpu_opp_l_table1 &cpu_opp_l_table2>; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0 &SYS_SLEEP_0>; }; cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x3>; enable-method = "psci"; clocks = <&clk_pll_cpu>; clock-frequency = <1320000000>; operating-points-v2 = <&cpu_opp_l_table0 &cpu_opp_l_table1 &cpu_opp_l_table2>; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0 &SYS_SLEEP_0>; }; idle-states { entry-method = "arm,psci"; CPU_SLEEP_0: cpu-sleep-0 { compatible = "arm,idle-state"; arm,psci-suspend-param = <0x0010000>; entry-latency-us = <4000>; exit-latency-us = <10000>; min-residency-us = <15000>; }; CLUSTER_SLEEP_0: cluster-sleep-0 { compatible = "arm,idle-state"; arm,psci-suspend-param = <0x1010000>; entry-latency-us = <50000>; exit-latency-us = <100000>; min-residency-us = <250000>; }; SYS_SLEEP_0: sys-sleep-0 { compatible = "arm,idle-state"; arm,psci-suspend-param = <0x2010000>; entry-latency-us = <100000>; exit-latency-us = <2000000>; min-residency-us = <4500000>; }; }; }; psci { compatible = "arm,psci-0.2"; method = "smc"; psci_version = <0x84000000>; cpu_suspend = <0xc4000001>; cpu_off = <0x84000002>; cpu_on = <0xc4000003>; affinity_info = <0xc4000004>; migrate = <0xc4000005>; migrate_info_type = <0x84000006>; migrate_info_up_cpu = <0xc4000007>; system_off = <0x84000008>; system_reset = <0x84000009>; }; n_brom { compatible = "allwinner,n-brom"; reg = <0x0 0x0 0x0 0xa000>; }; s_brom { compatible = "allwinner,s-brom"; reg = <0x0 0x0 0x0 0x10000>; }; sram_ctrl { device_type = "sram_ctrl"; compatible = "allwinner,sram_ctrl"; reg = <0x0 0x03000000 0x0 0x100>; }; sram_a1 { compatible = "allwinner,sram_a1"; reg = <0x0 0x00020000 0x0 0x8000>; }; sram_a2 { compatible = "allwinner,sram_a2"; reg = <0x0 0x00100000 0x0 0x14000>; }; prcm { compatible = "allwinner,prcm"; reg = <0x0 0x01f01400 0x0 0x400>; }; s_cpuscfg { compatible = "allwinner,s_cpuscfg"; reg = <0x0 0x01f01c00 0x0 0x400>; }; ion { compatible = "allwinner,sunxi-ion"; /*types is list here: ION_HEAP_TYPE_SYSTEM = 0, ION_HEAP_TYPE_SYSTEM_CONTIG = 1, ION_HEAP_TYPE_CARVEOUT = 2, ION_HEAP_TYPE_CHUNK = 3, ION_HEAP_TYPE_DMA = 4, ION_HEAP_TYPE_SECURE = 5, **/ heap_sys_user@0{ compatible = "allwinner,sys_user"; heap-name = "sys_user"; heap-id = <0x0>; heap-base = <0x0>; heap-size = <0x0>; heap-type = "ion_system"; }; heap_sys_contig@0{ compatible = "allwinner,sys_contig"; heap-name = "sys_contig"; heap-id = <0x1>; heap-base = <0x0>; heap-size = <0x0>; heap-type = "ion_contig"; }; heap_cma@0{ compatible = "allwinner,cma"; heap-name = "cma"; heap-id = <0x4>; heap-base = <0x0>; heap-size = <0x0>; heap-type = "ion_cma"; }; heap_secure@0{ compatible = "allwinner,secure"; heap-name = "secure"; heap-id = <0x5>; heap-base = <0x0>; heap-size = <0x0>; heap-type = "ion_secure"; }; }; dram: dram { compatible = "allwinner,dram"; clocks = <&clk_pll_ddr0>; clock-names = "pll_ddr"; dram_clk = <672>; dram_type = <3>; dram_zq = <0x003F3FDD>; dram_odt_en = <1>; dram_para1 = <0x10f41000>; dram_para2 = <0x00001200>; dram_mr0 = <0x1A50>; dram_mr1 = <0x40>; dram_mr2 = <0x10>; dram_mr3 = <0>; dram_tpr0 = <0x04E214EA>; dram_tpr1 = <0x004214AD>; dram_tpr2 = <0x10A75030>; dram_tpr3 = <0>; dram_tpr4 = <0>; dram_tpr5 = <0>; dram_tpr6 = <0>; dram_tpr7 = <0>; dram_tpr8 = <0>; dram_tpr9 = <0>; dram_tpr10 = <0>; dram_tpr11 = <0>; dram_tpr12 = <168>; dram_tpr13 = <0x823>; }; memory@40000000 { device_type = "memory"; reg = <0x00000000 0x40000000 0x00000000 0x20000000>; }; gic: interrupt-controller@03020000 { compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; #interrupt-cells = <3>; #address-cells = <0>; device_type = "gic"; interrupt-controller; reg = <0x0 0x03021000 0 0x1000>, /* GIC Dist */ <0x0 0x03022000 0 0x2000>, /* GIC CPU */ <0x0 0x03024000 0 0x2000>, /* GIC VCPU Control */ <0x0 0x03026000 0 0x2000>; /* GIC VCPU */ interrupts = <GIC_PPI 9 0xf04>; /* GIC Maintenence IRQ */ }; sid: sunxi-sid@03006000 { compatible = "allwinner,sunxi-sid"; device_type = "sid"; reg = <0x0 0x03006000 0 0x1000>; }; chipid: sunxi-chipid@03006200 { compatible = "allwinner,sunxi-chipid"; device_type = "chipid"; reg = <0x0 0x03006200 0 0x0200>; }; timer_arch { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 0xff01>, /* Secure Phys IRQ */ <GIC_PPI 14 0xff01>, /* Non-secure Phys IRQ */ <GIC_PPI 11 0xff01>, /* Virt IRQ */ <GIC_PPI 10 0xff01>; /* Hyp IRQ */ clock-frequency = <24000000>; }; pmu { compatible = "arm,armv8-pmuv3"; interrupts = <GIC_SPI 140 4>, <GIC_SPI 141 4>, <GIC_SPI 142 4>, <GIC_SPI 143 4>; }; opp_dvfs_table:opp_dvfs_table { cluster_num = <1>; opp_table_count = <3>; cpu_opp_l_table0: opp_l_table0 { compatible = "allwinner,opp_l_table0"; opp_count = <8>; opp-shared; opp00 { opp-hz = /bits/ 64 <480000000>; opp-microvolt = <880000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp01 { opp-hz = /bits/ 64 <720000000>; opp-microvolt = <880000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp02 { opp-hz = /bits/ 64 <816000000>; opp-microvolt = <880000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp03 { opp-hz = /bits/ 64 <888000000>; opp-microvolt = <940000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp04 { opp-hz = /bits/ 64 <1080000000>; opp-microvolt = <1060000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp05 { opp-hz = /bits/ 64 <1320000000>; opp-microvolt = <1160000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp06 { opp-hz = /bits/ 64 <1488000000>; opp-microvolt = <1160000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp07 { opp-hz = /bits/ 64 <1800000000>; opp-microvolt = <1160000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; }; cpu_opp_l_table1: opp_l_table1 { compatible = "allwinner,opp_l_table1"; opp_count = <8>; opp-shared; opp00 { opp-hz = /bits/ 64 <480000000>; opp-microvolt = <820000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp01 { opp-hz = /bits/ 64 <720000000>; opp-microvolt = <820000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp02 { opp-hz = /bits/ 64 <816000000>; opp-microvolt = <820000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp03 { opp-hz = /bits/ 64 <888000000>; opp-microvolt = <820000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp04 { opp-hz = /bits/ 64 <1080000000>; opp-microvolt = <880000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp05 { opp-hz = /bits/ 64 <1320000000>; opp-microvolt = <940000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp06 { opp-hz = /bits/ 64 <1488000000>; opp-microvolt = <1000000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp07 { opp-hz = /bits/ 64 <1800000000>; opp-microvolt = <1100000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; }; cpu_opp_l_table2: opp_l_table2 { compatible = "allwinner,opp_l_table2"; opp_count = <8>; opp-shared; opp00 { opp-hz = /bits/ 64 <480000000>; opp-microvolt = <800000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp01 { opp-hz = /bits/ 64 <720000000>; opp-microvolt = <800000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp02 { opp-hz = /bits/ 64 <816000000>; opp-microvolt = <800000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp03 { opp-hz = /bits/ 64 <888000000>; opp-microvolt = <800000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp04 { opp-hz = /bits/ 64 <1080000000>; opp-microvolt = <840000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp05 { opp-hz = /bits/ 64 <1320000000>; opp-microvolt = <900000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp06 { opp-hz = /bits/ 64 <1488000000>; opp-microvolt = <960000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp07 { opp-hz = /bits/ 64 <1800000000>; opp-microvolt = <1060000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; }; }; dramfreq { compatible = "allwinner,sunxi-dramfreq"; reg = <0x0 0x04002000 0x0 0x1000>, <0x0 0x04003000 0x0 0x3000>, <0x0 0x03001000 0x0 0x1000>; interrupts = <GIC_SPI 33 0x4>; clocks = <&clk_pll_ddr0>; status = "okay"; }; uboot: uboot { }; mmu_aw: iommu@030f0000 { compatible = "allwinner,sunxi-iommu"; reg = <0x0 0x030f0000 0x0 0x1000>; interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "iommu-irq"; clocks = <&clk_iommu>; clock-names = "iommu"; /* clock-frequency = <24000000>; */ #iommu-cells = <2>; status = "okay"; }; soc: soc@03000000 { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; ranges; device_type = "soc"; dma0:dma-controller@03002000 { compatible = "allwinner,sun50i-dma"; reg = <0x0 0x03002000 0x0 0x1000>; interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_dma>; #dma-cells = <1>; }; mbus0:mbus-controller@04002000 { compatible = "allwinner,sun50i-mbus"; reg = <0x0 0x04002000 0x0 0x1000>; #mbus-cells = <1>; }; arisc { compatible = "allwinner,sunxi-arisc"; #address-cells = <2>; #size-cells = <2>; clocks = <&clk_losc>, <&clk_iosc>, <&clk_hosc>, <&clk_pll_periph0>; clock-names = "losc", "iosc", "hosc", "pll_periph0"; powchk_used = <0x0>; power_reg = <0x02309621>; system_power = <50>; }; arisc_space { compatible = "allwinner,arisc_space"; /* num dst offset size */ space1 = <0x48040000 0x00000000 0x00014000>; /* srama2 code space */ space2 = <0x48100000 0x00018000 0x00004000>; /* dram code space */ space3 = <0x48104000 0x00000000 0x00001000>; /* para space */ space4 = <0x48105000 0x00000000 0x00001000>; /* msgpool space */ }; standby_space { compatible = "allwinner,sun50iw6-usbstandby"; /* num dst offset size */ space1 = <0x40020000 0x00000000 0x00000800>; /* super standby para space */ }; msgbox: msgbox@03003000 { compatible = "allwinner,msgbox"; clocks = <&clk_msgbox>; clock-names = "clk_msgbox"; reg = <0x0 0x03003000 0x0 0x1000>; interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>; status = "okay"; }; hwspinlock: hwspinlock@3004000 { compatible = "allwinner,sunxi-hwspinlock"; clocks = <&clk_hwspinlock_rst>, <&clk_hwspinlock_bus>; clock-names = "clk_hwspinlock_rst", "clk_hwspinlock_bus"; reg = <0x0 0x03004000 0x0 0x1000>; num-locks = <8>; /* the number hwspinlock we needed, max 32 */ status = "okay"; }; s_cir0: s_cir@07040000 { compatible = "allwinner,s_cir"; reg = <0x0 0x07040000 0x0 0x400>; interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&s_cir0_pins_a>; clocks = <&clk_hosc>,<&clk_cpurcir>; supply = "vcc-pl"; supply_vol = "3300000"; status = "okay"; }; s_uart0: s_uart@7080000 { compatible = "allwinner,s_uart"; reg = <0x0 0x07080000 0x0 0xd0>; interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&s_uart0_pins_a>; status = "okay"; }; s_twi0: s_twi@1f03400 { compatible = "allwinner,s_twi"; reg = <0x0 0x01f02400 0x0 0x20>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&s_twi0_pins_a>; status = "okay"; }; s_jtag0: s_jtag0 { compatible = "allwinner,s_jtag"; pinctrl-names = "default"; pinctrl-0 = <&s_jtag0_pins_a>; status = "disable"; }; box_start_os: box_start_os0 { compatible = "allwinner,box_start_os"; start_type = <0x0>; irkey_used = <0x0>; pmukey_used = <0x0>; pmukey_num = <0x0>; led_power = <0x0>; led_state = <0x0>; status = "disable"; }; soc_timer0: timer@03009000 { compatible = "allwinner,sun4i-a10-timer"; device_type = "timer"; reg = <0x0 0x03009000 0x0 0x400>; interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; clock-frequency = <24000000>; timer-prescale = <16>; }; rtc: rtc@07000000 { compatible = "allwinner,sun50iw6-rtc"; device_type = "rtc"; reg = <0x0 0x07000000 0x0 0x200>; interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; gpr_offset = <0x100>; gpr_len = <8>; gpr_cur_pos = <6>; }; wdt: watchdog@030090a0 { compatible = "allwinner,sun50i-wdt"; reg = <0x0 0x030090a0 0x0 0x20>; interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; }; ve: ve@01c0e000 { compatible = "allwinner,sunxi-cedar-ve"; reg = <0x0 0x01c0e000 0x0 0x1000>, <0x0 0x03000000 0x0 0x10>, <0x0 0x03001000 0x0 0x1000>; interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_pll_ve>, <&clk_ve>; iommus = <&mmu_aw 3 1>; }; vp9: vp9@01c00000 { compatible = "allwinner,sunxi-google-vp9"; reg = <0x0 0x01c00000 0x0 0x1000>, <0x0 0x03000000 0x0 0x10>, <0x0 0x03001000 0x0 0x1000>; interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_pll_ve>, <&clk_vp9>; #clocks = <&clk_pll_periph0x2>, <&clk_vp9>; iommus = <&mmu_aw 5 1>; }; uart0: uart@05000000 { compatible = "allwinner,sun50i-uart"; device_type = "uart0"; reg = <0x0 0x05000000 0x0 0x400>; interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_uart0>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart0_pins_a>; pinctrl-1 = <&uart0_pins_b>; uart0_port = <0>; uart0_type = <2>; status = "disabled"; }; uart1: uart@05000400 { compatible = "allwinner,sun50i-uart"; device_type = "uart1"; reg = <0x0 0x05000400 0x0 0x400>; interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_uart1>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart1_pins_a>; pinctrl-1 = <&uart1_pins_b>; uart1_port = <1>; uart1_type = <4>; status = "disabled"; }; uart2: uart@05000800 { compatible = "allwinner,sun50i-uart"; device_type = "uart2"; reg = <0x0 0x05000800 0x0 0x400>; interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_uart2>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart2_pins_a>; pinctrl-1 = <&uart2_pins_b>; uart2_port = <2>; uart2_type = <4>; status = "okay"; }; uart3: uart@05000c00 { compatible = "allwinner,sun50i-uart"; device_type = "uart3"; reg = <0x0 0x05000c00 0x0 0x400>; interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_uart3>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart3_pins_a>; pinctrl-1 = <&uart3_pins_b>; uart3_port = <3>; uart3_type = <4>; status = "disabled"; }; twi0: twi@0x05002000{ #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sun50i-twi"; device_type = "twi0"; reg = <0x0 0x05002000 0x0 0x400>; interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_twi0>; clock-frequency = <400000>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&twi0_pins_a>; pinctrl-1 = <&twi0_pins_b>; status = "disabled"; }; twi1: twi@0x05002400{ #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sun50i-twi"; device_type = "twi1"; reg = <0x0 0x05002400 0x0 0x400>; interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_twi1>; clock-frequency = <200000>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&twi1_pins_a>; pinctrl-1 = <&twi1_pins_b>; status = "disabled"; }; twi2: twi@0x05002800{ #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sun50i-twi"; device_type = "twi2"; reg = <0x0 0x05002800 0x0 0x400>; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_twi2>; clock-frequency = <200000>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&twi2_pins_a>; pinctrl-1 = <&twi2_pins_b>; status = "disabled"; }; twi3: twi@0x05002c00{ #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sun50i-twi"; device_type = "twi3"; reg = <0x0 0x05002c00 0x0 0x400>; interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_twi3>; clock-frequency = <200000>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&twi3_pins_a>; pinctrl-1 = <&twi3_pins_b>; status = "disabled"; }; usbc0:usbc0@0 { device_type = "usbc0"; compatible = "allwinner,sunxi-otg-manager"; usb_port_type = <2>; usb_detect_type = <1>; usb_id_gpio; usb_det_vbus_gpio; usb_drv_vbus_gpio; usb_host_init_state = <0>; usb_regulator_io = "nocare"; usb_wakeup_suspend = <0>; usb_luns = <3>; usb_serial_unique = <0>; usb_serial_number = "20080411"; rndis_wceis = <1>; status = "okay"; }; udc:udc-controller@0x05100000 { compatible = "allwinner,sunxi-udc"; reg = <0x0 0x05100000 0x0 0x1000>, /*udc base*/ <0x0 0x00000000 0x0 0x100>; /*sram base*/ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_usbphy0>, <&clk_usbotg>; status = "okay"; }; ehci0:ehci0-controller@0x05101000 { compatible = "allwinner,sunxi-ehci0"; reg = <0x0 0x05101000 0x0 0xFFF>, /*hci0 base*/ <0x0 0x00000000 0x0 0x100>, /*sram base*/ <0x0 0x05100000 0x0 0x1000>; /*otg base*/ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_usbphy0>, <&clk_usbehci0>; hci_ctrl_no = <0>; status = "okay"; }; ohci0:ohci0-controller@0x05101400 { compatible = "allwinner,sunxi-ohci0"; reg = <0x0 0x05101000 0x0 0xFFF>, /*hci0 base*/ <0x0 0x00000000 0x0 0x100>, /*sram base*/ <0x0 0x05100000 0x0 0x1000>; /*otg base*/ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_usbphy0>, <&clk_usbohci0>, <&clk_usbohci0_12m>, <&clk_osc48md4>, <&clk_hosc>, <&clk_losc>; hci_ctrl_no = <0>; status = "okay"; }; usbc1:usbc1@0 { device_type = "usbc1"; usb_drv_vbus_gpio; usb_host_init_state = <1>; usb_regulator_io = "nocare"; usb_wakeup_suspend = <0>; status = "okay"; }; xhci:xhci-controller@0x05200000 { compatible = "allwinner,sunxi-xhci"; reg = <0x0 0x05200000 0x0 0xFFFFF>, /*Xhci base*/ <0x0 0x00000000 0x0 0x100>, /*sram base*/ <0x0 0x05100000 0x0 0x1000>; /*otg base*/ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_usbphy1>, <&clk_usb3_0_host>; hci_ctrl_no = <1>; status = "okay"; }; usbc2:usbc2@0 { device_type = "usbc2"; usb_drv_vbus_gpio; usb_host_init_state = <1>; usb_regulator_io = "nocare"; usb_wakeup_suspend = <0>; status = "okay"; }; ehci3:ehci3-controller@0x05311000 { compatible = "allwinner,sunxi-ehci3"; reg = <0x0 0x05311000 0x0 0xFFF>,/*hci2 base*/ <0x0 0x00000000 0x0 0x100>, /*sram base*/ <0x0 0x05100000 0x0 0x1000>; /*otg base*/ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_usbphy3>, <&clk_usbehci3>, <&clk_usbhsic>, <&clk_usbhsic>, <&clk_pll_hsic>; hci_ctrl_no = <3>; status = "okay"; }; ohci3:ohci3-controller@0x05311400 { compatible = "allwinner,sunxi-ohci3"; reg = <0x0 0x05311000 0x0 0xFFF>, /*hci2 base*/ <0x0 0x00000000 0x0 0x100>, /*sram base*/ <0x0 0x05100000 0x0 0x1000>; /*otg base*/ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_usbphy3>, <&clk_usbohci3>, <&clk_usbohci3_12m>, <&clk_osc48md4>, <&clk_hosc>, <&clk_losc>; hci_ctrl_no = <3>; status = "okay"; }; ac200_codec: ac200_codec { compatible = "allwinner,ac200_codec"; status = "disabled"; }; daudio0:daudio@0x05090000 { compatible = "allwinner,sunxi-daudio"; reg = <0x0 0x05090000 0x0 0x74>; clocks = <&clk_pll_audio>,<&clk_i2s0>; pinctrl-names = "default","sleep"; pinctrl-0 = <&daudio0_pins_a>; pinctrl-1 = <&daudio0_pins_b>; pcm_lrck_period = <0x20>; slot_width_select = <0x20>; daudio_master = <0x04>; audio_format = <0x01>; signal_inversion = <0x01>; tdm_config = <0x01>; frametype = <0x00>; tdm_num = <0x00>; mclk_div = <0x00>; status = "disabled"; }; audiohdmi:daudio@0x05091000 { compatible = "allwinner,sunxi-tdmhdmi"; reg = <0x0 0x05091000 0x0 0x74>; clocks = <&clk_pll_audio>,<&clk_i2s1>; status = "disabled"; }; daudio2:daudio@0x05092000 { compatible = "allwinner,sunxi-daudio"; reg = <0x0 0x05092000 0x0 0x74>; clocks = <&clk_pll_audio>,<&clk_i2s2>; pinctrl-names = "default","sleep"; pinctrl-0 = <&daudio2_pins_a>; pinctrl-1 = <&daudio2_pins_b>; pcm_lrck_period = <0x20>; slot_width_select = <0x20>; daudio_master = <0x04>; audio_format = <0x01>; signal_inversion = <0x01>; tdm_config = <0x01>; frametype = <0x00>; tdm_num = <0x2>; mclk_div = <0x0>; status = "disabled"; }; daudio3:daudio@0x0508f000{ compatible = "allwinner,sunxi-daudio"; reg = <0x0 0x0508f000 0x0 0x74>; clocks = <&clk_pll_audio>,<&clk_i2s3>; pinctrl-names = "default","sleep"; pinctrl-0 = <&daudio3_pins_a>; pinctrl-1 = <&daudio3_pins_b>; pcm_lrck_period = <0x20>; slot_width_select = <0x20>; daudio_master = <0x04>; audio_format = <0x01>; signal_inversion = <0x01>; tdm_config = <0x01>; frametype = <0x00>; tdm_num = <0x3>; mclk_div = <0x0>; status = "disabled"; }; spdif:spdif-controller@0x05093000{ compatible = "allwinner,sunxi-spdif"; reg = <0x0 0x05093000 0x0 0x40>; clocks = <&clk_pll_audio>,<&clk_spdif>; pinctrl-names = "default","sleep"; pinctrl-0 = <&spdif_pins_a>; pinctrl-1 = <&spdif_pins_b>; status = "disabled"; }; dmic:dmic-controller@0x05095000{ compatible = "allwinner,sunxi-dmic"; reg = <0x0 0x05095000 0x0 0x50>; clocks = <&clk_pll_audio>,<&clk_dmic>; pinctrl-names = "default","sleep"; pinctrl-0 = <&dmic_pins_a>; pinctrl-1 = <&dmic_pins_b>; status = "disabled"; }; ahub_cpudai0:cpudai0-controller@0x05097000 { compatible = "allwinner,sunxi-ahub-cpudai"; reg = <0x0 0x05097000 0x0 0xADF>; id = <0x0>; status = "okay"; }; ahub_cpudai1:cpudai1-controller@0x05097000 { compatible = "allwinner,sunxi-ahub-cpudai"; reg = <0x0 0x05097000 0x0 0xADF>; id = <0x1>; status = "okay"; }; ahub_cpudai2:cpudai2-controller@0x05097000 { compatible = "allwinner,sunxi-ahub-cpudai"; reg = <0x0 0x05097000 0x0 0xADF>; id = <0x2>; status = "okay"; }; ahub_codec:ahub_codec@0x05097000{ compatible = "allwinner,sunxi-ahub"; reg = <0x0 0x05097000 0x0 0xADF>; clocks = <&clk_pll_audio>,<&clk_ahub>; status = "okay"; }; ahub_daudio0:ahub_daudio0@0x05097000{ compatible = "allwinner,sunxi-ahub-daudio"; reg = <0x0 0x05097000 0x0 0xADF>; clocks = <&clk_pll_audio>,<&clk_ahub>; pinctrl-names = "default","sleep"; pinctrl-0 = <&ahub_daudio0_pins_a>; pinctrl-1 = <&ahub_daudio0_pins_b>; pinconfig = <0x1>; frametype = <0x0>; pcm_lrck_period = <0x20>; slot_width_select = <0x20>; daudio_master = <0x04>; audio_format = <0x01>; signal_inversion = <0x01>; tdm_config = <0x01>; tdm_num = <0x0>; mclk_div = <0x0>; status = "disabled"; }; ahub_daudio1:ahub_daudio1@0x05097000{ compatible = "allwinner,sunxi-ahub-daudio"; reg = <0x0 0x05097000 0x0 0xADF>; clocks = <&clk_pll_audio>,<&clk_ahub>; pinconfig = <0x0>; frametype = <0x0>; pcm_lrck_period = <0x20>; slot_width_select = <0x20>; daudio_master = <0x04>; audio_format = <0x01>; signal_inversion = <0x01>; tdm_config = <0x01>; tdm_num = <0x1>; mclk_div = <0x0>; status = "okay"; }; ahub_daudio2:ahub_daudio2@0x05097000{ compatible = "allwinner,sunxi-ahub-daudio"; reg = <0x0 0x05097000 0x0 0xADF>; clocks = <&clk_pll_audio>,<&clk_ahub>; pinctrl-names = "default","sleep"; pinctrl-0 = <&ahub_daudio2_pins_a>; pinctrl-1 = <&ahub_daudio2_pins_b>; pinconfig = <0x1>; frametype = <0x0>; pcm_lrck_period = <0x20>; slot_width_select = <0x20>; daudio_master = <0x04>; audio_format = <0x01>; signal_inversion = <0x01>; tdm_config = <0x01>; tdm_num = <0x2>; mclk_div = <0x0>; status = "okay"; }; ahub_daudio3:ahub_daudio3@0x05097000{ compatible = "allwinner,sunxi-ahub-daudio"; reg = <0x0 0x05097000 0x0 0xADF>; clocks = <&clk_pll_audio>,<&clk_ahub>; pinctrl-names = "default","sleep"; pinctrl-0 = <&ahub_daudio3_pins_a>; pinctrl-1 = <&ahub_daudio3_pins_b>; pinconfig = <0x1>; frametype = <0x0>; pcm_lrck_period = <0x20>; slot_width_select = <0x20>; daudio_master = <0x04>; audio_format = <0x01>; signal_inversion = <0x01>; tdm_config = <0x01>; tdm_num = <0x3>; mclk_div = <0x4>; status = "okay"; }; snddaudio0:sound@0{ compatible = "allwinner,sunxi-daudio0-machine"; sunxi,daudio-controller = <&daudio0>; sunxi,cpudai-controller = <&ahub_daudio0>; status = "disable"; }; sndhdmi:sound@1{ compatible = "allwinner,sunxi-hdmi-machine"; sunxi,hdmi-controller = <&audiohdmi>; sunxi,cpudai-controller = <&ahub_daudio1>; status = "okay"; }; snddaudio2:sound@2{ compatible = "allwinner,sunxi-daudio2-machine"; sunxi,daudio-controller = <&daudio2>; sunxi,cpudai-controller = <&ahub_daudio2>; status = "okay"; }; snddaudio3:sound@3{ compatible = "allwinner,sunxi-daudio3-machine"; sunxi,daudio-controller = <&daudio3>; sunxi,cpudai-controller = <&ahub_daudio3>; /* acx00-codec throught mfd_add_devices */ sunxi,snddaudio-codec = "acx00-codec"; sunxi,snddaudio-codec-dai = "acx00-dai"; status = "okay"; }; sndspdif:sound@4{ compatible = "allwinner,sunxi-spdif-machine"; sunxi,spdif-controller = <&spdif>; status = "disabled"; }; snddmic:sound@5{ compatible = "allwinner,sunxi-dmic-machine"; sunxi,dmic-controller = <&dmic>; status = "disabled"; }; sndahub:sound@6{ compatible = "allwinner,sunxi-ahub-machine"; sunxi,cpudai-controller0 = <&ahub_cpudai0>; sunxi,cpudai-controller1 = <&ahub_cpudai1>; sunxi,cpudai-controller2 = <&ahub_cpudai2>; sunxi,audio-codec = <&ahub_codec>; status = "okay"; }; spi0: spi@05010000 { #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sun50i-spi"; device_type = "spi0"; reg = <0x0 0x05010000 0x0 0x1000>; interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_pll_periph0>, <&clk_spi0>; clock-frequency = <100000000>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&spi0_pins_a &spi0_pins_b>; pinctrl-1 = <&spi0_pins_c>; spi0_cs_number = <1>; spi0_cs_bitmap = <1>; status = "disabled"; }; spi1: spi@05011000 { #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sun50i-spi"; device_type = "spi1"; reg = <0x0 0x05011000 0x0 0x1000>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_pll_periph0>, <&clk_spi1>; clock-frequency = <100000000>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&spi1_pins_a &spi1_pins_b>; pinctrl-1 = <&spi1_pins_c>; spi1_cs_number = <1>; spi1_cs_bitmap = <1>; status = "disabled"; }; pcie: pcie@0x05400000 { #address-cells = <3>; #size-cells = <2>; compatible = "allwinner,sun50i-pcie"; reg = <0 0x05400000 0 0x2000>, <0 0x05410000 0 0x10000>; reg-names = "dbi", "config"; device_type = "pci"; ranges = <0x00000800 0 0x05410000 0 0x05410000 0 0x00010000 /* configuration space */ 0x81000000 0 0 0 0x05e00000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0x05500000 0 0x05500000 0 0x00800000>; /* non-prefetchable memory */ num-lanes = <1>; interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "msi"; clocks = <&clk_pcieref>, <&clk_pciemaxi>, <&clk_pcieaux>, <&clk_pcie_bus>, <&clk_pcie_power>, <&clk_pcie_rst>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; status = "okay"; }; sdc2: sdmmc@04022000 { compatible = "allwinner,sunxi-mmc-v4p6x"; device_type = "sdc2"; reg = <0x0 0x04022000 0x0 0x1000>; interrupts = <GIC_SPI 37 0x0104>; clocks = <&clk_hosc>, <&clk_pll_periph1x2>, <&clk_sdmmc2_mod>, <&clk_sdmmc2_bus>, <&clk_sdmmc2_rst>; clock-names = "osc24m","pll_periph","mmc","ahb","rst"; pinctrl-names = "default","sleep"; pinctrl-0 = <&sdc2_pins_a>; pinctrl-1 = <&sdc2_pins_b>; bus-width = <8>; /*mmc-ddr-1_8v;*/ /*mmc-hs200-1_8v;*/ /*mmc-hs400-1_8v;*/ /*non-removable;*/ /*max-frequency = <200000000>;*/ max-frequency = <50000000>; cap-sd-highspeed; cap-mmc-highspeed; cap-erase; mmc-high-capacity-erase-size; no-sdio; no-sd; /*-- speed mode --*/ /*sm0: DS26_SDR12*/ /*sm1: HSSDR52_SDR25*/ /*sm2: HSDDR52_DDR50*/ /*sm3: HS200_SDR104*/ /*sm4: HS400*/ /*-- frequency point -- /*f0: CLK_400K*/ /*f1: CLK_25M*/ /*f2: CLK_50M*/ /*f3: CLK_100M*/ /*f4: CLK_150M*/ /*f5: CLK_200M*/ sdc_tm4_sm0_freq0 = <0>; sdc_tm4_sm0_freq1 = <0>; sdc_tm4_sm1_freq0 = <0x00000000>; sdc_tm4_sm1_freq1 = <0>; sdc_tm4_sm2_freq0 = <0x00000000>; sdc_tm4_sm2_freq1 = <0>; sdc_tm4_sm3_freq0 = <0x05000000>; sdc_tm4_sm3_freq1 = <0x00000005>; sdc_tm4_sm4_freq0 = <0x00050000>; sdc_tm4_sm4_freq1 = <0x00000004>; /*vmmc-supply = <&reg_3p3v>;*/ /*vqmc-supply = <&reg_3p3v>;*/ /*vdmc-supply = <&reg_3p3v>;*/ /*vmmc = "vcc-card";*/ /*vqmc = "";*/ /*vdmc = "";*/ /*sunxi-power-save-mode;*/ /*status = "disabled";*/ status = "okay"; }; sdc0: sdmmc@04020000 { compatible = "allwinner,sunxi-mmc-v4p1x"; device_type = "sdc0"; reg = <0x0 0x04020000 0x0 0x1000>; interrupts = <GIC_SPI 35 0x0104>; clocks = <&clk_hosc>, <&clk_pll_periph1x2>, <&clk_sdmmc0_mod>, <&clk_sdmmc0_bus>, <&clk_sdmmc0_rst>; clock-names = "osc24m","pll_periph","mmc","ahb","rst"; pinctrl-names = "default","sleep"; pinctrl-0 = <&sdc0_pins_a>; pinctrl-1 = <&sdc0_pins_b>; max-frequency = <50000000>; bus-width = <4>; /*non-removable;*/ /*broken-cd;*/ /*cd-inverted*/ cd-gpios = <&pio PF 6 0 1 2 0>; /* vmmc-supply = <&reg_3p3v>;*/ /* vqmc-supply = <&reg_3p3v>;*/ /* vdmc-supply = <&reg_3p3v>;*/ /*vmmc = "vcc-card";*/ /*vqmc = "";*/ /*vdmc = "";*/ cap-sd-highspeed; cap-mmc-highspeed; no-sdio; no-mmc; /*sd-uhs-sdr50;*/ /*sd-uhs-ddr50;*/ /*cap-sdio-irq;*/ /*keep-power-in-suspend;*/ /*ignore-pm-notify;*/ /*sunxi-power-save-mode;*/ /*sunxi-dly-400k = <1 0 0 0>; */ /*sunxi-dly-26M = <1 0 0 0>;*/ /*sunxi-dly-52M = <1 0 0 0>;*/ /*sunxi-dly-52M-ddr4 = <1 0 0 0>;*/ /*sunxi-dly-52M-ddr8 = <1 0 0 0>;*/ /*sunxi-dly-104M = <1 0 0 0>;*/ /*sunxi-dly-208M = <1 0 0 0>;*/ /*sunxi-dly-104M-ddr = <1 0 0 0>;*/ /*sunxi-dly-208M-ddr = <1 0 0 0>;*/ status = "okay"; }; sdc1: sdmmc@04021000 { compatible = "allwinner,sunxi-mmc-v4p1x"; device_type = "sdc1"; reg = <0x0 0x04021000 0x0 0x1000>; interrupts = <GIC_SPI 36 0x0104>; clocks = <&clk_hosc>, <&clk_pll_periph1x2>, <&clk_sdmmc1_mod>, <&clk_sdmmc1_bus>, <&clk_sdmmc1_rst>; clock-names = "osc24m","pll_periph","mmc","ahb","rst"; pinctrl-names = "default","sleep"; pinctrl-0 = <&sdc1_pins_a>; pinctrl-1 = <&sdc1_pins_b>; max-frequency = <50000000>; bus-width = <4>; /*broken-cd;*/ /*cd-inverted*/ /*cd-gpios = <&pio PG 6 6 1 2 0>;*/ /* vmmc-supply = <&reg_3p3v>;*/ /* vqmc-supply = <&reg_3p3v>;*/ /* vdmc-supply = <&reg_3p3v>;*/ /*vmmc = "vcc-card";*/ /*vqmc = "";*/ /*vdmc = "";*/ cap-sd-highspeed; cap-mmc-highspeed; no-mmc; /*sd-uhs-sdr50;*/ /*sd-uhs-ddr50;*/ /*sd-uhs-sdr104;*/ /*cap-sdio-irq;*/ /*keep-power-in-suspend;*/ /*ignore-pm-notify;*/ /*sunxi-power-save-mode;*/ /*sunxi-dly-400k = <1 0 0 0 0>; */ /*sunxi-dly-26M = <1 0 0 0 0>;*/ /*sunxi-dly-52M = <1 0 0 0 0>;*/ sunxi-dly-52M-ddr4 = <1 0 0 0 2>; /*sunxi-dly-52M-ddr8 = <1 0 0 0 0>;*/ sunxi-dly-104M = <1 0 0 0 1>; /*sunxi-dly-208M = <1 1 0 0 0>;*/ sunxi-dly-208M = <1 0 0 0 1>; /*sunxi-dly-104M-ddr = <1 0 0 0 0>;*/ /*sunxi-dly-208M-ddr = <1 0 0 0 0>;*/ status = "disabled"; }; disp: disp@01000000 { compatible = "allwinner,sunxi-disp"; reg = <0x0 0x01000000 0x0 0x01400000>,/*de*/ <0x0 0x06510000 0x0 0x100>,/*tcon-top*/ <0x0 0x06511000 0x0 0x800>,/*tcon0*/ <0x0 0x06515000 0x0 0x800>;/*tcon1*/ interrupts = <GIC_SPI 65 0x0104>, <GIC_SPI 66 0x0104>; clocks = <&clk_de>, <&clk_display_top>, <&clk_tcon_lcd>, <&clk_tcon_tv>; boot_disp = <0>; boot_disp1 = <0>; boot_disp2 = <0>; fb_base = <0>; iommus = <&mmu_aw 0 0>; status = "okay"; }; lcd0: lcd0@01c0c000 { compatible = "allwinner,sunxi-lcd0"; pinctrl-names = "active","sleep"; status = "okay"; }; lcd1: lcd1@01c0c001 { compatible = "allwinner,sunxi-lcd1"; pinctrl-names = "active","sleep"; status = "okay"; }; hdmi: hdmi@06000000 { compatible = "allwinner,sunxi-hdmi"; reg = <0x0 0x06000000 0x0 0x100000>; interrupts = <GIC_SPI 64 IRQ_TYPE_NONE>; clocks = <&clk_hdmi>,<&clk_hdmi_slow>,<&clk_hdmi_hdcp>,<&clk_hdmi_cec>; pinctrl-names = "ddc_active","ddc_sleep","cec_active", "cec_sleep"; pinctrl-0 = <&hdmi_ddc_pin_a>; pinctrl-1 = <&hdmi_ddc_pin_b>; pinctrl-2 = <&hdmi_cec_pin_a>; pinctrl-3 = <&hdmi_cec_pin_b>; status = "okay"; }; tv0: tv0@01c94000 { compatible = "allwinner,sunxi-tv"; reg = <0x0 0x01e40000 0x0 0x1000>; /* clocks = <&clk_tve>; */ status = "disabled"; }; soc_tr: tr@01000000 { compatible = "allwinner,sun50i-tr"; reg = <0x0 0x01000000 0x0 0x000200bc>; interrupts = <GIC_SPI 96 0x0104>; clocks = <&clk_de>; status = "okay"; }; pwm: pwm@0300a000 { compatible = "allwinner,sunxi-pwm"; reg = <0x0 0x0300a000 0x0 0x3c>; clocks = <&clk_pwm>; pwm-number = <2>; pwm-base = <0x0>; pwms = <&pwm0>, <&pwm1>; }; pwm0: pwm0@0300a000 { compatible = "allwinner,sunxi-pwm0"; pinctrl-names = "active", "sleep"; reg_base = <0x0300a000>; reg_busy_offset = <0x00>; reg_busy_shift = <28>; reg_enable_offset = <0x00>; reg_enable_shift = <4>; reg_clk_gating_offset = <0x00>; reg_clk_gating_shift = <6>; reg_bypass_offset = <0x00>; reg_bypass_shift = <9>; reg_pulse_start_offset = <0x00>; reg_pulse_start_shift = <8>; reg_mode_offset = <0x00>; reg_mode_shift = <7>; reg_polarity_offset = <0x00>; reg_polarity_shift = <5>; reg_period_offset = <0x04>; reg_period_shift = <16>; reg_period_width = <16>; reg_active_offset = <0x04>; reg_active_shift = <0>; reg_active_width = <16>; reg_prescal_offset = <0x00>; reg_prescal_shift = <0>; reg_prescal_width = <4>; }; pwm1: pwm1@0300a000 { compatible = "allwinner,sunxi-pwm1"; pinctrl-names = "active", "sleep"; reg_base = <0x0300a000>; reg_busy_offset = <0x00>; reg_busy_shift = <29>; reg_enable_offset = <0x00>; reg_enable_shift = <19>; reg_clk_gating_offset = <0x00>; reg_clk_gating_shift = <21>; reg_bypass_offset = <0x00>; reg_bypass_shift = <24>; reg_pulse_start_offset = <0x00>; reg_pulse_start_shift = <23>; reg_mode_offset = <0x00>; reg_mode_shift = <22>; reg_polarity_offset = <0x00>; reg_polarity_shift = <20>; reg_period_offset = <0x08>; reg_period_shift = <16>; reg_period_width = <16>; reg_active_offset = <0x08>; reg_active_shift = <0>; reg_active_width = <16>; reg_prescal_offset = <0x00>; reg_prescal_shift = <15>; reg_prescal_width = <4>; }; s_pwm: s_pwm@07020c00 { compatible = "allwinner,sunxi-s_pwm"; reg = <0x0 0x07020c00 0x0 0x3c>; clocks = <&clk_spwm>; pwm-number = <1>; pwm-base = <0x10>; pwms = <&spwm0>; }; spwm0: spwm0@07020c00 { compatible = "allwinner,sunxi-pwm16"; pinctrl-names = "active", "sleep"; reg_base = <0x07020c00>; reg_busy_offset = <0x00>; reg_busy_shift = <28>; reg_enable_offset = <0x00>; reg_enable_shift = <4>; reg_clk_gating_offset = <0x00>; reg_clk_gating_shift = <6>; reg_bypass_offset = <0x00>; reg_bypass_shift = <9>; reg_pulse_start_offset = <0x00>; reg_pulse_start_shift = <8>; reg_mode_offset = <0x00>; reg_mode_shift = <7>; reg_polarity_offset = <0x00>; reg_polarity_shift = <5>; reg_period_offset = <0x04>; reg_period_shift = <16>; reg_period_width = <16>; reg_active_offset = <0x04>; reg_active_shift = <0>; reg_active_width = <16>; reg_prescal_offset = <0x00>; reg_prescal_shift = <0>; reg_prescal_width = <4>; }; boot_disp: boot_disp { compatible = "allwinner,boot_disp"; }; ac200: ac200 { compatible = "allwinner,sunxi-ac200"; clocks = <&clk_tcon_lcd>; pinctrl-names = "active","sleep", "ccir_clk_active", "ccir_clk_sleep"; pinctrl-2 = <&ccir_clk_pin_a>; pinctrl-3 = <&ccir_clk_pin_b>; status = "okay"; }; vind0:vind@0 { compatible = "allwinner,sunxi-vin-media", "simple-bus"; #address-cells = <2>; #size-cells = <2>; ranges; device_id = <0>; reg = <0x0 0x06620000 0x0 0x1000>; clocks = <&clk_csi_top>, <&clk_pll_periph0>, <&clk_csi_master0>, <&clk_hosc>, <&clk_pll_periph0>; pinctrl-names = "mclk0-default","mclk0-sleep"; pinctrl-0 = <&csi_mclk0_pins_a>; pinctrl-1 = <&csi_mclk0_pins_b>; status = "okay"; csi_cci0:cci@0x0662e000 { compatible = "allwinner,sunxi-csi_cci"; reg = <0x0 0x0662e000 0x0 0x1000>; interrupts = <GIC_SPI 72 4>; clocks = <&clk_csi_misc>; pinctrl-names = "default","sleep"; pinctrl-0 = <&csi_cci0_pins_a>; pinctrl-1 = <&csi_cci0_pins_b>; device_id = <0>; status = "okay"; }; csi0:csi@0x06621000 { device_type = "csi0"; compatible = "allwinner,sunxi-csi"; reg = <0x0 0x06621000 0x0 0x1000>; interrupts = <GIC_SPI 70 4>; pinctrl-names = "default","sleep"; pinctrl-0 = <&csi0_pins_a>; pinctrl-1 = <&csi0_pins_b>; device_id = <0>; iommus = <&mmu_aw 4 1>; status = "okay"; }; csi1:csi@1 { device_type = "csi1"; compatible = "allwinner,sunxi-csi"; device_id = <1>; iommus = <&mmu_aw 4 1>; status = "disabled"; }; mipi0:mipi@0 { compatible = "allwinner,sunxi-mipi"; device_id = <0>; status = "disabled"; }; mipi1:mipi@1 { compatible = "allwinner,sunxi-mipi"; device_id = <1>; status = "disabled"; }; isp0:isp@0 { compatible = "allwinner,sunxi-isp"; reg = <0x0 0x02100000 0x0 0x800>; interrupts = <GIC_SPI 86 4>; device_id = <0>; iommus = <&mmu_aw 4 1>; status = "okay"; }; isp1:isp@1 { compatible = "allwinner,sunxi-isp"; reg = <0x0 0x02100800 0x0 0x800>; device_id = <1>; iommus = <&mmu_aw 4 1>; status = "disabled"; }; scaler0:scaler@0x02101000 { compatible = "allwinner,sunxi-scaler"; reg = <0x0 0x02101000 0x0 0x400>; device_id = <0>; iommus = <&mmu_aw 4 1>; status = "okay"; }; scaler1:scaler@0x02101400 { compatible = "allwinner,sunxi-scaler"; reg = <0x0 0x02101400 0x0 0x400>; device_id = <1>; iommus = <&mmu_aw 4 1>; status = "okay"; }; scaler2:scaler@2 { compatible = "allwinner,sunxi-scaler"; device_id = <2>; iommus = <&mmu_aw 4 1>; status = "disabled"; }; scaler3:scaler@3 { compatible = "allwinner,sunxi-scaler"; device_id = <3>; iommus = <&mmu_aw 4 1>; status = "disabled"; }; actuator0:actuator@0 { device_type = "actuator0"; compatible = "allwinner,sunxi-actuator"; actuator0_name = "ad5820_act"; actuator0_slave = <0x18>; actuator0_af_pwdn = <>; actuator0_afvdd = "afvcc-csi"; actuator0_afvdd_vol = <2800000>; status = "disabled"; }; flash0:flash@0 { device_type = "flash0"; compatible = "allwinner,sunxi-flash"; flash0_type = <2>; flash0_en = <>; flash0_mode = <>; flash0_flvdd = ""; flash0_flvdd_vol = <>; device_id = <0>; status = "disabled"; }; sensor0:sensor@0 { device_type = "sensor0"; sensor0_mname = "ov5640"; sensor0_twi_cci_id = <0>; sensor0_twi_addr = <0x78>; sensor0_pos = "rear"; sensor0_isp_used = <0>; sensor0_fmt = <0>; sensor0_stby_mode = <0>; sensor0_vflip = <0>; sensor0_hflip = <0>; sensor0_iovdd = "iovdd-csi"; sensor0_iovdd_vol = <2800000>; sensor0_avdd = "avdd-csi"; sensor0_avdd_vol = <2800000>; sensor0_dvdd = "dvdd-csi-18"; sensor0_dvdd_vol = <1500000>; sensor0_power_en = <>; sensor0_reset = <&pio PE 14 1 0 1 0>; sensor0_pwdn = <&pio PE 16 1 0 1 0>; flash_handle = <&flash0>; act_handle = <&actuator0>; status = "okay"; }; sensor1:sensor@1 { device_type = "sensor1"; sensor1_mname = "ov5647"; sensor1_twi_cci_id = <0>; sensor1_twi_addr = <0x6c>; sensor1_pos = "front"; sensor1_isp_used = <0>; sensor1_fmt = <0>; sensor1_stby_mode = <0>; sensor1_vflip = <0>; sensor1_hflip = <0>; sensor1_iovdd = "iovdd-csi"; sensor1_iovdd_vol = <2800000>; sensor1_avdd = "avdd-csi"; sensor1_avdd_vol = <2800000>; sensor1_dvdd = "dvdd-csi-18"; sensor1_dvdd_vol = <1500000>; sensor1_power_en = <>; sensor1_reset = <&pio PE 14 1 0 1 0>; sensor1_pwdn = <&pio PE 15 1 0 1 0>; flash_handle = <>; act_handle = <>; status = "okay"; }; vinc0:vinc@0x06623000 { device_type = "vinc0"; compatible = "allwinner,sunxi-vin-core"; reg = <0x0 0x06623000 0x0 0x100>; interrupts = <GIC_SPI 67 4>; vinc0_csi_sel = <0>; vinc0_mipi_sel = <0xff>; vinc0_isp_sel = <0>; vinc0_sensor_sel = <0>; vinc0_sensor_list = <0>; isp_handle = <&isp0 &isp1>; sensor_handle = <&sensor0 &sensor1>; device_id = <0>; iommus = <&mmu_aw 4 1>; status = "okay"; }; vinc1:vinc@0x06623100 { device_type = "vinc1"; compatible = "allwinner,sunxi-vin-core"; reg = <0x0 0x06623100 0x0 0x100>; interrupts = <GIC_SPI 68 4>; vinc1_csi_sel = <0>; vinc1_mipi_sel = <0xff>; vinc1_isp_sel = <0>; vinc1_sensor_sel = <1>; vinc1_sensor_list = <0>; isp_handle = <&isp0 &isp1>; sensor_handle = <&sensor0 &sensor1>; device_id = <1>; iommus = <&mmu_aw 4 1>; status = "okay"; }; }; Vdevice: vdevice@0 { compatible = "allwinner,sun50i-vdevice"; device_type = "Vdevice"; pinctrl-names = "default"; pinctrl-0 = <&vdevice_pins_a>; test-gpios = <&pio PB 0 1 2 2 1>; status = "disabled"; }; emce: emce@01905000 { compatible = "allwinner,sunxi-emce"; device_name = "emce"; reg = <0x0 0x01905000 0 0x100>; clock-frequency = <300000000>; /*300MHZ*/ clocks = <&clk_emce>, <&clk_pll_periph0x2>; }; cryptoengine: ce@1904000 { compatible = "allwinner,sunxi-ce"; device_name = "ce"; reg = <0x0 0x01904000 0x0 0xa0>, /* non-secure space */ <0x0 0x01904800 0x0 0xa0>; /* secure space */ interrupts = <GIC_SPI 87 0xff01>, /* non-secure space */ <GIC_SPI 88 0xff01>; /* secure space */ clock-frequency = <300000000>; /* 300MHz */ clocks = <&clk_ce>, <&clk_pll_periph0x2>; }; di:deinterlace@0x01420000{ #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sunxi-deinterlace"; reg = <0x0 0x01420000 0x0 0x20c>; interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_di> ,<&clk_pll_periph0>; iommus = <&mmu_aw 2 1>; status = "okay"; }; scr0:smartcard@0x05005000{ #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sunxi-scr"; device_type = "scr0"; reg = <0x0 0x05005000 0x0 0x400>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_scr0>, <&clk_apb2>; clock-frequency = <24000000>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&scr0_pins_a &scr0_pins_b>; pinctrl-1 = <&scr0_pins_c>; status = "disabled"; }; scr1:smartcard@0x05005400{ #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sunxi-scr"; device_type = "scr1"; reg = <0x0 0x05005400 0x0 0x400>; interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_scr1>, <&clk_apb2>; clock-frequency = <24000000>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&scr1_pins_a &scr1_pins_b>; pinctrl-1 = <&scr1_pins_c>; status = "disabled"; }; pmu0: pmu@0{ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; status = "okay"; powerkey0: powerkey@0{ status = "okay"; }; regulator0: regulator@0{ status = "okay"; }; axp_gpio0: axp_gpio@0{ gpio-controller; #size-cells = <0>; #gpio-cells = <6>; status = "okay"; device_type = "axp_pio"; }; charger0: charger@0{ status = "disabled"; }; }; nmi:nmi@0x01f00c00{ #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sunxi-nmi"; reg = <0x0 0x01f00c00 0x0 0x50>; nmi_irq_ctrl = <0x0c>; nmi_irq_en = <0x40>; nmi_irq_status = <0x10>; nmi_irq_mask = <0x50>; status = "okay"; }; nand0:nand0@04011000 { compatible = "allwinner,sun50iw6-nand"; device_type = "nand0"; reg = <0x0 0x04011000 0x0 0x1000>;/* nand0 */ interrupts = <GIC_SPI 34 0x04>; clocks = <&clk_pll_periph0x2>,<&clk_nand0>,<&clk_nand1>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&nand0_pins_a &nand0_pins_b>; pinctrl-1 = <&nand0_pins_c>; nand0_regulator1 = "vcc-nand"; nand0_regulator2 = "none"; nand0_cache_level = <0x55aaaa55>; nand0_flush_cache_num = <0x55aaaa55>; nand0_capacity_level = <0x55aaaa55>; nand0_id_number_ctl = <0x55aaaa55>; nand0_print_level = <0x55aaaa55>; nand0_p0 = <0x55aaaa55>; nand0_p1 = <0x55aaaa55>; nand0_p2 = <0x55aaaa55>; nand0_p3 = <0x55aaaa55>; status = "okay"; }; ts0:ts0@05060000 { compatible = "allwinner,sun50i-tsc"; device_type = "ts0"; reg = <0x0 0x05060000 0x0 0x1000>; interrupts = <GIC_SPI 14 4>; clocks = <&clk_pll_periph0>,<&clk_ts>; clock-frequency = <120000000>; pinctrl-names = "ts0-default","ts1-default", "ts2-default","ts3-default", "ts0-sleep","ts1-sleep", "ts2-sleep","ts3-sleep"; pinctrl-0 = <&ts0_pins_a>; pinctrl-1 = <&ts1_pins_a>; pinctrl-2 = <&ts2_pins_a>; pinctrl-3 = <&ts3_pins_a>; pinctrl-4 = <&ts0_pins_b>; pinctrl-5 = <&ts1_pins_b>; pinctrl-6 = <&ts2_pins_b>; pinctrl-7 = <&ts3_pins_b>; ts0config = <0x1>; ts1config = <0x0>; ts2config = <0x0>; ts3config = <0x0>; status = "okay"; }; sunxi_thermal_sensor:thermal_sensor{ compatible = "allwinner,thermal_sensor"; reg = <0x0 0x05070400 0x0 0x400>; interrupts = <GIC_SPI 15 IRQ_TYPE_NONE>; clocks = <&clk_hosc>,<&clk_ths>; sensor_num = <2>; combine_num = <2>; alarm_low_temp = <105>; alarm_high_temp = <110>; alarm_temp_hysteresis = <15>; shut_temp= <115>; status = "okay"; ths_combine0:ths_combine0{ compatible = "allwinner,ths_combine0"; #thermal-sensor-cells = <1>; combine_sensor_num = <1>; combine_sensor_type = "cpu"; combine_sensor_temp_type = "max"; combine_sensor_id = <0>; }; ths_combine1:ths_combine1{ compatible = "allwinner,ths_combine1"; #thermal-sensor-cells = <1>; combine_sensor_num = <1>; combine_sensor_type = "gpu"; combine_sensor_temp_type = "max"; combine_sensor_id = <1>; }; }; cpu_budget_cooling:cpu_budget_cool{ device_type = "cpu_budget_cool"; compatible = "allwinner,budget_cooling"; #cooling-cells = <2>; status = "okay"; state_cnt = <7>; cluster_num = <1>; state0 = <1800000 4>; state1 = <1488000 4>; state2 = <1320000 3>; state3 = <1080000 2>; state4 = <888000 1>; state5 = <720000 1>; state6 = <480000 1>; }; gpu_cooling:gpu_cooling{ compatible = "allwinner,gpu_cooling"; reg = <0x0 0x0 0x0 0x0>; #cooling-cells = <2>; status = "okay"; state_cnt = <4>; state0 = <0>; state1 = <1>; state2 = <2>; state3 = <3>; }; thermal-zones{ cpu_thermal_zone{ polling-delay-passive = <1000>; polling-delay = <1000>; thermal-sensors = <&ths_combine0 0>; trips{ cpu_trip0:t0{ temperature = <60>; type = "passive"; hysteresis = <0>; }; cpu_trip1:t1{ temperature = <90>; type = "passive"; hysteresis = <0>; }; cpu_trip2:t2{ temperature = <95>; type = "passive"; hysteresis = <0>; }; cpu_trip3:t3{ temperature = <100>; type = "passive"; hysteresis = <0>; }; cpu_trip4:t4{ temperature = <105>; type = "passive"; hysteresis = <0>; }; cpu_trip5:t5{ temperature = <110>; type = "passive"; hysteresis = <0>; }; crt_trip0:t6{ temperature = <115>; type = "critical"; hysteresis = <0>; }; }; cooling-maps{ bind0{ contribution = <0>; trip = <&cpu_trip0>; cooling-device = <&cpu_budget_cooling 1 1>; }; bind1{ contribution = <0>; trip = <&cpu_trip1>; cooling-device = <&cpu_budget_cooling 2 2>; }; bind2{ contribution = <0>; trip = <&cpu_trip2>; cooling-device = <&cpu_budget_cooling 3 3>; }; bind3{ contribution = <0>; trip = <&cpu_trip3>; cooling-device = <&cpu_budget_cooling 4 4>; }; bind4{ contribution = <0>; trip = <&cpu_trip4>; cooling-device = <&cpu_budget_cooling 5 5>; }; bind5{ contribution = <0>; trip = <&cpu_trip5>; cooling-device = <&cpu_budget_cooling 6 6>; }; }; }; gpu_thermal_zone{ polling-delay-passive = <1000>; polling-delay = <2000>; thermal-sensors = <&ths_combine1 1>; trips{ gpu_trip0:t0{ temperature = <95>; type = "passive"; hysteresis = <0>; }; gpu_trip1:t1{ temperature = <100>; type = "passive"; hysteresis = <0>; }; gpu_trip2:t2{ temperature = <105>; type = "passive"; hysteresis = <0>; }; crt_trip1:t3{ temperature = <115>; type = "critical"; hysteresis = <0>; }; }; cooling-maps{ bind0{ contribution = <0>; trip = <&gpu_trip0>; cooling-device = <&gpu_cooling 1 1>; }; bind1{ contribution = <0>; trip = <&gpu_trip1>; cooling-device = <&gpu_cooling 2 2>; }; bind2{ contribution = <0>; trip = <&gpu_trip2>; cooling-device = <&gpu_cooling 3 3>; }; }; }; }; keyboard0:keyboard{ compatible = "allwinner,keyboard_1200mv"; reg = <0x0 0x05070800 0x0 0x400>; interrupts = <GIC_SPI 16 IRQ_TYPE_NONE>; status = "okay"; key_cnt = <5>; key0 = <115 115>; key1 = <235 114>; key2 = <330 139>; key3 = <420 28>; key4 = <520 102>; }; gmac0: eth@05020000 { compatible = "allwinner,sunxi-gmac"; reg = <0x0 0x05020000 0x0 0x10000>, <0x0 0x03000030 0x0 0x4>; interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "gmacirq"; clocks = <&clk_gmac>; clock-names = "gmac"; pinctrl-0 = <&gmac_pins_a>; pinctrl-1 = <&gmac_pins_b>; pinctrl-names = "default", "sleep"; phy-mode; tx-delay = <7>; rx-delay = <31>; phy-rst; gmac-power0; gmac-power1; gmac-power2; status = "disable"; }; }; gpu: gpu@0x01800000 { device_type = "gpu"; compatible = "arm,mali-t720", "arm,mali-midgard"; reg = <0x0 0x01800000 0x0 0x4000>; interrupts = <GIC_SPI 83 4>, <GIC_SPI 84 4>, <GIC_SPI 85 4>; interrupt-names = "GPU", "JOB", "MMU"; clocks = <&clk_pll_gpu>, <&clk_gpu>; clock-names = "clk_parent", "clk_mali"; operating-points = < /* KHz uV */ 756000 1040000 624000 950000 576000 930000 540000 910000 504000 890000 456000 870000 432000 860000 420000 850000 408000 840000 384000 830000 360000 820000 336000 810000 312000 810000 264000 810000 216000 810000 >; }; }; sun50iw6p1-clk.dtsi /{ clocks { compatible = "allwinner,clk-init"; device_type = "clocks"; #address-cells = <2>; #size-cells = <2>; ranges; reg = <0x0 0x03001000 0x0 0x1000>, /*cpux space*/ <0x0 0x07010000 0x0 0x400>, /*cpus space*/ <0x0 0x07000000 0x0 0x4>; /* register fixed rate clock*/ clk_losc: losc { #clock-cells = <0>; compatible = "allwinner,fixed-clock"; clock-frequency = <32768>; clock-output-names = "losc"; }; clk_iosc: iosc { #clock-cells = <0>; compatible = "allwinner,fixed-clock"; clock-frequency = <16000000>; clock-output-names = "iosc"; }; clk_hosc: hosc { #clock-cells = <0>; compatible = "allwinner,fixed-clock"; clock-frequency = <24000000>; clock-output-names = "hosc"; }; clk_osc48m: osc48m { #clock-cells = <0>; compatible = "allwinner,fixed-clock"; clock-frequency = <48000000>; clock-output-names = "osc48m"; }; /* register allwinner,pll-clock */ clk_pll_cpu: pll_cpu { #clock-cells = <0>; compatible = "allwinner,pll-clock"; lock-mode = "new"; clock-output-names = "pll_cpu"; }; clk_pll_ddr0: pll_ddr0 { #clock-cells = <0>; compatible = "allwinner,pll-clock"; lock-mode = "new"; clock-output-names = "pll_ddr0"; }; clk_pll_periph0: pll_periph0 { #clock-cells = <0>; compatible = "allwinner,pll-clock"; assigned-clock-rates = <600000000>; lock-mode = "new"; clock-output-names = "pll_periph0"; }; clk_pll_periph1: pll_periph1 { #clock-cells = <0>; compatible = "allwinner,pll-clock"; assigned-clock-rates = <600000000>; lock-mode = "new"; clock-output-names = "pll_periph1"; }; clk_pll_gpu: pll_gpu { #clock-cells = <0>; compatible = "allwinner,pll-clock"; lock-mode = "new"; clock-output-names = "pll_gpu"; }; clk_pll_video0: pll_video0 { #clock-cells = <0>; compatible = "allwinner,pll-clock"; lock-mode = "new"; clock-output-names = "pll_video0"; }; clk_pll_video1: pll_video1 { #clock-cells = <0>; compatible = "allwinner,pll-clock"; lock-mode = "new"; assigned-clock-rates = <594000000>; clock-output-names = "pll_video1"; }; clk_pll_ve: pll_ve { #clock-cells = <0>; compatible = "allwinner,pll-clock"; device_type = "clk_pll_ve"; lock-mode = "new"; /*assigned-clock-rates = <??>*/ clock-output-names = "pll_ve"; }; clk_pll_de: pll_de { #clock-cells = <0>; compatible = "allwinner,pll-clock"; assigned-clock-rates = <696000000>; lock-mode = "new"; clock-output-names = "pll_de"; }; clk_pll_hsic: pll_hsic { #clock-cells = <0>; compatible = "allwinner,pll-clock"; lock-mode = "new"; clock-output-names = "pll_hsic"; }; clk_pll_audio: pll_audio { #clock-cells = <0>; compatible = "allwinner,pll-clock"; lock-mode = "new"; clock-output-names = "pll_audio"; }; /* register fixed factor clock*/ clk_pll_periph0x2: pll_periph0x2 { #clock-cells = <0>; compatible = "allwinner,fixed-factor-clock"; clocks = <&clk_pll_periph0>; clock-mult = <2>; clock-div = <1>; clock-output-names = "pll_periph0x2"; }; clk_pll_periph0x4: pll_periph0x4 { #clock-cells = <0>; compatible = "allwinner,fixed-factor-clock"; clocks = <&clk_pll_periph0>; clock-mult = <4>; clock-div = <1>; clock-output-names = "pll_periph0x4"; }; clk_periph32k: periph32k { #clock-cells = <0>; compatible = "allwinner,fixed-factor-clock"; clocks = <&clk_pll_periph0>; clock-mult = <2>; clock-div = <36621>; clock-output-names = "periph32k"; }; clk_pll_periph1x2: pll_periph1x2 { #clock-cells = <0>; compatible = "allwinner,fixed-factor-clock"; clocks = <&clk_pll_periph1>; clock-mult = <2>; clock-div = <1>; clock-output-names = "pll_periph1x2"; }; clk_pll_audiox4: pll_audiox4 { #clock-cells = <0>; compatible = "allwinner,fixed-factor-clock"; clocks = <&clk_pll_audio>; clock-mult = <4>; clock-div = <1>; clock-output-names = "pll_audiox4"; }; clk_pll_audiox2: pll_audiox2 { #clock-cells = <0>; compatible = "allwinner,fixed-factor-clock"; clocks = <&clk_pll_audio>; clock-mult = <2>; clock-div = <1>; clock-output-names = "pll_audiox2"; }; clk_pll_video0x4: pll_video0x4 { #clock-cells = <0>; compatible = "allwinner,fixed-factor-clock"; clocks = <&clk_pll_video0>; clock-mult = <4>; clock-div = <1>; clock-output-names = "pll_video0x4"; }; clk_pll_video1x4: pll_video1x4 { #clock-cells = <0>; compatible = "allwinner,fixed-factor-clock"; clocks = <&clk_pll_video1>; clock-mult = <4>; clock-div = <1>; clock-output-names = "pll_video1x4"; }; clk_hoscd2: hoscd2 { #clock-cells = <0>; compatible = "allwinner,fixed-factor-clock"; clocks = <&clk_hosc>; clock-mult = <1>; clock-div = <2>; clock-output-names = "hoscd2"; }; clk_osc48md4: osc48md4 { #clock-cells = <0>; compatible = "allwinner,fixed-factor-clock"; clocks = <&clk_osc48m>; clock-mult = <1>; clock-div = <4>; clock-output-names = "osc48md4"; }; clk_pll_periph0d6: pll_periph0d6 { #clock-cells = <0>; compatible = "allwinner,fixed-factor-clock"; clocks = <&clk_pll_periph0>; clock-mult = <1>; clock-div = <6>; clock-output-names = "pll_periph0d6"; }; /* register allwinner,periph-clock */ clk_cpu: cpu { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "cpu"; }; clk_axi: axi { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "axi"; }; clk_cpuapb: cpuapb { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "cpuapb"; }; clk_psi: psi { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "psi"; }; clk_ahb1: ahb1 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "ahb1"; }; clk_ahb2: ahb2 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "ahb2"; }; clk_ahb3: ahb3 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "ahb3"; }; clk_apb1: apb1 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "apb1"; }; clk_apb2: apb2 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "apb2"; }; clk_mbus: mbus { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "mbus"; }; clk_de: de { #clock-cells = <0>; compatible = "allwinner,periph-clock"; assigned-clock-parents = <&clk_pll_de>; assigned-clock-rates = <696000000>; assigned-clocks = <&clk_de>; clock-output-names = "de"; }; clk_di: di { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "di"; }; clk_gpu: gpu { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "gpu"; }; clk_ce: ce { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "ce"; }; clk_ve: ve { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "ve"; }; clk_emce: emce { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "emce"; }; clk_vp9: vp9 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "vp9"; }; clk_dma: dma { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "dma"; }; clk_msgbox: msgbox { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "msgbox"; }; clk_hwspinlock_rst: hwspinlock_rst { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "hwspinlock_rst"; }; clk_hwspinlock_bus: hwspinlock_bus { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "hwspinlock_bus"; }; clk_hstimer: hstimer { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "hstimer"; }; clk_avs: avs { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "avs"; }; clk_dbgsys: dbgsys { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "dbgsys"; }; clk_pwm: pwm { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "pwm"; }; clk_iommu: iommu { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "iommu"; }; clk_sdram: sdram { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "sdram"; }; clk_nand0: nand0 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "nand0"; }; clk_nand1: nand1 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "nand1"; }; clk_sdmmc0_mod: sdmmc0_mod { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "sdmmc0_mod"; }; clk_sdmmc0_bus: sdmmc0_bus { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "sdmmc0_bus"; }; clk_sdmmc0_rst: sdmmc0_rst { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "sdmmc0_rst"; }; clk_sdmmc1_mod: sdmmc1_mod { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "sdmmc1_mod"; }; clk_sdmmc1_bus: sdmmc1_bus { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "sdmmc1_bus"; }; clk_sdmmc1_rst: sdmmc1_rst { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "sdmmc1_rst"; }; clk_sdmmc2_mod: sdmmc2_mod { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "sdmmc2_mod"; }; clk_sdmmc2_bus: sdmmc2_bus { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "sdmmc2_bus"; }; clk_sdmmc2_rst: sdmmc2_rst { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "sdmmc2_rst"; }; clk_uart0: uart0 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "uart0"; }; clk_uart1: uart1 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "uart1"; }; clk_uart2: uart2 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "uart2"; }; clk_uart3: uart3 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "uart3"; }; clk_twi0: twi0 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "twi0"; }; clk_twi1: twi1 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "twi1"; }; clk_twi2: twi2 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "twi2"; }; clk_twi3: twi3 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "twi3"; }; clk_scr0: scr0 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "scr0"; }; clk_scr1: scr1 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "scr1"; }; clk_spi0: spi0 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "spi0"; }; clk_spi1: spi1 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "spi1"; }; clk_gmac: gmac { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "gmac"; }; clk_sata: sata { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "sata"; }; clk_sata_24m: sata_24m { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "sata_24m"; }; clk_ts: ts { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "ts"; }; clk_irtx: irtx { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "irtx"; }; clk_ths: ths { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "ths"; }; clk_i2s0: i2s0 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "i2s0"; }; clk_i2s1: i2s1 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "i2s1"; }; clk_i2s2: i2s2 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "i2s2"; }; clk_i2s3: i2s3 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "i2s3"; }; clk_spdif: spdif { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "spdif"; }; clk_dmic: dmic { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "dmic"; }; clk_ahub: ahub { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "ahub"; }; clk_usbphy0: usbphy0 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "usbphy0"; }; clk_usbphy1: usbphy1 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "usbphy1"; }; clk_usbphy3: usbphy3 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "usbphy3"; }; clk_usbohci0: usbohci0 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "usbohci0"; }; clk_usbohci0_12m: usbohci0_12m { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "usbohci0_12m"; }; clk_usbohci3: usbohci3 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "usbohci3"; }; clk_usbohci3_12m: usbohci3_12m { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "usbohci3_12m"; }; clk_usbehci0: usbehci0 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "usbehci0"; }; clk_usbehci3: usbehci3 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "usbehci3"; }; clk_usb3_0_host: usb3_0_host { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "usb3_0_host"; }; clk_usbotg: usbotg { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "usbotg"; }; clk_usbhsic: usbhsic { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "usbhsic"; }; clk_pcieref: pcieref { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "pcieref"; }; clk_pciemaxi: pciemaxi { #clock-cells = <0>; compatible = "allwinner,periph-clock"; assigned-clocks = <&clk_pciemaxi>; assigned-clock-rates = <200000000>; clock-output-names = "pciemaxi"; }; clk_pcieaux: pcieaux { #clock-cells = <0>; compatible = "allwinner,periph-clock"; assigned-clock-rates = <1000000>; assigned-clocks = <&clk_pcieaux>; clock-output-names = "pcieaux"; }; clk_pcie_bus: pcie_bus { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "pcie_bus"; }; clk_pcie_power: pcie_power { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "pcie_power"; }; clk_pcie_rst: pcie_rst { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "pcie_rst"; }; clk_hdmi: hdmi { #clock-cells = <0>; compatible = "allwinner,periph-clock"; assigned-clock-parents = <&clk_pll_video1>; assigned-clocks = <&clk_hdmi>; clock-output-names = "hdmi"; }; clk_hdmi_slow: hdmi_slow { #clock-cells = <0>; compatible = "allwinner,periph-clock"; assigned-clocks = <&clk_hdmi_slow>; clock-output-names = "hdmi_slow"; }; clk_hdmi_cec: hdmi_cec { #clock-cells = <0>; compatible = "allwinner,periph-clock"; assigned-clocks = <&clk_hdmi_cec>; clock-output-names = "hdmi_cec"; }; clk_display_top: display_top { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "display_top"; }; clk_tcon_lcd: tcon_lcd { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "tcon_lcd"; }; clk_tcon_tv: tcon_tv { #clock-cells = <0>; compatible = "allwinner,periph-clock"; assigned-clock-parents = <&clk_pll_video1>; assigned-clocks = <&clk_tcon_tv>; clock-output-names = "tcon_tv"; }; clk_csi_misc: csi_misc { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "csi_misc"; }; clk_csi_top: csi_top { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "csi_top"; }; clk_csi_master0: csi_master0 { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "csi_master0"; }; clk_hdmi_hdcp: hdmi_hdcp { #clock-cells = <0>; compatible = "allwinner,periph-clock"; assigned-clock-parents = <&clk_pll_periph1>; assigned-clocks = <&clk_hdmi_hdcp>; clock-output-names = "hdmi_hdcp"; }; clk_pio: pio { #clock-cells = <0>; compatible = "allwinner,periph-clock"; clock-output-names = "pio"; }; /*cpus space clocks from PRCM-SPEC*/ clk_cpurcir: cpurcir { #clock-cells = <0>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "cpurcir"; }; clk_losc_out: losc_out { #clock-cells = <0>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "losc_out"; }; /* clk below are read only , just to keep a clock tree */ clk_cpurcpus_pll: cpurcpus_pll { #clock-cells = <0>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "cpurcpus_pll"; }; clk_cpurcpus: cpurcpus { #clock-cells = <0>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "cpurcpus"; }; clk_cpurahbs: cpurahbs { #clock-cells = <0>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "cpurahbs"; }; clk_cpurapbs1: cpurapbs1 { #clock-cells = <0>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "cpurapbs1"; }; clk_cpurapbs2_pll: cpurapbs2_pll { #clock-cells = <0>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "cpurapbs2_pll"; }; clk_cpurapbs2: cpurapbs2 { #clock-cells = <0>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "cpurapbs2"; }; clk_cpurpio: cpurpio { #clock-cells = <0>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "cpurpio"; }; clk_spwm: spwm { #clock-cells = <0>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "spwm"; }; clk_dcxo_out: dcxo_out { #clock-cells = <0>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "dcxo_out"; }; }; }; sun50iw6p1-pinctrl.dtsi /* * Allwinner sun50iw6 pin config info. */ / { soc@03000000{ r_pio: pinctrl@07022000 { compatible = "allwinner,sun50iw6p1-r-pinctrl"; reg = <0x0 0x07022000 0x0 0x400>; interrupts = <GIC_SPI 105 4>, <GIC_SPI 111 4>; clocks = <&clk_cpurpio>; device_type = "r_pio"; gpio-controller; interrupt-controller; #interrupt-cells = <2>; #size-cells = <0>; #gpio-cells = <6>; s_uart0_pins_a: s_uart0@0 { allwinner,pins = "PL2", "PL3"; allwinner,function = "s_uart0"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <1>; }; s_twi0_pins_a: s_twi0@0 { allwinner,pins = "PL0", "PL1"; allwinner,function = "s_twi0"; allwinner,muxsel = <3>; allwinner,drive = <0>; allwinner,pull = <1>; }; s_jtag0_pins_a: s_jtag0@0 { allwinner,pins = "PL4", "PL5", "PL6", "PL7"; allwinner,function = "s_jtag0"; allwinner,muxsel = <2>; allwinner,drive = <2>; allwinner,pull = <1>; }; s_cir0_pins_a: s_cir0@0 { allwinner,pins = "PL9"; allwinner,function = "s_cir0"; allwinner,muxsel = <2>; allwinner,drive = <2>; allwinner,pull = <1>; }; }; pio: pinctrl@0300b000 { compatible = "allwinner,sun50iw6p1-pinctrl"; reg = <0x0 0x0300b000 0x0 0x400>; interrupts = <GIC_SPI 51 4>, <GIC_SPI 53 4>, <GIC_SPI 54 4>, <GIC_SPI 59 4>; device_type = "pio"; clocks = <&clk_pio>; gpio-controller; interrupt-controller; #interrupt-cells = <2>; #size-cells = <0>; #gpio-cells = <6>; vdevice_pins_a: vdevice@0 { allwinner,pins = "PA1", "PA2"; allwinner,function = "vdevice"; allwinner,muxsel = <5>; allwinner,drive = <1>; allwinner,pull = <1>; }; uart0_pins_a: uart0@0 { allwinner,pins = "PF2", "PF4"; allwinner,pname = "uart0_tx", "uart0_rx"; allwinner,function = "uart0"; allwinner,muxsel = <3>; allwinner,drive = <1>; allwinner,pull = <1>; }; uart0_pins_b: uart0@1 { allwinner,pins = "PF2", "PF4"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; uart1_pins_a: uart1@0 { allwinner,pins = "PG6", "PG7", "PG8", "PG9"; allwinner,pname = "uart1_tx", "uart1_rx", "uart1_rts", "uart1_cts"; allwinner,function = "uart1"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <1>; }; uart1_pins_b: uart1@1 { allwinner,pins = "PG6", "PG7", "PG8", "PG9"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; uart2_pins_a: uart2@0 { allwinner,pins = "PD19", "PD20", "PD21", "PD22"; allwinner,pname = "uart2_tx", "uart2_rx", "uart2_rts", "uart2_cts"; allwinner,function = "uart2"; allwinner,muxsel = <4>; allwinner,drive = <1>; allwinner,pull = <1>; }; uart2_pins_b: uart2@1 { allwinner,pins = "PD19", "PD20", "PD21", "PD22"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; uart3_pins_a: uart3@0 { allwinner,pins = "PE0", "PE1", "PE2", "PE3"; allwinner,pname = "uart3_tx", "uart3_rx", "uart3_rts", "uart3_cts"; allwinner,function = "uart3"; allwinner,muxsel = <3>; allwinner,drive = <1>; allwinner,pull = <1>; }; uart3_pins_b: uart3@1 { allwinner,pins = "PE0", "PE1", "PE2", "PE3"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; twi0_pins_a: twi0@0 { allwinner,pins = "PD25", "PD26"; allwinner,pname = "twi0_scl", "twi0_sda"; allwinner,function = "twi0"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <0>; }; twi0_pins_b: twi0@1 { allwinner,pins = "PD25", "PD26"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; twi1_pins_a: twi1@0 { allwinner,pins = "PH5", "PH6"; allwinner,pname = "twi1_scl", "twi1_sda"; allwinner,function = "twi1"; allwinner,muxsel = <4>; allwinner,drive = <1>; allwinner,pull = <0>; }; twi1_pins_b: twi1@1 { allwinner,pins = "PH5", "PH6"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; twi2_pins_a: twi2@0 { allwinner,pins = "PD23", "PD24"; allwinner,pname = "twi2_scl", "twi2_sda"; allwinner,function = "twi2"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <0>; }; twi2_pins_b: twi2@1 { allwinner,pins = "PD23", "PD24"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; twi3_pins_a: twi3@0 { allwinner,pins = "PB17", "PB18"; allwinner,pname = "twi3_scl", "twi3_sda"; allwinner,function = "twi3"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <0>; }; twi3_pins_b: twi3@1 { allwinner,pins = "PB17", "PB18"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; ts0_pins_a: ts0@0 { allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11"; allwinner,pname = "ts0_clk", "ts0_err", "ts0_sync", "ts0_dvld", "ts0_d0", "ts0_d1", "ts0_d2", "ts0_d3", "ts0_d4", "ts0_d5", "ts0_d6", "ts0_d7"; allwinner,function = "ts0"; allwinner,muxsel = <3>; allwinner,drive = <1>; allwinner,pull = <0>; }; ts0_pins_b: ts0_sleep@0 { allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11"; allwinner,pname = "ts0_clk", "ts0_err", "ts0_sync", "ts0_dvld", "ts0_d0", "ts0_d1", "ts0_d2", "ts0_d3", "ts0_d4", "ts0_d5", "ts0_d6", "ts0_d7"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; ts1_pins_a: ts1@0 { allwinner,pins = "PD12", "PD13", "PD14", "PD15", "PD16"; allwinner,pname = "ts1_clk", "ts1_err", "ts1_sync", "ts1_dvld", "ts1_d0"; allwinner,function = "ts1"; allwinner,muxsel = <3>; allwinner,drive = <1>; allwinner,pull = <0>; }; ts1_pins_b: ts1_sleep@0 { allwinner,pins = "PD12", "PD13", "PD14", "PD15", "PD16"; allwinner,pname = "ts1_clk", "ts1_err", "ts1_sync", "ts1_dvld", "ts1_d0"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; ts2_pins_a: ts2@0 { allwinner,pins = "PD17", "PD18", "PD19", "PD20", "PD21"; allwinner,pname = "ts2_clk", "ts2_err", "ts2_sync", "ts2_dvld", "ts2_d0"; allwinner,function = "ts2"; allwinner,muxsel = <3>; allwinner,drive = <1>; allwinner,pull = <0>; }; ts2_pins_b: ts2_sleep@0 { allwinner,pins = "PD17", "PD18", "PD19", "PD20", "PD21"; allwinner,pname = "ts2_clk", "ts2_err", "ts2_sync", "ts2_dvld", "ts2_d0"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; ts3_pins_a: ts3@0 { allwinner,pins = "PD22", "PD23", "PD24", "PD25", "PD26"; allwinner,pname = "ts3_clk", "ts3_err", "ts3_sync", "ts3_dvld", "ts3_d0"; allwinner,function = "ts3"; allwinner,muxsel = <3>; allwinner,drive = <1>; allwinner,pull = <0>; }; ts3_pins_b: ts3_sleep@0 { allwinner,pins = "PD22", "PD23", "PD24", "PD25", "PD26"; allwinner,pname = "ts3_clk", "ts3_err", "ts3_sync", "ts3_dvld", "ts3_d0"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; spi0_pins_a: spi0@0 { allwinner,pins = "PC0", "PC2", "PC3"; allwinner,pname = "spi0_sclk", "spi0_mosi", "spi0_miso"; allwinner,function = "spi0"; allwinner,muxsel = <4>; allwinner,drive = <1>; allwinner,pull = <0>; }; spi0_pins_b: spi0@1 { allwinner,pins = "PC5"; allwinner,pname = "spi0_cs0"; allwinner,function = "spi0"; allwinner,muxsel = <4>; allwinner,drive = <1>; allwinner,pull = <1>; // only CS should be pulled up }; spi0_pins_c: spi0@2 { allwinner,pins = "PC0", "PC2", "PC3", "PC5"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; spi1_pins_a: spi1@0 { allwinner,pins = "PH4", "PH5", "PH6"; allwinner,pname = "spi1_sclk", "spi1_mosi", "spi1_miso"; allwinner,function = "spi1"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <0>; }; spi1_pins_b: spi1@1 { allwinner,pins = "PH3"; allwinner,pname = "spi1_cs0"; allwinner,function = "spi1"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <1>; // only CS should be pulled up }; spi1_pins_c: spi1@2 { allwinner,pins = "PH3", "PH4", "PH5", "PH6"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; sdc0_pins_a: sdc0@0 { allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; allwinner,function = "sdc0"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <1>; }; sdc0_pins_b: sdc0@1 { allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <1>; }; sdc1_pins_a: sdc1@0 { allwinner,pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5"; allwinner,function = "sdc1"; allwinner,muxsel = <2>; allwinner,drive = <3>; allwinner,pull = <1>; }; sdc1_pins_b: sdc1@1 { allwinner,pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <1>; }; sdc2_pins_a: sdc2@0 { allwinner,pins = "PC1", "PC4", "PC5", "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14"; allwinner,function = "sdc2"; allwinner,muxsel = <3>; allwinner,drive = <2>; allwinner,pull = <1>; }; sdc2_pins_b: sdc2@1 { allwinner,pins = "PC1", "PC4", "PC5", "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <1>; }; daudio0_pins_a: daudio0@0 { allwinner,pins = "PH0", "PH1", "PH2", "PH3", "PH4"; allwinner,function = "pcm0"; allwinner,muxsel = <3>; allwinner,drive = <1>; allwinner,pull = <0>; }; daudio0_pins_b: daudio0_sleep@0 { allwinner,pins = "PH0", "PH1", "PH2", "PH3", "PH4"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; daudio2_pins_a: daudio2@0 { allwinner,pins = "PG10", "PG11", "PG12", "PG13", "PG14"; allwinner,function = "pcm2"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <0>; }; daudio2_pins_b: daudio2_sleep@0 { allwinner,pins = "PG10", "PG11", "PG12", "PG13", "PG14"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; daudio3_pins_a: daudio3@0 { allwinner,pins = "PB12", "PB13", "PB14", "PB15", "PB16"; allwinner,function = "pcm3"; allwinner,muxsel = <2>; allwinner,driver = <1>; allwinner,pull = <0>; }; daudio3_pins_b: daudio3_sleep@0 { allwinner,pins = "PB12", "PB13", "PB14", "PB15", "PB16"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,driver = <1>; allwinner,pull = <0>; }; spdif_pins_a: spdif@0 { allwinner,pins = "PH5", "PH6", "PH7"; allwinner,function = "spdif0"; allwinner,muxsel = <3>; allwinner,drive = <1>; allwinner,pull = <0>; }; spdif_pins_b: spdif_sleep@0 { allwinner,pins = "PH5", "PH6", "PH7"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; dmic_pins_a: dmic@0 { allwinner,pins = "PD14", "PD15", "PD16", "PD17", "PD18"; allwinner,function = "dmic"; allwinner,muxsel = <4>; allwinner,driver = <1>; allwinner,pull = <0>; }; dmic_pins_b: dmic_sleep@0 { allwinner,pins = "PD14", "PD15", "PD16", "PD17", "PD18"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,driver = <1>; allwinner,pull = <0>; }; ahub_daudio0_pins_a: ahub_daudio0@0 { allwinner,pins = "PH0", "PH1", "PH2", "PH3", "PH4"; allwinner,function = "h_pcm0"; allwinner,muxsel = <4>; allwinner,driver = <1>; allwinner,pull = <0>; }; ahub_daudio0_pins_b: ahub_daudio0_sleep@0 { allwinner,pins = "PH0", "PH1", "PH2", "PH3", "PH4"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,driver = <1>; allwinner,pull = <0>; }; ahub_daudio2_pins_a: ahub_daudio2@0 { allwinner,pins = "PG10", "PG11", "PG12", "PG13", "PG14"; allwinner,function = "h_pcm2"; allwinner,muxsel = <3>; allwinner,drive = <1>; allwinner,pull = <0>; }; ahub_daudio2_pins_b: ahub_daudio2_sleep@0 { allwinner,pins = "PG10", "PG11", "PG12", "PG13", "PG14"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; ahub_daudio3_pins_a: ahub_daudio3@0 { allwinner,pins = "PB12", "PB13", "PB14", "PB15", "PB16"; allwinner,function = "h_pcm3"; allwinner,muxsel = <4>; allwinner,driver = <1>; allwinner,pull = <0>; }; ahub_daudio3_pins_b: ahub_daudio3_sleep@0 { allwinner,pins = "PB12", "PB13", "PB14", "PB15", "PB16"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,driver = <1>; allwinner,pull = <0>; }; csi0_pins_a: csi0@0 { allwinner,pins = "PD0", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11"; allwinner,pname = "csi0_pck", "csi0_hsync", "csi0_vsync", "csi0_d0", "csi0_d1", "csi0_d2", "csi0_d3", "csi0_d4", "csi0_d5", "csi0_d6", "csi0_d7"; allwinner,function = "csi0"; allwinner,muxsel = <4>; allwinner,drive = <1>; allwinner,pull = <0>; allwinner,data = <0>; }; csi0_pins_b: csi0@1 { allwinner,pins = "PD0", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11"; allwinner,pname = "csi0_pck", "csi0_hsync", "csi0_vsync", "csi0_d0", "csi0_d1", "csi0_d2", "csi0_d3", "csi0_d4", "csi0_d5", "csi0_d6", "csi0_d7"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; allwinner,data = <0>; }; csi_mclk0_pins_a: csi_mclk0@0 { allwinner,pins = "PD1"; allwinner,pname = "csi_mclk0"; allwinner,function = "csi_mclk0"; allwinner,muxsel = <4>; allwinner,drive = <1>; allwinner,pull = <0>; allwinner,data = <0>; }; csi_mclk0_pins_b: csi_mclk0@1 { allwinner,pins = "PD1"; allwinner,pname = "csi_mclk0"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; allwinner,data = <0>; }; csi_cci0_pins_a: csi_cci0@0 { allwinner,pins = "PD12","PD13"; allwinner,pname = "csi_cci0_sck","csi_cci0_sda"; allwinner,function = "csi_cci0"; allwinner,muxsel = <4>; allwinner,drive = <1>; allwinner,pull = <0>; allwinner,data = <0>; }; csi_cci0_pins_b: csi_cci0@1 { allwinner,pins = "PD12","PD13"; allwinner,pname = "csi_cci0_sck","csi_cci0_sda"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; allwinner,data = <0>; }; scr0_pins_a: scr0@0 { allwinner,pins = "PG13", "PG14", "PG10", "PG11", "PG12"; allwinner,pname = "scr0_rst", "scr0_det", "scr0_vccen", "scr0_sck", "scr0_sda"; allwinner,function = "sim0"; allwinner,muxsel = <4>; allwinner,drive = <0>; allwinner,pull = <1>; }; scr0_pins_b: scr0@1 { allwinner,pins = "PG8", "PG9"; allwinner,pname = "scr0_vppen", "scr0_vppp"; allwinner,function = "sim0"; allwinner,muxsel = <4>; allwinner,drive = <0>; allwinner,pull = <1>; }; scr0_pins_c: scr0@2 { allwinner,pins = "PG8", "PG9", "PG10", "PG11", "PG12", "PG13", "PG14"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <0>; allwinner,pull = <0>; }; scr1_pins_a: scr1@0 { allwinner,pins = "PH5", "PH6", "PH2", "PH3", "PH4"; allwinner,pname = "scr1_rst", "scr1_det", "scr1_vccen", "scr1_sck", "scr1_sda"; allwinner,function = "sim1"; allwinner,muxsel = <5>; allwinner,drive = <1>; allwinner,pull = <1>; }; scr1_pins_b: scr1@1 { allwinner,pins = "PH0", "PH1"; allwinner,pname = "scr1_vppen", "scr1_vppp"; allwinner,function = "sim1"; allwinner,muxsel = <5>; allwinner,drive = <1>; allwinner,pull = <1>; }; scr1_pins_c: scr1@2 { allwinner,pins = "PH0", "PH1", "PH2", "PH3", "PH4", "PH5", "PH6"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; nand0_pins_a: nand0@0 { allwinner,pins = "PC0", "PC1", "PC2", "PC4", "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14"; allwinner,pname= "nand0_we", "nand0_ale","nand0_cle", "nand0_nre", "nand0_d0", "nand0_d1", "nand0_d2", "nand0_d3", "nand0_d4", "nand0_d5", "nand0_d6", "nand0_d7", "nand0_ndqs"; allwinner,function = "nand0"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <0>; }; nand0_pins_b: nand0@1 { allwinner,pins = "PC3", "PC5", "PC15", "PC16"; allwinner,pname= "nand0_ce0", "nand0_rb0", "nand0_ce1", "nand0_rb1"; allwinner,function = "nand0"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <1>;// only RB&CE should be pulled up }; nand0_pins_c: nand0@2 { allwinner,pins = "PC0", "PC1", "PC2", "PC3", "PC4", "PC5", "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; hdmi_ddc_pin_a: hdmi@0 { allwinner,pins = "PH8","PH9"; allwinner,function = "ddc"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <0>; }; hdmi_ddc_pin_b: hdmi@1 { allwinner,pins = "PH8","PH9"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; hdmi_cec_pin_a: hdmi@2 { allwinner,pins = "PH10"; allwinner,function = "hcec0"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <0>; }; hdmi_cec_pin_b: hdmi@3 { allwinner,pins = "PH10"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; ccir_clk_pin_a: ac200@2 { allwinner,pins = "PB0"; allwinner,function = "ac200"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <0>; }; ccir_clk_pin_b: ac200@3 { allwinner,pins = "PB0"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; gmac_pins_a: gmac@0 { allwinner,pins = "PA0", "PA1", "PA2", "PA3", "PA4", "PA5", "PA6", "PA7", "PA8", "PA9"; allwinner,function = "gmac0"; allwinner,muxsel = <2>; allwinner,drive = <3>; allwinner,pull = <0>; }; gmac_pins_b: gmac@1 { allwinner,pins = "PA0", "PA1", "PA2", "PA3", "PA4", "PA5", "PA6", "PA7", "PA8", "PA9"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <3>; allwinner,pull = <0>; }; }; }; }; arm-gic.h /* * This header provides constants for the ARM GIC. */ #ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H #define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H #include <dt-bindings/interrupt-controller/irq.h> /* interrupt specifier cell 0 */ #define GIC_SPI 0 #define GIC_PPI 1 /* * Interrupt specifier cell 2. * The flags in irq.h are valid, plus those below. */ #define GIC_CPU_MASK_RAW(x) ((x) << 8) #define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1) #endif gpio.h /* * This header provides constants for most GPIO bindings. * * Most GPIO bindings include a flags cell as part of the GPIO specifier. * In most cases, the format of the flags cell uses the standard values * defined in this header. */ #ifndef _DT_BINDINGS_GPIO_GPIO_H #define _DT_BINDINGS_GPIO_GPIO_H /* Bit 0 express polarity */ #define GPIO_ACTIVE_HIGH 0 #define GPIO_ACTIVE_LOW 1 /* Bit 1 express single-endedness */ #define GPIO_PUSH_PULL 0 #define GPIO_SINGLE_ENDED 2 /* * Open Drain/Collector is the combination of single-ended active low, * Open Source/Emitter is the combination of single-ended active high. */ #define GPIO_OPEN_DRAIN (GPIO_SINGLE_ENDED | GPIO_ACTIVE_LOW) #define GPIO_OPEN_SOURCE (GPIO_SINGLE_ENDED | GPIO_ACTIVE_HIGH) /* sunxi gpio arg */ #define PA 0 #define PB 1 #define PC 2 #define PD 3 #define PE 4 #define PF 5 #define PG 6 #define PH 7 #define PI 8 #define PJ 9 #define PK 10 #define PL 11 #define PM 12 #define PN 13 #define PO 14 #define PP 15 #define default 0xffffffff #endif irq.h /* * This header provides constants for most IRQ bindings. * * Most IRQ bindings include a flags cell as part of the IRQ specifier. * In most cases, the format of the flags cell uses the standard values * defined in this header. */ #ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H #define _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H #define IRQ_TYPE_NONE 0 #define IRQ_TYPE_EDGE_RISING 1 #define IRQ_TYPE_EDGE_FALLING 2 #define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING) #define IRQ_TYPE_LEVEL_HIGH 4 #define IRQ_TYPE_LEVEL_LOW 8 #endif irq.h arm-gic.h gpio.h sun50iw6p1-soc.dts sun50iw6p1-pinctrl.dtsi sun50iw6p1-clk.dtsi sun50iw6p1.dtsi

Hi! I'm sorry, didn't noticed I had posted in wrong section, so here we go again! I'm trying to activate X11 hardware acceleration on this board. It's running an RT PREEMPT Kernel from the project AllwinCNC which aim to run linuxcnc software using ARISC core to generate steps in realtime. Unfortunately, I'm getting very bad performance in X11 with lima driver. It seems to be running on software and not the lima driver itself and I'd like to know if it is possible to have the graphics acceleration done in hardware instead. CPU usage is going to 100% and it is resulting in errors on the aforementioned CNC controller software due to this. BOARD: Orange Pi PC 1GB armbianmonitor -U output -> https://we.tl/t-RKjLXMHAGt orangepipc:~:% uname -a Linux orangepipc 5.10.21-rt34-sunxi #trunk SMP PREEMPT_RT Thu Apr 1 12:25:28 +06 2021 armv7l GNU/Linux orangepipc:~:% lsb_release -a No LSB modules are available. Distributor ID: Debian Description: Debian GNU/Linux 10 (buster) Release: 10 Codename: buster I got this on glxgears: 111 frames in 5.0 seconds = 22.122 FPS 184 frames in 5.0 seconds = 36.786 FPS It seems to be handled in software: name of display: :0.0 display: :0 screen: 0 direct rendering: Yes Extended renderer info (GLX_MESA_query_renderer): Vendor: VMware, Inc. (0xffffffff) Device: llvmpipe (LLVM 7.0, 128 bits) (0xffffffff) Version: 18.3.6 Accelerated: no Video memory: 999MB Unified memory: no Preferred profile: core (0x1) Max core profile version: 3.3 Max compat profile version: 3.1 Max GLES1 profile version: 1.1 Max GLES[23] profile version: 3.0 OpenGL vendor string: VMware, Inc. OpenGL renderer string: llvmpipe (LLVM 7.0, 128 bits) OpenGL core profile version string: 3.3 (Core Profile) Mesa 18.3.6 OpenGL core profile shading language version string: 3.30 OpenGL core profile context flags: (none) OpenGL core profile profile mask: core profile OpenGL version string: 3.1 Mesa 18.3.6 OpenGL shading language version string: 1.40 OpenGL context flags: (none) OpenGL ES profile version string: OpenGL ES 3.0 Mesa 18.3.6 OpenGL ES profile shading language version string: OpenGL ES GLSL ES 3.00 How can I have hardware acceleration on X11 using Lima? Is it possible?

here is the pinctrl dtsi file /* * Allwinner sun8iw7 pin config info. */ / { soc@01c00000 { r_pio: pinctrl@01f02c00 { compatible = "allwinner,sun8iw7p1-r-pinctrl"; reg = <0x0 0x01f02c00 0x0 0x400>; interrupts = <GIC_SPI 45 4>; clocks = <&clk_cpurpio>; device_type = "r_pio"; gpio-controller; interrupt-controller; #interrupt-cells = <2>; #size-cells = <0>; #gpio-cells = <6>; s_uart0_pins_a: s_uart0@0 { allwinner,pins = "PL2", "PL3"; allwinner,function = "s_uart0"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <1>; }; s_twi0_pins_a: s_twi0@0 { allwinner,pins = "PL0", "PL1"; allwinner,function = "s_twi0"; allwinner,muxsel = <3>; allwinner,drive = <2>; allwinner,pull = <1>; }; s_jtag0_pins_a: s_jtag0@0 { allwinner,pins = "PL4", "PL5", "PL6", "PL7"; allwinner,function = "s_jtag0"; allwinner,muxsel = <2>; allwinner,drive = <2>; allwinner,pull = <1>; }; s_cir0_pins_a: s_cir0@0 { allwinner,pins = "PL11"; allwinner,function = "s_cir0"; allwinner,muxsel = <2>; allwinner,drive = <2>; allwinner,pull = <1>; }; }; pio: pinctrl@01c20800 { compatible = "allwinner,sun8iw7p1-pinctrl"; reg = <0x0 0x01c20800 0x0 0x400>; interrupts = <GIC_SPI 11 4>, <GIC_SPI 17 4>; device_type = "pio"; clocks = <&clk_pio>; gpio-controller; interrupt-controller; #interrupt-cells = <2>; #size-cells = <0>; #gpio-cells = <6>; gt911_reset_pin: gt911_reset_pin@1 { allwinner,pins = "PA1"; allwinner,function = "gpio_in"; allwinner,muxsel = <0>; allwinner,drive = <1>; allwinner,pull = <0>; }; gt911_irq_pin: gt911_irq_pin@0 { allwinner,pins = "PA0"; allwinner,function = "gpio_out"; allwinner,muxsel = <1>; allwinner,drive = <1>; allwinner,pull = <0>; }; vdevice_pins_a: vdevice@0 { allwinner,pins = "PA1", "PA2"; allwinner,function = "vdevice"; allwinner,muxsel = <5>; allwinner,drive = <1>; allwinner,pull = <1>; }; uart0_pins_a: uart0@0 { allwinner,pins = "PA4", "PA5"; allwinner,pname = "uart0_tx", "uart0_rx"; allwinner,function = "uart0"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <1>; }; uart0_pins_b: uart0@1 { allwinner,pins = "PA4", "PA5"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; uart1_pins_a: uart1@0 { allwinner,pins = "PG6", "PG7", "PG8", "PG9"; allwinner,pname = "uart1_tx", "uart1_rx", "uart1_rts", "uart1_cts"; allwinner,function = "uart1"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <1>; }; uart1_pins_b: uart1@1 { allwinner,pins = "PG6", "PG7", "PG8", "PG9"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; uart2_pins_a: uart2@0 { allwinner,pins = "PA0", "PA1", "PA2", "PA3"; allwinner,pname = "uart2_tx", "uart2_rx", "uart2_rts", "uart2_cts"; allwinner,function = "uart2"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <1>; }; uart2_pins_b: uart2@1 { allwinner,pins = "PA0", "PA1", "PA2", "PA3"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; uart3_pins_a: uart3@0 { allwinner,pins = "PA13", "PA14", "PA15", "PA16"; allwinner,pname = "uart3_tx", "uart3_rx", "uart3_rts", "uart3_cts"; allwinner,function = "uart3"; allwinner,muxsel = <3>; allwinner,drive = <1>; allwinner,pull = <1>; }; uart3_pins_b: uart3@1 { allwinner,pins = "PA13", "PA14", "PA15", "PA16"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; twi0_pins_a: twi0@0 { allwinner,pins = "PA11", "PA12"; allwinner,pname = "twi0_scl", "twi0_sda"; allwinner,function = "twi0"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <0>; }; twi0_pins_b: twi0@1 { allwinner,pins = "PA11", "PA12"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; twi1_pins_a: twi1@0 { allwinner,pins = "PA18", "PA19"; allwinner,pname = "twi1_scl", "twi1_sda"; allwinner,function = "twi1"; allwinner,muxsel = <3>; allwinner,drive = <1>; allwinner,pull = <0>; }; twi1_pins_b: twi1@1 { allwinner,pins = "PA18", "PA19"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; twi2_pins_a: twi2@0 { allwinner,pins = "PE12", "PE13"; allwinner,pname = "twi2_scl", "twi2_sda"; allwinner,function = "twi2"; allwinner,muxsel = <3>; allwinner,drive = <1>; allwinner,pull = <0>; }; twi2_pins_b: twi2@1 { allwinner,pins = "PE12", "PE13"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; ts0_pins_a: ts0@0 { allwinner,pins = "PE0", "PE1", "PE2", "PE3", "PE4", "PE5", "PE6", "PE7", "PE8", "PE9", "PE10", "PE11"; allwinner,pname = "ts0_clk", "ts0_err", "ts0_sync", "ts0_dvld", "ts0_d0", "ts0_d1", "ts0_d2", "ts0_d3", "ts0_d4", "ts0_d5", "ts0_d6", "ts0_d7"; allwinner,function = "ts0"; allwinner,muxsel = <3>; allwinner,drive = <1>; allwinner,pull = <0>; }; ts0_pins_b: ts0_sleep@0 { allwinner,pins = "PE0", "PE1", "PE2", "PE3", "PE4", "PE5", "PE6", "PE7", "PE8", "PE9", "PE10", "PE11"; allwinner,pname = "ts0_clk", "ts0_err", "ts0_sync", "ts0_dvld", "ts0_d0", "ts0_d1", "ts0_d2", "ts0_d3", "ts0_d4", "ts0_d5", "ts0_d6", "ts0_d7"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; spi0_pins_a: spi0@0 { allwinner,pins = "PC0", "PC1", "PC2"; allwinner,pname = "spi0_mosi", "spi0_miso", "spi0_sclk"; allwinner,function = "spi0"; allwinner,muxsel = <3>; allwinner,drive = <1>; allwinner,pull = <0>; }; spi0_pins_b: spi0@1 { allwinner,pins = "PC3"; allwinner,pname = "spi0_cs0"; allwinner,function = "spi0"; allwinner,muxsel = <3>; allwinner,drive = <1>; allwinner,pull = <1>; // only CS should be pulled up }; spi0_pins_c: spi0@2 { allwinner,pins = "PC0", "PC1", "PC2", "PC3"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; spi1_pins_a: spi1@0 { allwinner,pins = "PA15", "PA16", "PA14"; allwinner,pname = "spi1_mosi", "spi1_miso", "spi1_sclk"; allwinner,function = "spi1"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <0>; }; spi1_pins_b: spi1@1 { allwinner,pins = "PA13"; allwinner,pname = "spi1_cs0"; allwinner,function = "spi1"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <1>; // only CS should be pulled up }; spi1_pins_c: spi1@2 { allwinner,pins = "PA13", "PA14", "PA15", "PA16"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; sdc0_pins_a: sdc0@0 { allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; allwinner,function = "sdc0"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <1>; }; sdc0_pins_b: sdc0@1 { allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <1>; }; sdc1_pins_a: sdc1@0 { allwinner,pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5"; allwinner,function = "sdc1"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <1>; }; sdc1_pins_b: sdc1@1 { allwinner,pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <1>; }; sdc2_pins_a: sdc2@0 { allwinner,pins = "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16"; allwinner,function = "sdc2"; allwinner,muxsel = <3>; allwinner,drive = <2>; allwinner,pull = <1>; }; sdc2_pins_b: sdc2@1 { allwinner,pins = "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <1>; }; daudio0_pins_a: daudio0@0 { allwinner,pins = "PA18", "PA19", "PA20", "PA21"; allwinner,function = "i2s0"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <0>; }; daudio0_pins_b: daudio0_sleep@0 { allwinner,pins = "PA18", "PA19", "PA20", "PA21"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; daudio1_pins_a: daudio1@0 { allwinner,pins = "PG10", "PG11", "PG12", "PG13"; allwinner,function = "i2s1"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <0>; }; daudio1_pins_b: daudio1_sleep@0 { allwinner,pins = "PG10", "PG11", "PG12", "PG13"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; spdif_pins_a: spdif@0 { allwinner,pins = "PA17"; allwinner,function = "spdif0"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <0>; }; spdif_pins_b: spdif_sleep@0 { allwinner,pins = "PA17"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; csi0_pins_a: csi0@0 { allwinner,pins = "PE0","PE1","PE2","PE3","PE4", "PE5", "PE6","PE7","PE8","PE9", "PE10","PE11", "PE12","PE13"; allwinner,pname = "csi0_pck","csi0_mck", "csi0_hsync", "csi0_vsync", "csi0_d0", "csi0_d1", "csi0_d2", "csi0_d3", "csi0_d4", "csi0_d5", "csi0_d6", "csi0_d7","csi0_sck", "csi0_sda"; allwinner,function = "csi0"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <0>; allwinner,data = <0>; }; csi0_pins_b: csi0@1 { allwinner,pins = "PE0","PE1","PE2","PE3", "PE4","PE5","PE6","PE7", "PE8","PE9","PE10","PE11", "PE12","PE13"; allwinner,pname = "csi0_pck","csi0_mck", "csi0_hsync","csi0_vsync", "csi0_d0","csi0_d1", "csi0_d2","csi0_d3", "csi0_d4","csi0_d5", "csi0_d6","csi0_d7", "csi0_sck","csi0_sda"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; allwinner,data = <0>; }; scr0_pins_a: smartcard@0 { allwinner,pins = "PA6", "PA7", "PA8", "PA9", "PA10"; allwinner,pname = "scr0_vccen", "scr0_sck", "scr0_sda", "scr0_rst", "scr0_det"; allwinner,function = "sim0"; allwinner,muxsel = <2>; allwinner,drive = <0>; allwinner,pull = <1>; }; scr0_pins_b: smartcard@1 { allwinner,pins = "PA20", "PA21"; allwinner,pname = "scr0_vppen", "scr0_vppp"; allwinner,function = "sim0"; allwinner,muxsel = <3>; allwinner,drive = <0>; allwinner,pull = <1>; }; scr0_pins_c: smartcard@2 { allwinner,pins = "PA6", "PA7", "PA8", "PA9", "PA10", "PA20", "PA21"; allwinner,pname = "scr0_rst", "scr0_vppen", "scr0_vppp", "scr0_det", "scr0_vccen", "scr0_sck", "scr0_sda"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <0>; allwinner,pull = <0>; }; nand0_pins_a: nand0@0 { allwinner,pins = "PC0", "PC1", "PC2", "PC4", "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14"; allwinner,pname= "nand0_we", "nand0_ale", "nand0_cle", "nand0_nre", "nand0_d0", "nand0_d1", "nand0_d2", "nand0_d3", "nand0_d4", "nand0_d5", "nand0_d6", "nand0_d7", "nand0_ndqs"; allwinner,function = "nand0"; allwinner,muxsel = <2>; allwinner,drive = <1>; allwinner,pull = <0>; }; nand0_pins_b: nand0@1 { allwinner,pins = "PC3", "PC5", "PC15", "PC16"; allwinner,pname= "nand0_ce0", "nand0_rb0", "nand0_ce1", "nand0_rb1"; allwinner,function = "nand0"; allwinner,muxsel = <2>; allwinner,drive = <1>; //only RB&CE should be pulled up allwinner,pull = <1>; }; nand0_pins_c: nand0@2 { allwinner,pins = "PC0", "PC1", "PC2", "PC3", "PC4", "PC5", "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16"; allwinner,function = "io_disabled"; allwinner,muxsel = <7>; allwinner,drive = <1>; allwinner,pull = <0>; }; }; }; }; here is the main dtsi file /* * Allwinner Technology CO., Ltd. sun8iw7p1 platform */ /* kernel used */ /*/memreserve/ 0x43000000 0x00000800; /* super standby range : [0x43000000~0x43000800], size = 2K */ /* tf used */ /memreserve/ 0x43080000 0x00010000; /* arisc dram code space range */ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/ion/ion_sunxi.h> #include "sun8iw7p1-clk.dtsi" #include "sun8iw7p1-pinctrl.dtsi" / { model = "sun8iw7p1"; compatible = "allwinner,sun8iw7p1", "allwinner,,sun8iw7p1"; interrupt-parent = <&gic>; #address-cells = <2>; #size-cells = <2>; aliases { serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; serial3 = &uart3; twi0 = &twi0; twi1 = &twi1; twi2 = &twi2; spi0 = &spi0; spi1 = &spi1; scr0 = &scr0; gmac0 = &gmac0; global_timer0 = &soc_timer0; cci0 = &csi_cci0; csi_res0 = &csi_res0; vfe0 = &csi0; mmc0 = &sdc0; mmc2 = &sdc2; nand0 =&nand0; disp = &disp; pwm = &pwm; pwm0 = &pwm0; pwm1 = &pwm1; tv0 = &tv0; hdmi = &hdmi; boot_disp = &boot_disp; }; chosen { bootargs = "earlyprintk=sunxi-uart,0x01c28000 loglevel=8 initcall_debug=1 console=ttyS0 init=/init"; linux,initrd-start = <0x0 0x0>; linux,initrd-end = <0x0 0x0>; }; cpus { enable-method = "allwinner,sun8iw7p1"; #address-cells = <1>; #size-cells = <0>; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x0>; regulators = "vdd-cpua"; clocks = <&clk_pll_cpu>; clock-frequency = <1008000000>; clock-latency = <2000000>; /*if divide bin <&cpu_opp_l_table0 &cpu_opp_l_table1>*/ operating-points-v2 = <&cpu_opp_l_table0>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x1>; regulators = "vdd-cpua"; clocks = <&clk_pll_cpu>; clock-frequency = <1008000000>; clock-latency = <2000000>; /*if divide bin <&cpu_opp_l_table0 &cpu_opp_l_table1>*/ operating-points-v2 = <&cpu_opp_l_table0>; }; cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x2>; regulators = "vdd-cpua"; clocks = <&clk_pll_cpu>; clock-frequency = <1008000000>; clock-latency = <2000000>; /*if divide bin <&cpu_opp_l_table0 &cpu_opp_l_table1>*/ operating-points-v2 = <&cpu_opp_l_table0>; }; cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x3>; regulators = "vdd-cpua"; clocks = <&clk_pll_cpu>; clock-frequency = <1008000000>; clock-latency = <2000000>; /*if divide bin <&cpu_opp_l_table0 &cpu_opp_l_table1>*/ operating-points-v2 = <&cpu_opp_l_table0>; }; }; opp_dvfs_table:opp_dvfs_table { cluster_num = <1>; opp_table_count = <1>; cpu_opp_l_table0: opp_l_table0 { /* compatible = "operating-points-v2"; */ compatible = "allwinner,opp_l_table0"; opp-shared; opp00 { opp-hz = /bits/ 64 <480000000>; opp-microvolt = <1300000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp01 { opp-hz = /bits/ 64 <648000000>; opp-microvolt = <1300000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp02 { opp-hz = /bits/ 64 <720000000>; opp-microvolt = <1300000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp03 { opp-hz = /bits/ 64 <816000000>; opp-microvolt = <1300000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp04 { opp-hz = /bits/ 64 <912000000>; opp-microvolt = <1300000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; opp05 { opp-hz = /bits/ 64 <1008000000>; opp-microvolt = <1300000>; axi-bus-divide-ratio = <3>; clock-latency-ns = <2000000>; }; }; }; n_brom { compatible = "allwinner,n-brom"; reg = <0x0 0x0 0x0 0xc000>; }; s_brom { compatible = "allwinner,s-brom"; reg = <0x0 0x0 0x0 0x10000>; }; prcm { compatible = "allwinner,prcm"; reg = <0x0 0x01f01400 0x0 0x400>; }; cpuscfg { compatible = "allwinner,cpuscfg"; reg = <0x0 0x01f01c00 0x0 0x400>; }; ion { compatible = "allwinner,sunxi-ion"; system { type = <ION_HEAP_TYPE_SYSTEM>; name = "system"; }; system_contig { type = <ION_HEAP_TYPE_SYSTEM_CONTIG>; name = "system_contig"; }; cma { type = <ION_HEAP_TYPE_DMA>; name = "cma"; }; }; dram: dram { compatible = "allwinner,dram"; clocks = <&clk_pll_ddr>; clock-names = "pll_ddr"; dram_clk = <672>; dram_type = <3>; dram_zq = <0x003F3FDD>; dram_odt_en = <1>; dram_para1 = <0x10f41000>; dram_para2 = <0x00001200>; dram_mr0 = <0x1A50>; dram_mr1 = <0x40>; dram_mr2 = <0x10>; dram_mr3 = <0>; dram_tpr0 = <0x04E214EA>; dram_tpr1 = <0x004214AD>; dram_tpr2 = <0x10A75030>; dram_tpr3 = <0>; dram_tpr4 = <0>; dram_tpr5 = <0>; dram_tpr6 = <0>; dram_tpr7 = <0>; dram_tpr8 = <0>; dram_tpr9 = <0>; dram_tpr10 = <0>; dram_tpr11 = <0>; dram_tpr12 = <168>; dram_tpr13 = <0x823>; }; memory@40000000 { device_type = "memory"; reg = <0x00000000 0x40000000 0x00000000 0x40000000>; }; gic: interrupt-controller@1c81000 { compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; #interrupt-cells = <3>; #address-cells = <0>; device_type = "gic"; interrupt-controller; reg = <0x0 0x01c81000 0 0x1000>, /* GIC Dist */ <0x0 0x01c82000 0 0x2000>, /* GIC CPU */ <0x0 0x01c84000 0 0x2000>, /* GIC VCPU Control */ <0x0 0x01c86000 0 0x2000>; /* GIC VCPU */ interrupts = <GIC_PPI 9 0xf04>; /* GIC Maintenence IRQ */ }; sid: sunxi-sid@01c14000 { compatible = "allwinner,sunxi-sid"; device_type = "sid"; reg = <0x0 0x01c14000 0 0x0200>; }; chipid: sunxi-chipid@01c14200 { compatible = "allwinner,sunxi-chipid"; device_type = "chipid"; reg = <0x0 0x01c14200 0 0x0200>; }; timer { compatible = "arm,armv7-timer"; interrupts = <GIC_PPI 13 0xff01>, /* Secure Phys IRQ */ <GIC_PPI 14 0xff01>; /* Non-secure Phys IRQ */ clock-frequency = <24000000>; arm,cpu-registers-not-fw-configured; }; wdt: watchdog@01c20ca0 { compatible = "allwinner,sun6i-a31-wdt"; reg = <0x0 0x01c20ca0 0 0x18>; }; pmu { compatible = "arm,armv8-pmuv3"; interrupts = <GIC_SPI 120 4>, <GIC_SPI 121 4>, <GIC_SPI 122 4>, <GIC_SPI 123 4>; }; dvfs_table: dvfs_table { compatible = "allwinner,dvfs_table"; max_freq = <1200000000>; min_freq = <480000000>; lv_count = <8>; lv1_freq = <1200000000>; lv1_volt = <1300>; lv2_freq = <1104000000>; lv2_volt = <1240>; lv3_freq = <1008000000>; lv3_volt = <1160>; lv4_freq = <912000000>; lv4_volt = <1100>; lv5_freq = <720000000>; lv5_volt = <1000>; lv6_freq = <0>; lv6_volt = <1000>; lv7_freq = <0>; lv7_volt = <1000>; lv8_freq = <0>; lv8_volt = <1000>; }; dramfreq { compatible = "allwinner,sunxi-dramfreq"; reg = <0x0 0x01c62000 0x0 0x1000>, <0x0 0x01c63000 0x0 0x1000>, <0x0 0x01c20000 0x0 0x800>; interrupts = <GIC_SPI 66 0x4>; clocks = <&clk_pll_ddr>, <&clk_ahb1>; status = "okay"; }; uboot: uboot { }; gpu: gpu@0x01c40000 { compatible = "arm,mali-400", "arm,mali-utgard"; reg = <0x0 0x01c40000 0x0 0x10000>; interrupts = <GIC_SPI 97 4>, <GIC_SPI 98 4>, <GIC_SPI 99 4>, <GIC_SPI 100 4>, <GIC_SPI 102 4>, <GIC_SPI 103 4>; interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1"; clocks = <&clk_pll_gpu>, <&clk_gpu>; }; soc: soc@01c00000 { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; ranges; device_type = "soc"; sram-controller@01c00000 { device_type = "sram-controller"; compatible = "allwinner,sram_ctrl"; reg = <0x0 0x01c00000 0x0 0x24>; #address-cells = <1>; #size-cells = <1>; sram_a: sram@00000000 { compatible = "mmio-sram"; reg = <0x00000000 0xc000>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x00000000 0xc000>; emac_sram: sram-section@8000 { compatible = "allwinner,sun4i-a10-sram-a3-a4"; #size-cells = <1>; reg = <0x8000 0x4000>; status = "okay"; }; }; sram_d: sram@00010000 { compatible = "mmio-sram"; reg = <0x00010000 0x1000>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x00010000 0x1000>; otg_sram: sram-section@0000 { compatible = "allwinner,sun4i-a10-sram-d"; #size-cells = <1>; reg = <0x0000 0x1000>; status = "disabled"; }; }; }; dma0:dma-controller@01c02000 { compatible = "allwinner,sun8i-dma"; reg = <0x0 0x01c02000 0x0 0x1000>; interrupts = <GIC_SPI 50 4>; clocks = <&clk_dma>; #dma-cells = <1>; }; mbus0:mbus-controller@01c62000 { compatible = "allwinner,sun8i-mbus"; reg = <0x0 0x01c62000 0x0 0x110>; #mbus-cells = <1>; }; arisc { compatible = "allwinner,sunxi-arisc"; #address-cells = <2>; #size-cells = <2>; clocks = <&clk_losc>, <&clk_iosc>, <&clk_hosc>, <&clk_pll_periph0>; clock-names = "losc", "iosc", "hosc", "pll_periph0"; powchk_used = <0x0>; power_reg = <0x02309621>; system_power = <50>; }; arisc_space { compatible = "allwinner,arisc_space"; /* num dst offset size */ space1 = <0x00040000 0x00000000 0x0000c000>; /*srama2*/ space2 = <0x43080000 0x00000000 0x00010000>; /*dram*/ space3 = <0x00000000 0x00000000 0x00000000>; /*para*/ space4 = <0x0004b800 0x00000000 0x00000800>; /*msgpool*/ }; standby_space { compatible = "allwinner,standby_space"; /* num dst offset size */ space1 = <0x43000000 0x00000000 0x00000800>; }; msgbox: msgbox@1c17000 { compatible = "allwinner,msgbox"; clocks = <&clk_msgbox>; clock-names = "clk_msgbox"; reg = <0x0 0x01c17000 0x0 0x1000>; interrupts = <GIC_SPI 49 IRQ_TYPE_EDGE_RISING>; status = "okay"; }; hwspinlock: hwspinlock@1c18000 { compatible = "allwinner,sunxi-hwspinlock"; clocks = <&clk_hwspinlock_rst>, <&clk_hwspinlock_bus>; clock-names = "clk_hwspinlock_rst", "clk_hwspinlock_bus"; reg = <0x0 0x01c18000 0x0 0x1000>; num-locks = <8>; /* the number hwspinlock */ status = "okay"; }; s_cir0: s_cir@0x01f02000 { compatible = "allwinner,s_cir"; reg = <0x0 0x01f02000 0x0 0x400>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&s_cir0_pins_a>; clocks = <&clk_hosc>,<&clk_cpurcir>; ir_power_key_code = <0x1a>; ir_addr_code = <0xfb04>; supply = ""; supply_vol = ""; status = "okay"; }; s_uart0: s_uart@0x01f02800 { compatible = "allwinner,s_uart"; reg = <0x0 0x01f02800 0x0 0x400>; interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&s_uart0_pins_a>; status = "okay"; }; s_twi0: s_twi@0x01f02400 { compatible = "allwinner,s_twi"; reg = <0x0 0x01f02400 0x0 0x400>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&s_twi0_pins_a>; status = "okay"; }; s_cpuscfg: s_cpuscfg@0x01f01c00 { compatible = "allwinner,s_cpuscfg"; reg = <0x0 0x01f01c00 0x0 0x400>; status = "okay"; }; box_start_os: box_start_os0 { compatible = "allwinner,box_start_os"; start_type = <0x0>; irkey_used = <0x0>; pmukey_used = <0x0>; pmukey_num = <0x0>; led_power = <0x0>; led_state = <0x0>; status = "disable"; }; soc_timer0: timer@1c20c00 { compatible = "allwinner,sun4i-a10-timer"; device_type = "soc_timer"; reg = <0x0 0x01c20c00 0x0 0x90>; interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; /* On FPGA, timer can only use the losc. * On IC, timer should use the hosc. */ clocks = <&clk_hosc>, <&clk_losc>; }; rtc: rtc@01f000000 { compatible = "allwinner,sun8i-rtc"; device_type = "rtc"; reg = <0x0 0x01f00000 0x0 0x1FC>; interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; gpr_offset = <0x100>; gpr_len = <4>; }; ve: ve@01c0e000 { compatible = "allwinner,sunxi-cedar-ve"; reg = <0x0 0x01c0e000 0x0 0x1000>, <0x0 0x01c00000 0x0 0x10>, <0x0 0x01c20000 0x0 0x800>; interrupts = <GIC_SPI 58 4>; clocks = <&clk_pll_ve>, <&clk_ve>; }; uart0: uart@01c28000 { compatible = "allwinner,sun8i-uart"; device_type = "uart0"; reg = <0x0 0x01c28000 0x0 0x400>; interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_uart0>; pinctrl-0 = <&uart0_pins_a>; pinctrl-1 = <&uart0_pins_b>; pinctrl-names = "default", "sleep"; uart0_port = <0>; uart0_type = <2>; status = "okay"; }; uart1: uart@01c28400 { compatible = "allwinner,sun8i-uart"; device_type = "uart1"; reg = <0x0 0x01c28400 0x0 0x400>; interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_uart1>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart1_pins_a>; pinctrl-1 = <&uart1_pins_b>; uart1_port = <1>; uart1_type = <8>; status = "okay"; }; uart2: uart@01c28800 { compatible = "allwinner,sun8i-uart"; device_type = "uart2"; reg = <0x0 0x01c28800 0x0 0x400>; interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_uart2>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart2_pins_a>; pinctrl-1 = <&uart2_pins_b>; uart2_port = <2>; uart2_type = <4>; status = "disabled"; }; uart3: uart@01c28c00 { compatible = "allwinner,sun8i-uart"; device_type = "uart3"; reg = <0x0 0x01c28c00 0x0 0x400>; interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_uart3>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart3_pins_a>; pinctrl-1 = <&uart3_pins_b>; uart3_port = <3>; uart3_type = <4>; status = "disabled"; }; twi0: twi@0x01c2ac00{ #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sun8i-twi"; device_type = "twi0"; reg = <0x0 0x01c2ac00 0x0 0x400>; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_twi0>; clock-frequency = <400000>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&twi0_pins_a>; pinctrl-1 = <&twi0_pins_b>; status = "okay"; }; twi1: twi@0x01c2b000{ #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sun8i-twi"; device_type = "twi1"; reg = <0x0 0x01c2b000 0x0 0x400>; interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_twi1>; clock-frequency = <200000>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&twi1_pins_a>; pinctrl-1 = <&twi1_pins_b>; status = "okay"; }; twi2: twi@0x01c2b400{ #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sun8i-twi"; device_type = "twi2"; reg = <0x0 0x01c2b400 0x0 0x400>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_twi2>; clock-frequency = <200000>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&twi2_pins_a>; pinctrl-1 = <&twi2_pins_b>; status = "disabled"; }; spi0: spi@01c68000 { #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sun8i-spi"; device_type = "spi0"; reg = <0x0 0x01c68000 0x0 0x1000>; interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_pll_periph0>, <&clk_spi0>; clock-frequency = <100000000>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&spi0_pins_a &spi0_pins_b>; pinctrl-1 = <&spi0_pins_c>; spi0_cs_number = <2>; spi0_cs_bitmap = <3>; status = "okay"; }; spi1: spi@01c69000 { #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sun8i-spi"; device_type = "spi1"; reg = <0x0 0x01c69000 0x0 0x1000>; interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_pll_periph0>, <&clk_spi1>; clock-frequency = <100000000>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&spi1_pins_a &spi1_pins_b>; pinctrl-1 = <&spi1_pins_c>; spi1_cs_number = <2>; spi1_cs_bitmap = <3>; status = "disabled"; }; usbc0:usbc0@0 { device_type = "usbc0"; compatible = "allwinner,sunxi-otg-manager"; usb_port_type = <2>; usb_detect_type = <1>; usb_detect_mode = <0>; usb_id_gpio; usb_det_vbus_gpio; usb_drv_vbus_gpio; usb_host_init_state = <0>; usb_regulator_io = "nocare"; usb_wakeup_suspend = <0>; usb_luns = <3>; usb_serial_unique = <0>; usb_serial_number = "20080411"; rndis_wceis = <1>; status = "okay"; }; udc:udc-controller@0x01c19000 { compatible = "allwinner,sunxi-udc"; reg = <0x0 0x01c19000 0x0 0x1000>, /*udc base*/ <0x0 0x01c00000 0x0 0x100>; /*sram base*/ interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_usbphy0>, <&clk_usbotg>; status = "okay"; }; ehci0:ehci0-controller@0x01c1a000 { compatible = "allwinner,sunxi-ehci0"; reg = <0x0 0x01c1a000 0x0 0xFFF>, /*hci0 base*/ <0x0 0x01c00000 0x0 0x100>, /*sram base*/ <0x0 0x01c19000 0x0 0x1000>; /*otg base*/ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_usbphy0>, <&clk_usbehci0>; hci_ctrl_no = <0>; status = "okay"; }; ohci0:ohci0-controller@0x01c1a400 { compatible = "allwinner,sunxi-ohci0"; reg = <0x0 0x01c1a000 0x0 0xFFF>, /*hci0 base*/ <0x0 0x01c00000 0x0 0x100>, /*sram base*/ <0x0 0x01c19000 0x0 0x1000>; /*otg base*/ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_usbphy0>, <&clk_usbohci0>; hci_ctrl_no = <0>; status = "okay"; }; usbc1:usbc1@0 { device_type = "usbc1"; usb_drv_vbus_gpio; usb_host_init_state = <1>; usb_regulator_io = "nocare"; usb_wakeup_suspend = <0>; status = "okay"; }; ehci1:ehci1-controller@0x01c1b000 { compatible = "allwinner,sunxi-ehci1"; reg = <0x0 0x01c1b000 0x0 0xFFF>, /*hci1 base*/ <0x0 0x01c00000 0x0 0x100>, /*sram base*/ <0x0 0x01c19000 0x0 0x1000>; /*otg base*/ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_usbphy1>, <&clk_usbehci1>; hci_ctrl_no = <1>; status = "okay"; }; ohci1:ohci1-controller@0x01c1b400 { compatible = "allwinner,sunxi-ohci1"; reg = <0x0 0x01c1b000 0x0 0xFFF>, /*hci1 base*/ <0x0 0x01c00000 0x0 0x100>, /*sram base*/ <0x0 0x01c19000 0x0 0x1000>; /*otg base*/ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_usbphy1>, <&clk_usbohci1>; hci_ctrl_no = <1>; status = "okay"; }; usbc2:usbc2@0 { device_type = "usbc2"; usb_drv_vbus_gpio; usb_host_init_state = <1>; usb_regulator_io = "nocare"; usb_wakeup_suspend = <0>; status = "okay"; }; ehci2:ehci2-controller@0x01c1c000 { compatible = "allwinner,sunxi-ehci2"; reg = <0x0 0x01c1c000 0x0 0xFFF>, /*hci2 base*/ <0x0 0x01c00000 0x0 0x100>, /*sram base*/ <0x0 0x01c19000 0x0 0x1000>; /*otg base*/ interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_usbphy2>, <&clk_usbehci2>; hci_ctrl_no = <2>; status = "okay"; }; ohci2:ohci2-controller@0x01c1c400 { compatible = "allwinner,sunxi-ohci2"; reg = <0x0 0x01c1c000 0x0 0xFFF>, /*hci2 base*/ <0x0 0x01c00000 0x0 0x100>, /*sram base*/ <0x0 0x01c19000 0x0 0x1000>; /*otg base*/ interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_usbphy2>, <&clk_usbohci2>; hci_ctrl_no = <2>; status = "okay"; }; usbc3:usbc3@0 { device_type = "usbc3"; usb_drv_vbus_gpio; usb_host_init_state = <1>; usb_regulator_io = "nocare"; usb_wakeup_suspend = <0>; status = "okay"; }; ehci3:ehci3-controller@0x01c1d000 { compatible = "allwinner,sunxi-ehci3"; reg = <0x0 0x01c1d000 0x0 0xFFF>, /*hci2 base*/ <0x0 0x01c00000 0x0 0x100>, /*sram base*/ <0x0 0x01c19000 0x0 0x1000>; /*otg base*/ interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_usbphy3>, <&clk_usbehci3>; hci_ctrl_no = <3>; status = "okay"; }; ohci3:ohci3-controller@0x01c1d400 { compatible = "allwinner,sunxi-ohci3"; reg = <0x0 0x01c1d000 0x0 0xFFF>, /*hci2 base*/ <0x0 0x01c00000 0x0 0x100>, /*sram base*/ <0x0 0x01c19000 0x0 0x1000>; /*otg base*/ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_usbphy3>, <&clk_usbohci3>; hci_ctrl_no = <3>; status = "okay"; }; codec:codec@0x01c22c00 { compatible = "allwinner,sunxi-internal-codec"; reg = <0x0 0x01c22c00 0x0 0x2bc>,/*digital baseadress*/ <0x0 0x01f015c0 0x0 0x4>;/*analog baseadress*/ clocks = <&clk_pll_audio>,<&clk_adda>; headphonevol = <0x3b>; spkervol = <0x1b>; maingain = <0x4>; hp_dirused = <0x0>; pa_sleep_time = <0x15e>; status = "okay"; }; cpudai:cpudai0-controller@0x01c22c00 { compatible = "allwinner,sunxi-internal-cpudai"; reg = <0x0 0x01c22c00 0x0 0x2bc>;/*digital baseadress*/ status = "okay"; }; daudio0:daudio@0x01c22000 { compatible = "allwinner,sunxi-daudio"; reg = <0x0 0x01c22000 0x0 0x70>; clocks = <&clk_pll_audio>,<&clk_i2s0>; pinctrl-names = "default","sleep"; pinctrl-0 = <&daudio0_pins_a>; pinctrl-1 = <&daudio0_pins_b>; pcm_lrck_period = <0x20>; slot_width_select = <0x20>; daudio_master = <0x04>; audio_format = <0x01>; signal_inversion = <0x01>; frametype = <0x0>; tdm_config = <0x01>; mclk_div = <0x0>; tdm_num = <0x0>; status = "disabled"; }; daudio1:daudio@0x01c22400 { compatible = "allwinner,sunxi-daudio"; reg = <0x0 0x01c22400 0x0 0x70>; pinctrl-names = "default","sleep"; pinctrl-0 = <&daudio1_pins_a>; pinctrl-1 = <&daudio1_pins_b>; clocks = <&clk_pll_audio>,<&clk_i2s1>; pcm_lrck_period = <0x20>; slot_width_select = <0x20>; daudio_master = <0x04>; audio_format = <0x01>; signal_inversion = <0x01>; frametype = <0x0>; tdm_config = <0x01>; mclk_div = <0x0>; tdm_num = <0x1>; status = "disabled"; }; audiohdmi:daudio@0x01c22800{ compatible = "allwinner,sunxi-tdmhdmi"; reg = <0x0 0x01c22800 0x0 0x58>; clocks = <&clk_pll_audio>,<&clk_i2s2>; status = "okay"; }; spdif:spdif-controller@0x01c21000{ compatible = "allwinner,sunxi-spdif"; reg = <0x0 0x01c21000 0x0 0x38>; clocks = <&clk_pll_audio>,<&clk_owa>; pinctrl-names = "default","sleep"; pinctrl-0 = <&spdif_pins_a>; pinctrl-1 = <&spdif_pins_b>; status = "okay"; }; sndcodec:sound@0 { compatible = "allwinner,sunxi-codec-machine"; interrupts = <GIC_SPI 29 4>; sunxi,cpudai-controller = <&cpudai>; sunxi,audio-codec = <&codec>; hp_detect_case = <0x00>; /* jack_det_gpio = <&pio PH 12 1 0 1 0>; */ /* invert: 0->high is plug_in, 1->high is plug_out */ jack_invert = <1>; status = "okay"; }; snddaudio0:sound@1{ compatible = "allwinner,sunxi-daudio0-machine"; sunxi,daudio0-controller = <&daudio0>; status = "okay"; }; snddaudio1:sound@2{ compatible = "allwinner,sunxi-daudio1-machine"; sunxi,daudio1-controller = <&daudio1>; status = "okay"; }; sndhdmi:sound@3{ compatible = "allwinner,sunxi-hdmi-machine"; sunxi,hdmi-controller = <&audiohdmi>; status = "okay"; }; sndspdif:sound@4{ compatible = "allwinner,sunxi-spdif-machine"; sunxi,spdif-controller = <&spdif>; status = "disabled"; }; sdc2: sdmmc@01C11000 { compatible = "allwinner,sunxi-mmc-v4p10x"; device_type = "sdc2"; reg = <0x0 0x01C11000 0x0 0x1000>; interrupts = <GIC_SPI 62 0x0104>; /* */ clocks = <&clk_hosc>,<&clk_pll_periph0>, <&clk_sdmmc2_module>,<&clk_sdmmc2_mode>, <&clk_sdmmc2_bus>,<&clk_sdmmc2_rst>; clock-names = "osc24m","pll_periph","mmc", "sdmmc2mod","ahb","rst"; pinctrl-names = "default","sleep"; pinctrl-0 = <&sdc2_pins_a>; pinctrl-1 = <&sdc2_pins_b>; bus-width = <8>; cap-mmc-highspeed; cap-sd-highspeed; mmc-ddr-1_8v; /*mmc-hs200-1_8v;*/ /*mmc-hs400-1_8v;*/ non-removable; /*max-frequency = <200000000>;*/ max-frequency = <50000000>; cap-erase; mmc-high-capacity-erase-size; /*-- speed mode --*/ /*sm0: DS26_SDR12*/ /*sm1: HSSDR52_SDR25*/ /*sm2: HSDDR52_DDR50*/ /*sm3: HS200_SDR104*/ /*sm4: HS400*/ /*-- frequency point -- /*f0: CLK_400K*/ /*f1: CLK_25M*/ /*f2: CLK_50M*/ /*f3: CLK_100M*/ /*f4: CLK_150M*/ /*f5: CLK_200M*/ sdc_tm4_sm0_freq0 = <0>; sdc_tm4_sm0_freq1 = <0>; sdc_tm4_sm1_freq0 = <0x00000000>; sdc_tm4_sm1_freq1 = <0>; sdc_tm4_sm2_freq0 = <0x00000000>; sdc_tm4_sm2_freq1 = <0>; sdc_tm4_sm3_freq0 = <0x05000000>; sdc_tm4_sm3_freq1 = <0x00000005>; sdc_tm4_sm4_freq0 = <0x00050000>; sdc_tm4_sm4_freq1 = <0x00000004>; /*vmmc-supply = <&reg_3p3v>;*/ /*vqmc-supply = <&reg_3p3v>;*/ /*vdmc-supply = <&reg_3p3v>;*/ /*vmmc = "vcc-card";*/ /*vqmc = "";*/ /*vdmc = "";*/ /*sunxi-power-save-mode;*/ /*status = "disabled";*/ status = "okay"; }; sdc0: sdmmc@01c0f000 { compatible = "allwinner,sunxi-mmc-v4p00x"; device_type = "sdc0"; reg = <0x0 0x01c0f000 0x0 0x1000>; /* only sdmmc0 */ interrupts = <GIC_SPI 60 0x0104>; /* */ clocks = <&clk_hosc>,<&clk_pll_periph0>, <&clk_sdmmc0_mod>,<&clk_sdmmc0_bus>, <&clk_sdmmc0_rst>; clock-names = "osc24m","pll_periph","mmc","ahb","rst"; pinctrl-names = "default","sleep"; pinctrl-0 = <&sdc0_pins_a>; pinctrl-1 = <&sdc0_pins_b>; max-frequency = <50000000>; bus-width = <4>; /*broken-cd;*/ /*non-removable;*/ /*cd-inverted*/ cd-gpios = <&pio PF 6 0 1 2 1>; /* vmmc-supply = <&reg_3p3v>;*/ /* vqmc-supply = <&reg_3p3v>;*/ /* vdmc-supply = <&reg_3p3v>;*/ /*vmmc = "vcc-card";*/ /*vqmc = "";*/ /*vdmc = "";*/ cap-sd-highspeed; cap-mmc-highspeed; cap-wait-while-busy; /*sd-uhs-sdr50;*/ /*sd-uhs-ddr50;*/ /*cap-sdio-irq;*/ /*keep-power-in-suspend;*/ /*ignore-pm-notify;*/ /*sunxi-power-save-mode;*/ /*sunxi-dly-400k = <1 0 0 0>; */ /*sunxi-dly-26M = <1 0 0 0>;*/ /*sunxi-dly-52M = <1 0 0 0>;*/ /*sunxi-dly-52M-ddr4 = <1 0 0 0>;*/ /*sunxi-dly-52M-ddr8 = <1 0 0 0>;*/ /*sunxi-dly-104M = <1 0 0 0>;*/ /*sunxi-dly-208M = <1 0 0 0>;*/ /*sunxi-dly-104M-ddr = <1 0 0 0>;*/ /*sunxi-dly-208M-ddr = <1 0 0 0>;*/ status = "okay"; /*status = "disabled";*/ }; sdc1: sdmmc@1C10000 { compatible = "allwinner,sunxi-mmc-v4p10x"; device_type = "sdc1"; reg = <0x0 0x1C10000 0x0 0x1000>; interrupts = <GIC_SPI 61 0x0104>; /* */ clocks = <&clk_hosc>,<&clk_pll_periph0>, <&clk_sdmmc1_module>,<&clk_sdmmc1_mode>, <&clk_sdmmc1_bus>,<&clk_sdmmc1_rst>; clock-names = "osc24m","pll_periph","mmc", "sdmmc2mod","ahb","rst"; pinctrl-names = "default","sleep"; pinctrl-0 = <&sdc1_pins_a>; pinctrl-1 = <&sdc1_pins_b>; max-frequency = <50000000>; bus-width = <4>; /*broken-cd;*/ /*cd-inverted*/ /*cd-gpios = <&pio PG 6 6 1 2 0>;*/ /* vmmc-supply = <&reg_3p3v>;*/ /* vqmc-supply = <&reg_3p3v>;*/ /* vdmc-supply = <&reg_3p3v>;*/ /*vmmc = "vcc-card";*/ /*vqmc = "";*/ /*vdmc = "";*/ cap-sd-highspeed; cap-mmc-highspeed; /*sd-uhs-sdr50;*/ /*sd-uhs-ddr50;*/ /*sd-uhs-sdr104;*/ /*cap-sdio-irq;*/ /*keep-power-in-suspend;*/ /*ignore-pm-notify;*/ /*sunxi-power-save-mode;*/ /*sunxi-dly-400k = <1 0 0 0 0>; */ /*sunxi-dly-26M = <1 0 0 0 0>;*/ /*sunxi-dly-52M = <1 0 0 0 0>;*/ /*sunxi-dly-52M-ddr4 = <1 0 0 0 2>;*/ /*sunxi-dly-52M-ddr8 = <1 0 0 0 0>;*/ /*sunxi-dly-104M = <1 0 0 0 1>;*/ /*sunxi-dly-208M = <1 1 0 0 0>;*/ /*sunxi-dly-208M = <1 0 0 0 1>;*/ /*sunxi-dly-104M-ddr = <1 0 0 0 0>;*/ /*sunxi-dly-208M-ddr = <1 0 0 0 0>;*/ status = "okay"; }; disp: disp@01000000 { compatible = "allwinner,sunxi-disp"; reg = <0x0 0x01000000 0x0 0x00300000>,/*de*/ <0x0 0x01c0c000 0x0 0xfff>,/*tcon0*/ <0x0 0x01c0d000 0x0 0xfff>;/*tcon1*/ interrupts = <GIC_SPI 86 0x0104>, <GIC_SPI 87 0x0104>; clocks = <&clk_de>,<&clk_tcon0>,<&clk_tcon1>; boot_disp = <0>; fb_base = <0>; status = "okay"; }; hdmi: hdmi@01ee0000 { compatible = "allwinner,sunxi-hdmi"; reg = <0x0 0x01ee0000 0x0 0x20000>; clocks = <&clk_hdmi>,<&clk_hdmi_slow>; status = "okay"; }; tv0: tv0@01c94000 { compatible = "allwinner,sunxi-tv"; reg = <0x0 0x01e00000 0x0 0x100>; clocks = <&clk_tve>; device_type = "tv0"; pinctrl-names = "active","sleep"; status = "disabled"; }; soc_tr: tr@01000000 { compatible = "allwinner,sun8iw11-tr"; reg = <0x0 0x01000000 0x0 0x000200bc>; interrupts = <GIC_SPI 96 0x0104>; clocks = <&clk_de>; status = "disabled"; }; g2d: g2d@01e80000 { compatible = "allwinner,sunxi-g2d"; reg = <0x0 0x01e80000 0x0 0x800>; interrupts = <GIC_SPI 46 0x0104>; status = "disabled"; }; pwm: pwm@01c21400 { compatible = "allwinner,sunxi-pwm"; reg = <0x0 0x01c21400 0x0 0x154>; pwm-number = <1>; pwm-base = <0x1>; pwms = <&pwm0>, <&pwm1>; }; pwm0: pwm0@01c21400 { compatible = "allwinner,sunxi-pwm0"; pinctrl-names = "active", "sleep"; reg_base = <0x01c21400>; reg_busy_offset = <0x00>; reg_busy_shift = <28>; reg_polarity_offset = <0x00>; reg_polarity_shift = <5>; reg_peci_offset = <0x00>; reg_peci_shift = <0x00>; reg_peci_width = <0x01>; reg_pis_offset = <0x04>; reg_pis_shift = <0x00>; reg_pis_width = <0x01>; reg_crie_offset = <0x10>; reg_crie_shift = <0x00>; reg_crie_width = <0x01>; reg_cfie_offset = <0x10>; reg_cfie_shift = <0x01>; reg_cfie_width = <0x01>; reg_cris_offset = <0x14>; reg_cris_shift = <0x00>; reg_cris_width = <0x01>; reg_cfis_offset = <0x14>; reg_cfis_shift = <0x01>; reg_cfis_width = <0x01>; reg_clk_src_offset = <0x20>; reg_clk_src_shift = <0x07>; reg_clk_src_width = <0x02>; reg_bypass_offset = <0x20>; reg_bypass_shift = <0x05>; reg_bypass_width = <0x01>; reg_clk_gating_offset = <0x20>; reg_clk_gating_shift = <0x04>; reg_clk_gating_width = <0x01>; reg_clk_div_m_offset = <0x20>; reg_clk_div_m_shift = <0x00>; reg_clk_div_m_width = <0x04>; reg_pdzintv_offset = <0x30>; reg_pdzintv_shift = <0x08>; reg_pdzintv_width = <0x08>; reg_dz_en_offset = <0x30>; reg_dz_en_shift = <0x00>; reg_dz_en_width = <0x01>; reg_enable_offset = <0x40>; reg_enable_shift = <0x00>; reg_enable_width = <0x01>; reg_cap_en_offset = <0x44>; reg_cap_en_shift = <0x00>; reg_cap_en_width = <0x01>; reg_period_rdy_offset = <0x60>; reg_period_rdy_shift = <0x0b>; reg_period_rdy_width = <0x01>; reg_pul_start_offset = <0x60>; reg_pul_start_shift = <0x0a>; reg_pul_start_width = <0x01>; reg_mode_offset = <0x60>; reg_mode_shift = <0x09>; reg_mode_width = <0x01>; reg_act_sta_offset = <0x60>; reg_act_sta_shift = <0x08>; reg_act_sta_width = <0x01>; reg_prescal_offset = <0x60>; reg_prescal_shift = <0x00>; reg_prescal_width = <0x08>; reg_entire_offset = <0x64>; reg_entire_shift = <0x10>; reg_entire_width = <0x10>; reg_active_offset = <0x64>; reg_active_shift = <0x00>; reg_active_width = <0x10>; }; pwm1: pwm1@01c21400 { compatible = "allwinner,sunxi-pwm1"; pinctrl-names = "active", "sleep"; reg_base = <0x01c21400>; reg_busy_offset = <0x00>; reg_busy_shift = <28>; reg_polarity_offset = <0x00>; reg_polarity_shift = <5>; reg_peci_offset = <0x00>; reg_peci_shift = <0x01>; reg_peci_width = <0x01>; reg_pis_offset = <0x04>; reg_pis_shift = <0x01>; reg_pis_width = <0x01>; reg_crie_offset = <0x10>; reg_crie_shift = <0x00>; reg_crie_width = <0x01>; reg_cfie_offset = <0x10>; reg_cfie_shift = <0x01>; reg_cfie_width = <0x01>; reg_cris_offset = <0x14>; reg_cris_shift = <0x01>; reg_cris_width = <0x01>; reg_cfis_offset = <0x14>; reg_cfis_shift = <0x01>; reg_cfis_width = <0x01>; reg_clk_src_offset = <0x20>; reg_clk_src_shift = <0x07>; reg_clk_src_width = <0x02>; reg_bypass_offset = <0x20>; reg_bypass_shift = <0x06>; reg_bypass_width = <0x01>; reg_clk_gating_offset = <0x20>; reg_clk_gating_shift = <0x04>; reg_clk_gating_width = <0x01>; reg_clk_div_m_offset = <0x20>; reg_clk_div_m_shift = <0x00>; reg_clk_div_m_width = <0x04>; reg_pdzintv_offset = <0x30>; reg_pdzintv_shift = <0x08>; reg_pdzintv_width = <0x08>; reg_dz_en_offset = <0x30>; reg_dz_en_shift = <0x00>; reg_dz_en_width = <0x01>; reg_enable_offset = <0x40>; reg_enable_shift = <0x01>; reg_enable_width = <0x01>; reg_cap_en_offset = <0x44>; reg_cap_en_shift = <0x01>; reg_cap_en_width = <0x01>; reg_period_rdy_offset = <0x80>; reg_period_rdy_shift = <0x0b>; reg_period_rdy_width = <0x01>; reg_pul_start_offset = <0x80>; reg_pul_start_shift = <0x0a>; reg_pul_start_width = <0x01>; reg_mode_offset = <0x80>; reg_mode_shift = <0x09>; reg_mode_width = <0x01>; reg_act_sta_offset = <0x80>; reg_act_sta_shift = <0x08>; reg_act_sta_width = <0x01>; reg_prescal_offset = <0x80>; reg_prescal_shift = <0x00>; reg_prescal_width = <0x08>; reg_entire_offset = <0x84>; reg_entire_shift = <0x10>; reg_entire_width = <0x10>; reg_active_offset = <0x84>; reg_active_shift = <0x00>; reg_active_width = <0x10>; }; boot_disp: boot_disp { compatible = "allwinner,boot_disp"; }; csi_cci0:cci@0x01cb3000 { compatible = "allwinner,sunxi-csi_cci"; reg = <0x0 0x01cb3000 0x0 0x1000>; /*0x01cb3000--0x01cb4000*/ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;/*SUNXI_IRQ_CSI0_CCI (SUNXI_GIC_START + 85) = 117*/ status = "disabled"; }; csi_res0:csi_res@0x01cb0000 { compatible = "allwinner,sunxi-csi"; reg = <0x0 0x01cb0000 0x0 0x1000>;/*0x01cb0000--0x01cb1000*/ clocks = <&clk_csi_s>, <&clk_csi_m>, <&clk_csi_misc>, <&clk_pll_periph0>, <&clk_hosc>,<&clk_pll_periph1>; clocks-index = <0 1 2 3 4 5>; status = "disabled"; }; csi0:vfe@0 { device_type= "csi0"; compatible = "allwinner,sunxi-vfe"; interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;/*SUNXI_IRQ_CSI0 (SUNXI_GIC_START + 84 ) = 116*/ pinctrl-names = "default","sleep"; pinctrl-0 = <&csi0_pins_a>; pinctrl-1 = <&csi0_pins_b>; cci_sel = <0>; csi_sel = <0>; mipi_sel = <0>; isp_sel = <0>; csi0_sensor_list = <0>; csi0_mck = <&pio PE 1 2 0 1 0>; /*PD9 .mul_sel = 1, .pull = 0, .drv_level = 1, .data = 0*/ status = "disabled"; csi0_dev0:dev@0{ csi0_dev0_mname = "ov5640"; csi0_dev0_twi_addr = <0x78>; csi0_dev0_pos = "rear"; csi0_dev0_isp_used = <0>; csi0_dev0_fmt = <0>; csi0_dev0_stby_mode = <0>; csi0_dev0_vflip = <0>; csi0_dev0_hflip = <0>; csi0_dev0_iovdd = "iovdd-csi"; csi0_dev0_iovdd_vol = <2800000>; csi0_dev0_avdd = "avdd-csi"; csi0_dev0_avdd_vol = <2800000>; csi0_dev0_dvdd = "dvdd-csi-18"; csi0_dev0_dvdd_vol = <1500000>; csi0_dev0_afvdd = "afvcc-csi"; csi0_dev0_afvdd_vol = <2800000>; csi0_dev0_power_en = <>; csi0_dev0_reset = <&pio PE 14 1 0 1 0>; /*PB03 .mul_sel = 1, .pull = 0, .drv_level = 1, .data = 0*/ csi0_dev0_pwdn = <&pio PE 15 1 0 1 0>; /*PB10 .mul_sel = 1, .pull = 0, .drv_level = 1, .data = 0*/ csi0_dev0_flash_en = <>; csi0_dev0_flash_mode = <>; csi0_dev0_af_pwdn = <>; csi0_dev0_act_used = <0>; csi0_dev0_act_name = "ad5820_act"; csi0_dev0_act_slave = <0x18>; status = "disabled"; }; csi0_dev1:dev@1{ csi0_dev1_mname = ""; csi0_dev1_twi_addr = <0x78>; csi0_dev1_pos = "rear"; csi0_dev1_isp_used = <1>; csi0_dev1_fmt = <0>; csi0_dev1_stby_mode = <0>; csi0_dev1_vflip = <0>; csi0_dev1_hflip = <0>; csi0_dev1_iovdd = "iovdd-csi"; csi0_dev1_iovdd_vol = <2800000>; csi0_dev1_avdd = "avdd-csi"; csi0_dev1_avdd_vol = <2800000>; csi0_dev1_dvdd = "dvdd-csi-18"; csi0_dev1_dvdd_vol = <1500000>; csi0_dev1_afvdd = "afvcc-csi"; csi0_dev1_afvdd_vol = <2800000>; csi0_dev1_power_en = <>; csi0_dev1_reset = <>; csi0_dev1_pwdn = <>; csi0_dev1_flash_en = <>; csi0_dev1_flash_mode = <>; csi0_dev1_af_pwdn = <>; csi0_dev1_act_used = <0>; csi0_dev1_act_name = "ad5820_act"; csi0_dev1_act_slave = <0x18>; status = "disabled"; }; }; Vdevice: vdevice@0{ compatible = "allwinner,sun8i-vdevice"; device_type = "Vdevice"; pinctrl-names = "default"; pinctrl-0 = <&vdevice_pins_a>; test-gpios = <&pio PG 10 1 2 2 1>; status = "disabled"; }; cryptoengine: ce@1c15000 { compatible = "allwinner,sunxi-ce"; device_name = "ce"; reg = <0x0 0x01c15000 0x0 0x80>, <0x0 0x01c15800 0x0 0x80>; /* Unused */ interrupts = <GIC_SPI 94 0xff01>, <GIC_SPI 80 0xff01>; /* Unused */ clock-frequency = <300000000 200000000>; /* 300MHz */ clocks = <&clk_ss>, <&clk_pll_periph0>; }; di:deinterlace@0x01400000{ #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sunxi-deinterlace"; reg = <0x0 0x01400000 0x0 0x77c>; interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_deinterlace> ,<&clk_pll_periph0>; status = "okay"; }; scr0:smartcard@0x01c2c400{ #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sunxi-scr"; reg = <0x0 0x01c2c400 0x0 0x400>; interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_scr>, <&clk_apb2>; clock-frequency = <24000000>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&scr0_pins_a &scr0_pins_b>; pinctrl-1 = <&scr0_pins_c>; status = "disabled"; }; nmi:nmi@0{ compatible = "allwinner,sunxi-nmi"; reg = <0x0 0x01c00030 0x0 0x0c>; nmi_irq_ctrl = <0x00>; nmi_irq_en = <0x08>; nmi_irq_status = <0x04>; status = "disabled"; }; nand0:nand0@01c03000 { compatible = "allwinner,sun8iw7-nand"; device_type = "nand0"; reg = <0x0 0x01c03000 0x0 0x1000>; /* nand0 */ interrupts = <GIC_SPI 70 0x04>; clocks = <&clk_pll_periph0>,<&clk_nand>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&nand0_pins_a &nand0_pins_b>; pinctrl-1 = <&nand0_pins_c>; nand0_regulator1 = "vcc-nand"; nand0_regulator2 = "none"; nand0_cache_level = <0x55aaaa55>; nand0_flush_cache_num = <0x55aaaa55>; nand0_capacity_level = <0x55aaaa55>; nand0_id_number_ctl = <0x55aaaa55>; nand0_print_level = <0x55aaaa55>; nand0_p0 = <0x55aaaa55>; nand0_p1 = <0x55aaaa55>; nand0_p2 = <0x55aaaa55>; nand0_p3 = <0x55aaaa55>; status = "okay"; }; sunxi_thermal_sensor:thermal_sensor{ compatible = "allwinner,thermal_sensor"; reg = <0x0 0x01c25000 0x0 0x84>, <0x0 0x01c14040 0x0 0x4>; interrupts = <GIC_SPI 31 IRQ_TYPE_NONE>; clocks = <&clk_hosc>,<&clk_ths>; clock-frequency = <6000000>; combine_num = <1>; sensor_num = <1>; shut_temp= <115>; status = "okay"; ths_combine0:ths_combine0{ compatible = "allwinner,ths_combine0"; #thermal-sensor-cells = <1>; combine_sensor_num = <1>; combine_sensor_type = "CPU"; combine_sensor_temp_type = "max"; combine_sensor_id = <0>; }; }; cpu_budget_cooling:cpu_budget_cool{ compatible = "allwinner,budget_cooling"; device_type = "cpu_budget_cooling"; #cooling-cells = <2>; status = "okay"; state_cnt = <5>; cluster_num = <1>; state0 = <1200000 4>; state1 = <1200000 3>; state2 = <1200000 2>; state3 = <1200000 1>; state4 = <504000 1>; }; gpu_cooling:gpu_cooling{ compatible = "allwinner,gpu_cooling"; device_type = "gpu_cooling"; reg = <0x0 0x0 0x0 0x0>; #cooling-cells = <2>; status = "okay"; state_cnt = <4>; state0 = <4>; state1 = <3>; state2 = <2>; state3 = <1>; }; thermal-zones{ soc_thermal{ polling-delay-passive = <1000>; polling-delay = <1000>; thermal-sensors = <&ths_combine0 0>; trips{ cpu_trip0:t0{ temperature = <85>; type = "passive"; hysteresis = <0>; }; cpu_trip1:t1{ temperature = <95>; type = "passive"; hysteresis = <0>; }; cpu_trip2:t2{ temperature = <105>; type = "passive"; hysteresis = <0>; }; gpu_trip0:t3{ temperature = <90>; type = "passive"; hysteresis = <0>; }; gpu_trip1:t4{ temperature = <100>; type = "passive"; hysteresis = <0>; }; gpu_trip2:t5{ temperature = <110>; type = "passive"; hysteresis = <0>; }; crt_trip:t6{ temperature = <115>; type = "critical"; hysteresis = <0>; }; }; cooling-maps{ bind0{ contribution = <0>; trip = <&cpu_trip0>; cooling-device = <&cpu_budget_cooling 1 1>; }; bind1{ contribution = <0>; trip = <&cpu_trip1>; cooling-device = <&cpu_budget_cooling 2 2>; }; bind2{ contribution = <0>; trip = <&cpu_trip2>; cooling-device = <&cpu_budget_cooling 3 4>; }; bind3{ contribution = <0>; trip = <&gpu_trip0>; cooling-device = <&gpu_cooling 1 1>; }; bind4{ contribution = <0>; trip = <&gpu_trip1>; cooling-device = <&gpu_cooling 2 2>; }; bind5{ contribution = <0>; trip = <&gpu_trip2>; cooling-device = <&gpu_cooling 3 3>; }; }; }; }; keyboard0:keyboard{ compatible = "allwinner,keyboard_2000mv"; reg = <0x0 0x01c21800 0x0 0x400>; interrupts = <GIC_SPI 30 IRQ_TYPE_NONE>; status = "disabled"; key_cnt = <5>; key0 = <190 115>; key1 = <390 114>; key2 = <600 139>; key3 = <800 28>; key4 = <980 102>; }; gmac0: eth@01c30000 { compatible = "allwinner,sunxi-gmac"; reg = <0x0 0x01c30000 0x0 0x40000>, <0x0 0x01c00030 0x0 0x04>; interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "gmacirq"; clocks = <&clk_gmac>, <&clk_ephy>; clock-names = "gmac", "ephy"; phy-mode = "mii"; tx-delay = <7>; rx-delay = <31>; phy-rst; gmac-power0 = ""; gmac-power1 = ""; gmac-power2 = ""; status = "disabled"; }; emac0: eth@01c0B000 { compatible = "allwinner,sun4i-emac"; reg = <0x0 0x01c0b000 0x0 0x0c000>; pinctrl-names = "default"; interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "emacirq"; clock-names = "emac"; phy = <&phy1>; phy-rst; allwinner,sram = <&emac_sram 1>; emac_power1 = ""; emac_power2 = ""; emac_power3 = ""; status = "disabled"; }; mdio: mdio@01c0b080 { compatible = "allwinner,sun4i-a10-mdio"; reg = <0x0 0x01c0b080 0x0 0x14>; #address-cells = <1>; #size-cells = <0>; status = "okay"; phy1: ethernet-phy@1 { reg = <1>; }; }; cpucfg@01c25c00 { compatible = "allwinner,sunxi-cpucfg"; reg = <0x0 0x01c25c00 0x0 0x288>; }; sysctl@01c00000 { /** *sun8iw7 use the region of cpus to bring up cpu1~3, *in order to compatible with current framework, use *this node to transmit the parameters of cpus. */ compatible = "allwinner,sunxi-sysctl"; reg = <0x0 0x01f01c00 0x0 0x288>; cpu-soft-entry; }; }; };

Yesterday my 14" Pinebook arrived so I thought I'll collect some already available information. A lot of work still has to be done to get a decent laptop experience with this hardware so this is neither a review nor a stupid Un-Review but just a preview instead. To get the idea about dimensions I added a 13" and a 15" laptop to the picture. Pinebook is wedge-shaped and thickness matches both the 2011 15" MacBook Pro and the 13" from 2015: Display size closely matches the 13" MacBook Pro (but of course pixel density / resolution don't match as well as quality: TN vs. IPS and coating -- it should be obvious if you've the 'you get what you pay for' principle in mind but I'm sure we'll see reviews somewhere else where people are comparing Pinebook with Chrome/MacBooks and think they would get the same display quality for a fraction of costs) Last hardware detail: heat dissipation. I've been curious how well the Pinebook's thermal design is and it looks pretty good. This is the moronic sysbench pseudo benchmark calculating prime numbers endlessly and the Pinebook sitting on a pillow to prevent airflow below the case bottom. Throttling settings are rather conservative with 65°C defined as first trip point and only after a couple of minutes the internal A64 SoC temperature reached this value and slight throttling occured (1.15 GHz down to 1.1 GHz, that's a 'difference' you won't be able to notice). So it seems the combination of a thermal pad with a large metal plate inside the case is rather sufficient: What you see here is a graph drawn by RPi-Monitor, one of my favourite tools to get a clue what's going on with ARM devices (since it's not a heavy monitoring tool that changes the way the OS behaves but it's pretty lightweight sp you can run it in the background and let it monitor/record stuff like cpufreq scaling, consumption and so on). Pinebook currently ships with a rather clean Ubuntu Xenial on the eMMC with Mate desktop environment based on latest BSP u-boot and kernel. To get RPi-Monitor installed on this Ubuntu @pfeerickprovides a script (please follow progress over there). When I played around with Wi-Fi I noticed that Wi-Fi powermanagement seems to be enabled (makes working via SSH close to impossible) and that MAC address changes on every reboot. To disable Wi-Fi powermanagement I simply used the Armbian way: root@pinebook:~# cat /etc/NetworkManager/dispatcher.d/99disable-power-management #!/bin/sh case "$2" in up) /sbin/iwconfig $1 power off || true ;; down) /sbin/iwconfig $1 power on || true ;; esac Unless Wi-Fi driver gets a fix to use a MAC address based on the SoC's individual so called SID one way to assign a fixed MAC address for the Wi-Fi is to add a wifi.cloned-mac-address property to all NetworkManager profiles after establishing a Wi-Fi connection first: nmcli con show | grep wlan | while read ; do set ${REPLY}; nmcli con modify "$1" wifi.cloned-mac-address $(cat /sys/class/net/$4/address); done (I'm pretty sure some masochistic people prefer fiddling around in /etc/network/interfaces instead so if you're not using your laptop as a laptop being carried around and seeing a lot of Wi-Fis you can also use the usual tweaks for the interfaces file. Please also note that using a random MAC address can be considered a privacy feature on laptops since it makes tracking of you in public environments harder). While watching the Pinebook's charging/discharging behaviour I noticed that consumption drawn from wall while charging oscillates between 9W and 15W while being used and display active so it's really great that Pine Inc fixed Pine64's design flaw N° 1: Pinebook is NOT equipped with shitty Micro USB for DC-IN leading to all sorts of trouble but just like SoPine baseboard now uses a 3.5mm/1.35mm barrel jack combined with a 5V/3A PSU (for other hardware details please refer to linux-sunxi wiki page). Battery status (health, capacity, voltage and so on) is already available through sysfs but some values are wrong or need calibration. This needs to be fixed with further upgrades. Also interesting: charging seems to be under control of the ARISC core inside A64 SoC and works together with Pinebook's AXP803 PMIC (powermanagement IC) even when there's no OS running. This will be somewhat challenging to implement later with mainline I would believe... I'll stop here for now since Pinebook is still stuff for developers and not end users. Just some resources for interested parties: https://github.com/ayufan-pine64/boot-tools (Kamil implemented an u-boot based approach to flash directly to eMMC and there you find the necessary BLOBs to convert other BSP based Pine64 images for Pinebook since different DRAM and other settings require different SPL+u-boot) https://github.com/ayufan-pine64/linux-pine64 (based on longsleep's BSP kernel but with more fixes currently for Pinebook) $mainline resources (I lost track where to find most recent stuff but will add this later) Wrt Armbian running on Pinebook we could now simply exchange u-boot+SPL+DT of our Xenial Desktop image... but I hope we won't do that but wait until dust has settled while helping with development efforts in the meantime. In other words: no Armbian on Pinebook (right) now

From what I know, Sleep/Hibernate works only on Legacy, since it rely on AR100 ARISC co-processor, not yet supported on Mainline. That is true for all AllWinner SoC, not only H6 ... For more details, here is http://linux-sunxi.org/AR100 For example, it is well known that Pinebook with Mainline, doing sleep simply returns to normal desktop, without even doing a reboot.

SPIDF-OUT is PL9. I think the legacy version doesn't use the watchdog or not the same to reboot the board. EDIT: I think it uses the ARISC co-processor does someone with the h64 can test if the WDOG works ? /* This should reset the system after 0.5s */ # devmem $((0x030090a0 + 0x0014)) 0x00000001 # devmem $((0x030090a0 + 0x0018)) 0x00000000 # devmem $((0x030090a0 + 0x0018)) 32 0x1 /* This should reset the system after 1s (as recommended in the User Manual) */ # devmem $((0x030090a0 + 0x0014)) 0x00000001 # devmem $((0x030090a0 + 0x0018)) 0x00000000 # devmem $((0x030090a0 + 0x0018)) 32 $((0x1 << 4)) # devmem $((0x030090a0 + 0x0018)) 0x00000010 # devmem $((0x030090a0 + 0x0018)) 32 $((0x1 << 4 | 0x1))

May i know how to use this? Is it unzip and then run in terminal: h3fakeoff Attached is my result: user@orangepipcplus:~$ sudo chmod +x /home/user/h3fakeoff user@orangepipcplus:~$ /home/user/h3fakeoff -s do_it:1, config: 0x00000000 apply_foff: start arisc boot failed user@orangepipcplus:~$ user@orangepipcplus:~$ sudo /home/user/h3fakeoff -s [sudo] password for user: do_it:1, config: 0x00000000 apply_foff: start arisc boot failed user@orangepipcplus:~$

I will try to figure out why it doesn't boot (at least provide dmesg). Yeah, smaeul is working on suspend (since it's highly related to his Crust ARISC Firmware), probably it will be in 4.20.

Power off on H3/H5 is still not implemented AFAIK and don't know if this can be hacked somehow. https://forum.armbian.com/search/?q=arisc https://github.com/Icenowy/h3-arisc-shutdown It works on boards which have external PMU, like A64.

You mean this? sudo /RAID/h3fakeoff [sudo] password for pi: H3fakeoff 1.0-b20171229 by ariel/KotCzarny (c) 2017 Load arisc blob which will turn off most subsystems, then wait for gpio or IR button to start the system. Make sure you have saved your work and umounted all filesystems. Usage: /RAID/h3fakeoff [-s] [-l PXYY] [-b PXYY] [-w X] [-i X] -s yes, power down my system -l PXYY led gpio (OrangePiPC: PL10) -b PXYY gpio button (OrangePiPC: PL03) -w X gpio key must be held for X seconds to trigger wakeup -i X ir wakeup button (ie. 255) ¿?

Check those threads: https://forum.armbian.com/search/?q=arisc

https://github.com/Icenowy/h3-arisc-shutdown untested and no experience on it.. I think even @Icenowy gave up? 24/7 works fine fore me.. I think it idles lower than 700mA (actually I should check it)...

Kind of reminds me of the Intel System Management Engine - the AR100 block has direct access to memory outside of the ARM's, Mali, and Cedrus - could be a security concern... and the firmware blob from AW is a closed binary (some folks have decompiled it) Anyways - did some spelunking around the webs, and found this... https://github.com/allwinner-zh/linux-3.4-sunxi/tree/master/drivers/arisc I don't think mainline includes this, as there are other ways to do that functionality - some of the Orange PI images do it include it (remember the Orange Pi Zero overheating issue, where ARISC would spam the logs if the right image wasn't used).

Hello everybody! I have an Orange Pi Win Plus and I'm trying to boot the current stable release of the Armbian Xenial but I get no video output on the hdmi and sometimes the board turns itself off. I've tried both server and desktop versions but the issue remains. My current setup: 5.01V@2.0A PSU; Usb mouse and keyboard; Used Etcher to burn the images on the sd card; Tried to boot using 2 different sd cards, both 8gb, the result is the same; Tested images are Armbian_5.41_Orangepiwin_Ubuntu_xenial_default_3.10.107_desktop.img and Armbian_5.41_Orangepiwin_Ubuntu_xenial_default_3.10.107.img The console output on the ttl port shows this: U-Boot 2014.07 (Feb 11 2018 - 19:21:28) Allwinner Technology uboot commit : 6f37e5cf6a65b0b10455d12dbd631effabe765ec rsb: secure monitor exist [ 0.404]pmbus: ready [ 0.407][ARISC] :arisc initialize [ 0.736][ARISC] :arisc_dvfs_cfg_vf_table: support only one vf_table [SCP] :sunxi-arisc driver begin startup 2 [SCP] :arisc_para size:1a8 [SCP] :arisc version: [v0.1.76] [SCP] :sunxi-arisc driver v1.10 is starting [ 0.864][ARISC] :sunxi-arisc driver startup succeeded [ 0.898]PMU: AXP81X [ 0.900]PMU: AXP81X found bat_vol=0, ratio=100 [ 0.906]PMU: dcdc2 1100 [ 0.909]PMU: cpux 1008 Mhz,AXI=336 Mhz PLL6=600 Mhz,AHB1=200 Mhz, APB1=100Mhz AHB2=300Mhz MBus=400Mhz device_type = 3253, onoff=1 dcdc1_vol = 3300, onoff=1 dcdc2_vol = 1100, onoff=1 dcdc6_vol = 1100, onoff=1 aldo1_vol = 2800, onoff=0 aldo2_vol = 1800, onoff=1 aldo3_vol = 3000, onoff=1 dldo1_vol = 3300, onoff=0 dldo2_vol = 3300, onoff=0 dldo3_vol = 2800, onoff=0 dldo4_vol = 3300, onoff=1 eldo1_vol = 1800, onoff=1 eldo2_vol = 1800, onoff=0 eldo3_vol = 1800, onoff=0 fldo1_vol = 1200, onoff=0 fldo2_vol = 1100, onoff=1 gpio0_vol = 3100, onoff=0 vbus not exist no battery, limit to dc run key detect no key found no uart input DRAM: 2 GiB fdt addr: 0xb6ebce80 Relocation Offset is: 75f0f000 In: serial Out: serial Err: serial gic: sec monitor mode [ 1.219]start drv_disp_init init_clocks: finish init_clocks. enable power vcc-hdmi-33, ret=0 drv_disp_init finish boot_disp.output_disp=0 boot_disp.output_type=3 boot_disp.output_mode=10 fetch script data boot_disp.auto_hpd fail disp0 device type(4) enable attched ok, mgr0<-->device1, type=4, mode=10 [ 1.587]end workmode = 0,storage type = 1 [ 1.591]MMC: 0 [mmc]: mmc driver ver 2015-06-03 13:50:00 SUNXI SD/MMC: 0 [mmc]: start mmc_calibrate_delay_unit, don't access device... [mmc]: delay chain cal done, sample: 185(ps) [mmc]: media type 0x0 [mmc]: Wrong media type 0x0 [mmc]: ************Try SD card 0************ [mmc]: host caps: 0x27 [mmc]: MID 02 PSN 9c0001b2 [mmc]: PNM SA08G -- 0x53-41-30-38-47 [mmc]: PRV 0.4 [mmc]: MDT m-1 y-2010 [mmc]: speed mode : HSSDR52/SDR25 [mmc]: clock : 50000000 Hz [mmc]: bus_width : 4 bit [mmc]: user capacity : 7604 MB [mmc]: ************SD/MMC 0 init OK!!!************ [mmc]: erase_grp_size : 0x1WrBlk*0x200=0x200 Byte [mmc]: secure_feature : 0x0 [mmc]: secure_removal_type : 0x0 [ 1.778]sunxi flash init ok ** Unable to use mmc 0:1 for loading the env ** Using default environment --------fastboot partitions-------- mbr not exist base bootcmd=run mmcbootcmd bootcmd set setargs_mmc key 0 recovery key high 12, low 10 fastboot key high 6, low 4 no misc partition is found to be run cmd=run mmcbootcmd update dtb dram start update dtb dram end serial is: 64107884c8080c2e060f check for ANX9807 get Pine64 model from DRAM size DRAM >512M Pine64 model: pine64-plus no battery exist sunxi bmp: unable to open file /boot/bootlogo.bmp [ 2.069]inter uboot shell autoboot in 3 seconds, Press s or <Esc><Esc> to abort 4984 bytes read in 24 ms (202.1 KiB/s) Booting with script ... ## Executing script at 41000000 166 bytes read in 19 ms (7.8 KiB/s) 69613 bytes read in 38 ms (1.7 MiB/s) 4353809 bytes read in 374 ms (11.1 MiB/s) 12636952 bytes read in 1002 ms (12 MiB/s) Image lacks image_size field, assuming 16MiB ## Loading init Ramdisk from Legacy Image at 45300000 ... Image Name: uInitrd Image Type: ARM Linux RAMDisk Image (gzip compressed) Data Size: 4353745 Bytes = 4.2 MiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK ## Flattened Device Tree blob at 45000000 Booting using the fdt blob at 0x45000000 reserving fdt memory region: addr=41010000 size=10000 reserving fdt memory region: addr=41020000 size=800 reserving fdt memory region: addr=40100000 size=4000 reserving fdt memory region: addr=40104000 size=1000 reserving fdt memory region: addr=40105000 size=1000 reserving fdt memory region: addr=45000000 size=12000 Loading Ramdisk to b6a8f000, end b6eb5ed1 ... OK Loading Device Tree to 44fea000, end 44ffefff ... OK Starting kernel ... [mmc]: MMC Device 2 not found [mmc]: mmc 2 not find, so not exit INFO: BL3-1: Next image address = 0x41080000 INFO: BL3-1: Next image spsr = 0x3c9 I've also tested the Armbian_5.51.180709_Orangepiwin_Ubuntu_bionic_dev_4.18.0-rc3.img, this image shows output through hdmi but the boot stops sometimes. I've managed to boot this image but sometimes when it boots it freezes soon after I do the login. Usually console output when it doesn't boots looks like this: U-Boot 2018.07-rc1-armbian (Jul 10 2018 - 00:17:35 +0000) Allwinner Technology CPU: Allwinner A64 (SUN50I) Model: OrangePi Win/Win Plus DRAM: 2 GiB MMC: SUNXI SD/MMC: 0 Loading Environment from FAT... Unable to use mmc 0:1... Failed (-5) In: serial Out: serial Err: serial Net: No ethernet found. 230454 bytes read in 31 ms (7.1 MiB/s) starting USB... USB0: USB EHCI 1.00 USB1: USB OHCI 1.0 scanning bus 0 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Autoboot in 1 seconds, press <Space> to stop switch to partitions #0, OK mmc0 is current device Scanning mmc 0:1... Found U-Boot script /boot/boot.scr 3090 bytes read in 21 ms (143.6 KiB/s) ## Executing script at 4fc00000 U-boot loaded from SD Boot script loaded from mmc 153 bytes read in 17 ms (8.8 KiB/s) 13616 bytes read in 35 ms (379.9 KiB/s) ** File not found /boot/dtb/allwinner/overlay/sun50i-a64-fixup.scr ** ** fs_devread read error ** ** File not found /boot/uInitrd ** ** fs_devread read error ** ** File not found /boot/Image ** ## Loading init Ramdisk from Legacy Image at 4fe00000 ... Image Name: uInitrd Image Type: AArch64 Linux RAMDisk Image (gzip compressed) Data Size: 8056392 Bytes = 7.7 MiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... Bad Data CRC Ramdisk image is corrupt or invalid SCRIPT FAILED: continuing... Device 0: device type unknown ... is now current device ** Bad device usb 0 ** ** Bad device usb 0 ** No ethernet found. missing environment variable: pxeuuid missing environment variable: bootfile Retrieving file: pxelinux.cfg/00000000 No ethernet found. missing environment variable: bootfile Retrieving file: pxelinux.cfg/0000000 No ethernet found. missing environment variable: bootfile Retrieving file: pxelinux.cfg/000000 No ethernet found. missing environment variable: bootfile Retrieving file: pxelinux.cfg/00000 No ethernet found. missing environment variable: bootfile Retrieving file: pxelinux.cfg/0000 No ethernet found. missing environment variable: bootfile Retrieving file: pxelinux.cfg/000 No ethernet found. missing environment variable: bootfile Retrieving file: pxelinux.cfg/00 No ethernet found. missing environment variable: bootfile Retrieving file: pxelinux.cfg/0 No ethernet found. missing environment variable: bootfile Retrieving file: pxelinux.cfg/default-arm-sunxi No ethernet found. missing environment variable: bootfile Retrieving file: pxelinux.cfg/default-arm No ethernet found. missing environment variable: bootfile Retrieving file: pxelinux.cfg/default No ethernet found. Config file not found No ethernet found. No ethernet found. => Any hints on this? It's an issue or am I missing something? Thank you!

Perhaps this works? https://github.com/Icenowy/h3-arisc-shutdown

Well, with legacy kernel it works flawlessly (ARISC)

I don't think we need to distinguish any more. With settings for the v1.2 revision PL01 will be toggled on v1.1 boards but nothing will happen (given PL01 is not connected to anything important there -- maybe someone wants to look up schematics to have a look -- I'm just kidding of course ) @Tido : can you try the following with a legacy image on your board (I gave away almost all Allwinner boards in the meantime due to lack of interest): wget https://raw.githubusercontent.com/armbian/build/cd9eb6b6da2c95a2ab750a9acd07a55a84d56623/config/fex/bananapim2plus.fex mv /boot/script.bin /boot/script.bin.bak fex2bin bananapim2plus.fex /boot/script.bin reboot Then output from armbianmonitor -u after the reboot would be needed. In case no ARISC errors show up everything is fine and after adoption of paths (wrong as usual) this patch could be added to Armbian's build system by whoever feels interested.

Just tried the Armbian_5.41_Orangepiwin_Ubuntu_xenial_default_3.10.107_desktop.img with a brand new Sandisk Ultra 32gb micro sd and got the same console output as reported earlier in this post. Here is my log: HELLO! BOOT0 is starting! boot0 commit : 045061a8bb2580cb3fa02e301f52a015040c158f boot0 version : 4.0.0 set pll start set pll end rtc[0] value = 0x00000000 rtc[1] value = 0x00000000 rtc[2] value = 0x00000000 rtc[3] value = 0x00000000 rtc[4] value = 0x00000000 rtc[5] value = 0x00000000 DRAM driver version: V1.1 rsb_send_initseq: rsb clk 400Khz -> 3Mhz PMU: AXP81X ddr voltage = 1500 mv DRAM Type = 3 (2:DDR2,3:DDR3,6:LPDDR2,7:LPDDR3) DRAM clk = 672 MHz DRAM zq value: 003b3bbb DRAM single rank full DQ OK DRAM size = 2048 MB DRAM init ok dram size =2048 card boot number = 0, boot0 copy = 0 card no is 0 sdcard 0 line count 4 [mmc]: mmc driver ver 2015-05-08 20:06 [mmc]: sdc0 spd mode error, 2 [mmc]: Wrong media type 0x00000000 [mmc]: ***Try SD card 0*** [mmc]: HSSDR52/SDR25 4 bit [mmc]: 50000000 Hz [mmc]: 30436 MB [mmc]: ***SD/MMC 0 init OK!!!*** sdcard 0 init ok The size of uboot is 000e8000. sum=edd51168 src_sum=edd51168 Succeed in loading uboot from sdmmc flash. boot0: start load other image boot0: Loading BL3-1 Loading file 0 at address 0x40000000,size 0x0000a200 success boot0: Loading scp Loading file 2 at address 0x00040000,size 0x00019a00 success set arisc reset to de-assert state Ready to disable icache. ▒▒▒▒ɽ▒▒▒▒5R▒NOTICE: BL3-1: v1.0(debug):3cdc5c3 NOTICE: BL3-1: Built : 13:03:37, Jan 10 2018 INFO: BL3-1: Initializing runtime services INFO: BL3-1: Preparing for EL3 exit to normal world INFO: BL3-1: Next image address = 0x4a000000 INFO: BL3-1: Next image spsr = 0x1d3 U-Boot 2014.07 (Feb 11 2018 - 19:21:28) Allwinner Technology uboot commit : 6f37e5cf6a65b0b10455d12dbd631effabe765ec rsb: secure monitor exist [ 0.368]pmbus: ready [ 0.370][ARISC] :arisc initialize [ 0.700][ARISC] :arisc_dvfs_cfg_vf_table: support only one vf_table [SCP] :sunxi-arisc driver begin startup 2 [SCP] :arisc_para size:1a8 [SCP] :arisc version: [v0.1.76] [SCP] :sunxi-arisc driver v1.10 is starting [ 0.827][ARISC] :sunxi-arisc driver startup succeeded [ 0.861]PMU: AXP81X [ 0.863]PMU: AXP81X found bat_vol=258, ratio=100 [ 0.869]PMU: dcdc2 1100 [ 0.872]PMU: cpux 1008 Mhz,AXI=336 Mhz PLL6=600 Mhz,AHB1=200 Mhz, APB1=100Mhz AHB2=300Mhz MBus=400Mhz device_type = 3253, onoff=1 dcdc1_vol = 3300, onoff=1 dcdc2_vol = 1100, onoff=1 dcdc6_vol = 1100, onoff=1 aldo1_vol = 2800, onoff=0 aldo2_vol = 1800, onoff=1 aldo3_vol = 3000, onoff=1 dldo1_vol = 3300, onoff=0 dldo2_vol = 3300, onoff=0 dldo3_vol = 2800, onoff=0 dldo4_vol = 3300, onoff=1 eldo1_vol = 1800, onoff=1 eldo2_vol = 1800, onoff=0 eldo3_vol = 1800, onoff=0 fldo1_vol = 1200, onoff=0 fldo2_vol = 1100, onoff=1 gpio0_vol = 3100, onoff=0 vbus not exist no battery, limit to dc run key detect no key found no uart input DRAM: 2 GiB fdt addr: 0xb6ebce80 Relocation Offset is: 75f0f000 In: serial Out: serial Err: serial gic: sec monitor mode [ 1.683]start drv_disp_init init_clocks: finish init_clocks. enable power vcc-hdmi-33, ret=0 drv_disp_init finish boot_disp.output_disp=0 boot_disp.output_type=3 boot_disp.output_mode=10 fetch script data boot_disp.auto_hpd fail disp0 device type(4) enable attched ok, mgr0<-->device1, type=4, mode=10 [ 2.052]end workmode = 0,storage type = 1 [ 2.056]MMC: 0 [mmc]: mmc driver ver 2015-06-03 13:50:00 SUNXI SD/MMC: 0 [mmc]: start mmc_calibrate_delay_unit, don't access device... [mmc]: delay chain cal done, sample: 192(ps) [mmc]: media type 0x0 [mmc]: Wrong media type 0x0 [mmc]: ************Try SD card 0************ [mmc]: host caps: 0x27 [mmc]: MID 03 PSN 212062df [mmc]: PNM SU32G -- 0x53-55-33-32-47 [mmc]: PRV 8.0 [mmc]: MDT m-9 y-2013 [mmc]: speed mode : HSSDR52/SDR25 [mmc]: clock : 50000000 Hz [mmc]: bus_width : 4 bit [mmc]: user capacity : 30436 MB [mmc]: ************SD/MMC 0 init OK!!!************ [mmc]: erase_grp_size : 0x1WrBlk*0x200=0x200 Byte [mmc]: secure_feature : 0x0 [mmc]: secure_removal_type : 0x0 [ 2.246]sunxi flash init ok ** Unable to use mmc 0:1 for loading the env ** Using default environment --------fastboot partitions-------- mbr not exist base bootcmd=run mmcbootcmd bootcmd set setargs_mmc key 0 recovery key high 12, low 10 fastboot key high 6, low 4 no misc partition is found to be run cmd=run mmcbootcmd update dtb dram start update dtb dram end serial is: 64107884c8080c2e060f check for ANX9807 get Pine64 model from DRAM size DRAM >512M Pine64 model: pine64-plus no battery exist sunxi bmp: unable to open file /boot/bootlogo.bmp [ 2.528]inter uboot shell autoboot in 3 seconds, Press s or <Esc><Esc> to abort 4984 bytes read in 24 ms (202.1 KiB/s) Booting with script ... ## Executing script at 41000000 166 bytes read in 18 ms (8.8 KiB/s) 69613 bytes read in 33 ms (2 MiB/s) 4353898 bytes read in 259 ms (16 MiB/s) 12636952 bytes read in 676 ms (17.8 MiB/s) Image lacks image_size field, assuming 16MiB ## Loading init Ramdisk from Legacy Image at 45300000 ... Image Name: uInitrd Image Type: ARM Linux RAMDisk Image (gzip compressed) Data Size: 4353834 Bytes = 4.2 MiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK ## Flattened Device Tree blob at 45000000 Booting using the fdt blob at 0x45000000 reserving fdt memory region: addr=41010000 size=10000 reserving fdt memory region: addr=41020000 size=800 reserving fdt memory region: addr=40100000 size=4000 reserving fdt memory region: addr=40104000 size=1000 reserving fdt memory region: addr=40105000 size=1000 reserving fdt memory region: addr=45000000 size=12000 Loading Ramdisk to b6a8f000, end b6eb5f2a ... OK Loading Device Tree to 44fea000, end 44ffefff ... OK Starting kernel ... [mmc]: MMC Device 2 not found [mmc]: mmc 2 not find, so not exit INFO: BL3-1: Next image address = 0x41080000 INFO: BL3-1: Next image spsr = 0x3c9 Also, I've tried to boot the board with this sandisk ultra using two different power supplies. They are rated as: 5v@2A -> Measured output voltage on load: 5.01V 5v@2A -> Measured output voltage on load: 5.04V Any ideas on what is going on? I have nothing connected to the board besides the micro sd card and an ft232rl to catch the console output. There is no keyboard, mice or hdmi monitor connected. I've used etcher to burn the images to the micro sd card, it always finishes fine. At the end of flashing, it does the verification an says that the flashing process was sucessful. Tried 4 different sd cards and the only image that worked was the developers one (Armbian_5.41_Orangepiwin_Ubuntu_xenial_default_3.10.107.img).

Armbian Orange Pi One (v 4.14) - dont turn on, not even Red or Green led, like dead! Armbian Orange Pi PC on One (v4.14) - Turn Green Led on, but dont get screen! ArchLinux - Works normal with Red Led on Lubuntu Vivid - Works normal with Red Led on Slakware 14.1 - Red Led and message: [ARISC WARING] :callback not install - [cpu_freq] ERR:set cpu frequency to 1536MHz failed! Fedora 22 - Works Normal with Red Led on Raspberry mod to OPI PC 0.8 - Red Led and message: [ARISC WARING] :callback not install - [cpu_freq] ERR:set cpu frequency to 1536MHz failed!

This is on a fresh build of Armbian from source. I'm not seeing the camera appearing in /dev/video0, as you would expect. I've tried the solution that @sri suggested on this thread https://forum.armbian.com/index.php?/topic/3225-nanopi-neo-air-cam500b-issue/ but the device is still not visible. Here is the contents of my /etc/modules file #w1-sunxi #w1-gpio #w1-therm sunxi-cir hci_uart rfcomm hidp dhd g_serial ov5640 vfe_v4l2 And here is the output from dmesg [ 0.000000] Booting Linux on physical CPU 0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Linux version 3.4.113-sun8i (root@crosscompile) (gcc version 5.4.0 20160609 (Ubuntu/Linaro 5.4.0-6ubuntu1~16.04.4) ) #10 SMP PREEMPT Thu Jul 20 11:40:34 BST 2017 [ 0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), cr=10c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache [ 0.000000] Machine: sun8i [ 0.000000] cma: CMA: reserved 160 MiB at 56000000 [ 0.000000] Memory policy: ECC disabled, Data cache writealloc [ 0.000000] On node 0 totalpages: 131072 [ 0.000000] free_area_init_node: node 0, pgdat c0a7b900, node_mem_map c0c01000 [ 0.000000] Normal zone: 1152 pages used for memmap [ 0.000000] Normal zone: 0 pages reserved [ 0.000000] Normal zone: 129920 pages, LIFO batch:31 [ 0.000000] script_init enter! [ 0.000000] script_init exit! [ 0.000000] PERCPU: Embedded 8 pages/cpu @c1093000 s11968 r8192 d12608 u32768 [ 0.000000] pcpu-alloc: s11968 r8192 d12608 u32768 alloc=8*4096 [ 0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 129920 [ 0.000000] Kernel command line: root=UUID=0f2fc787-984f-4361-a5eb-3c1c9964b243 rootwait rootfstype=ext4 console=tty1 console=ttyS0,115200 hdmi.audio=EDID:0 disp.screen0_output_mode=1920x1080p60 panic=10 consoleblank=0 loglevel=1 ubootpart=1833f8f9-01 ubootsource=mmc sunxi_ve_mem_reserve=0 sunxi_g2d_mem_reserve=0 sunxi_fb_mem_reserve=16 cgroup_enable=memory swapaccount=1 [ 0.000000] PID hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes) [ 0.000000] allocated 1048576 bytes of page_cgroup [ 0.000000] please try 'cgroup_disable=memory' option if you don't want memory cgroups [ 0.000000] Memory: 512MB = 512MB total [ 0.000000] Memory: 336300k/336300k available, 187988k reserved, 0K highmem [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB) [ 0.000000] vmalloc : 0xe0800000 - 0xff000000 ( 488 MB) [ 0.000000] lowmem : 0xc0000000 - 0xe0000000 ( 512 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc0981220 (9701 kB) [ 0.000000] .init : 0xc0982000 - 0xc09d8ec0 ( 348 kB) [ 0.000000] .data : 0xc09da000 - 0xc0a88fd0 ( 700 kB) [ 0.000000] .bss : 0xc0a89784 - 0xc0c004c0 (1500 kB) [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Additional per-CPU info printed with stalls. [ 0.000000] NR_IRQS:544 [ 0.000000] Architected local timer running at 24.00MHz. [ 0.000000] Switching to timer-based delay loop [ 0.000000] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 178956ms [ 0.000000] Console: colour dummy device 80x30 [ 0.000000] console [tty1] enabled [ 0.000279] Calibrating delay loop (skipped), value calculated using timer frequency.. 4800.00 BogoMIPS (lpj=24000000) [ 0.000304] pid_max: default: 32768 minimum: 301 [ 0.000479] Security Framework initialized [ 0.000541] AppArmor: AppArmor disabled by boot time parameter [ 0.000743] Mount-cache hash table entries: 512 [ 0.001818] Initializing cgroup subsys cpuacct [ 0.001836] Initializing cgroup subsys memory [ 0.001887] Initializing cgroup subsys devices [ 0.001900] Initializing cgroup subsys freezer [ 0.001911] Initializing cgroup subsys blkio [ 0.001935] Initializing cgroup subsys perf_event [ 0.002029] CPU: Testing write buffer coherency: ok [ 0.002087] ftrace: allocating 25333 entries in 75 pages [ 0.030396] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.030417] [sunxi_smp_prepare_cpus] enter [ 0.030469] Setting up static identity map for 0x4066a498 - 0x4066a4f0 [ 0.031611] CPU1: Booted secondary processor [ 0.031611] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.031753] CPU2: Booted secondary processor [ 0.031753] CPU2: thread -1, cpu 2, socket 0, mpidr 80000002 [ 0.040575] CPU3: Booted secondary processor [ 0.040575] CPU3: thread -1, cpu 3, socket 0, mpidr 80000003 [ 0.040697] Brought up 4 CPUs [ 0.040697] SMP: Total of 4 processors activated (19200.00 BogoMIPS). [ 0.041022] devtmpfs: initialized [ 0.052069] wakeup src cnt is : 2. [ 0.052081] [exstandby]leave extended_standby_enable_wakeup_src : event 0x800000 [ 0.052092] [exstandby]leave extended_standby_enable_wakeup_src : wakeup_gpio_map 0x0 [ 0.052103] [exstandby]leave extended_standby_enable_wakeup_src : wakeup_gpio_group 0x40 [ 0.052115] [exstandby]leave extended_standby_enable_wakeup_src : event 0x800000 [ 0.052125] [exstandby]leave extended_standby_enable_wakeup_src : wakeup_gpio_map 0x8 [ 0.052136] [exstandby]leave extended_standby_enable_wakeup_src : wakeup_gpio_group 0x40 [ 0.052148] sunxi pm init [ 0.052304] pinctrl core: initialized pinctrl subsystem [ 0.059242] NET: Registered protocol family 16 [ 0.062179] DMA: preallocated 2048 KiB pool for atomic coherent allocations [ 0.062275] script_sysfs_init success [ 0.062305] sunxi_dump_init success [ 0.063295] gpiochip_add: registered GPIOs 0 to 383 on device: sunxi-pinctrl [ 0.064509] sunxi-pinctrl sunxi-pinctrl: initialized sunXi PIO driver [ 0.064509] plat: add bmp085 device [ 0.064509] plat: add pcf8591 device [ 0.064509] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.064509] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.064509] script config pll_video to 297 Mhz [ 0.064509] script config pll_de to 864 Mhz [ 0.064509] script config pll_ve to 402 Mhz [ 0.064509] sunxi_default_clk_init [ 0.064509] try to set pll6ahb1 to 200000000 [ 0.064509] try to set ahb clk source to pll6ahb1 [ 0.064509] set ahb clk source to pll6ahb1 [ 0.064509] try to set ahb1 to 200000000 [ 0.064509] try to set apb1 to 100000000 [ 0.070263] bio: create slab <bio-0> at 0 [ 0.070342] [ARISC] :sunxi-arisc driver v1.04 [ 0.093850] [ARISC] :arisc version: [v0.1.58] [ 0.200700] [ARISC] :sunxi-arisc driver v1.04 startup succeeded [ 0.202460] SCSI subsystem initialized [ 0.202460] usbcore: registered new interface driver usbfs [ 0.202460] usbcore: registered new interface driver hub [ 0.202460] usbcore: registered new device driver usb [ 0.202460] twi_chan_cfg()340 - [twi0] has no twi_regulator. [ 0.202460] twi_chan_cfg()340 - [twi1] has no twi_regulator. [ 0.202460] twi_chan_cfg()340 - [twi2] has no twi_regulator. [ 0.202460] Linux video capture interface: v2.00 [ 0.202460] Advanced Linux Sound Architecture Driver Version 1.0.25. [ 0.202460] cfg80211: Calling CRDA to update world regulatory domain [ 0.202460] NetLabel: Initializing [ 0.202460] NetLabel: domain hash size = 128 [ 0.202460] NetLabel: protocols = UNLABELED CIPSOv4 [ 0.202460] NetLabel: unlabeled traffic allowed by default [ 0.202460] Switching to clocksource arch_sys_counter [ 0.214858] FS-Cache: Loaded [ 0.215224] CacheFiles: Loaded [ 0.227056] NET: Registered protocol family 2 [ 0.238355] IP route cache hash table entries: 4096 (order: 2, 16384 bytes) [ 0.238993] TCP established hash table entries: 16384 (order: 5, 131072 bytes) [ 0.239243] TCP bind hash table entries: 16384 (order: 5, 196608 bytes) [ 0.239517] TCP: Hash tables configured (established 16384 bind 16384) [ 0.239529] TCP: reno registered [ 0.239542] UDP hash table entries: 256 (order: 1, 8192 bytes) [ 0.239568] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes) [ 0.239926] NET: Registered protocol family 1 [ 0.240441] RPC: Registered named UNIX socket transport module. [ 0.240454] RPC: Registered udp transport module. [ 0.240463] RPC: Registered tcp transport module. [ 0.240471] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.240708] Trying to unpack rootfs image as initramfs... [ 0.582081] Freeing initrd memory: 5040K [ 0.582796] hw perfevents: enabled with ARMv7 Cortex_A7 PMU driver, 5 counters available [ 0.582949] sunxi_reg_init enter [ 0.584027] audit: initializing netlink socket (disabled) [ 0.584094] type=2000 audit(0.580:1): initialized [ 0.585690] VFS: Disk quotas dquot_6.5.2 [ 0.585887] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes) [ 0.586484] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.586709] misc fatfs initialized [ 0.587025] NFS: Registering the id_resolver key type [ 0.587464] nfs4filelayout_init: NFSv4 File Layout Driver Registering... [ 0.587479] Installing knfsd (copyright (C) 1996 okir@monad.swb.de). [ 0.588336] NTFS driver 2.1.30 [Flags: R/W]. [ 0.588650] fuse init (API version 7.18) [ 0.589065] msgmni has been set to 986 [ 0.590722] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 253) [ 0.590744] io scheduler noop registered [ 0.590753] io scheduler deadline registered [ 0.590819] io scheduler cfq registered (default) [ 0.591311] [DISP]disp_module_init [ 0.591648] cmdline,init_disp= [ 0.591682] cmdline,disp= [ 0.592448] [DISP]disp_module_init finish [ 0.592705] sw_uart_get_devinfo()1503 - uart0 has no uart_regulator. [ 0.592721] sw_uart_get_devinfo()1503 - uart1 has no uart_regulator. [ 0.592736] sw_uart_get_devinfo()1503 - uart2 has no uart_regulator. [ 0.592750] sw_uart_get_devinfo()1503 - uart3 has no uart_regulator. [ 0.593331] uart0: ttyS0 at MMIO 0x1c28000 (irq = 32) is a SUNXI [ 0.593347] sw_uart_pm()890 - uart0 clk is already enable [ 0.593368] sw_console_setup()1233 - console setup baud 115200 parity n bits 8, flow n [ 0.593514] console [ttyS0] enabled [ 0.593860] uart1: ttyS1 at MMIO 0x1c28400 (irq = 33) is a SUNXI [ 0.594146] uart2: ttyS2 at MMIO 0x1c28800 (irq = 34) is a SUNXI [ 0.594450] uart3: ttyS3 at MMIO 0x1c28c00 (irq = 35) is a SUNXI [ 0.595000] sunxi_cmatest_init enter [ 0.595050] sunxi_cmatest_init success [ 0.599313] brd: module loaded [ 0.603369] loop: module loaded [ 0.603699] sunxi_spi_chan_cfg()1376 - [spi-0] has no spi_regulator. [ 0.603713] sunxi_spi_chan_cfg()1376 - [spi-1] has no spi_regulator. [ 0.604369] spi spi0: master is unqueued, this is deprecated [ 0.604878] gmac0 not be used [ 0.604916] gmac0: probe of gmac0 failed with error -22 [ 0.604948] PPP generic driver version 2.4.2 [ 0.605130] PPP BSD Compression module registered [ 0.605140] PPP Deflate Compression module registered [ 0.608257] PPP MPPE Compression module registered [ 0.608278] NET: Registered protocol family 24 [ 0.608380] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver [ 0.628512] sunxi-ehci sunxi-ehci.1: SW USB2.0 'Enhanced' Host Controller (EHCI) Driver [ 0.628552] sunxi-ehci sunxi-ehci.1: new USB bus registered, assigned bus number 1 [ 0.629662] sunxi-ehci sunxi-ehci.1: irq 104, io mem 0xf1c1a000 [ 0.640054] sunxi-ehci sunxi-ehci.1: USB 0.0 started, EHCI 1.00 [ 0.640827] hub 1-0:1.0: USB hub found [ 0.640854] hub 1-0:1.0: 1 port detected [ 0.661314] sunxi-ehci sunxi-ehci.2: SW USB2.0 'Enhanced' Host Controller (EHCI) Driver [ 0.661348] sunxi-ehci sunxi-ehci.2: new USB bus registered, assigned bus number 2 [ 0.661792] sunxi-ehci sunxi-ehci.2: irq 106, io mem 0xf1c1b000 [ 0.680044] sunxi-ehci sunxi-ehci.2: USB 0.0 started, EHCI 1.00 [ 0.680683] hub 2-0:1.0: USB hub found [ 0.680709] hub 2-0:1.0: 1 port detected [ 0.701121] sunxi-ehci sunxi-ehci.3: SW USB2.0 'Enhanced' Host Controller (EHCI) Driver [ 0.701152] sunxi-ehci sunxi-ehci.3: new USB bus registered, assigned bus number 3 [ 0.701600] sunxi-ehci sunxi-ehci.3: irq 108, io mem 0xf1c1c000 [ 0.720037] sunxi-ehci sunxi-ehci.3: USB 0.0 started, EHCI 1.00 [ 0.720567] hub 3-0:1.0: USB hub found [ 0.720591] hub 3-0:1.0: 1 port detected [ 0.740958] sunxi-ehci sunxi-ehci.4: SW USB2.0 'Enhanced' Host Controller (EHCI) Driver [ 0.740990] sunxi-ehci sunxi-ehci.4: new USB bus registered, assigned bus number 4 [ 0.741383] sunxi-ehci sunxi-ehci.4: irq 110, io mem 0xf1c1d000 [ 0.760031] sunxi-ehci sunxi-ehci.4: USB 0.0 started, EHCI 1.00 [ 0.760578] hub 4-0:1.0: USB hub found [ 0.760598] hub 4-0:1.0: 1 port detected [ 0.760984] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver [ 0.781071] sunxi-ohci sunxi-ohci.1: SW USB2.0 'Open' Host Controller (OHCI) Driver [ 0.781101] sunxi-ohci sunxi-ohci.1: new USB bus registered, assigned bus number 5 [ 0.781137] sunxi-ohci sunxi-ohci.1: irq 105, io mem 0xf1c1a400 [ 0.844578] hub 5-0:1.0: USB hub found [ 0.844601] hub 5-0:1.0: 1 port detected [ 0.864974] sunxi-ohci sunxi-ohci.2: SW USB2.0 'Open' Host Controller (OHCI) Driver [ 0.865004] sunxi-ohci sunxi-ohci.2: new USB bus registered, assigned bus number 6 [ 0.865041] sunxi-ohci sunxi-ohci.2: irq 107, io mem 0xf1c1b400 [ 0.924604] hub 6-0:1.0: USB hub found [ 0.924626] hub 6-0:1.0: 1 port detected [ 0.945006] sunxi-ohci sunxi-ohci.3: SW USB2.0 'Open' Host Controller (OHCI) Driver [ 0.945036] sunxi-ohci sunxi-ohci.3: new USB bus registered, assigned bus number 7 [ 0.945074] sunxi-ohci sunxi-ohci.3: irq 109, io mem 0xf1c1c400 [ 1.004626] hub 7-0:1.0: USB hub found [ 1.004649] hub 7-0:1.0: 1 port detected [ 1.025058] sunxi-ohci sunxi-ohci.4: SW USB2.0 'Open' Host Controller (OHCI) Driver [ 1.025090] sunxi-ohci sunxi-ohci.4: new USB bus registered, assigned bus number 8 [ 1.025142] sunxi-ohci sunxi-ohci.4: irq 111, io mem 0xf1c1d400 [ 1.084618] hub 8-0:1.0: USB hub found [ 1.084638] hub 8-0:1.0: 1 port detected [ 1.085043] Initializing USB Mass Storage driver... [ 1.085295] usbcore: registered new interface driver usb-storage [ 1.085305] USB Mass Storage support registered. [ 1.085374] usbcore: registered new interface driver ums-alauda [ 1.085428] usbcore: registered new interface driver ums-cypress [ 1.085498] usbcore: registered new interface driver ums-datafab [ 1.085546] usbcore: registered new interface driver ums_eneub6250 [ 1.085593] usbcore: registered new interface driver ums-freecom [ 1.085646] usbcore: registered new interface driver ums-isd200 [ 1.085702] usbcore: registered new interface driver ums-jumpshot [ 1.085752] usbcore: registered new interface driver ums-karma [ 1.085801] usbcore: registered new interface driver ums-onetouch [ 1.085870] usbcore: registered new interface driver ums-realtek [ 1.085929] usbcore: registered new interface driver ums-sddr09 [ 1.085978] usbcore: registered new interface driver ums-sddr55 [ 1.086028] usbcore: registered new interface driver ums-usbat [ 1.086265] uinput result 0 , vmouse_init [ 1.086892] mousedev: PS/2 mouse device common for all mice [ 1.087137] sunxikbd_init failed. [ 1.087975] ls_fetch_sysconfig_para: ls_unused. [ 1.087987] ltr_init: ls_fetch_sysconfig_para err. [ 1.088614] sunxi-rtc sunxi-rtc: rtc core: registered sunxi-rtc as rtc0 [ 1.088674] i2c /dev entries driver [ 1.102754] [ISP] isp platform_id = 5! [ 1.102936] sunxi cedar version 0.1 [ 1.102990] [cedar]: install start!!! [ 1.103253] [cedar]: install end!!! [ 1.103510] twi_start()434 - [i2c0] START can't sendout! [ 1.103777] twi_start()434 - [i2c0] START can't sendout! [ 1.104042] twi_start()434 - [i2c0] START can't sendout! [ 1.104312] twi_start()434 - [i2c0] START can't sendout! [ 1.104577] twi_start()434 - [i2c0] START can't sendout! [ 1.104842] twi_start()434 - [i2c0] START can't sendout! [ 1.105110] twi_start()434 - [i2c0] START can't sendout! [ 1.105375] twi_start()434 - [i2c0] START can't sendout! [ 1.105640] twi_start()434 - [i2c0] START can't sendout! [ 1.105908] twi_start()434 - [i2c0] START can't sendout! [ 1.106173] twi_start()434 - [i2c0] START can't sendout! [ 1.106438] twi_start()434 - [i2c0] START can't sendout! [ 1.106706] twi_start()434 - [i2c0] START can't sendout! [ 1.106971] twi_start()434 - [i2c0] START can't sendout! [ 1.107236] twi_start()434 - [i2c0] START can't sendout! [ 1.107504] twi_start()434 - [i2c0] START can't sendout! [ 1.107769] twi_start()434 - [i2c0] START can't sendout! [ 1.108034] twi_start()434 - [i2c0] START can't sendout! [ 1.108302] twi_start()434 - [i2c0] START can't sendout! [ 1.108567] twi_start()434 - [i2c0] START can't sendout! [ 1.108832] twi_start()434 - [i2c0] START can't sendout! [ 1.109099] twi_start()434 - [i2c0] START can't sendout! [ 1.109365] twi_start()434 - [i2c0] START can't sendout! [ 1.109630] twi_start()434 - [i2c0] START can't sendout! [ 1.109897] twi_start()434 - [i2c0] START can't sendout! [ 1.110069] [VFE_ERR]Error registering v4l2 subdevice No such device! [ 1.110266] twi_start()434 - [i2c0] START can't sendout! [ 1.110532] twi_start()434 - [i2c0] START can't sendout! [ 1.110806] twi_start()434 - [i2c1] START can't sendout! [ 1.111071] twi_start()434 - [i2c1] START can't sendout! [ 1.111336] twi_start()434 - [i2c1] START can't sendout! [ 1.111603] twi_start()434 - [i2c1] START can't sendout! [ 1.111869] twi_start()434 - [i2c1] START can't sendout! [ 1.112134] twi_start()434 - [i2c1] START can't sendout! [ 1.112401] twi_start()434 - [i2c1] START can't sendout! [ 1.112666] twi_start()434 - [i2c1] START can't sendout! [ 1.112931] twi_start()434 - [i2c1] START can't sendout! [ 1.113198] twi_start()434 - [i2c1] START can't sendout! [ 1.113463] twi_start()434 - [i2c1] START can't sendout! [ 1.113728] twi_start()434 - [i2c1] START can't sendout! [ 1.113996] twi_start()434 - [i2c1] START can't sendout! [ 1.114261] twi_start()434 - [i2c1] START can't sendout! [ 1.114526] twi_start()434 - [i2c1] START can't sendout! [ 1.114793] twi_start()434 - [i2c1] START can't sendout! [ 1.115058] twi_start()434 - [i2c1] START can't sendout! [ 1.115323] twi_start()434 - [i2c1] START can't sendout! [ 1.115590] twi_start()434 - [i2c1] START can't sendout! [ 1.115855] twi_start()434 - [i2c1] START can't sendout! [ 1.116120] twi_start()434 - [i2c1] START can't sendout! [ 1.116387] twi_start()434 - [i2c1] START can't sendout! [ 1.116653] twi_start()434 - [i2c1] START can't sendout! [ 1.116918] twi_start()434 - [i2c1] START can't sendout! [ 1.117185] twi_start()434 - [i2c1] START can't sendout! [ 1.117450] twi_start()434 - [i2c1] START can't sendout! [ 1.117715] twi_start()434 - [i2c1] START can't sendout! [ 1.117827] sunxi_wdt_init_module: sunxi WatchDog Timer Driver v1.0 [ 1.118011] sunxi_wdt_probe: devm_ioremap return wdt_reg 0xf1c20ca0, res->start 0x01c20ca0, res->end 0x01c20cbf [ 1.118177] sunxi_wdt_probe: initialized (g_timeout=16s, g_nowayout=0) [ 1.118191] wdt_enable, write reg 0xf1c20cb8 val 0x00000000 [ 1.118203] timeout_to_interv, line 167 [ 1.118211] interv_to_timeout, line 189 [ 1.118221] wdt_set_tmout, write 0x000000b0 to mode reg 0xf1c20cb8, actual timeout 16 sec [ 1.118666] device-mapper: ioctl: 4.22.0-ioctl (2011-10-19) initialised: dm-devel@redhat.com [ 1.118937] calibrat: max_cpufreq 1200Mhz Type 0! [ 1.118952] [cpu_freq] ERR:get cpu extremity frequency from sysconfig failed, use max_freq [ 1.119381] [mmc]: SD/MMC/SDIO Host Controller Driver(v1.111 2015-4-13 15:24) Compiled in Jul 20 2017 at 11:28:23 [ 1.119420] [mmc]: get mmc0's sdc_power is null! [ 1.119450] [mmc]: get mmc1's sdc_power is null! [ 1.119460] [mmc]: get mmc1's 2xmode ok, val = 1 [ 1.119469] [mmc]: get mmc1's ddrmode ok, val = 1 [ 1.119498] [mmc]: get mmc2's sdc_power is null! [ 1.119507] [mmc]: get mmc2's 2xmode ok, val = 1 [ 1.119517] [mmc]: get mmc2's ddrmode ok, val = 1 [ 1.119530] [mmc]: MMC host used card: 0x7, boot card: 0x0, io_card 2 [ 1.123291] [mmc]: sdc0 power_supply is null [ 1.126877] no red_led, ignore it! [ 1.127142] Registered led device: green_led [ 1.127248] Registered led device: blue_led [ 1.127265] no led_0, ignore it! [ 1.127273] no led_1, ignore it! [ 1.127280] no led_2, ignore it! [ 1.127287] no led_3, ignore it! [ 1.127294] no led_4, ignore it! [ 1.127301] no led_5, ignore it! [ 1.127308] no led_6, ignore it! [ 1.127316] no led_7, ignore it! [ 1.128181] usbcore: registered new interface driver usbhid [ 1.128193] usbhid: USB HID core driver [ 1.129629] script_get_item audio_pa_ctrl not found [ 1.134087] asoc: sndcodec <-> sunxi-codec mapping ok [ 1.135387] [DAUDIO]sunxi-daudio cannot find any using configuration for controllers, return directly! [ 1.135623] [I2S]snddaudio cannot find any using configuration for controllers, return directly! [ 1.135637] [DAUDIO0] driver not init,just return. [ 1.139573] asoc: sndhdmi <-> sunxi-hdmiaudio.0 mapping ok [ 1.141037] oprofile: using arm/armv7-ca7 [ 1.141290] u32 classifier [ 1.141299] Performance counters on [ 1.141307] input device check on [ 1.141315] Actions configured [ 1.141654] TCP: bic registered [ 1.141665] TCP: cubic registered [ 1.141673] TCP: westwood registered [ 1.141681] TCP: highspeed registered [ 1.141689] TCP: hybla registered [ 1.141696] TCP: htcp registered [ 1.141704] TCP: vegas registered [ 1.141712] TCP: veno registered [ 1.141719] TCP: scalable registered [ 1.141727] TCP: lp registered [ 1.141735] TCP: yeah registered [ 1.141743] TCP: illinois registered [ 1.141750] Initializing XFRM netlink socket [ 1.141980] NET: Registered protocol family 10 [ 1.143017] NET: Registered protocol family 17 [ 1.143054] NET: Registered protocol family 15 [ 1.143107] Registering the dns_resolver key type [ 1.143708] VFP support v0.3: implementor 41 architecture 2 part 30 variant 7 rev 5 [ 1.143731] ThumbEE CPU extension supported. [ 1.143758] Registering SWP/SWPB emulation handler [ 1.144392] registered taskstats version 1 [ 1.145459] ths_fetch_sysconfig_para: type err device_used = 1. [ 1.146827] CPU Budget:corekeeper enabled [ 1.147078] CPU Budget:Register notifier [ 1.147092] CPU Budget:register Success [ 1.147106] sunxi-budget-cooling sunxi-budget-cooling: Cooling device registered: thermal-budget-0 [ 1.150840] [rf_pm]: Did not config module_power0 in sys_config [ 1.150861] [rf_pm]: Did not config module_power1 in sys_config [ 1.150871] [rf_pm]: Did not config module_power2 in sys_config [ 1.150882] [rf_pm]: Did not config module_power3 in sys_config [ 1.150892] [rf_pm]: mod has no chip_en gpio [ 1.150901] [rf_pm]: regulator on. [ 1.150919] [rf_pm]: set losc_out 32k out[wifi_pm]: set wl_reg_on 1 ! [ 1.237511] mmc0: new high speed SDHC card at address aaaa [ 1.238117] mmcblk0: mmc0:aaaa SS16G 14.8 GiB [ 1.239636] mmcblk0: p1 [ 1.240478] mmcblk mmc0:aaaa: Card claimed for testing. [ 1.240494] mmc0:aaaa: SS16G 14.8 GiB [ 1.242081] [mmc]: sdc2 power_supply is null [ 1.251333] WRN:L148(drivers/usb/sunxi_usb/manager/usb_hcd_servers.c):ERR: unkown usbc_no(5) [ 1.351354] [wifi_pm]: wifi gpio init is OK !! [ 1.351798] [rfkill]: rfkill set power 1 [ 1.364599] mmc2: new high speed DDR MMC card at address 0001 [ 1.365133] mmcblk1: mmc2:0001 8WPD3R 7.28 GiB [ 1.365372] mmcblk1boot0: mmc2:0001 8WPD3R partition 1 4.00 MiB [ 1.365616] mmcblk1boot1: mmc2:0001 8WPD3R partition 2 4.00 MiB [ 1.366984] mmcblk1: p1 p2 [ 1.370196] ALSA device list: [ 1.370208] #0: audiocodec [ 1.370216] #1: sndhdmi [ 1.370414] mmcblk1boot1: unknown partition table [ 1.371271] Freeing init memory: 344K [ 1.372217] mmcblk1boot0: unknown partition table [ 1.372547] mmcblk mmc2:0001: Card claimed for testing. [ 1.372569] mmc2:0001: 8WPD3R 7.28 GiB [ 1.374213] [mmc]: sdc1 power_supply is null [ 1.428027] mmc1: queuing unknown CIS tuple 0x80 (2 bytes) [ 1.429672] mmc1: queuing unknown CIS tuple 0x80 (3 bytes) [ 1.431382] mmc1: queuing unknown CIS tuple 0x80 (3 bytes) [ 1.434324] mmc1: queuing unknown CIS tuple 0x80 (7 bytes) [ 1.526532] mmc1: new high speed SDIO card at address 0001 [ 1.750232] vmouse_input_dev_open [ 1.830179] vmouse_input_dev_close [ 2.095884] Btrfs loaded [ 2.510249] EXT4-fs (mmcblk0p1): mounted filesystem with writeback data mode. Opts: (null) [ 2.996705] systemd[1]: System time before build time, advancing clock. [ 3.460313] systemd[1]: systemd 229 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ -LZ4 +SECCOMP +BLKID +ELFUTILS +KMOD -IDN) [ 3.460692] systemd[1]: Detected architecture arm. [ 3.491017] systemd[1]: Set hostname to <nanopiair>. [ 3.938274] systemd[1]: Created slice User and Session Slice. [ 3.961064] systemd[1]: Set up automount Arbitrary Executable File Formats File System Automount Point. [ 3.980509] systemd[1]: Listening on Journal Socket (/dev/log). [ 4.010367] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. [ 4.030453] systemd[1]: Listening on Journal Socket. [ 4.050352] systemd[1]: Listening on fsck to fsckd communication Socket. [ 4.070177] systemd[1]: Reached target Encrypted Volumes. [ 4.090282] systemd[1]: Listening on udev Kernel Socket. [ 4.110404] systemd[1]: Started Forward Password Requests to Wall Directory Watch. [ 4.130369] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. [ 4.150568] systemd[1]: Listening on Journal Audit Socket. [ 4.170419] systemd[1]: Started Trigger resolvconf update for networkd DNS. [ 4.190289] systemd[1]: Listening on Syslog Socket. [ 4.210165] systemd[1]: Reached target Remote File Systems (Pre). [ 4.230164] systemd[1]: Reached target Remote File Systems. [ 4.250572] systemd[1]: Created slice System Slice. [ 4.350784] systemd[1]: Starting Load Kernel Modules... [ 4.450553] systemd[1]: Created slice system-serial\x2dgetty.slice. [ 4.470396] systemd[1]: Reached target Slices. [ 4.479696] Registered IR keymap rc-empty [ 4.480328] rc0: sunxi-ir as /devices/virtual/rc/rc0 [ 4.502857] IR RC5(x) protocol handler initialized [ 4.506905] Bluetooth: Core ver 2.16 [ 4.507011] NET: Registered protocol family 31 [ 4.507024] Bluetooth: HCI device and connection manager initialized [ 4.507041] Bluetooth: HCI socket layer initialized [ 4.507054] Bluetooth: L2CAP socket layer initialized [ 4.507082] Bluetooth: SCO socket layer initialized [ 4.512356] Bluetooth: HCI UART driver ver 2.2 [ 4.512375] Bluetooth: HCI H4 protocol initialized [ 4.512384] Bluetooth: HCI BCSP protocol initialized [ 4.512392] Bluetooth: HCILL protocol initialized [ 4.512400] Bluetooth: HCIATH3K protocol initialized [ 4.521423] Bluetooth: RFCOMM TTY layer initialized [ 4.521457] Bluetooth: RFCOMM socket layer initialized [ 4.521467] Bluetooth: RFCOMM ver 1.11 [ 4.526574] Bluetooth: HIDP (Human Interface Emulation) ver 1.2 [ 4.560937] systemd[1]: Starting Restore / save the current clock... [ 4.577186] rc s_cir0: lirc_dev: driver ir-lirc-codec (sunxi-ir) registered at minor = 0 [ 4.582636] dhd_module_init: in [ 4.582655] ======== bcm_wlan_set_plat_data ======== [ 4.582673] bcm_wlan_get_oob_irq enter. [ 4.582774] gpio [202] map to virq [10] ok [ 4.582782] host_oob_irq: 10 [ 4.582789] host_oob_irq_flags=0x414 [ 4.582797] dhd_wifi_platform_load: Enter [ 4.582838] Power-up adapter 'DHD generic adapter' [ 4.582849] wifi_platform_set_power = 1 [ 4.582857] ======== PULL WL_REG_ON HIGH! ======== [ 4.582867] [wifi_pm]: set wl_reg_on 0 ! [ 4.690479] systemd[1]: Mounting POSIX Message Queue File System... [ 4.782913] [wifi_pm]: set wl_reg_on 1 ! [ 4.890945] systemd[1]: Starting Set console keymap... [ 5.020477] systemd[1]: Mounting Debug File System... [ 5.160861] systemd[1]: Starting Create list of required static device nodes for the current kernel... [ 5.290077] wifi_platform_bus_enumerate device present 1 [ 5.290094] ======== Card detection to detect SDIO card! ======== [ 5.290295] dummy_sdmmc: probe of mmc1:0001:1 failed with error -123 [ 5.290335] dummy_sdmmc: probe of mmc1:0001:2 failed with error -123 [ 5.290536] mmc1: card 0001 removed [ 5.290782] [mmc]: sdc1 power_supply is null [ 5.294915] [mmc]: sdc1 power_supply is null [ 5.310527] systemd[1]: Starting Nameserver information manager... [ 5.347264] mmc1: queuing unknown CIS tuple 0x80 (2 bytes) [ 5.348812] mmc1: queuing unknown CIS tuple 0x80 (3 bytes) [ 5.350365] mmc1: queuing unknown CIS tuple 0x80 (3 bytes) [ 5.353129] mmc1: queuing unknown CIS tuple 0x80 (7 bytes) [ 5.442898] mmc1: new high speed SDIO card at address 0001 [ 5.450801] systemd[1]: Starting Remount Root and Kernel File Systems... [ 5.459670] bcmsdh_register: register client driver [ 5.459815] bcmsdh_sdmmc: bcmsdh_sdmmc_probe Enter [ 5.459920] bcmsdh_sdmmc: bcmsdh_sdmmc_probe Enter [ 5.459931] bus num (host idx)=1, slot num (rca)=1 [ 5.459942] found adapter info 'DHD generic adapter' [ 5.460052] sdioh_attach: set sd_f2_blocksize 128 [ 5.460567] F1 signature read @0x18000000=0x1530a9a6 [ 5.463506] F1 signature OK, socitype:0x1 chip:0xa9a6 rev:0x0 pkg:0x3 [ 5.464556] DHD: dongle ram size is set to 524288(orig 524288) at 0x0 [ 5.464737] dhd_conf_set_chiprev: chip=0xa9a6, chiprev=0 [ 5.464813] dhd_conf_set_conf_path_by_nv_path: config_path=/lib/firmware/ap6212/config.txt [ 5.467025] dhd_conf_read_config: Ignore config file /lib/firmware/ap6212/config.txt [ 5.467831] wl_create_event_handler(): thread:wl_event_handler:c8 started [ 5.467844] tsk Enter, tsk = 0xd51e1430 [ 5.468124] dhd_attach(): thread:dhd_watchdog_thread:c9 started [ 5.468204] dhd_attach(): thread:dhd_dpc:ca started [ 5.468223] dhd_dpc_thread: set dpc_cpucore 0 from config.txt [ 5.468292] dhd_attach(): thread:dhd_rxf:cb started [ 5.468315] dhd_deferred_work_init: work queue initialized [ 5.468750] dhd_conf_read_config: Ignore config file /lib/firmware/ap6212/config.txt [ 5.468772] dhd_conf_set_fw_name_by_chip: firmware_path=/lib/firmware/ap6212/fw_bcm43438a0.bin [ 5.468787] dhdsdio_download_firmware: set use_rxchain 0 [ 5.468796] dhdsdio_download_firmware: set txglomsize 40 [ 5.468807] sdioh_set_mode: set txglom_mode to multi-desc [ 5.468815] Final fw_path=/lib/firmware/ap6212/fw_bcm43438a0.bin [ 5.468824] Final nv_path=/lib/firmware/ap6212/nvram.txt [ 5.468832] Final conf_path=/lib/firmware/ap6212/config.txt [ 5.470393] systemd[1]: Reached target Paths. [ 5.490703] systemd[1]: Listening on udev Control Socket. [ 5.518735] NVRAM version: AP6212_NVRAM_V1.0_20140603 [ 5.519412] dhdsdio_write_vars: Download, Upload and compare of NVRAM succeeded. [ 5.541081] EXT4-fs (mmcblk0p1): re-mounted. Opts: commit=600,errors=remount-ro [ 5.573753] systemd[1]: Mounted POSIX Message Queue File System. [ 5.577176] dhd_bus_init: enable 0x06, ready 0x06 (waited 0us) [ 5.577300] bcmsdh_oob_intr_register: Enter [ 5.577309] bcmsdh_oob_intr_register: HW_OOB enabled [ 5.577320] bcmsdh_oob_intr_register OOB irq=10 flags=414 [ 5.577460] bcmsdh_oob_intr_register: disable_irq_wake [ 5.578303] dhd_conf_set_fw_int_cmd: set WLC_SET_BAND 142 0 [ 5.578944] dhd_preinit_ioctls: Set tcpack_sup_mode 0 [ 5.580336] Firmware up: op_mode=0x0001, MAC=94:a1:a2:94:9c:5e [ 5.580350] dhd_conf_set_country: set country CN, revision 0 [ 5.580361] dhd_conf_set_fw_string_struct_cmd: set country [ 5.590380] systemd[1]: Mounted Debug File System. [ 5.644555] Country code: CN (CN/0) [ 5.645252] dhd_conf_set_fw_string_cmd: set roam_off 1 [ 5.659262] Firmware version = wl0: Jun 6 2014 14:50:39 version 7.10.226.49 (r) FWID 01-8962686a [ 5.659280] Driver: 1.201.59.6 (r506368) [ 5.659285] Firmware: wl0: Jun 6 2014 14:50:39 version 7.10.226.49 (r) FWID 01-8962686a [ 5.659302] dhd_txglom_enable: enable 0 [ 5.659312] dhd_conf_set_txglom_params: swtxglom=0, txglom_ext=0 [ 5.659321] dhd_conf_set_txglom_params: txglom_bucket_size=0 [ 5.659331] dhd_conf_set_txglom_params: txglomsize=0, deferred_tx_len=0, bus_txglom=0 [ 5.659342] dhd_conf_set_txglom_params: tx_in_rx=1, tx_max_offset=0 [ 5.659353] dhd_conf_set_disable_proptx: set disable_proptx 0 [ 5.661771] dhd_wlfc_hostreorder_init(): successful bdcv2 tlv signaling, 64 [ 5.673190] Dongle Host Driver, version 1.201.59.6 (r506368) [ 5.673198] Compiled in drivers/net/wireless/bcmdhd [ 5.674130] Register interface [wlan0] MAC: 94:a1:a2:94:9c:5e [ 5.674240] dhd_module_init: Exit err=0 [ 5.682206] ep_matches, wrn: endpoint already claimed, ep(0xc0a2f1ac, 0xd466ddc0, ep1in-bulk) [ 5.682229] ep_matches, wrn: endpoint already claimed, ep(0xc0a2f1ac, 0xd466ddc0, ep1in-bulk) [ 5.682242] ep_matches, wrn: endpoint already claimed, ep(0xc0a2f1f8, 0xd466ddc0, ep1out-bulk) [ 5.682252] gadget_is_softwinner_otg is not -int [ 5.682260] gadget_is_softwinner_otg is not -int [ 5.682279] g_serial gadget: Gadget Serial v2.4 [ 5.682295] g_serial gadget: g_serial ready [ 5.689672] [OV5640@lex]init_sensor - frame_rate: 0, max_win_size: 11 [ 5.760222] systemd[1]: Started Restore / save the current clock. [ 5.920147] systemd[1]: Started Load Kernel Modules. [ 6.090167] systemd[1]: Started Set console keymap. [ 6.230137] systemd[1]: Started Create list of required static device nodes for the current kernel. [ 6.700215] systemd[1]: Started Remount Root and Kernel File Systems. [ 6.920738] systemd[1]: Started Nameserver information manager. [ 7.015234] systemd[1]: Time has been changed [ 7.043839] systemd[1]: Reached target Network (Pre). [ 7.120495] systemd[1]: Activating swap /var/swap... [ 7.226696] Adding 131068k swap on /var/swap. Priority:-1 extents:2 across:139260k SS [ 7.261001] systemd[1]: Starting udev Coldplug all Devices... [ 7.350954] systemd[1]: Starting Load/Save Random Seed... [ 7.500827] systemd[1]: Starting Create Static Device Nodes in /dev... [ 7.660441] systemd[1]: Mounting FUSE Control File System... [ 7.790732] systemd[1]: Starting Apply Kernel Variables... [ 7.817888] systemd[1]: Activated swap /var/swap. [ 7.834219] systemd[1]: Mounted FUSE Control File System. [ 8.360285] systemd[1]: Started Load/Save Random Seed. [ 8.480149] systemd[1]: Started Create Static Device Nodes in /dev. [ 8.620144] systemd[1]: Started Apply Kernel Variables. [ 8.760131] systemd[1]: Started udev Coldplug all Devices. [ 8.900888] systemd[1]: Starting udev Kernel Device Manager... [ 8.920282] systemd[1]: Reached target Local File Systems (Pre). [ 9.090470] systemd[1]: Mounting /tmp... [ 9.110437] systemd[1]: Reached target Swap. [ 9.165925] systemd[1]: Started udev Kernel Device Manager. [ 9.194922] systemd[1]: Mounted /tmp. [ 9.214178] systemd[1]: Found device /dev/ttyGS0. [ 9.230657] systemd[1]: Reached target Local File Systems. [ 9.311134] systemd[1]: Starting Armbian enhanced Log2Ram... [ 9.440825] systemd[1]: Starting Raise network interfaces... [ 9.496850] twi_start()434 - [i2c0] START can't sendout! [ 9.497129] twi_start()434 - [i2c0] START can't sendout! [ 9.497395] twi_start()434 - [i2c0] START can't sendout! [ 9.497537] bmp085: probe of 0-0077 failed with error -121 [ 9.497759] twi_start()434 - [i2c0] START can't sendout! [ 9.498030] twi_start()434 - [i2c0] START can't sendout! [ 9.498309] twi_start()434 - [i2c0] START can't sendout! [ 9.498589] twi_start()434 - [i2c0] START can't sendout! [ 9.498858] twi_start()434 - [i2c0] START can't sendout! [ 9.499127] twi_start()434 - [i2c0] START can't sendout! [ 9.591071] systemd[1]: Starting Set console font and keymap... [ 9.623504] vmouse_input_dev_open [ 9.681517] vmouse_input_dev_close [ 9.711136] systemd[1]: Started Entropy daemon using the HAVEGE algorithm. [ 10.025065] systemd[1]: Started Armbian enhanced Log2Ram. [ 10.133428] systemd[1]: Found device /dev/ttyS0. [ 10.360320] systemd[1]: Started Set console font and keymap. [ 10.478733] systemd[1]: Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. [ 10.500793] systemd[1]: Stopped LSB: Starts LIRC daemon.. [ 10.640887] systemd[1]: Starting LSB: Starts LIRC daemon.... [ 10.720865] systemd[1]: Created slice system-getty.slice. [ 10.740861] systemd[1]: Reached target Sound Card. [ 10.821132] systemd[1]: Starting Journal Service... [ 10.905022] systemd[1]: Started Journal Service. [ 11.173839] [rfkill]: rfkill set power 0 [ 11.514715] systemd-journald[493]: Received request to flush runtime journal from PID 1 [ 16.010578] [rfkill]: rfkill set power 0 [ 16.031254] [rfkill]: rfkill set power 1 [ 16.050690] [rfkill]: rfkill set power 0 [ 17.986559] dhd_open: Enter d51a8000 [ 18.069676] dhd_open: Exit ret=0 [ 20.538215] Bluetooth: BNEP (Ethernet Emulation) ver 1.3 [ 20.538237] Bluetooth: BNEP filters: protocol multicast [ 20.995351] Connectting with 8a:15:04:81:2f:20 channel (1) ssid "Masabi-2.4", len (10) [ 21.004944] wl_iw_event: Link UP with BSSID=8A:15:00:00:2F:20 [ 21.005009] wl_bss_connect_done succeeded with 8a:15:04:81:2f:20 One of the odd things about this logging that I note compared to others is that there is not much comign out of VFE. Have i forgot to include somethign when compiling the kernel? The aim of all of this is to get a build where I can control the focus of the camera. Teh standard build offered my friendlyarm will run the camera, but I can't control the focus with those builds.