RSS Bot Posted May 11, 2022 Share Posted May 11, 2022 MIPS is dead, right? Well, there’s now very little done on the architecture itself, MIPS (the company) has decided to switch to RISC-V architecture, and unveiled the eVocore product lineup currently comprised of the eVocore P8700 and I8500 multiprocessor IP cores. The 64-bit cores are scalable from single-core multi-thread to a single cluster with multiple cores, and up to a multi-cluster, and target high-performance, real-time compute applications such as networking, data centers, and automotive. The eVocore P8700 comes with a 16-stage deep pipeline with multi-issue Out-of-Order (OOO) execution and multi-threading. MIPS claims it has single-threaded performance greater than what is currently available in other RISC-V CPU IP offerings, but did not provide any numbers. It will likely be used in the cloud and high-end servers as it can scale up to 64 clusters, 512 cores and 1,024 harts/threads. P8700 highlights: Multi-issue superscalar Out of Order (OOO) with Multi-threading 16-stage pipeline [...] The post MIPS unveils RISC-V eVocore P8700 and I8500 multiprocessor IP cores appeared first on CNX Software - Embedded Systems News. View the full article Link to comment Share on other sites More sharing options...
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