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Build Framework patches placement for Orangepi-3b v2.1


ioncube

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I had tried twice making OPi3b img but it always gave me kernel panic. The reason is my SBC v2.1 while all sources / firmware used in build framework corresponds to v1.1. I have given a week to study .dts .csc & defconfig files which are all different from latest SBC v2.1

 

v2.1 using Broadcom AP6256 & examining official builds by vendor it uses wl driver In order to get wireless working as well as solving kernel panic error I tried doing this

 

Step 1

Changed .csc file in /home/ukhan/build/config/boards. From default to new (hastebin links)

 

Default csc file was weird this file didn't exist 

BOOTCONFIG="orangepi-3b-rk3566_defconfig"

 

secondly kwiboo github references are not working, its a weird function in this file that deals with uboot

# Override family config for this board; let's avoid conditionals in family config.
function post_family_config__orangepi3b_use_mainline_uboot() {
	display_alert "$BOARD" "mainline (Kwiboo's tree) u-boot overrides" "info"

	BOOTSOURCE="https://github.com/Kwiboo/u-boot-rockchip.git"
	BOOTBRANCH="branch:rk3xxx-2024.04" # specific commit tested is commit:ccef7dfc453bc03c5b5c61fa67d2745b96fa7da6
	BOOTPATCHDIR="v2024.04-orangepi3b" # empty, patches are already in Kwiboo's branch:rk3xxx-2024.04

	BOOTDIR="u-boot-${BOARD}" # do not share u-boot directory

	BOOTDELAY=1 # Wait for UART interrupt to enter UMS/RockUSB mode etc
	UBOOT_TARGET_MAP="BL31=${RKBIN_DIR}/${BL31_BLOB} ROCKCHIP_TPL=${RKBIN_DIR}/${DDR_BLOB};;u-boot-rockchip.bin u-boot-rockchip-spi.bin u-boot.itb idbloader.img idbloader-spi.img"
	unset uboot_custom_postprocess write_uboot_platform write_uboot_platform_mtd # disable stuff from rockchip64_common; we're using binman here which does all the work already

	# Just use the binman-provided u-boot-rockchip.bin, which is ready-to-go
	function write_uboot_platform() {
		dd if=${1}/u-boot-rockchip.bin of=${2} bs=32k seek=1 conv=fsync
	}

	# Smarter/faster/better to-spi writer using flashcp (hopefully with --partition), using the binman-provided 'u-boot-rockchip-spi.bin'
	function write_uboot_platform_mtd() {
		declare -a extra_opts_flashcp=("--verbose")
		if flashcp -h | grep -q -e '--partition'; then
			echo "Confirmed flashcp supports --partition -- read and write only changed blocks." >&2
			extra_opts_flashcp+=("--partition")
		else
			echo "flashcp does not support --partition, will write full SPI flash blocks." >&2
		fi
		flashcp "${extra_opts_flashcp[@]}" "${1}/u-boot-rockchip-spi.bin" /dev/mtd0
	}

}

 

Step 2

I placed following files from Opi-3b official github to these places

patch/kernel/rk35xx-legacy/rk3566-orangepi-3b.dts
patch/u-boot/legacy/u-boot-radxa-rk35xx/defconfig/orangepi-3b-rk3566_defconfig
patch/u-boot/legacy/u-boot-radxa-rk35xx/dt/rk3566-orangepi-3b.dts

 

From github file revision comments I am sure the author updated these for v2.1

# DTS
https://github.com/orangepi-xunlong/u-boot-orangepi/blob/v2017.09-rk3588/arch/arm/dts/rk3566-orangepi-3b.dts
https://raw.githubusercontent.com/orangepi-xunlong/u-boot-orangepi/v2017.09-rk3588/arch/arm/dts/rk3566-orangepi-3b.dts
# _defconfig
https://github.com/orangepi-xunlong/u-boot-orangepi/blob/v2017.09-rk3588/configs/orangepi-3b-rk3566_defconfig
https://raw.githubusercontent.com/orangepi-xunlong/u-boot-orangepi/v2017.09-rk3588/configs/orangepi-3b-rk3566_defconfig

 

Step 3

Build was complete & you can see the log here

 

Step 4

When I tried the image on the actual machine a different type of error occurred. SBC didn't boot but at least I got some output using UART serial

 

DDR Version V1.10 20210810
ln
ddrconfig:7
LPDDR4X, 324MHz
BW=32 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=4096MB
tdqss: cs0 dqs0: 48ps, dqs1: -72ps, dqs2: 24ps, dqs3: -48ps,
tdqss: cs1 dqs0: 48ps, dqs1: -48ps, dqs2: 48ps, dqs3: -24ps,

change to: 324MHz
PHY drv:clk:36,ca:36,DQ:29,odt:60
vrefinner:16%, vrefout:41%
dram drv:40,odt:0
clk skew:0x60

change to: 528MHz
PHY drv:clk:36,ca:36,DQ:29,odt:60
vrefinner:16%, vrefout:41%
dram drv:40,odt:0
clk skew:0x58

change to: 780MHz
PHY drv:clk:36,ca:36,DQ:29,odt:60
vrefinner:16%, vrefout:41%
dram drv:40,odt:0
clk skew:0x58

change to: 1056MHz(final freq)
PHY drv:clk:36,ca:36,DQ:29,odt:60
vrefinner:16%, vrefout:22%
dram drv:40,odt:80
vref_ca:00000071
clk skew:0x28
cs 0:
the read training result:
DQS0:0x44, DQS1:0x42, DQS2:0x45, DQS3:0x40,
min  : 0xc  0xb  0xc  0xc  0x1  0x4  0x6  0x6 , 0x5  0x7  0x4  0x1  0x9 0x10 0x11 0x11 ,
       0x3  0x1  0xd  0xd  0xa  0xb  0xc  0x9 , 0x7  0x6  0x9  0x1  0xf  0xf  0xf  0xc ,
mid  :0x2d 0x2c 0x2c 0x2c 0x22 0x24 0x26 0x27 ,0x26 0x27 0x25 0x21 0x2a 0x31 0x31 0x31 ,
      0x22 0x21 0x2c 0x2b 0x29 0x2a 0x2a 0x29 ,0x27 0x26 0x29 0x20 0x2e 0x2e 0x2e 0x2b ,
max  :0x4e 0x4d 0x4d 0x4d 0x44 0x45 0x47 0x48 ,0x47 0x48 0x46 0x41 0x4b 0x52 0x51 0x52 ,
      0x42 0x41 0x4b 0x4a 0x49 0x4a 0x49 0x49 ,0x47 0x46 0x49 0x40 0x4d 0x4d 0x4d 0x4b ,
range:0x42 0x42 0x41 0x41 0x43 0x41 0x41 0x42 ,0x42 0x41 0x42 0x40 0x42 0x42 0x40 0x41 ,
      0x3f 0x40 0x3e 0x3d 0x3f 0x3f 0x3d 0x40 ,0x40 0x40 0x40 0x3f 0x3e 0x3e 0x3e 0x3f ,
the write training result:
DQS0:0x2e, DQS1:0x1f, DQS2:0x2b, DQS3:0x22,
min  :0x59 0x5a 0x5c 0x5b 0x50 0x50 0x53 0x57 0x58 ,0x48 0x48 0x46 0x44 0x4b 0x50 0x4f 0x51 0x4e ,
      0x49 0x48 0x54 0x54 0x51 0x51 0x52 0x52 0x54 ,0x48 0x49 0x4c 0x45 0x4f 0x4f 0x4f 0x4e 0x4a ,
mid  :0x75 0x77 0x78 0x77 0x6b 0x6c 0x6f 0x73 0x74 ,0x65 0x65 0x63 0x61 0x68 0x6d 0x6c 0x6e 0x6a ,
      0x65 0x64 0x70 0x71 0x6d 0x6d 0x6d 0x6e 0x6f ,0x66 0x66 0x69 0x62 0x6c 0x6d 0x6c 0x6b 0x67 ,
max  :0x92 0x95 0x95 0x93 0x87 0x88 0x8c 0x8f 0x90 ,0x83 0x83 0x80 0x7e 0x86 0x8a 0x89 0x8b 0x87 ,
      0x82 0x81 0x8c 0x8e 0x8a 0x89 0x89 0x8a 0x8b ,0x84 0x84 0x86 0x80 0x8a 0x8b 0x8a 0x89 0x85 ,
range:0x39 0x3b 0x39 0x38 0x37 0x38 0x39 0x38 0x38 ,0x3b 0x3b 0x3a 0x3a 0x3b 0x3a 0x3a 0x3a 0x39 ,
      0x39 0x39 0x38 0x3a 0x39 0x38 0x37 0x38 0x37 ,0x3c 0x3b 0x3a 0x3b 0x3b 0x3c 0x3b 0x3b 0x3b ,
cs 1:
the read training result:
DQS0:0x43, DQS1:0x43, DQS2:0x45, DQS3:0x42,
min  : 0xc  0xb  0xd  0xc  0x1  0x4  0x6  0x7 , 0x7  0x8  0x5  0x2  0xb 0x12 0x12 0x12 ,
       0x2  0x0  0xd  0xc  0x9  0xb  0xb  0x8 , 0x8  0x7  0xa  0x1  0xf  0xf  0xf  0xc ,
mid  :0x2d 0x2c 0x2d 0x2c 0x21 0x24 0x26 0x27 ,0x27 0x28 0x26 0x23 0x2b 0x32 0x32 0x32 ,
      0x22 0x21 0x2c 0x2b 0x29 0x2b 0x2a 0x28 ,0x28 0x27 0x2a 0x21 0x2e 0x2e 0x2f 0x2c ,
max  :0x4e 0x4d 0x4d 0x4d 0x42 0x45 0x46 0x47 ,0x48 0x48 0x47 0x44 0x4c 0x53 0x53 0x53 ,
      0x42 0x42 0x4c 0x4a 0x4a 0x4b 0x4a 0x49 ,0x48 0x47 0x4b 0x42 0x4e 0x4e 0x4f 0x4d ,
range:0x42 0x42 0x40 0x41 0x41 0x41 0x40 0x40 ,0x41 0x40 0x42 0x42 0x41 0x41 0x41 0x41 ,
      0x40 0x42 0x3f 0x3e 0x41 0x40 0x3f 0x41 ,0x40 0x40 0x41 0x41 0x3f 0x3f 0x40 0x41 ,
the write training result:
DQS0:0x2e, DQS1:0x1f, DQS2:0x2b, DQS3:0x22,
min  :0x58 0x59 0x5a 0x5b 0x4f 0x50 0x52 0x56 0x56 ,0x49 0x49 0x47 0x44 0x4d 0x52 0x50 0x53 0x50 ,
      0x4c 0x4b 0x56 0x56 0x53 0x54 0x54 0x54 0x56 ,0x4a 0x4b 0x4d 0x47 0x50 0x50 0x50 0x50 0x4c ,
mid  :0x75 0x76 0x77 0x77 0x6b 0x6b 0x6f 0x72 0x72 ,0x66 0x66 0x63 0x60 0x6a 0x6f 0x6d 0x70 0x6d ,
      0x68 0x67 0x72 0x72 0x70 0x70 0x6f 0x70 0x72 ,0x67 0x68 0x6a 0x63 0x6d 0x6d 0x6d 0x6d 0x69 ,
max  :0x92 0x94 0x94 0x93 0x87 0x87 0x8c 0x8f 0x8f ,0x83 0x83 0x7f 0x7d 0x87 0x8d 0x8b 0x8d 0x8a ,
      0x85 0x84 0x8f 0x8f 0x8d 0x8c 0x8b 0x8c 0x8e ,0x85 0x85 0x87 0x80 0x8b 0x8b 0x8b 0x8a 0x86 ,
range:0x3a 0x3b 0x3a 0x38 0x38 0x37 0x3a 0x39 0x39 ,0x3a 0x3a 0x38 0x39 0x3a 0x3b 0x3b 0x3a 0x3a ,
      0x39 0x39 0x39 0x39 0x3a 0x38 0x37 0x38 0x38 ,0x3b 0x3a 0x3a 0x39 0x3b 0x3b 0x3b 0x3a 0x3a ,
CA Training result:
cs:0 min  :0x4a 0x47 0x46 0x43 0x45 0x3f 0x47 ,0x4a 0x47 0x47 0x41 0x45 0x3f 0x44 ,
cs:0 mid  :0x88 0x87 0x84 0x84 0x83 0x80 0x76 ,0x88 0x87 0x85 0x82 0x82 0x80 0x73 ,
cs:0 max  :0xc6 0xc8 0xc2 0xc5 0xc1 0xc2 0xa6 ,0xc6 0xc8 0xc3 0xc3 0xbf 0xc1 0xa3 ,
cs:0 range:0x7c 0x81 0x7c 0x82 0x7c 0x83 0x5f ,0x7c 0x81 0x7c 0x82 0x7a 0x82 0x5f ,
cs:1 min  :0x48 0x47 0x42 0x44 0x41 0x41 0x44 ,0x49 0x48 0x45 0x44 0x42 0x41 0x44 ,
cs:1 mid  :0x88 0x86 0x81 0x82 0x81 0x7f 0x75 ,0x89 0x87 0x85 0x82 0x81 0x80 0x75 ,
cs:1 max  :0xc9 0xc5 0xc0 0xc1 0xc2 0xbe 0xa7 ,0xc9 0xc7 0xc6 0xc1 0xc1 0xbf 0xa6 ,
cs:1 range:0x81 0x7e 0x7e 0x7d 0x81 0x7d 0x63 ,0x80 0x7f 0x81 0x7d 0x7f 0x7e 0x62 ,
out
U-Boot SPL board init
U-Boot SPL 2017.09-orangepi (Apr 24 2024 - 19:03:26)
Trying to boot from MMC1
No misc partition
Trying fit image at 0x4000 sector
## Verified-boot: 0
## Checking atf-1 0x00040000 ... sha256(b5946ac63d...) + OK
## Checking uboot 0x00a00000 ... sha256(9e66f174ad...) + OK
## Checking fdt 0x00b56100 ... sha256(f9ff5fa03a...) + OK
## Checking atf-2 0xfdcc1000 ... sha256(b8dca786b4...) + OK
## Checking atf-3 0x0006b000 ... sha256(2f91089eb7...) + OK
## Checking atf-4 0xfdcce000 ... sha256(86ef885748...) + OK
## Checking atf-5 0xfdcd0000 ... sha256(0b2b146c60...) + OK
## Checking atf-6 0x00069000 ... sha256(a9a1e63bef...) + OK
Jumping to U-Boot(0x00a00000) via ARM Trusted Firmware(0x00040000)
Total: 849.967 ms

INFO:    Preloader serial: 2
NOTICE:  BL31: v2.3():v2.3-645-g8cea6ab0b:cl, fwver: v1.44
NOTICE:  BL31: Built : 16:36:43, Sep 19 2023
INFO:    GICv3 without legacy support detected.
INFO:    ARM GICv3 driver initialized in EL3
INFO:    pmu v1 is valid 220114
INFO:    l3 cache partition cfg-0
INFO:    dfs DDR fsp_param[0].freq_mhz= 1056MHz
INFO:    dfs DDR fsp_param[1].freq_mhz= 324MHz
INFO:    dfs DDR fsp_param[2].freq_mhz= 528MHz
INFO:    dfs DDR fsp_param[3].freq_mhz= 780MHz
INFO:    Using opteed sec cpu_context!
INFO:    boot cpu mask: 0
INFO:    BL31: Initializing runtime services
WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK
ERROR:   Error initializing runtime service opteed_fast
INFO:    BL31: Preparing for EL3 exit to normal world
INFO:    Entry point address = 0xa00000
INFO:    SPSR = 0x3c9


U-Boot 2017.09-armbian-2017.09-Sf73b-P420d-H8c72-V2f21-Bda0a-R448a (Aug 25 2024 - 19:04:30 +0300)

Model: Orange Pi 3B
MPIDR: 0x81000000
PreSerial: 2, raw, 0xfe660000
DRAM:  4 GiB
Sysmem: init
Relocation Offset: ed209000
Relocation fdt: eb9f5dd8 - eb9fecd8
CR: M/C/I
Using default environment

optee check api revision fail: -1.0
optee api revision is too low
### ERROR ### Please RESET the board ###

 

 

Any help will be appreciated....

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Struggle continues...

 

Non-bootable images pushed me to look at u-boot stuff & my observation is this code block from default .csc file

# Override family config for this board; let's avoid conditionals in family config.
function post_family_config__orangepi3b_use_mainline_uboot() {
	display_alert "$BOARD" "mainline (Kwiboo's tree) u-boot overrides" "info"

	BOOTSOURCE="https://github.com/Kwiboo/u-boot-rockchip.git"
	BOOTBRANCH="branch:rk3xxx-2024.04" # specific commit tested is commit:ccef7dfc453bc03c5b5c61fa67d2745b96fa7da6
	BOOTPATCHDIR="v2024.04-orangepi3b" # empty, patches are already in Kwiboo's branch:rk3xxx-2024.04

	BOOTDIR="u-boot-${BOARD}" # do not share u-boot directory

	BOOTDELAY=1 # Wait for UART interrupt to enter UMS/RockUSB mode etc
	UBOOT_TARGET_MAP="BL31=${RKBIN_DIR}/${BL31_BLOB} ROCKCHIP_TPL=${RKBIN_DIR}/${DDR_BLOB};;u-boot-rockchip.bin u-boot-rockchip-spi.bin u-boot.itb idbloader.img idbloader-spi.img"
	unset uboot_custom_postprocess write_uboot_platform write_uboot_platform_mtd # disable stuff from rockchip64_common; we're using binman here which does all the work already

	# Just use the binman-provided u-boot-rockchip.bin, which is ready-to-go
	function write_uboot_platform() {
		dd if=${1}/u-boot-rockchip.bin of=${2} bs=32k seek=1 conv=fsync
	}

	# Smarter/faster/better to-spi writer using flashcp (hopefully with --partition), using the binman-provided 'u-boot-rockchip-spi.bin'
	function write_uboot_platform_mtd() {
		declare -a extra_opts_flashcp=("--verbose")
		if flashcp -h | grep -q -e '--partition'; then
			echo "Confirmed flashcp supports --partition -- read and write only changed blocks." >&2
			extra_opts_flashcp+=("--partition")
		else
			echo "flashcp does not support --partition, will write full SPI flash blocks." >&2
		fi
		flashcp "${extra_opts_flashcp[@]}" "${1}/u-boot-rockchip-spi.bin" /dev/mtd0
	}

}

As previously stated the .csc file is extremely outdated & use old branches 2024.04 that do not include anything related to v2.1 for OPi3b, however the current branch do include (see attached image) so I changed in the above code references of 2024.04 to 2024.10

 

However this is one weird folder in the github which I cannot understanD & it contains a single .c file for OPi3b:

https://github.com/Kwiboo/u-boot-rockchip/tree/rk3xxx-2024.10/board/xunlong/orangepi-3b-rk3566

 

v2.1 also used AP6256 Broadcom wifi/bt & I thus removed following functions / blacklist modules from .csc file, especially this sprd-* stuff.

MODULES="sprdbt_tty sprdwl_ng"
MODULES_BLACKLIST_LEGACY="bcmdhd"

function post_family_tweaks_bsp__orangepi3b() {
        display_alert "$BOARD" "Installing sprd-bluetooth.service" "info"

        # Bluetooth on orangepi3b board is handled by a Spreadtrum (sprd) chip and requires
        # a custom hciattach_opi binary, plus a systemd service to run it at boot time
        install -m 755 $SRC/packages/bsp/rk3399/hciattach_opi $destination/usr/bin
        cp $SRC/packages/bsp/rk3399/sprd-bluetooth.service $destination/lib/systemd/system/

        return 0
}

function post_family_tweaks__orangepi3b_enable_services() {
        display_alert "$BOARD" "Enabling sprd-bluetooth.service" "info"
        chroot_sdcard systemctl enable sprd-bluetooth.service
        return 0
}

 

 Previously mentioned Step 2 was done additionally one file I placed here

cd ~/build/cache/sources/rkbin-tools/firmware/wifi
sudo wget https://raw.githubusercontent.com/orangepi-xunlong/firmware/master/nvram_ap6256.txt

 

During build command I passed EXTRAWIFI=yesBOARD_FIRMWARE_INSTALL=-full

 

Working .csc is attached & I did get a bootable windows with working Broadcom wifi, It used module brcmfmac

I can run everything using serial tty because hdmi was not working now. Will latter continue... but at least some success

HDMI error

Aug 26 05:17:05 orangepi3b kernel: dwhdmi-rockchip fe0a0000.hdmi: Detected HDMI TX controller v2.11a with HDCP (DWC HDMI 2.0 TX PHY)
Aug 26 05:17:05 orangepi3b kernel: dwhdmi-rockchip fe0a0000.hdmi: registered DesignWare HDMI I2C bus driver
Aug 26 05:17:05 orangepi3b kernel: dwhdmi-rockchip fe0a0000.hdmi: IRQ index 1 not found
Aug 26 05:17:05 orangepi3b kernel: rockchip-drm display-subsystem: bound fe0a0000.hdmi (ops 0xffffc92fb9ba1078)
Aug 26 05:17:05 orangepi3b kernel: input: hdmi_cec_key as /devices/platform/fe0a0000.hdmi/dw-hdmi-cec.1.auto/input/input0
Aug 26 05:17:05 orangepi3b kernel:   #1: rockchip,hdmi
Aug 26 05:17:06 orangepi3b systemd-logind[637]: Watching system buttons on /dev/input/event0 (hdmi_cec_key)
Aug 26 05:17:11 orangepi3b kernel: dwhdmi-rockchip fe0a0000.hdmi: Rate 0 missing; compute N dynamically
Aug 26 05:17:11 orangepi3b kernel: dwhdmi-rockchip fe0a0000.hdmi: Rate 0 missing; compute N dynamically
Aug 26 19:41:27 orangepi3b kernel: dwhdmi-rockchip fe0a0000.hdmi: Rate 0 missing; compute N dynamically
Aug 26 19:41:27 orangepi3b kernel: dwhdmi-rockchip fe0a0000.hdmi: Rate 0 missing; compute N dynamically

 

I dearly request to community to regard OPi3b v2.1 as a completely different SBC with a different board entry in ./build

 

opi3b.png

orangepi3b.csc

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Posted (edited)

Struggle continues...

 

Because the hdmi is not working (error logs mentioned above) I tried uninstalling armbian kernels & installed official vendor .deb files, These I compiled using OPi official build procedure for OPi 3b v2.1

You can get x3 .debs from .7z archive here

https://github.com/defencedog/orangepi3b_v2.1/tree/b0d58e10589c567025774da07ea300e48631740f/Orangepi-3B%20rk3566-5.10.160-panfrost/cross-built

then 

apt list --installed |grep -e ^linux-image -e ^linux-dtb -e ^linux-headers
sudo apt purge linux-image-xxx linux-dtb-xxx linux-headers-xxx
sudo apt install libssl-dev python-is-python3
sudo dpkg -i linux-dtb-legacy-rockchip-rk356x_1.0.6_arm64.deb linux-headers-legacy-rockchip-rk356x_1.0.6_arm64.deb linux-image-legacy-rockchip-rk356x_1.0.6_arm64.deb
sudo sync

because of changed dtb & overlays modify /boot/armbianEnv.txt

Following x2 lines must be same. This reflect changes in /boot/dtb/rockchip/ & /boot/dtb/rockchip/overlays

overlay_prefix=rk356x
fdtfile=rockchip/rk3566-orangepi-3b-v2.dtb

Save edits & reboot

 

Success HDMI now works. BT doesn't work (no module found). WIFI also works however Broadcom now uses wl driver instead of brcmfmac

 

I installed ubuntu-desktop & the cursor is invisible, however cursor works OK while logged in as X-session of Ubuntu meaning wayland is to blame. If you logged in KODI wayland session cursor works OK?? GDM3 has no cursor as well

 

When I move cursor while in wayland session, these errors keep repeating journalctl -f

Aug 26 20:41:02 orangepi3b gnome-shell[2921]: Failed to post KMS update: drmModeAtomicCommit: Invalid argument
Aug 26 20:41:02 orangepi3b kernel: [drm:vop2_plane_atomic_check] *ERROR* Unsupported linear format at Cluster0-win0
Aug 26 20:41:02 orangepi3b gnome-shell[2921]: Page flip discarded: drmModeAtomicCommit: Invalid argument
Aug 26 20:41:02 orangepi3b gnome-shell[2921]: Failed to post KMS update: drmModeAtomicCommit: Invalid argument
Aug 26 20:41:02 orangepi3b kernel: [drm:vop2_plane_atomic_check] *ERROR* Unsupported linear format at Cluster0-win0
Aug 26 20:41:02 orangepi3b gnome-shell[2921]: Page flip discarded: drmModeAtomicCommit: Invalid argument
Aug 26 20:41:02 orangepi3b gnome-shell[2921]: Failed to post KMS update: drmModeAtomicCommit: Invalid argument
Aug 26 20:41:02 orangepi3b kernel: [drm:vop2_plane_atomic_check] *ERROR* Unsupported linear format at Cluster0-win0
Aug 26 20:41:02 orangepi3b gnome-shell[2921]: Page flip discarded: drmModeAtomicCommit: Invalid argument

 

I strongly believe its some GNOME related error. Internet is full of this bug when people are using eGPUs. If anyone has any idea, please help

Edited by ioncube
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