DBB Posted October 9, 2018 Posted October 9, 2018 Hi All I was wondering how does Armbian load the /sys/class/thermal_zone folder and the cpufreq in the sysfs on the orange pi zero . Going through the device tree I dont see an entry for thermal_zone as stated in the kernel document.
chwe Posted October 9, 2018 Posted October 9, 2018 2 hours ago, DBB said: I was wondering how does Armbian load the /sys/class/thermal_zone folder and the cpufreq in the sysfs on the orange pi zero for which Image? Armbian Next? In next thermal Zones & cpufreq are working without issues. The last time I booted a dev, cpu freq. was broken.
DBB Posted October 9, 2018 Author Posted October 9, 2018 I am building Armbian_5.63_Orangepizero_Ubuntu_xenial_next_4.14.74. Its not that they are not working. I am not sure how. Since I did not find any entries in the device tree I am wondering how do the modules get loaded in sysfs.
chwe Posted October 9, 2018 Posted October 9, 2018 from sun8i-h3.dtsi cpu_opp_table: opp_table { compatible = "operating-points-v2"; opp-shared; opp@240000000 { opp-hz = /bits/ 64 <240000000>; opp-microvolt = <980000 980000 1320000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; opp@480000000 { opp-hz = /bits/ 64 <480000000>; opp-microvolt = <980000 980000 1320000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; opp@648000000 { opp-hz = /bits/ 64 <648000000>; opp-microvolt = <1000000 1000000 1320000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; opp@816000000 { opp-hz = /bits/ 64 <816000000>; opp-microvolt = <1020000 1020000 1320000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; opp@912000000 { opp-hz = /bits/ 64 <912000000>; opp-microvolt = <1040000 1040000 1320000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; opp@960000000 { opp-hz = /bits/ 64 <960000000>; opp-microvolt = <1080000 1080000 1320000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; opp@1008000000 { opp-hz = /bits/ 64 <1008000000>; opp-microvolt = <1140000 1140000 1320000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; opp@1104000000 { opp-hz = /bits/ 64 <1104000000>; opp-microvolt = <1180000 1180000 1320000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; opp@1200000000 { opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <1240000 1240000 1320000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; opp@1296000000 { opp-hz = /bits/ 64 <1296000000>; opp-microvolt = <1320000 1320000 1320000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; and: iio-hwmon { compatible = "iio-hwmon"; io-channels = <&ths>; }; soc { ths: thermal-sensor@1c25000 { compatible = "allwinner,sun8i-h3-ths"; reg = <0x01c25000 0x100>; clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>; clock-names = "bus", "mod"; resets = <&ccu RST_BUS_THS>; #thermal-sensor-cells = <0>; #io-channel-cells = <0>; }; }; thermal-zones { cpu-thermal { /* milliseconds */ polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&ths>; trips { cpu_warm: cpu_warm { temperature = <65000>; hysteresis = <2000>; type = "passive"; }; cpu_hot_pre: cpu_hot_pre { temperature = <70000>; hysteresis = <2000>; type = "passive"; }; cpu_hot: cpu_hot { temperature = <75000>; hysteresis = <2000>; type = "passive"; }; cpu_very_hot_pre: cpu_very_hot_pre { temperature = <85000>; hysteresis = <2000>; type = "passive"; }; cpu_very_hot: cpu_very_hot { temperature = <90000>; hysteresis = <2000>; type = "passive"; }; cpu_crit: cpu_crit { temperature = <105000>; hysteresis = <2000>; type = "critical"; }; }; cooling-maps { cpu_warm_limit_cpu { trip = <&cpu_warm>; cooling-device = <&cpu0 THERMAL_NO_LIMIT 2>; }; cpu_hot_pre_limit_cpu { trip = <&cpu_hot_pre>; cooling-device = <&cpu0 2 3>; }; cpu_hot_limit_cpu { trip = <&cpu_hot>; cooling-device = <&cpu0 3 4>; }; cpu_very_hot_pre_limit_cpu { trip = <&cpu_very_hot>; cooling-device = <&cpu0 5 6>; }; cpu_very_hot_limit_cpu { trip = <&cpu_very_hot>; cooling-device = <&cpu0 7 THERMAL_NO_LIMIT>; }; }; }; }; rest is going through drivers and their documentation to figure out where 'the magic' happens...
DBB Posted October 9, 2018 Author Posted October 9, 2018 5 hours ago, chwe said: from sun8i-h3.dtsi cpu_opp_table: opp_table { compatible = "operating-points-v2"; opp-shared; opp@240000000 { opp-hz = /bits/ 64 <240000000>; opp-microvolt = <980000 980000 1320000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; opp@480000000 { opp-hz = /bits/ 64 <480000000>; opp-microvolt = <980000 980000 1320000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; opp@648000000 { opp-hz = /bits/ 64 <648000000>; opp-microvolt = <1000000 1000000 1320000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; opp@816000000 { opp-hz = /bits/ 64 <816000000>; opp-microvolt = <1020000 1020000 1320000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; opp@912000000 { opp-hz = /bits/ 64 <912000000>; opp-microvolt = <1040000 1040000 1320000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; opp@960000000 { opp-hz = /bits/ 64 <960000000>; opp-microvolt = <1080000 1080000 1320000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; opp@1008000000 { opp-hz = /bits/ 64 <1008000000>; opp-microvolt = <1140000 1140000 1320000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; opp@1104000000 { opp-hz = /bits/ 64 <1104000000>; opp-microvolt = <1180000 1180000 1320000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; opp@1200000000 { opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <1240000 1240000 1320000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; opp@1296000000 { opp-hz = /bits/ 64 <1296000000>; opp-microvolt = <1320000 1320000 1320000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; and: iio-hwmon { compatible = "iio-hwmon"; io-channels = <&ths>; }; soc { ths: thermal-sensor@1c25000 { compatible = "allwinner,sun8i-h3-ths"; reg = <0x01c25000 0x100>; clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>; clock-names = "bus", "mod"; resets = <&ccu RST_BUS_THS>; #thermal-sensor-cells = <0>; #io-channel-cells = <0>; }; }; thermal-zones { cpu-thermal { /* milliseconds */ polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&ths>; trips { cpu_warm: cpu_warm { temperature = <65000>; hysteresis = <2000>; type = "passive"; }; cpu_hot_pre: cpu_hot_pre { temperature = <70000>; hysteresis = <2000>; type = "passive"; }; cpu_hot: cpu_hot { temperature = <75000>; hysteresis = <2000>; type = "passive"; }; cpu_very_hot_pre: cpu_very_hot_pre { temperature = <85000>; hysteresis = <2000>; type = "passive"; }; cpu_very_hot: cpu_very_hot { temperature = <90000>; hysteresis = <2000>; type = "passive"; }; cpu_crit: cpu_crit { temperature = <105000>; hysteresis = <2000>; type = "critical"; }; }; cooling-maps { cpu_warm_limit_cpu { trip = <&cpu_warm>; cooling-device = <&cpu0 THERMAL_NO_LIMIT 2>; }; cpu_hot_pre_limit_cpu { trip = <&cpu_hot_pre>; cooling-device = <&cpu0 2 3>; }; cpu_hot_limit_cpu { trip = <&cpu_hot>; cooling-device = <&cpu0 3 4>; }; cpu_very_hot_pre_limit_cpu { trip = <&cpu_very_hot>; cooling-device = <&cpu0 5 6>; }; cpu_very_hot_limit_cpu { trip = <&cpu_very_hot>; cooling-device = <&cpu0 7 THERMAL_NO_LIMIT>; }; }; }; }; rest is going through drivers and their documentation to figure out where 'the magic' happens... Sorry about not providing the information before hand. I have the Orange PI Zero which uses the H2+ All Winner chip. So looking at the sun8i-h2-plus-orangepi-zero.dts there is no mention of thermal_zone in the device tree. I have attached a copy of the tree for your reference sun8i-h2-plus-orangepi-zero.dts
chwe Posted October 9, 2018 Posted October 9, 2018 /dts-v1/; #include "sun8i-h3.dtsi" #include "sunxi-common-regulators.dtsi" 1
DBB Posted October 9, 2018 Author Posted October 9, 2018 2 hours ago, chwe said: /dts-v1/; #include "sun8i-h3.dtsi" #include "sunxi-common-regulators.dtsi" Ahhh I see. My mind is blown. Thanks a lot for your help. Actually was trying to port Buildroot and the thermal and cpufreq were not turning up so was going through the Armbian code to see whats the issue. Now I see that Buildroot has out of date device trees. Guess I will try to update the device tree there.Thanks again.
DBB Posted October 15, 2018 Author Posted October 15, 2018 On 10/9/2018 at 11:27 AM, chwe said: /dts-v1/; #include "sun8i-h3.dtsi" #include "sunxi-common-regulators.dtsi" A quick follow up. I did make changes from the device tree which resulted in the files showing up in the sysfs folder. But when I go to read the temperature the file is empty and if I check the status in the thermal_zone it is disabled. So I was wondering if you had an idea of what other changes do I need to make to get the thermal_zone working. I have enabled everything in the kernel menu config.
chwe Posted October 15, 2018 Posted October 15, 2018 moved to p2p cause hardware but not really armbian related. 9 hours ago, DBB said: So I was wondering if you had an idea of what other changes do I need to make to get the thermal_zone working. I have enabled everything in the kernel menu config. not really, never had to deal with thermal zones for h3. go through the armbianmonitor related parts of the buidscript to get a clue.. if everything in kernel is there.. dt too then you've to nail down user-space... e.g. https://github.com/armbian/build/blob/624132790f0514cec0316538b752c733591a2f6f/packages/bsp/common/usr/lib/armbian/armbian-hardware-monitor#L39-L49 maybe we patched something as well.. I've really no idea. H3 was quite mature when I started to deal with such stuff...
Le Trung Thong Posted October 23, 2019 Posted October 23, 2019 (edited) Hello All, I added dts as above but i can not get temperature. please see some command lines as below # ls available_policies mode subsystem integral_cutoff offset sustainable_power k_d passive temp k_i policy type k_po power uevent k_pu slope # pwd /sys/devices/virtual/thermal/thermal_zone0 # cat mode disabled # cat temp cat: read error: Invalid argument Do you have any issue for the issue ? Best regards, Thong LT Edited October 23, 2019 by Le Trung Thong
Le Trung Thong Posted October 23, 2019 Posted October 23, 2019 On 10/10/2018 at 1:16 AM, DBB said: Sorry about not providing the information before hand. I have the Orange PI Zero which uses the H2+ All Winner chip. So looking at the sun8i-h2-plus-orangepi-zero.dts there is no mention of thermal_zone in the device tree. I have attached a copy of the tree for your reference sun8i-h2-plus-orangepi-zero.dts Do you have any updates ?
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