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HDMI in ADV7611 (oPi zero +2 H5)

yogggoy

By yogggoy
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yogggoy

yogggoy

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Hello.
I want to do HDMI-in to CSI with ADV7611. But have problems with DT overlay. I'm a newbie.

I can build img with activated module adv7611 in menuconfig. And apply "armbian-add-overlay adv7611.dts".
But /dev/video device did not appear.
Can someone suggest in the H5 device tree?

I found the AnalogDevice forum, where it says that need to use a bridge. As I understood this bridge is implemented as camera@1cb0000 ?

https://ez.analog.com

 

Thanks!

 

Board: OrangePi zero plus2 H5
Linux 4.19.21-sunxi64 #5.76
armbianmonitor -u : http://ix.io/1ydH

 

scheme:

https://drive.google.com/file/d/1eT7e76SpUhAEcup6RZTLhV4o1UbJKGvd/view?usp=sharing

 

dmesg | grep -C3 adv7611: 

[    7.675676] OF: /thermal-zones/cpu-thermal: arguments longer than property
[    7.675690] thermal thermal_zone2: failed to read out thermal zone (-110)
[    7.718236] videodev: Linux video capture interface: v2.00
[    7.871221] adv7611 1-004c: Error -6 reading IO Regmap
[    7.904420] asoc-simple-card soc:sound: i2s-hifi <-> 1c22800.i2s mapping ok
[    8.465050] Adding 61620k swap on /dev/zram1.  Priority:5 extents:1 across:61620k SSFS
[    8.467709] zram2: detected capacity change from 0 to 63102976

 

my adv7611.dts overlay:

Spoiler 

/dts-v1/;
/plugin/;

/ {
	compatible = "allwinner,sun4i-a10", "allwinner,sun7i-a20", "allwinner,sun8i-h3", "allwinner,sun50i-a64", "allwinner,sun50i-h5";

	fragment@0 {
		target = <&csi>;
		__overlay__ {
            status = "okay";
            port {
                #address-cells = <1>;
                #size-cells = <0>;

                /* Parallel bus endpoint */
                csi_from_adv7611: endpoint {
                    remote-endpoint = <&adv7611_to_csi>;
                    bus-width = <8>;
                    hsync-active = <1>; /* Active high */
                    vsync-active = <1>;
                    pclk-sample = <0>;
                };
            };
		};
	};

	fragment@1 {
		target = <&i2c2>;
		__overlay__ {
            status = "okay";
            #size-cells = <0>;
            #address-cells = <1>;

            adv7611@4c {
                compatible = "adi,adv7611";
                reg = <0x4c>;
                #address-cells = <0x1>;
                #size-cells = <0x0>;

                port@0 {
                    reg = <0x0>;
                };

                port@1 {
                    reg = <0x1>;
                    adv7611_to_csi: endpoint {
                        remote-endpoint = <&csi_from_adv7611>;
                        bus-width = <8>;
                        hsync-active = <1>; /* Active high */
                        vsync-active = <1>;
                        pclk-sample = <0>;
                    };
                };
            };
		};
	};
};

 

 

 

full "dtc -I fs" log:

Spoiler 

/dts-v1/;

/ {
	#address-cells = <0x1>;
	model = "OrangePi Zero Plus2";
	serial-number = "828000018c187e10";
	#size-cells = <0x1>;
	interrupt-parent = <0x1>;
	compatible = "xunlong,orangepi-zero-plus2", "allwinner,sun50i-h5";

	opp_table0 {
		opp-shared;
		compatible = "operating-points-v2";
		phandle = <0x2f>;

		opp@120000000 {
			opp-microvolt = <0xfde80 0xfde80 0x13d620>;
			opp-hz = <0x0 0x7270e00>;
			clock-latency-ns = <0x3b9b0>;
		};

		opp@480000000 {
			opp-microvolt = <0xfde80 0xfde80 0x13d620>;
			opp-hz = <0x0 0x1c9c3800>;
			clock-latency-ns = <0x3b9b0>;
		};

		opp@1344000000 {
			opp-microvolt = <0x155cc0 0x155cc0 0x155cc0>;
			opp-hz = <0x0 0x501bd000>;
			clock-latency-ns = <0x3b9b0>;
		};

		opp@648000000 {
			opp-microvolt = <0xfde80 0xfde80 0x13d620>;
			opp-hz = <0x0 0x269fb200>;
			clock-latency-ns = <0x3b9b0>;
		};

		opp@1200000000 {
			opp-microvolt = <0x142440 0x142440 0x142440>;
			opp-hz = <0x0 0x47868c00>;
			clock-latency-ns = <0x3b9b0>;
		};

		opp@1008000000 {
			opp-microvolt = <0x124f80 0x124f80 0x13d620>;
			opp-hz = <0x0 0x3c14dc00>;
			clock-latency-ns = <0x3b9b0>;
		};

		opp@1368000000 {
			opp-microvolt = <0x155cc0 0x155cc0 0x155cc0>;
			opp-hz = <0x0 0x518a0600>;
			clock-latency-ns = <0x3b9b0>;
		};

		opp@1296000000 {
			opp-microvolt = <0x147260 0x147260 0x147260>;
			opp-hz = <0x0 0x4d3f6400>;
			clock-latency-ns = <0x3b9b0>;
		};

		opp@1224000000 {
			opp-microvolt = <0x147260 0x147260 0x147260>;
			opp-hz = <0x0 0x48f4c200>;
			clock-latency-ns = <0x3b9b0>;
		};

		opp@1152000000 {
			opp-microvolt = <0x142440 0x142440 0x142440>;
			opp-hz = <0x0 0x44aa2000>;
			clock-latency-ns = <0x3b9b0>;
		};

		opp@816000000 {
			opp-microvolt = <0x10c8e0 0x10c8e0 0x13d620>;
			opp-hz = <0x0 0x30a32c00>;
			clock-latency-ns = <0x3b9b0>;
		};

		opp@1248000000 {
			opp-microvolt = <0x147260 0x147260 0x147260>;
			opp-hz = <0x0 0x4a62f800>;
			clock-latency-ns = <0x3b9b0>;
		};

		opp@240000000 {
			opp-microvolt = <0xfde80 0xfde80 0x13d620>;
			opp-hz = <0x0 0xe4e1c00>;
			clock-latency-ns = <0x3b9b0>;
		};

		opp@1104000000 {
			opp-microvolt = <0x142440 0x142440 0x142440>;
			opp-hz = <0x0 0x41cdb400>;
			clock-latency-ns = <0x3b9b0>;
		};

		opp@960000000 {
			opp-microvolt = <0x124f80 0x124f80 0x13d620>;
			opp-hz = <0x0 0x39387000>;
			clock-latency-ns = <0x3b9b0>;
		};

		opp@1056000000 {
			opp-microvolt = <0x142440 0x142440 0x142440>;
			opp-hz = <0x0 0x3ef14800>;
			clock-latency-ns = <0x3b9b0>;
		};
	};

	wifi_pwrseq {
		pinctrl-names = "default";
		reset-gpios = <0xa 0x0 0x9 0x1>;
		compatible = "mmc-pwrseq-simple";
		post-power-on-delay-ms = <0xc8>;
		phandle = <0xc>;
	};

	vcc3v3 {
		regulator-max-microvolt = <0x325aa0>;
		regulator-min-microvolt = <0x325aa0>;
		regulator-name = "vcc3v3";
		compatible = "regulator-fixed";
		phandle = <0x9>;
	};

	connector {
		type = [61 00];
		compatible = "hdmi-connector";

		port {

			endpoint {
				remote-endpoint = <0x31>;
				phandle = <0x22>;
			};
		};
	};

	gpio-regulator {
		regulator-max-microvolt = <0x10c8e0>;
		regulator-type = "voltage";
		gpios-states = <0x1>;
		regulator-boot-on;
		regulator-always-on;
		enable-active-high;
		regulator-min-microvolt = <0x10c8e0>;
		regulator-name = "vdd-cpux";
		regulator-ramp-delay = <0x32>;
		compatible = "regulator-gpio";
		states = <0x10c8e0 0x0 0x10c8e0 0x1>;
		phandle = <0x30>;
		gpios = <0xd 0x0 0x6 0x0>;
	};

	thermal-zones {

		cpu-thermal {
			polling-delay = <0x3e8>;
			polling-delay-passive = <0xfa>;
			thermal-sensors = <0x28>;

			trips {

				cpu_crit {
					temperature = <0x19a28>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0x6b>;
				};

				cpu_very_hot_pre {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x6a>;
				};

				cpu_very_hot {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x2e>;
				};

				cpu_hot_pre {
					temperature = <0x13880>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x2c>;
				};

				cpu_hot {
					temperature = <0x14c08>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x2d>;
				};

				cpu_warm {
					temperature = <0x124f8>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x2b>;
				};
			};

			cooling-maps {

				cpu_very_hot_limit_cpu {
					trip = <0x2e>;
					cooling-device = <0x2a 0x7 0xffffffff>;
				};

				cpu_warm_limit_cpu {
					trip = <0x2b>;
					cooling-device = <0x2a 0xffffffff 0x2>;
				};

				cpu_hot_limit_cpu {
					trip = <0x2d>;
					cooling-device = <0x2a 0x3 0x4>;
				};

				cpu_hot_pre_limit_cpu {
					trip = <0x2c>;
					cooling-device = <0x2a 0x2 0x3>;
				};

				cpu_very_hot_pre_limit_cpu {
					trip = <0x2e>;
					cooling-device = <0x2a 0x5 0x6>;
				};
			};
		};

		cpu_thermal {
			polling-delay = <0x3e8>;
			polling-delay-passive = <0x14a>;
			thermal-sensors = <0x28 0x0>;
			phandle = <0x68>;

			trips {

				cpu-very-hot {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0x69>;
				};

				cpu-warm {
					temperature = <0xfde8>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x29>;
				};
			};

			cooling-maps {

				cpu-warm-limit {
					trip = <0x29>;
					cooling-device = <0x2a 0xffffffff 0xffffffff>;
				};
			};
		};

		gpu-thermal {
			polling-delay = <0x3e8>;
			polling-delay-passive = <0xfa>;
			thermal-sensors = <0x28 0x1>;
		};
	};

	soc {
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		compatible = "simple-bus";
		ranges;

		serial@1c28400 {
			reg-io-width = <0x4>;
			pinctrl-names = "default";
			pinctrl-0 = <0x1b 0x1c>;
			resets = <0x3 0x32>;
			interrupts = <0x0 0x1 0x4>;
			clocks = <0x3 0x3f>;
			dma-names = "rx", "tx";
			compatible = "snps,dw-apb-uart";
			status = "okay";
			reg = <0x1c28400 0x400>;
			phandle = <0x5a>;
			dmas = <0x14 0x7 0x14 0x7>;
			reg-shift = <0x2>;
		};

		usb@1c1b000 {
			phy-names = "usb";
			resets = <0x3 0x13 0x3 0x17>;
			interrupts = <0x0 0x4a 0x4>;
			clocks = <0x3 0x22 0x3 0x26>;
			compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
			status = "disabled";
			phys = <0xf 0x1>;
			reg = <0x1c1b000 0x100>;
			phandle = <0x3f>;
		};

		i2s@1c22400 {
			clock-names = "apb", "mod";
			resets = <0x3 0x2c>;
			interrupts = <0x0 0xe 0x4>;
			clocks = <0x3 0x39 0x3 0x55>;
			dma-names = "rx", "tx";
			#sound-dai-cells = <0x0>;
			compatible = "allwinner,sun8i-h3-i2s";
			status = "disabled";
			reg = <0x1c22400 0x400>;
			phandle = <0x56>;
			dmas = <0x14 0x4 0x14 0x4>;
		};

		gpu@1280000 {
			clock-names = "bus", "core";
			assigned-clocks = <0x3 0x72>;
			assigned-clock-rates = <0x16e36000>;
			resets = <0x3 0x23>;
			interrupts = <0x0 0x60 0x4 0x0 0x61 0x4 0x0 0x62 0x4 0x0 0x63 0x4 0x0 0x64 0x4 0x0 0x65 0x4 0x0 0x66 0x4 0x0 0x67 0x4 0x0 0x68 0x4 0x0 0x69 0x4 0x0 0x6a 0x4 0x0 0x6b 0x4>;
			clocks = <0x3 0x31 0x3 0x72>;
			compatible = "allwinner,sun50i-h5-mali", "arm,mali-450";
			interrupt-names = "gp", "gpmmu", "pmu", "pp", "pp0", "ppmmu0", "pp1", "ppmmu1", "pp2", "ppmmu2", "pp3", "ppmmu3";
			reg = <0x1e80000 0x30000>;
			phandle = <0x67>;
		};

		pinctrl@1c20800 {
			clock-names = "apb", "hosc", "losc";
			gpio-controller;
			interrupts = <0x0 0xb 0x4 0x0 0x11 0x4 0x0 0x17 0x4>;
			clocks = <0x3 0x36 0x10 0x11>;
			compatible = "allwinner,sun50i-h5-pinctrl";
			#interrupt-cells = <0x3>;
			reg = <0x1c20800 0x400>;
			phandle = <0xa>;
			#gpio-cells = <0x3>;
			interrupt-controller;

			uart3_rts_cts {
				function = "uart3";
				pins = "PA15", "PA16";
				phandle = <0x4b>;
			};

			i2s1 {
				function = "i2s1";
				pins = "PG10", "PG11", "PG12", "PG13";
				phandle = <0x47>;
			};

			i2c1 {
				function = "i2c1";
				pins = "PA18", "PA19";
				phandle = <0x1e>;
			};

			mmc2_8bit {
				function = "mmc2";
				pins = "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16";
				drive-strength = <0x1e>;
				phandle = <0xe>;
				bias-pull-up;
			};

			spi0 {
				function = "spi0";
				pins = "PC0", "PC1", "PC2", "PC3";
				phandle = <0x15>;
			};

			mmc1 {
				function = "mmc1";
				pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5";
				drive-strength = <0x1e>;
				phandle = <0xb>;
				bias-pull-up;
			};

			uart2 {
				function = "uart2";
				pins = "PA0", "PA1";
				phandle = <0x49>;
			};

			uart0 {
				function = "uart0";
				pins = "PA4", "PA5";
				phandle = <0x1a>;
			};

			csi {
				function = "csi";
				pins = "PE0", "PE1", "PE2", "PE3", "PE4", "PE5", "PE6", "PE7", "PE8", "PE9", "PE10", "PE11";
				phandle = <0x23>;
			};

			spdif {
				function = "spdif";
				pins = "PA17";
				phandle = <0x48>;
			};

			i2c2 {
				function = "i2c2";
				pins = "PE12", "PE13";
				phandle = <0x1f>;
			};

			emac0 {
				function = "emac";
				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD7", "PD8", "PD9", "PD10", "PD12", "PD13", "PD15", "PD16", "PD17";
				drive-strength = <0x28>;
				phandle = <0x45>;
			};

			spi1 {
				function = "spi1";
				pins = "PA15", "PA16", "PA14", "PA13";
				phandle = <0x16>;
			};

			i2s0 {
				function = "i2s0";
				pins = "PA18", "PA19", "PA20", "PA21";
				phandle = <0x46>;
			};

			i2c0 {
				function = "i2c0";
				pins = "PA11", "PA12";
				phandle = <0x1d>;
			};

			mmc0 {
				function = "mmc0";
				pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
				drive-strength = <0x1e>;
				phandle = <0x8>;
				bias-pull-up;
			};

			uart3 {
				function = "uart3";
				pins = "PA13", "PA14";
				phandle = <0x4a>;
			};

			uart1 {
				function = "uart1";
				pins = "PG6", "PG7";
				phandle = <0x1b>;
			};

			uart1_rts_cts {
				function = "uart1";
				pins = "PG8", "PG9";
				phandle = <0x1c>;
			};
		};

		syscon@1c00000 {
			compatible = "allwinner,sun8i-h3-system-controller", "syscon";
			reg = <0x1c00000 0x1000>;
			phandle = <0x12>;
		};

		timer@1c20c00 {
			interrupts = <0x0 0x12 0x4 0x0 0x13 0x4>;
			clocks = <0x10>;
			compatible = "allwinner,sun4i-a10-timer";
			reg = <0x1c20c00 0xa0>;
		};

		thermal-sensor@1c25000 {
			clock-names = "bus", "mod";
			resets = <0x3 0x2a>;
			interrupts = <0x0 0x1f 0x4>;
			clocks = <0x3 0x37 0x3 0x45>;
			#io-channel-cells = <0x0>;
			#thermal-sensor-cells = <0x1>;
			compatible = "allwinner,sun50i-h5-ths";
			reg = <0x1c25000 0x100>;
			phandle = <0x28>;
		};

		camera@1cb0000 {
			pinctrl-names = "default";
			pinctrl-0 = <0x23>;
			clock-names = "bus", "mod", "ram";
			resets = <0x3 0x1e>;
			interrupts = <0x0 0x54 0x4>;
			clocks = <0x3 0x2d 0x3 0x6a 0x3 0x62>;
			compatible = "allwinner,sun8i-h3-csi", "allwinner,sun6i-a31-csi";
			status = "okay";
			reg = <0x1cb0000 0x1000>;
			phandle = <0x62>;

			port {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				endpoint {
					bus-width = <0x8>;
					pclk-sample = <0x0>;
					remote-endpoint = <0x6d>;
					hsync-active = <0x1>;
					vsync-active = <0x1>;
					phandle = <0x6e>;
				};
			};
		};

		usb@1c1d400 {
			phy-names = "usb";
			resets = <0x3 0x15 0x3 0x19>;
			interrupts = <0x0 0x4f 0x4>;
			clocks = <0x3 0x24 0x3 0x28 0x3 0x5f>;
			compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
			status = "okay";
			phys = <0xf 0x3>;
			reg = <0x1c1d400 0x100>;
			phandle = <0x44>;
		};

		serial@1c28c00 {
			reg-io-width = <0x4>;
			resets = <0x3 0x34>;
			interrupts = <0x0 0x3 0x4>;
			clocks = <0x3 0x41>;
			dma-names = "rx", "tx";
			compatible = "snps,dw-apb-uart";
			status = "disabled";
			reg = <0x1c28c00 0x400>;
			phandle = <0x5c>;
			dmas = <0x14 0x9 0x14 0x9>;
			reg-shift = <0x2>;
		};

		interrupt-controller@1c81000 {
			interrupts = <0x1 0x9 0xf04>;
			compatible = "arm,gic-400";
			#interrupt-cells = <0x3>;
			reg = <0x1c81000 0x1000 0x1c82000 0x2000 0x1c84000 0x2000 0x1c86000 0x2000>;
			phandle = <0x1>;
			interrupt-controller;
		};

		usb@1c1a400 {
			resets = <0x3 0x12 0x3 0x16>;
			interrupts = <0x0 0x49 0x4>;
			clocks = <0x3 0x21 0x3 0x25 0x3 0x5c>;
			compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
			status = "disabled";
			reg = <0x1c1a400 0x100>;
			phandle = <0x3e>;
		};

		clock@1000000 {
			#reset-cells = <0x1>;
			clock-names = "mod", "bus";
			resets = <0x3 0x22>;
			clocks = <0x3 0x65 0x3 0x30>;
			#clock-cells = <0x1>;
			compatible = "allwinner,sun50i-h5-de2-clk";
			reg = <0x1000000 0x100000>;
			phandle = <0x2>;
		};

		mmc@1c10000 {
			pinctrl-names = "default";
			#address-cells = <0x1>;
			pinctrl-0 = <0xb>;
			clock-names = "ahb", "mmc";
			vqmmc-supply = <0x9>;
			bus-width = <0x4>;
			non-removable;
			resets = <0x3 0x8>;
			interrupts = <0x0 0x3d 0x4>;
			clocks = <0x3 0x17 0x3 0x4a>;
			#size-cells = <0x0>;
			vmmc-supply = <0x9>;
			compatible = "allwinner,sun50i-h5-mmc", "allwinner,sun50i-a64-mmc";
			status = "okay";
			mmc-pwrseq = <0xc>;
			reg = <0x1c10000 0x1000>;
			phandle = <0x38>;
			reset-names = "ahb";

			wifi@1 {
				interrupts = <0x0 0x7 0x8>;
				interrupt-parent = <0xd>;
				compatible = "brcm,bcm4329-fmac";
				interrupt-names = "host-wake";
				reg = <0x1>;
				phandle = <0x39>;
			};
		};

		codec@1c22c00 {
			clock-names = "apb", "codec";
			resets = <0x3 0x28>;
			interrupts = <0x0 0x1d 0x4>;
			clocks = <0x3 0x34 0x3 0x6d>;
			dma-names = "rx", "tx";
			#sound-dai-cells = <0x0>;
			compatible = "allwinner,sun8i-h3-codec";
			status = "disabled";
			allwinner,codec-analog-controls = <0x19>;
			reg = <0x1c22c00 0x400>;
			phandle = <0x58>;
			dmas = <0x14 0xf 0x14 0xf>;
		};

		serial@1c28000 {
			reg-io-width = <0x4>;
			pinctrl-names = "default";
			pinctrl-0 = <0x1a>;
			resets = <0x3 0x31>;
			interrupts = <0x0 0x0 0x4>;
			clocks = <0x3 0x3e>;
			dma-names = "rx", "tx";
			compatible = "snps,dw-apb-uart";
			status = "okay";
			reg = <0x1c28000 0x400>;
			phandle = <0x59>;
			dmas = <0x14 0x6 0x14 0x6>;
			reg-shift = <0x2>;
		};

		i2s@1c22000 {
			clock-names = "apb", "mod";
			resets = <0x3 0x2b>;
			interrupts = <0x0 0xd 0x4>;
			clocks = <0x3 0x38 0x3 0x54>;
			dma-names = "rx", "tx";
			#sound-dai-cells = <0x0>;
			compatible = "allwinner,sun8i-h3-i2s";
			status = "disabled";
			reg = <0x1c22000 0x400>;
			phandle = <0x55>;
			dmas = <0x14 0x3 0x14 0x3>;
		};

		clock@1c20000 {
			#reset-cells = <0x1>;
			clock-names = "hosc", "losc";
			clocks = <0x10 0x11>;
			#clock-cells = <0x1>;
			compatible = "allwinner,sun50i-h5-ccu";
			reg = <0x1c20000 0x400>;
			phandle = <0x3>;
		};

		hdmi-phy@1ef0000 {
			clock-names = "bus", "mod", "pll-0";
			resets = <0x3 0x20>;
			clocks = <0x3 0x2f 0x3 0x70 0x3 0x6>;
			#phy-cells = <0x0>;
			compatible = "allwinner,sun8i-h3-hdmi-phy";
			reg = <0x1ef0000 0x10000>;
			phandle = <0x20>;
			reset-names = "phy";
		};

		i2c@1c2b400 {
			pinctrl-names = "default";
			#address-cells = <0x1>;
			pinctrl-0 = <0x1f>;
			resets = <0x3 0x30>;
			interrupts = <0x0 0x8 0x4>;
			clocks = <0x3 0x3d>;
			#size-cells = <0x0>;
			compatible = "allwinner,sun6i-a31-i2c";
			status = "okay";
			reg = <0x1c2b400 0x400>;
			phandle = <0x5f>;

			adv7611@4c {
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				compatible = "adi,adv7611";
				reg = <0x4c>;

				port@0 {
					reg = <0x0>;
				};

				port@1 {
					reg = <0x1>;

					endpoint {
						bus-width = <0x8>;
						pclk-sample = <0x0>;
						remote-endpoint = <0x6e>;
						hsync-active = <0x1>;
						vsync-active = <0x1>;
						phandle = <0x6d>;
					};
				};
			};
		};

		usb@1c1d000 {
			phy-names = "usb";
			resets = <0x3 0x15 0x3 0x19>;
			interrupts = <0x0 0x4e 0x4>;
			clocks = <0x3 0x24 0x3 0x28>;
			compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
			status = "okay";
			phys = <0xf 0x3>;
			reg = <0x1c1d000 0x100>;
			phandle = <0x43>;
		};

		usb@1c1a000 {
			resets = <0x3 0x12 0x3 0x16>;
			interrupts = <0x0 0x48 0x4>;
			clocks = <0x3 0x21 0x3 0x25>;
			compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
			status = "disabled";
			reg = <0x1c1a000 0x100>;
			phandle = <0x3d>;
		};

		watchdog@1c20ca0 {
			interrupts = <0x0 0x19 0x4>;
			compatible = "allwinner,sun6i-a31-wdt";
			reg = <0x1c20ca0 0x20>;
			phandle = <0x52>;
		};

		i2c@1f02400 {
			pinctrl-names = "default";
			#address-cells = <0x1>;
			pinctrl-0 = <0x27>;
			resets = <0x26 0x5>;
			interrupts = <0x0 0x2c 0x4>;
			clocks = <0x26 0x9>;
			#size-cells = <0x0>;
			compatible = "allwinner,sun6i-a31-i2c";
			status = "disabled";
			reg = <0x1f02400 0x400>;
			phandle = <0x65>;
		};

		usb@1c1c400 {
			phy-names = "usb";
			resets = <0x3 0x14 0x3 0x18>;
			interrupts = <0x0 0x4d 0x4>;
			clocks = <0x3 0x23 0x3 0x27 0x3 0x5e>;
			compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
			status = "okay";
			phys = <0xf 0x2>;
			reg = <0x1c1c400 0x100>;
			phandle = <0x42>;
		};

		i2c@1c2b000 {
			pinctrl-names = "default";
			#address-cells = <0x1>;
			pinctrl-0 = <0x1e>;
			resets = <0x3 0x2f>;
			interrupts = <0x0 0x7 0x4>;
			clocks = <0x3 0x3c>;
			#size-cells = <0x0>;
			compatible = "allwinner,sun6i-a31-i2c";
			status = "disabled";
			reg = <0x1c2b000 0x400>;
			phandle = <0x5e>;
		};

		ethernet@1c30000 {
			syscon = <0x12>;
			clock-names = "stmmaceth";
			resets = <0x3 0xc>;
			interrupts = <0x0 0x52 0x4>;
			clocks = <0x3 0x1b>;
			compatible = "allwinner,sun8i-h3-emac";
			status = "disabled";
			interrupt-names = "macirq";
			reg = <0x1c30000 0x10000>;
			phandle = <0x4c>;
			reset-names = "stmmaceth";

			mdio {
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				compatible = "snps,dwmac-mdio";
				phandle = <0x13>;
			};

			mdio-mux {
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				compatible = "allwinner,sun8i-h3-mdio-mux";
				mdio-parent-bus = <0x13>;

				mdio@2 {
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					reg = <0x2>;
					phandle = <0x4f>;
				};

				mdio@1 {
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					compatible = "allwinner,sun8i-h3-mdio-internal";
					reg = <0x1>;
					phandle = <0x4d>;

					ethernet-phy@1 {
						resets = <0x3 0x27>;
						clocks = <0x3 0x43>;
						compatible = "ethernet-phy-ieee802.3-c22";
						reg = <0x1>;
						phandle = <0x4e>;
					};
				};
			};
		};

		spi@1c69000 {
			pinctrl-names = "default";
			#address-cells = <0x1>;
			pinctrl-0 = <0x16>;
			clock-names = "ahb", "mod";
			resets = <0x3 0x10>;
			interrupts = <0x0 0x42 0x4>;
			clocks = <0x3 0x1f 0x3 0x53>;
			#size-cells = <0x0>;
			dma-names = "rx", "tx";
			compatible = "allwinner,sun8i-h3-spi";
			status = "disabled";
			reg = <0x1c69000 0x1000>;
			phandle = <0x51>;
			dmas = <0x14 0x18 0x14 0x18>;
		};

		lcd-controller@1c0c000 {
			clock-names = "ahb", "tcon-ch1";
			resets = <0x3 0x1b>;
			interrupts = <0x0 0x56 0x4>;
			clocks = <0x3 0x2a 0x3 0x66>;
			compatible = "allwinner,sun8i-h3-tcon-tv", "allwinner,sun8i-a83t-tcon-tv";
			reg = <0x1c0c000 0x1000>;
			phandle = <0x34>;
			reset-names = "lcd";

			ports {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				port@0 {
					reg = <0x0>;
					phandle = <0x35>;

					endpoint {
						remote-endpoint = <0x6>;
						phandle = <0x5>;
					};
				};

				port@1 {
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					reg = <0x1>;
					phandle = <0x36>;

					endpoint@1 {
						remote-endpoint = <0x7>;
						reg = <0x1>;
						phandle = <0x21>;
					};
				};
			};
		};

		pwm@1c21400 {
			clocks = <0x10>;
			#pwm-cells = <0x3>;
			compatible = "allwinner,sun8i-h3-pwm";
			status = "disabled";
			reg = <0x1c21400 0x8>;
			phandle = <0x54>;
		};

		ir@1f02000 {
			clock-names = "apb", "ir";
			resets = <0x26 0x0>;
			interrupts = <0x0 0x25 0x4>;
			clocks = <0x26 0x4 0x26 0xb>;
			compatible = "allwinner,sun5i-a13-ir";
			status = "disabled";
			reg = <0x1f02000 0x400>;
			phandle = <0x64>;
		};

		usb@1c1c000 {
			phy-names = "usb";
			resets = <0x3 0x14 0x3 0x18>;
			interrupts = <0x0 0x4c 0x4>;
			clocks = <0x3 0x23 0x3 0x27>;
			compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
			status = "okay";
			phys = <0xf 0x2>;
			reg = <0x1c1c000 0x100>;
			phandle = <0x41>;
		};

		spdif@1c21000 {
			clock-names = "apb", "spdif";
			resets = <0x3 0x29>;
			interrupts = <0x0 0xc 0x4>;
			clocks = <0x3 0x35 0x3 0x57>;
			dma-names = "tx";
			#sound-dai-cells = <0x0>;
			compatible = "allwinner,sun8i-h3-spdif";
			status = "disabled";
			reg = <0x1c21000 0x400>;
			phandle = <0x53>;
			dmas = <0x14 0x2>;
		};

		rtc@1f00000 {
			clock-output-names = "rtc-osc32k", "rtc-osc32k-out";
			interrupts = <0x0 0x28 0x4 0x0 0x29 0x4>;
			clocks = <0x24>;
			#clock-cells = <0x1>;
			compatible = "allwinner,sun6i-a31-rtc";
			reg = <0x1f00000 0x54>;
			phandle = <0x63>;
		};

		sound {
			simple-audio-card,name = "allwinner,hdmi";
			simple-audio-card,format = "i2s";
			compatible = "simple-audio-card";
			phandle = <0x57>;
			simple-audio-card,mclk-fs = <0x100>;

			simple-audio-card,cpu {
				sound-dai = <0x18>;
			};

			simple-audio-card,codec {
				sound-dai = <0x17>;
			};
		};

		pinctrl@1f02c00 {
			clock-names = "apb", "hosc", "losc";
			gpio-controller;
			interrupts = <0x0 0x2d 0x4>;
			clocks = <0x26 0x3 0x10 0x11>;
			compatible = "allwinner,sun8i-h3-r-pinctrl";
			#interrupt-cells = <0x3>;
			reg = <0x1f02c00 0x400>;
			phandle = <0xd>;
			#gpio-cells = <0x3>;
			interrupt-controller;

			ir {
				function = "s_cir_rx";
				pins = "PL11";
				phandle = <0x66>;
			};

			r-i2c {
				function = "s_i2c";
				pins = "PL0", "PL1";
				phandle = <0x27>;
			};
		};

		codec-analog@1f015c0 {
			compatible = "allwinner,sun8i-h3-codec-analog";
			reg = <0x1f015c0 0x4>;
			phandle = <0x19>;
		};

		hdmi@1ee0000 {
			reg-io-width = <0x1>;
			phy-names = "hdmi-phy";
			clock-names = "iahb", "isfr", "tmds";
			resets = <0x3 0x21>;
			interrupts = <0x0 0x58 0x4>;
			clocks = <0x3 0x2f 0x3 0x70 0x3 0x6f>;
			#sound-dai-cells = <0x0>;
			compatible = "allwinner,sun8i-h3-dw-hdmi", "allwinner,sun8i-a83t-dw-hdmi";
			status = "okay";
			phys = <0x20>;
			reg = <0x1ee0000 0x10000>;
			phandle = <0x17>;
			reset-names = "ctrl";

			ports {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				port@0 {
					reg = <0x0>;
					phandle = <0x60>;

					endpoint {
						remote-endpoint = <0x21>;
						phandle = <0x7>;
					};
				};

				port@1 {
					reg = <0x1>;
					phandle = <0x61>;

					endpoint {
						remote-endpoint = <0x22>;
						phandle = <0x31>;
					};
				};
			};
		};

		clock@1f01400 {
			#reset-cells = <0x1>;
			clock-names = "hosc", "losc", "iosc", "pll-periph";
			clocks = <0x10 0x11 0x25 0x3 0x9>;
			#clock-cells = <0x1>;
			compatible = "allwinner,sun8i-h3-r-ccu";
			reg = <0x1f01400 0x100>;
			phandle = <0x26>;
		};

		i2c@1c2ac00 {
			pinctrl-names = "default";
			#address-cells = <0x1>;
			pinctrl-0 = <0x1d>;
			resets = <0x3 0x2e>;
			interrupts = <0x0 0x6 0x4>;
			clocks = <0x3 0x3b>;
			#size-cells = <0x0>;
			compatible = "allwinner,sun6i-a31-i2c";
			status = "disabled";
			reg = <0x1c2ac00 0x400>;
			phandle = <0x5d>;
		};

		eeprom@01c14000 {
			compatible = "allwinner,sun8i-h3-sid";
			reg = <0x1c14000 0x400>;
			phandle = <0x3c>;
		};

		usb@1c19000 {
			phy-names = "usb";
			resets = <0x3 0x11>;
			interrupts = <0x0 0x47 0x4>;
			clocks = <0x3 0x20>;
			extcon = <0xf 0x0>;
			compatible = "allwinner,sun8i-h3-musb";
			status = "disabled";
			interrupt-names = "mc";
			phys = <0xf 0x0>;
			reg = <0x1c19000 0x400>;
			phandle = <0x3b>;
		};

		mmc@1c0f000 {
			pinctrl-names = "default";
			#address-cells = <0x1>;
			pinctrl-0 = <0x8>;
			clock-names = "ahb", "mmc";
			bus-width = <0x4>;
			resets = <0x3 0x7>;
			interrupts = <0x0 0x3c 0x4>;
			clocks = <0x3 0x16 0x3 0x47>;
			#size-cells = <0x0>;
			vmmc-supply = <0x9>;
			compatible = "allwinner,sun50i-h5-mmc", "allwinner,sun50i-a64-mmc";
			status = "okay";
			reg = <0x1c0f000 0x1000>;
			phandle = <0x37>;
			reset-names = "ahb";
			cd-gpios = <0xa 0x5 0x6 0x1>;
		};

		serial@1c28800 {
			reg-io-width = <0x4>;
			resets = <0x3 0x33>;
			interrupts = <0x0 0x2 0x4>;
			clocks = <0x3 0x40>;
			dma-names = "rx", "tx";
			compatible = "snps,dw-apb-uart";
			status = "disabled";
			reg = <0x1c28800 0x400>;
			phandle = <0x5b>;
			dmas = <0x14 0x8 0x14 0x8>;
			reg-shift = <0x2>;
		};

		usb@1c1b400 {
			phy-names = "usb";
			resets = <0x3 0x13 0x3 0x17>;
			interrupts = <0x0 0x4b 0x4>;
			clocks = <0x3 0x22 0x3 0x26 0x3 0x5d>;
			compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
			status = "disabled";
			phys = <0xf 0x1>;
			reg = <0x1c1b400 0x100>;
			phandle = <0x40>;
		};

		phy@1c19400 {
			clock-names = "usb0_phy", "usb1_phy", "usb2_phy", "usb3_phy";
			reg-names = "phy_ctrl", "pmu0", "pmu1", "pmu2", "pmu3";
			resets = <0x3 0x0 0x3 0x1 0x3 0x2 0x3 0x3>;
			clocks = <0x3 0x58 0x3 0x59 0x3 0x5a 0x3 0x5b>;
			#phy-cells = <0x1>;
			compatible = "allwinner,sun8i-h3-usb-phy";
			status = "okay";
			reg = <0x1c19400 0x2c 0x1c1a800 0x4 0x1c1b800 0x4 0x1c1c800 0x4 0x1c1d800 0x4>;
			phandle = <0xf>;
			reset-names = "usb0_reset", "usb1_reset", "usb2_reset", "usb3_reset";
		};

		i2s@1c22800 {
			clock-names = "apb", "mod";
			resets = <0x3 0x2d>;
			interrupts = <0x0 0xf 0x4>;
			clocks = <0x3 0x3a 0x3 0x56>;
			dma-names = "tx";
			#sound-dai-cells = <0x0>;
			compatible = "allwinner,sun8i-h3-i2s";
			reg = <0x1c22800 0x400>;
			phandle = <0x18>;
			dmas = <0x14 0x1b>;
		};

		dma-controller@1c02000 {
			resets = <0x3 0x6>;
			interrupts = <0x0 0x32 0x4>;
			clocks = <0x3 0x15>;
			compatible = "allwinner,sun8i-h3-dma";
			reg = <0x1c02000 0x1000>;
			phandle = <0x14>;
			#dma-cells = <0x1>;
		};

		mmc@1c11000 {
			pinctrl-names = "default";
			#address-cells = <0x1>;
			pinctrl-0 = <0xe>;
			clock-names = "ahb", "mmc";
			bus-width = <0x8>;
			non-removable;
			resets = <0x3 0x9>;
			interrupts = <0x0 0x3e 0x4>;
			clocks = <0x3 0x18 0x3 0x4d>;
			#size-cells = <0x0>;
			vmmc-supply = <0x9>;
			cap-mmc-hw-reset;
			compatible = "allwinner,sun50i-h5-emmc", "allwinner,sun50i-a64-emmc";
			status = "okay";
			reg = <0x1c11000 0x1000>;
			phandle = <0x3a>;
			reset-names = "ahb";
		};

		spi@1c68000 {
			pinctrl-names = "default";
			#address-cells = <0x1>;
			pinctrl-0 = <0x15>;
			clock-names = "ahb", "mod";
			resets = <0x3 0xf>;
			interrupts = <0x0 0x41 0x4>;
			clocks = <0x3 0x1e 0x3 0x52>;
			#size-cells = <0x0>;
			dma-names = "rx", "tx";
			compatible = "allwinner,sun8i-h3-spi";
			status = "disabled";
			reg = <0x1c68000 0x1000>;
			phandle = <0x50>;
			dmas = <0x14 0x17 0x14 0x17>;
		};

		mixer@1100000 {
			clock-names = "bus", "mod";
			resets = <0x2 0x0>;
			clocks = <0x2 0x0 0x2 0x6>;
			compatible = "allwinner,sun8i-h3-de2-mixer-0";
			reg = <0x1100000 0x100000>;
			phandle = <0x4>;

			ports {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				port@1 {
					reg = <0x1>;
					phandle = <0x33>;

					endpoint {
						remote-endpoint = <0x5>;
						phandle = <0x6>;
					};
				};
			};
		};
	};

	clocks {
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges;

		internal-osc-clk {
			clock-output-names = "iosc";
			clock-accuracy = <0x11e1a300>;
			#clock-cells = <0x0>;
			clock-frequency = <0xf42400>;
			compatible = "fixed-clock";
			phandle = <0x25>;
		};

		osc32k_clk {
			clock-output-names = "osc32k";
			#clock-cells = <0x0>;
			clock-frequency = <0x8000>;
			compatible = "fixed-clock";
			phandle = <0x11>;
		};

		ext_osc32k_clk {
			clock-output-names = "ext_osc32k";
			#clock-cells = <0x0>;
			clock-frequency = <0x8000>;
			compatible = "fixed-clock";
			phandle = <0x24>;
		};

		osc24M_clk {
			clock-output-names = "osc24M";
			#clock-cells = <0x0>;
			clock-frequency = <0x16e3600>;
			compatible = "fixed-clock";
			phandle = <0x10>;
		};
	};

	leds {
		compatible = "gpio-leds";

		pwr {
			linux,default-trigger = "default-on";
			label = "orangepi:green:pwr";
			gpios = <0xd 0x0 0xa 0x0>;
		};

		status {
			linux,default-trigger = "heartbeat";
			label = "orangepi:red:status";
			gpios = <0xa 0x0 0x11 0x0>;
		};
	};

	psci {
		method = "smc";
		compatible = "arm,psci-0.2";
	};

	timer {
		interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08 0x1 0xb 0xf08 0x1 0xa 0xf08>;
		compatible = "arm,armv8-timer";
	};

	aliases {
		serial0 = "/soc/serial@1c28000";
	};

	display-engine {
		allwinner,pipelines = <0x4>;
		compatible = "allwinner,sun8i-h3-display-engine";
		status = "okay";
		phandle = <0x32>;
	};

	chosen {
		#address-cells = <0x1>;
		linux,initrd-end = <0x49fff8e5>;
		bootargs = "root=UUID=c6b92f2f-40c6-4558-9c3d-8e163ee4b1e8 rootwait rootfstype=ext4 console=ttyS0,115200 console=tty1 panic=10 consoleblank=0 loglevel=1 ubootpart=0e98dbbb-01 usb-storage.quirks=0x2537:0x1066:u,0x2537:0x1068:u   cgroup_enable=memory swapaccount=1";
		#size-cells = <0x1>;
		ranges;
		linux,initrd-start = "Iy`";
		linux,stdout-path = "/soc@01c00000/serial@01c28000:115200";
		stdout-path = "serial0:115200n8";

		framebuffer-hdmi {
			clocks = <0x2 0x6 0x3 0x66 0x3 0x6f>;
			compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
			status = "disabled";
			allwinner,pipeline = "mixer0-lcd0-hdmi";
		};

		framebuffer-tve {
			clocks = <0x2 0x7 0x3 0x67>;
			compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
			status = "disabled";
			allwinner,pipeline = "mixer1-lcd1-tve";
		};
	};

	reg_cpu_fallback {
		regulator-max-microvolt = <0x10c8e0>;
		regulator-min-microvolt = <0x10c8e0>;
		regulator-name = "vdd-cpux-dummy";
		compatible = "regulator-fixed";
		phandle = <0x6c>;
	};

	cpus {
		#address-cells = <0x1>;
		#size-cells = <0x0>;

		cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a53", "arm,armv8";
			reg = <0x1>;
			enable-method = "psci";
			operating-points-v2 = <0x2f>;
		};

		cpu@2 {
			device_type = "cpu";
			compatible = "arm,cortex-a53", "arm,armv8";
			reg = <0x2>;
			enable-method = "psci";
			operating-points-v2 = <0x2f>;
		};

		cpu@0 {
			cooling-min-level = <0x0>;
			clock-names = "cpu";
			cpu-supply = <0x30>;
			clocks = <0x3 0xe>;
			cooling-max-level = <0xf>;
			device_type = "cpu";
			compatible = "arm,cortex-a53", "arm,armv8";
			reg = <0x0>;
			enable-method = "psci";
			phandle = <0x2a>;
			operating-points-v2 = <0x2f>;
			#cooling-cells = <0x2>;
		};

		cpu@3 {
			device_type = "cpu";
			compatible = "arm,cortex-a53", "arm,armv8";
			reg = <0x3>;
			enable-method = "psci";
			operating-points-v2 = <0x2f>;
		};
	};

	__symbols__ {
		pwm = "/soc/pwm@1c21400";
		syscon = "/soc/syscon@1c00000";
		mdio = "/soc/ethernet@1c30000/mdio";
		ohci2 = "/soc/usb@1c1c400";
		usb_otg = "/soc/usb@1c19000";
		cpu_crit = "/thermal-zones/cpu-thermal/trips/cpu_crit";
		wifi_pwrseq = "/wifi_pwrseq";
		mmc2_8bit_pins = "/soc/pinctrl@1c20800/mmc2_8bit";
		ir = "/soc/ir@1f02000";
		i2s1 = "/soc/i2s@1c22400";
		i2c1 = "/soc/i2c@1c2b000";
		r_i2c_pins = "/soc/pinctrl@1f02c00/r-i2c";
		ohci0 = "/soc/usb@1c1a400";
		mali = "/soc/gpu@1280000";
		hdmi_con_in = "/connector/port/endpoint";
		display_clocks = "/soc/clock@1000000";
		i2s0_pins = "/soc/pinctrl@1c20800/i2s0";
		spi0 = "/soc/spi@1c68000";
		mmc1 = "/soc/mmc@1c10000";
		r_ccu = "/soc/clock@1f01400";
		hdmi_phy = "/soc/hdmi-phy@1ef0000";
		cpu_very_hot_pre = "/thermal-zones/cpu-thermal/trips/cpu_very_hot_pre";
		csi_pins = "/soc/pinctrl@1c20800/csi";
		spdif_tx_pins_a = "/soc/pinctrl@1c20800/spdif";
		cpu0_opp_table = "/opp_table0";
		mixer0_out_tcon0 = "/soc/mixer@1100000/ports/port@1/endpoint";
		dma = "/soc/dma-controller@1c02000";
		cpu_thermal = "/thermal-zones/cpu_thermal";
		cpu_hot_trip = "/thermal-zones/cpu_thermal/trips/cpu-warm";
		ccu = "/soc/clock@1c20000";
		uart2 = "/soc/serial@1c28800";
		tcon0 = "/soc/lcd-controller@1c0c000";
		gic = "/soc/interrupt-controller@1c81000";
		cpu_very_hot = "/thermal-zones/cpu-thermal/trips/cpu_very_hot";
		ext_osc32k = "/clocks/ext_osc32k_clk";
		cpu_very_hot_trip = "/thermal-zones/cpu_thermal/trips/cpu-very-hot";
		mmc1_pins = "/soc/pinctrl@1c20800/mmc1";
		mixer0 = "/soc/mixer@1100000";
		uart0 = "/soc/serial@1c28000";
		ehci2 = "/soc/usb@1c1c000";
		ir_pins_a = "/soc/pinctrl@1f02c00/ir";
		mixer0_out = "/soc/mixer@1100000/ports/port@1";
		i2c2_pins = "/soc/pinctrl@1c20800/i2c2";
		csi = "/soc/camera@1cb0000";
		uart3_rts_cts_pins = "/soc/pinctrl@1c20800/uart3_rts_cts";
		ohci3 = "/soc/usb@1c1d400";
		adv7611_to_csi = "/soc/i2c@1c2b400/adv7611@4c/port@1/endpoint", "";
		cpu_hot_pre = "/thermal-zones/cpu-thermal/trips/cpu_hot_pre";
		spdif = "/soc/spdif@1c21000";
		csi_from_adv7611 = "/soc/camera@1cb0000/port/endpoint", "";
		uart3_pins = "/soc/pinctrl@1c20800/uart3";
		ehci0 = "/soc/usb@1c1a000";
		hdmi_out = "/soc/hdmi@1ee0000/ports/port@1";
		i2s2 = "/soc/i2s@1c22800";
		i2c2 = "/soc/i2c@1c2b400";
		ohci1 = "/soc/usb@1c1b400";
		mmc0_pins = "/soc/pinctrl@1c20800/mmc0";
		cpu_hot = "/thermal-zones/cpu-thermal/trips/cpu_hot";
		brcmf = "/soc/mmc@1c10000/wifi@1";
		emac_rgmii_pins = "/soc/pinctrl@1c20800/emac0";
		i2c1_pins = "/soc/pinctrl@1c20800/i2c1";
		codec_analog = "/soc/codec-analog@1f015c0";
		spi1 = "/soc/spi@1c69000";
		hdmi_out_con = "/soc/hdmi@1ee0000/ports/port@1/endpoint";
		usbphy = "/soc/phy@1c19400";
		external_mdio = "/soc/ethernet@1c30000/mdio-mux/mdio@2";
		i2s0 = "/soc/i2s@1c22000";
		i2c0 = "/soc/i2c@1c2ac00";
		uart2_pins = "/soc/pinctrl@1c20800/uart2";
		mmc2 = "/soc/mmc@1c11000";
		spi1_pins = "/soc/pinctrl@1c20800/spi1";
		reg_vdd_cpux = "/gpio-regulator";
		codec = "/soc/codec@1c22c00";
		tcon0_out = "/soc/lcd-controller@1c0c000/ports/port@1";
		osc24M = "/clocks/osc24M_clk";
		tcon0_in_mixer0 = "/soc/lcd-controller@1c0c000/ports/port@0/endpoint";
		tcon0_in = "/soc/lcd-controller@1c0c000/ports/port@0";
		int_mii_phy = "/soc/ethernet@1c30000/mdio-mux/mdio@1/ethernet-phy@1";
		mmc0 = "/soc/mmc@1c0f000";
		iosc = "/clocks/internal-osc-clk";
		i2c0_pins = "/soc/pinctrl@1c20800/i2c0";
		uart0_pins_a = "/soc/pinctrl@1c20800/uart0";
		r_pio = "/soc/pinctrl@1f02c00";
		hdmi_in_tcon0 = "/soc/hdmi@1ee0000/ports/port@0/endpoint";
		wdt0 = "/soc/watchdog@1c20ca0";
		uart3 = "/soc/serial@1c28c00";
		emac = "/soc/ethernet@1c30000";
		uart1_pins = "/soc/pinctrl@1c20800/uart1";
		spi0_pins = "/soc/pinctrl@1c20800/spi0";
		osc32k = "/clocks/osc32k_clk";
		reg_cpu_fallback = "/reg_cpu_fallback";
		uart1_rts_cts_pins = "/soc/pinctrl@1c20800/uart1_rts_cts";
		pio = "/soc/pinctrl@1c20800";
		ths = "/soc/thermal-sensor@1c25000";
		uart1 = "/soc/serial@1c28400";
		ehci3 = "/soc/usb@1c1d000";
		hdmi = "/soc/hdmi@1ee0000";
		r_i2c = "/soc/i2c@1f02400";
		hdmi_in = "/soc/hdmi@1ee0000/ports/port@0";
		tcon0_out_hdmi = "/soc/lcd-controller@1c0c000/ports/port@1/endpoint@1";
		de = "/display-engine";
		cpu_warm = "/thermal-zones/cpu-thermal/trips/cpu_warm";
		internal_mdio = "/soc/ethernet@1c30000/mdio-mux/mdio@1";
		reg_vcc3v3 = "/vcc3v3";
		rtc = "/soc/rtc@1f00000";
		cpu0 = "/cpus/cpu@0";
		sid = "/soc/eeprom@01c14000";
		ehci1 = "/soc/usb@1c1b000";
		sound_hdmi = "/soc/sound";
		i2s1_pins = "/soc/pinctrl@1c20800/i2s1";
	};

	memory {
		device_type = "memory";
		reg = <0x40000000 0x20000000>;
	};
};

 

 

Edited by yogggoy
broken AD link
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yogggoy

yogggoy

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Well, I found the HW problem on the board and after fix dmesg | grep adv7611 looks like this: 

[    7.795241] media: Linux media interface: v0.10
[    7.879137] asoc-simple-card soc:sound: i2s-hifi <-> 1c22800.i2s mapping ok
[    7.887178] videodev: Linux video capture interface: v2.00
[    8.040638] adv7611 2-004c: adv7611 found @ 0x98 (mv64xxx_i2c adapter)
[    8.599735] Adding 61620k swap on /dev/zram1.  Priority:5 extents:1 across:61620k SSFS
[    8.606285] zram2: detected capacity change from 0 to 63102976
[    8.737312] thermal thermal_zone0: failed to read out thermal zone (-110)

But, as I understand it, this kernel module only works with i2c, but not with CSI.
I don't see any video devices in /dev, and v4l2-ctl -l says that it cannot find /dev /video0.

I missed something in DT, but what?


ps, my HW errors:
bad schematic for ocsil_clk 28.636. GND instead VCC. XTAL_P must be 1v8
I forgot about reset pin, fastfix - just plug 3v3. The correct solution is to use reset-gpios and hpd-gpios

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de24b27b0e

de24b27b0e

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Posted

February 15

Hello.
I want to do HDMI-in to CSI with ADV7611. But have problems with DT overlay. I'm a newbie.

I can build img with activated module adv7611 in menuconfig. And apply "armbian-add-overlay adv7611.dts".
But /dev/video device did not appear.
Can someone suggest in the H5

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petit_miner

petit_miner

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Posted

I'm also working on the ADV7611 and I'm stuck too.

I think you need to rework the devicetree. This is my devicetree for the ADV7611:

  

&csi1 {
	status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&csi1_clk &csi1_16bit>;

port {
	
	
	csi1_ep: endpoint {
	
		remote-endpoint = <&hdmi_in>;
		bus-width = <16>;
	   
	   };
	};
 };

&i2c1 {
    	pinctrl-0 = <&i2c1_pins>;
		pinctrl-names = "default";
		status = "okay";

	hdmi_receiver@4c {
		compatible = "adi,adv7611";
		reg = <0x4c>;
		
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;
		};
		port@1 {
			reg = <1>;
			hdmi_in: endpoint {
				remote-endpoint = <&csi1_ep>;
				bus-width = <16>;
			};
		};
	};
	
	
	
};

And it seems like your devicetree was decompiled at some point. It would be way better to work with the "real" source devicetree.

How recent is your kernel? It maybe lacks support for the CSI / DVP.

 

 

 

 

 

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yogggoy

yogggoy

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I added a description of reset and hot-plug_dtct pins in DTS'overlay. (But don't understand how is work htp-detect)

Quote

 

                reset-gpios = <&pio 4 14 0>;

                hpd-gpios = <&pio 4 15 1>;

 

now dt-overlay looks like:

Spoiler 

/dts-v1/;
/plugin/;

/ {
	compatible = "allwinner,sun4i-a10", "allwinner,sun7i-a20", "allwinner,sun8i-h3", "allwinner,sun50i-a64", "allwinner,sun50i-h5";

	fragment@1 {
		target = <&csi>;
		__overlay__ {
			status = "okay";
			port {
				#address-cells = <1>;
				#size-cells = <0>;

				/* Parallel bus endpoint */
				csi_from_adv7611: endpoint {
					remote-endpoint = <&adv7611_to_csi>;
					bus-width = <8>;
					hsync-active = <0>;
					vsync-active = <0>;
					pclk-sample = <1>;
				};
			};
		};
	};

	fragment@2 {
		target = <&i2c2>;
		__overlay__ {
			status = "okay";
			#size-cells = <0>;
			#address-cells = <1>;

			adv7611@4c {
				compatible = "adi,adv7611";
				reg = <0x4c>;
				// reg-names = "main", "edid";
				status = "okay";

				reset-gpios = <&pio 4 14 0>;
				hpd-gpios = <&pio 4 15 1>;
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				port@0 {
					reg = <0x0>;
				};

				port@1 {
					reg = <0x1>;
					adv7611_to_csi: endpoint {
						remote-endpoint = <&csi_from_adv7611>;
					};
				};
			};
		};
	};
};

 

 

Quote

And it seems like your devicetree was decompiled at some point.

Yep, my full dts in first msg realy decompiled from system: dtc -I fs -O dts -o dt_full_adv7611.dts /sys/firmware/devicetree/base/

 

Quote

How recent is your kernel? It maybe lacks support for the CSI / DVP. 

from first msg:

    Board: OrangePi zero plus2 H5
    Linux 4.19.21-sunxi64 #5.76

And yesterday, i'am rebuild img again :) with last kernel

 

I see one problem. In menuconfig i'am select adv7604 and sun6i_csi moudles, but after apply armbian-add-overlay and reboot linux - in list lsmod i see only adv7604. sun6i_csi is missing.

If i do: modprobe sun6i_csi, in lsmod i see this module. But in /dev has not appeared video-dev/

 

How can I see more info about HW in Linux? Expect dmesg and ls /dev/

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petit_miner

petit_miner

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I suggest you clone the newest version of the linux kernel from Github and apply sunxi_defconfig . After that select the ADV7604 and the Sunxi V3s CSI (Sun6i-csi) in the menuconfig. then open arch/arm/boot/dts/ and search for your board devicetree file and modify it to support the ADV7611. Then build the kernel and after that look for the zImage in arch/arm/boot/ and also copy your compiled devicetree file from arch/arm/boot/dts/.

Why do you modprobe sun6i-csi? The csi driver is mainline so you don't need that. 

 

The Reset line isn't a required property, but the Hotplug detection (HPD) pin is. The Hotplug Detection pin is an output to switch a transistor on to connect a 1k resistor between HDMI 5V and the Hotplug Detection line coming from the HDMI cable. So the HDMI source knows that EDID data can be read via HDMI I2C. The EDID Data tells the source which resolutions are avaible.

 

Have a look at the attached schematic, even though it is for an FPGA it should be nearly the same. You don't need HPD Notif, FPGA_SCl, FPGA_SDA and of course not the FPGA schematic.  ;)

dsi-shield-sch.pdf

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yogggoy

yogggoy

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@petit_miner, thank you very much!
I will try to repeat your instructions, i will definitely write about the results.

Quote

I suggest you clone the newest version of the linux kernel from Github and apply sunxi_defconfig .

Do you mean get pure kernel (torvalds rep), without armbian path?
 

Quote

The Reset line isn't a required property, but the Hotplug detection (HPD) pin is.

I did not understand why I need an output from the chip and why use a transistor. We can directly connect HDMI 5v to HDMI hpd.

But i am forget about other chip in family, adv7604 have 4 input HDMI port, and in this case hpd is really necessary.

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petit_miner

petit_miner

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Yes. But I think you need another config file, because I didn't know that the H5 is an Arm64 processor.  I can't acess my linux machine right now, to test which config file you need. Maybe another person from the forum can help? 

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yogggoy

yogggoy

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petit_miner, thank you! You were right, after upgrading the kernel to 4.20 and up - the module sun6i_csi is loaded automatically and the /dev/video0 is available. (of course the csi must be status = "okay"; in DT)

But I can't figure out how to use your instruction about building kernel, and how to apply the kernel to an existing image on SDcard.

I tried to assemble an image by linux-sunxi "manual build howto", but it turned out to be too difficult for me :)

 

I got the first result after applying armbian-config tools and option change kernel version to dev (4.20). After applying "armbian-add-overlay adv7611.dts" i got /dev/video0 device, but module adv7604 is missing. 

Then the img was assembled again through "buil.sh BRANCH=dev". adv7604 was selected in menuconfig

 

Now i have img with video0 dev and adv7604 module. Thanks for help!

 

But now the device is not working, i can't get picture from video0 - have error: 

pi@orangepizeroplus2:~$ sudo fswebcam -r 640x480 --jpeg 85 -D 1 shot.jpg
--- Opening /dev/video0...
Trying source module v4l2...
/dev/video0 opened.
No input was specified, using the first.
Delaying 1 seconds.
--- Capturing frame...
Timed out waiting for frame!
No frames captured.

i think i have hardware problem, because notebook have not any reaction on HDMI connection to adv7611.

i will read the registers adv7611, I will write if get any results. 

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petit_miner

petit_miner

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Test if the ADV7611 gets detected via I2C: dmesg | grep ADV

 

I'm stuck with this too. You need to configure the EDID memory of the ADV7611 with media-ctl to tell the HDMI "sender" which resolutions are available.

But I don't know how to do that. 

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yogggoy

yogggoy

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Hi @petit_miner.  Currently I do not know how to write the EDID correctly and init ADV.

 

But I try to write data directly through i2cget / i2cset utisl, and my laptop now detects the HDMI device.

First, the dmesg say: 

adv7611 2-004c: adv7611 found @ 0x98 (mv64xxx_i2c adapter)

after i found AD recommendations "script" file: ADV7611-VER.3.0c.txt

https://ez.analog.com/video/w/documents/789/adv7611-design-support-files

 

and just convert it to .sh:

script_init.sh

Spoiler 

#!/bin/bash

i2cset -f -y 1 0x4c 0xFF 0x80            #; I2C reset
sleep 0.5

i2cset -f -y 1 0x4c 0xF4 0x80            #; CEC
sleep 0.1
i2cset -f -y 1 0x4c 0xF5 0x7C            #; INFOFRAME
sleep 0.1
i2cset -f -y 1 0x4c 0xF8 0x4C            #; DPLL
sleep 0.1
i2cset -f -y 1 0x4c 0xF9 0x64            #; KSV
sleep 0.1
i2cset -f -y 1 0x4c 0xFA 0x6C            #; EDID
sleep 0.1
i2cset -f -y 1 0x4c 0xFB 0x68            #; HDMI
sleep 0.1
i2cset -f -y 1 0x4c 0xFD 0x44            #; CP
sleep 0.1
i2cset -f -y 1 0x4c 0x01 0x06            #; Prim_Mode =110b HDMI-GR
sleep 0.1
i2cset -f -y 1 0x4c 0x02 0xF5            #; Auto CSC, YCrCb out, Set op_656 bit
sleep 0.1
i2cset -f -y 1 0x4c 0x03 0x40            #; 24 bit SDR 444 Mode 0
sleep 0.1
i2cset -f -y 1 0x4c 0x05 0x28            #; AV Codes Off
sleep 0.1
i2cset -f -y 1 0x4c 0x06 0xA6            #; Invert VS,HS pins
sleep 0.1
i2cset -f -y 1 0x4c 0x0B 0x44            #; Power up part
sleep 0.1
i2cset -f -y 1 0x4c 0x0C 0x42            #; Power up part
sleep 0.1
i2cset -f -y 1 0x4c 0x14 0x7F            #; Max Drive Strength
sleep 0.1
i2cset -f -y 1 0x4c 0x15 0x80            #; Disable Tristate of Pins
sleep 0.1
i2cset -f -y 1 0x4c 0x19 0x83            #; LLC DLL phase
sleep 0.1
i2cset -f -y 1 0x4c 0x33 0x40            #; LLC DLL enable
sleep 0.1
i2cset -f -y 1 0x22 0xBA 0x01            #; Set HDMI FreeRun
sleep 0.1
i2cset -f -y 1 0x32 0x40 0x81            #; Disable HDCP 1.1 features
sleep 0.1
i2cset -f -y 1 0x34 0x9B 0x03            #; ADI recommended setting
sleep 0.1
i2cset -f -y 1 0x34 0xC1 0x01            #; ADI recommended setting
sleep 0.1
i2cset -f -y 1 0x34 0xC2 0x01            #; ADI recommended setting
sleep 0.1
i2cset -f -y 1 0x34 0xC3 0x01            #; ADI recommended setting
sleep 0.1
i2cset -f -y 1 0x34 0xC4 0x01            #; ADI recommended setting
sleep 0.1
i2cset -f -y 1 0x34 0xC5 0x01            #; ADI recommended setting
sleep 0.1
i2cset -f -y 1 0x34 0xC6 0x01            #; ADI recommended setting
sleep 0.1
i2cset -f -y 1 0x34 0xC7 0x01            #; ADI recommended setting
sleep 0.1
i2cset -f -y 1 0x34 0xC8 0x01            #; ADI recommended setting
sleep 0.1
i2cset -f -y 1 0x34 0xC9 0x01            #; ADI recommended setting
sleep 0.1
i2cset -f -y 1 0x34 0xCA 0x01            #; ADI recommended setting
sleep 0.1
i2cset -f -y 1 0x34 0xCB 0x01            #; ADI recommended setting
sleep 0.1
i2cset -f -y 1 0x34 0xCC 0x01            #; ADI recommended setting
sleep 0.1
i2cset -f -y 1 0x34 0x00 0x00            #; Set HDMI Input Port A
sleep 0.1
i2cset -f -y 1 0x34 0x83 0xFE            #; Enable clock terminator for port A
sleep 0.1
i2cset -f -y 1 0x34 0x6F 0x0C            #; ADI recommended setting
sleep 0.1
i2cset -f -y 1 0x34 0x85 0x1F            #; ADI recommended setting
sleep 0.1
i2cset -f -y 1 0x34 0x87 0x70            #; ADI recommended setting
sleep 0.1
i2cset -f -y 1 0x34 0x8D 0x04            #; LFG
sleep 0.1
i2cset -f -y 1 0x34 0x8E 0x1E            #; HFG
sleep 0.1
i2cset -f -y 1 0x34 0x1A 0x8A            #; unmute audio
sleep 0.1
i2cset -f -y 1 0x34 0x57 0xDA            #; ADI recommended setting
sleep 0.1
i2cset -f -y 1 0x34 0x58 0x01            #; ADI recommended setting
sleep 0.1
i2cset -f -y 1 0x34 0x03 0x98            #; DIS_I2C_ZERO_COMPR
sleep 0.1
i2cset -f -y 1 0x34 0x75 0x10            #; DDC drive strength
sleep 0.1
i2cset -f -y 1 0x39 0x01 0x00            #; Set N Value(6144)
sleep 0.1
i2cset -f -y 1 0x39 0x02 0x18            #; Set N Value(6144)
sleep 0.1
i2cset -f -y 1 0x39 0x03 0x00            #; Set N Value(6144)
sleep 0.1
i2cset -f -y 1 0x39 0x15 0x00            #; Input 444 (RGB or YCrCb) with Separate Syncs, 44.1kHz fs
sleep 0.1
i2cset -f -y 1 0x39 0x16 0x70            #; Output format 444, 24-bit input
sleep 0.1
i2cset -f -y 1 0x39 0x18 0x46            #; CSC disabled
sleep 0.1
i2cset -f -y 1 0x39 0x40 0x80            #; General Control packet enable
sleep 0.1
i2cset -f -y 1 0x39 0x41 0x10            #; Power down control
sleep 0.1
i2cset -f -y 1 0x39 0x48 0x08            #; Data right justified
sleep 0.1
i2cset -f -y 1 0x39 0x49 0xA8            #; Set Dither_mode - 12-to-10 bit
sleep 0.1
i2cset -f -y 1 0x39 0x4C 0x00            #; 8 bit Output
sleep 0.1
i2cset -f -y 1 0x39 0x55 0x40            #; Set YCrCb 444 in AVinfo Frame
sleep 0.1
i2cset -f -y 1 0x39 0x56 0x08            #; Set active format Aspect
sleep 0.1
i2cset -f -y 1 0x39 0x96 0x20            #; HPD Interrupt clear
sleep 0.1
i2cset -f -y 1 0x39 0x98 0x03            #; ADI Recommended Write
sleep 0.1
i2cset -f -y 1 0x39 0x99 0x02            #; ADI Recommended Write
sleep 0.1
i2cset -f -y 1 0x39 0x9C 0x30            #; PLL Filter R1 Value
sleep 0.1
i2cset -f -y 1 0x39 0x9D 0x61            #; Set clock divide
sleep 0.1
i2cset -f -y 1 0x39 0xA2 0xA4            #; ADI Recommended Write
sleep 0.1
i2cset -f -y 1 0x39 0xA3 0xA4            #; ADI Recommended Write
sleep 0.1
i2cset -f -y 1 0x39 0xA5 0x04            #; ADI Recommended Write
sleep 0.1
i2cset -f -y 1 0x39 0xAB 0x40            #; ADI Recommended Write
sleep 0.1
i2cset -f -y 1 0x39 0xAF 0x16            #; Set HDMI Mode
sleep 0.1
i2cset -f -y 1 0x39 0xBA 0x60            #; No clock delay
sleep 0.1
i2cset -f -y 1 0x39 0xD1 0xFF            #; ADI Recommended Write
sleep 0.1
i2cset -f -y 1 0x39 0xDE 0xD8            #; ADI Recommended Write
sleep 0.1
i2cset -f -y 1 0x39 0xE4 0x60            #; VCO_Swing_Reference_Voltage
sleep 0.1
i2cset -f -y 1 0x39 0xFA 0x7D            #; Nbr of times to search for good phase

 

 

script_edid.sh

Spoiler 

#!/bin/bash

## EDID ##
# :ADV7611 EDID 8 bit only NO DSD or HBR Support:
i2cset -f -y 1 0x32 0x77 0x00    # ; Disable the Internal EDID
i2cset -f -y 1 0x36 0x00 0x00    # ;
i2cset -f -y 1 0x36 0x01 0xFF    # ;
i2cset -f -y 1 0x36 0x02 0xFF    # ;
i2cset -f -y 1 0x36 0x03 0xFF    # ;
i2cset -f -y 1 0x36 0x04 0xFF    # ;
i2cset -f -y 1 0x36 0x05 0xFF    # ;
i2cset -f -y 1 0x36 0x06 0xFF    # ;
i2cset -f -y 1 0x36 0x07 0x00    # ;
i2cset -f -y 1 0x36 0x08 0x06    # ;
i2cset -f -y 1 0x36 0x09 0x8F    # ;
i2cset -f -y 1 0x36 0x0A 0x07    # ;
i2cset -f -y 1 0x36 0x0B 0x11    # ;
i2cset -f -y 1 0x36 0x0C 0x01    # ;
i2cset -f -y 1 0x36 0x0D 0x00    # ;
i2cset -f -y 1 0x36 0x0E 0x00    # ;
i2cset -f -y 1 0x36 0x0F 0x00    # ;
i2cset -f -y 1 0x36 0x10 0x17    # ;
i2cset -f -y 1 0x36 0x11 0x11    # ;
i2cset -f -y 1 0x36 0x12 0x01    # ;
i2cset -f -y 1 0x36 0x13 0x03    # ;
i2cset -f -y 1 0x36 0x14 0x80    # ;
i2cset -f -y 1 0x36 0x15 0x0C    # ;
i2cset -f -y 1 0x36 0x16 0x09    # ;
i2cset -f -y 1 0x36 0x17 0x78    # ;
i2cset -f -y 1 0x36 0x18 0x0A    # ;
i2cset -f -y 1 0x36 0x19 0x1E    # ;
i2cset -f -y 1 0x36 0x1A 0xAC    # ;
i2cset -f -y 1 0x36 0x1B 0x98    # ;
i2cset -f -y 1 0x36 0x1C 0x59    # ;
i2cset -f -y 1 0x36 0x1D 0x56    # ;
i2cset -f -y 1 0x36 0x1E 0x85    # ;
i2cset -f -y 1 0x36 0x1F 0x28    # ;
i2cset -f -y 1 0x36 0x20 0x29    # ;
i2cset -f -y 1 0x36 0x21 0x52    # ;
i2cset -f -y 1 0x36 0x22 0x57    # ;
i2cset -f -y 1 0x36 0x23 0x00    # ;
i2cset -f -y 1 0x36 0x24 0x00    # ;
i2cset -f -y 1 0x36 0x25 0x00    # ;
i2cset -f -y 1 0x36 0x26 0x01    # ;
i2cset -f -y 1 0x36 0x27 0x01    # ;
i2cset -f -y 1 0x36 0x28 0x01    # ;
i2cset -f -y 1 0x36 0x29 0x01    # ;
i2cset -f -y 1 0x36 0x2A 0x01    # ;
i2cset -f -y 1 0x36 0x2B 0x01    # ;
i2cset -f -y 1 0x36 0x2C 0x01    # ;
i2cset -f -y 1 0x36 0x2D 0x01    # ;
i2cset -f -y 1 0x36 0x2E 0x01    # ;
i2cset -f -y 1 0x36 0x2F 0x01    # ;
i2cset -f -y 1 0x36 0x30 0x01    # ;
i2cset -f -y 1 0x36 0x31 0x01    # ;
i2cset -f -y 1 0x36 0x32 0x01    # ;
i2cset -f -y 1 0x36 0x33 0x01    # ;
i2cset -f -y 1 0x36 0x34 0x01    # ;
i2cset -f -y 1 0x36 0x35 0x01    # ;
i2cset -f -y 1 0x36 0x36 0x8C    # ;
i2cset -f -y 1 0x36 0x37 0x0A    # ;
i2cset -f -y 1 0x36 0x38 0xD0    # ;
i2cset -f -y 1 0x36 0x39 0x8A    # ;
i2cset -f -y 1 0x36 0x3A 0x20    # ;
i2cset -f -y 1 0x36 0x3B 0xE0    # ;
i2cset -f -y 1 0x36 0x3C 0x2D    # ;
i2cset -f -y 1 0x36 0x3D 0x10    # ;
i2cset -f -y 1 0x36 0x3E 0x10    # ;
i2cset -f -y 1 0x36 0x3F 0x3E    # ;
i2cset -f -y 1 0x36 0x40 0x96    # ;
i2cset -f -y 1 0x36 0x41 0x00    # ;
i2cset -f -y 1 0x36 0x42 0x81    # ;
i2cset -f -y 1 0x36 0x43 0x60    # ;
i2cset -f -y 1 0x36 0x44 0x00    # ;
i2cset -f -y 1 0x36 0x45 0x00    # ;
i2cset -f -y 1 0x36 0x46 0x00    # ;
i2cset -f -y 1 0x36 0x47 0x18    # ;
i2cset -f -y 1 0x36 0x48 0x01    # ;
i2cset -f -y 1 0x36 0x49 0x1D    # ;
i2cset -f -y 1 0x36 0x4A 0x80    # ;
i2cset -f -y 1 0x36 0x4B 0x18    # ;
i2cset -f -y 1 0x36 0x4C 0x71    # ;
i2cset -f -y 1 0x36 0x4D 0x1C    # ;
i2cset -f -y 1 0x36 0x4E 0x16    # ;
i2cset -f -y 1 0x36 0x4F 0x20    # ;
i2cset -f -y 1 0x36 0x50 0x58    # ;
i2cset -f -y 1 0x36 0x51 0x2C    # ;
i2cset -f -y 1 0x36 0x52 0x25    # ;
i2cset -f -y 1 0x36 0x53 0x00    # ;
i2cset -f -y 1 0x36 0x54 0x81    # ;
i2cset -f -y 1 0x36 0x55 0x49    # ;
i2cset -f -y 1 0x36 0x56 0x00    # ;
i2cset -f -y 1 0x36 0x57 0x00    # ;
i2cset -f -y 1 0x36 0x58 0x00    # ;
i2cset -f -y 1 0x36 0x59 0x9E    # ;
i2cset -f -y 1 0x36 0x5A 0x00    # ;
i2cset -f -y 1 0x36 0x5B 0x00    # ;
i2cset -f -y 1 0x36 0x5C 0x00    # ;
i2cset -f -y 1 0x36 0x5D 0xFC    # ;
i2cset -f -y 1 0x36 0x5E 0x00    # ;
i2cset -f -y 1 0x36 0x5F 0x56    # ;
i2cset -f -y 1 0x36 0x60 0x41    # ;
i2cset -f -y 1 0x36 0x61 0x2D    # ;
i2cset -f -y 1 0x36 0x62 0x31    # ;
i2cset -f -y 1 0x36 0x63 0x38    # ;
i2cset -f -y 1 0x36 0x64 0x30    # ;
i2cset -f -y 1 0x36 0x65 0x39    # ;
i2cset -f -y 1 0x36 0x66 0x41    # ;
i2cset -f -y 1 0x36 0x67 0x0A    # ;
i2cset -f -y 1 0x36 0x68 0x20    # ;
i2cset -f -y 1 0x36 0x69 0x20    # ;
i2cset -f -y 1 0x36 0x6A 0x20    # ;
i2cset -f -y 1 0x36 0x6B 0x20    # ;
i2cset -f -y 1 0x36 0x6C 0x00    # ;
i2cset -f -y 1 0x36 0x6D 0x00    # ;
i2cset -f -y 1 0x36 0x6E 0x00    # ;
i2cset -f -y 1 0x36 0x6F 0xFD    # ;
i2cset -f -y 1 0x36 0x70 0x00    # ;
i2cset -f -y 1 0x36 0x71 0x17    # ;
i2cset -f -y 1 0x36 0x72 0x3D    # ;
i2cset -f -y 1 0x36 0x73 0x0D    # ;
i2cset -f -y 1 0x36 0x74 0x2E    # ;
i2cset -f -y 1 0x36 0x75 0x11    # ;
i2cset -f -y 1 0x36 0x76 0x00    # ;
i2cset -f -y 1 0x36 0x77 0x0A    # ;
i2cset -f -y 1 0x36 0x78 0x20    # ;
i2cset -f -y 1 0x36 0x79 0x20    # ;
i2cset -f -y 1 0x36 0x7A 0x20    # ;
i2cset -f -y 1 0x36 0x7B 0x20    # ;
i2cset -f -y 1 0x36 0x7C 0x20    # ;
i2cset -f -y 1 0x36 0x7D 0x20    # ;
i2cset -f -y 1 0x36 0x7E 0x01    # ;
i2cset -f -y 1 0x36 0x7F 0x1C    # ;
i2cset -f -y 1 0x36 0x80 0x02    # ;
i2cset -f -y 1 0x36 0x81 0x03    # ;
i2cset -f -y 1 0x36 0x82 0x34    # ;
i2cset -f -y 1 0x36 0x83 0x71    # ;
i2cset -f -y 1 0x36 0x84 0x4D    # ;
i2cset -f -y 1 0x36 0x85 0x82    # ;
i2cset -f -y 1 0x36 0x86 0x05    # ;
i2cset -f -y 1 0x36 0x87 0x04    # ;
i2cset -f -y 1 0x36 0x88 0x01    # ;
i2cset -f -y 1 0x36 0x89 0x10    # ;
i2cset -f -y 1 0x36 0x8A 0x11    # ;
i2cset -f -y 1 0x36 0x8B 0x14    # ;
i2cset -f -y 1 0x36 0x8C 0x13    # ;
i2cset -f -y 1 0x36 0x8D 0x1F    # ;
i2cset -f -y 1 0x36 0x8E 0x06    # ;
i2cset -f -y 1 0x36 0x8F 0x15    # ;
i2cset -f -y 1 0x36 0x90 0x03    # ;
i2cset -f -y 1 0x36 0x91 0x12    # ;
i2cset -f -y 1 0x36 0x92 0x35    # ;
i2cset -f -y 1 0x36 0x93 0x0F    # ;
i2cset -f -y 1 0x36 0x94 0x7F    # ;
i2cset -f -y 1 0x36 0x95 0x07    # ;
i2cset -f -y 1 0x36 0x96 0x17    # ;
i2cset -f -y 1 0x36 0x97 0x1F    # ;
i2cset -f -y 1 0x36 0x98 0x38    # ;
i2cset -f -y 1 0x36 0x99 0x1F    # ;
i2cset -f -y 1 0x36 0x9A 0x07    # ;
i2cset -f -y 1 0x36 0x9B 0x30    # ;
i2cset -f -y 1 0x36 0x9C 0x2F    # ;
i2cset -f -y 1 0x36 0x9D 0x07    # ;
i2cset -f -y 1 0x36 0x9E 0x72    # ;
i2cset -f -y 1 0x36 0x9F 0x3F    # ;
i2cset -f -y 1 0x36 0xA0 0x7F    # ;
i2cset -f -y 1 0x36 0xA1 0x72    # ;
i2cset -f -y 1 0x36 0xA2 0x57    # ;
i2cset -f -y 1 0x36 0xA3 0x7F    # ;
i2cset -f -y 1 0x36 0xA4 0x00    # ;
i2cset -f -y 1 0x36 0xA5 0x37    # ;
i2cset -f -y 1 0x36 0xA6 0x7F    # ;
i2cset -f -y 1 0x36 0xA7 0x72    # ;
i2cset -f -y 1 0x36 0xA8 0x83    # ;
i2cset -f -y 1 0x36 0xA9 0x4F    # ;
i2cset -f -y 1 0x36 0xAA 0x00    # ;
i2cset -f -y 1 0x36 0xAB 0x00    # ;
i2cset -f -y 1 0x36 0xAC 0x67    # ;
i2cset -f -y 1 0x36 0xAD 0x03    # ;
i2cset -f -y 1 0x36 0xAE 0x0C    # ;
i2cset -f -y 1 0x36 0xAF 0x00    # ;
i2cset -f -y 1 0x36 0xB0 0x10    # ;
i2cset -f -y 1 0x36 0xB1 0x00    # ;
i2cset -f -y 1 0x36 0xB2 0x88    # ;
i2cset -f -y 1 0x36 0xB3 0x2D    # ;
i2cset -f -y 1 0x36 0xB4 0x00    # ;
i2cset -f -y 1 0x36 0xB5 0x00    # ;
i2cset -f -y 1 0x36 0xB6 0x00    # ;
i2cset -f -y 1 0x36 0xB7 0xFF    # ;
i2cset -f -y 1 0x36 0xB8 0x00    # ;
i2cset -f -y 1 0x36 0xB9 0x0A    # ;
i2cset -f -y 1 0x36 0xBA 0x20    # ;
i2cset -f -y 1 0x36 0xBB 0x20    # ;
i2cset -f -y 1 0x36 0xBC 0x20    # ;
i2cset -f -y 1 0x36 0xBD 0x20    # ;
i2cset -f -y 1 0x36 0xBE 0x20    # ;
i2cset -f -y 1 0x36 0xBF 0x20    # ;
i2cset -f -y 1 0x36 0xC0 0x20    # ;
i2cset -f -y 1 0x36 0xC1 0x20    # ;
i2cset -f -y 1 0x36 0xC2 0x20    # ;
i2cset -f -y 1 0x36 0xC3 0x20    # ;
i2cset -f -y 1 0x36 0xC4 0x20    # ;
i2cset -f -y 1 0x36 0xC5 0x20    # ;
i2cset -f -y 1 0x36 0xC6 0x00    # ;
i2cset -f -y 1 0x36 0xC7 0x00    # ;
i2cset -f -y 1 0x36 0xC8 0x00    # ;
i2cset -f -y 1 0x36 0xC9 0xFF    # ;
i2cset -f -y 1 0x36 0xCA 0x00    # ;
i2cset -f -y 1 0x36 0xCB 0x0A    # ;
i2cset -f -y 1 0x36 0xCC 0x20    # ;
i2cset -f -y 1 0x36 0xCD 0x20    # ;
i2cset -f -y 1 0x36 0xCE 0x20    # ;
i2cset -f -y 1 0x36 0xCF 0x20    # ;
i2cset -f -y 1 0x36 0xD0 0x20    # ;
i2cset -f -y 1 0x36 0xD1 0x20    # ;
i2cset -f -y 1 0x36 0xD2 0x20    # ;
i2cset -f -y 1 0x36 0xD3 0x20    # ;
i2cset -f -y 1 0x36 0xD4 0x20    # ;
i2cset -f -y 1 0x36 0xD5 0x20    # ;
i2cset -f -y 1 0x36 0xD6 0x20    # ;
i2cset -f -y 1 0x36 0xD7 0x20    # ;
i2cset -f -y 1 0x36 0xD8 0x00    # ;
i2cset -f -y 1 0x36 0xD9 0x00    # ;
i2cset -f -y 1 0x36 0xDA 0x00    # ;
i2cset -f -y 1 0x36 0xDB 0xFF    # ;
i2cset -f -y 1 0x36 0xDC 0x00    # ;
i2cset -f -y 1 0x36 0xDD 0x0A    # ;
i2cset -f -y 1 0x36 0xDE 0x20    # ;
i2cset -f -y 1 0x36 0xDF 0x20    # ;
i2cset -f -y 1 0x36 0xE0 0x20    # ;
i2cset -f -y 1 0x36 0xE1 0x20    # ;
i2cset -f -y 1 0x36 0xE2 0x20    # ;
i2cset -f -y 1 0x36 0xE3 0x20    # ;
i2cset -f -y 1 0x36 0xE4 0x20    # ;
i2cset -f -y 1 0x36 0xE5 0x20    # ;
i2cset -f -y 1 0x36 0xE6 0x20    # ;
i2cset -f -y 1 0x36 0xE7 0x20    # ;
i2cset -f -y 1 0x36 0xE8 0x20    # ;
i2cset -f -y 1 0x36 0xE9 0x20    # ;
i2cset -f -y 1 0x36 0xEA 0x00    # ;
i2cset -f -y 1 0x36 0xEB 0x00    # ;
i2cset -f -y 1 0x36 0xEC 0x00    # ;
i2cset -f -y 1 0x36 0xED 0x00    # ;
i2cset -f -y 1 0x36 0xEE 0x00    # ;
i2cset -f -y 1 0x36 0xEF 0x00    # ;
i2cset -f -y 1 0x36 0xF0 0x00    # ;
i2cset -f -y 1 0x36 0xF1 0x00    # ;
i2cset -f -y 1 0x36 0xF2 0x00    # ;
i2cset -f -y 1 0x36 0xF3 0x00    # ;
i2cset -f -y 1 0x36 0xF4 0x00    # ;
i2cset -f -y 1 0x36 0xF5 0x00    # ;
i2cset -f -y 1 0x36 0xF6 0x00    # ;
i2cset -f -y 1 0x36 0xF7 0x00    # ;
i2cset -f -y 1 0x36 0xF8 0x00    # ;
i2cset -f -y 1 0x36 0xF9 0x00    # ;
i2cset -f -y 1 0x36 0xFA 0x00    # ;
i2cset -f -y 1 0x36 0xFB 0x00    # ;
i2cset -f -y 1 0x36 0xFC 0x00    # ;
i2cset -f -y 1 0x36 0xFD 0x00    # ;
i2cset -f -y 1 0x36 0xFE 0x00    # ;
i2cset -f -y 1 0x36 0xFF 0xDA    # ;
i2cset -f -y 1 0x32 0x77 0x00    # ; Set the Most Significant Bit of the SPA location to 0
i2cset -f -y 1 0x32 0x52 0x20    # ; Set the SPA for port B.
i2cset -f -y 1 0x32 0x53 0x00    # ; Set the SPA for port B.
i2cset -f -y 1 0x32 0x70 0x9E    # ; Set the Least Significant Byte of the SPA location
i2cset -f -y 1 0x32 0x74 0x03    # ; Enable the Internal EDID for Ports

 

 

But the image is not available right now.
fswebcam -r 640x480 --jpeg 85 -D 1 web-cam-shot.jpg
I got a green img:

Spoiler

web-cam-shot.jpg.5c0623f283c8205007bb76345bccad2a.jpg

 

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petit_miner

petit_miner

Posted
Posted

The green color in an YUV image indicates that the incoming data is zero. I think you don't need to initialize the ADV7611, because the kernel does that for you.

As mentioned in the init script you initialize the ADV7611 for 24bit mode, but you have connected it in the 8bit mode. 

 

What happens if you just execute script_edid ? 

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yogggoy

yogggoy

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Quote

What happens if you just execute script_edid ? 

1 - run script_edid.sh

    laptop found HDMI dev

    fswebcam timeout error

2- run script_init.sh   

Spoiler 


root@orangepizeroplus2:/home/pi/dev_tree# ./script_edid.sh
root@orangepizeroplus2:/home/pi/dev_tree# fswebcam -r 640x480 --jpeg 85 -D 1 web-cam-shot.jpg
--- Opening /dev/video0...
Trying source module v4l2...
/dev/video0 opened.
No input was specified, using the first.
Delaying 1 seconds.
--- Capturing frame...
Timed out waiting for frame!
No frames captured.

root@orangepizeroplus2:/home/pi/dev_tree# ./script_init.sh
WARNING! This program can confuse your I2C bus, cause data loss and worse!
I will write to device file /dev/i2c-1, chip address 0x4c, data address
0xff, data 0x80, mode byte.
Continue? [Y/n]
Error: Write failed
Error: Write failed
Error: Write failed
...

root@orangepizeroplus2:/home/pi/dev_tree# fswebcam -r 640x480 --jpeg 85 -D 1 web-cam-shot.jpg
--- Opening /dev/video0...
Trying source module v4l2...
/dev/video0 opened.
No input was specified, using the first.
Delaying 1 seconds.
--- Capturing frame...
Captured frame in 0.00 seconds.
--- Processing captured image...
Setting output format to JPEG, quality 85
Writing JPEG image to 'web-cam-shot.jpg'.
root@orangepizeroplus2:/home/pi/dev_tree#

 

 

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petit_miner

petit_miner

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Thanks, my PC detects the HDMI input, but I'm stuck with this: 

# fswebcam -S 5 -d /dev/video0 -r 1280x1024 -p YUV420P test.jpg
--- Opening /dev/video0...
Trying source module v4l2...
/dev/video0 opened.
No input was specified, using the first.
[ 2323.030032] sun6i-csi 1cb4000.csi: Unsupported pixformat: 0x32315559 with mbus code: 0x2008!
Error starting stream.
VIDIOC_STREAMON: Broken pipe
Unable to use mmap. Using read instead.
Unable to use read.

I'm unable to set the correct pixelformat with media-ctl, or doesn't really know how to do it.

I'm using a newer kernel version, in which you have to set the pixelformat using media-ctl.

You can't capture anything, because the CSI controller is set to the wrong pixelformat and doesn't get checked by your kernel version (mine does).

 

 

 

 

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