Ok I will try that. The `Armbian_26.2.1_Rock-5b_noble_vendor_6.1.115_gnome_desktop.img` image is from February so this commit shouldn't be there but I will try without this commit anyway. I also try the Ubuntu rolling release from May 24 that should include this commit but the behavior is the same

Hm. Pure guess: https://github.com/armbian/build/commit/1bac6d977217039cae7193a1d6c19ae5b50c2c5f Try to build and boot an image with this reverted

It just stops after that. No Linux UART logs, nothing via HDMI. I'm flashing this image: Armbian_26.2.1_Rock-5b_noble_vendor_6.1.115_gnome_desktop.img

Does it simply stop after that line or is the output incomplete?

Hi. I did a wipe of the SPI flahs using the method found in this guide https://docs.radxa.com/en/rock5/rock5b/low-level-dev/install-os/rkdevtool_spi#erase-spi-flash While I can see that the TF-A version is newer I still hand int the same fashion: ``` DDR b8ce94f14b cym 25/09/26-15:48.05,fwver: v1.20 ch0 ttot10 ch1 ttot10 ch2 ttot10 ch3 ttot10 ch0 ttot18 LPDDR4X, 2112MHz channel[0] BW=16 Col=10 Bk=8 CS0 Row=17 CS=1 Die BW=16 Size=2048MB ch1 ttot18 channel[1] BW=16 Col=10 Bk=8 CS0 Row=17 CS=1 Die BW=16 Size=2048MB ch2 ttot16 channel[2] BW=16 Col=10 Bk=8 CS0 Row=17 CS=1 Die BW=16 Size=2048MB ch3 ttot18 channel[3] BW=16 Col=10 Bk=8 CS0 Row=17 CS=1 Die BW=16 Size=2048MB Manufacturer ID:0xff DQS rds:l0,h1 CH0 RX Vref:27.5%, TX Vref:21.8%,0.0% DQ rds:l0 h1 h1 h1 h4 h1 h3 h1, h1 h6 h4 h3 h4 h4 h7 h2 DQS rds:l0,h3 CH1 RX Vref:27.5%, TX Vref:20.8%,0.0% DQ rds:h1 h6 h1 h3 h3 h4 h3 h4, h5 h1 h4 h6 h5 h7 h1 h2 DQS rds:h1,h1 CH2 RX Vref:28.5%, TX Vref:20.8%,0.0% DQ rds:l0 h4 h2 l0 h6 h5 h4 h2, h3 h3 h2 h4 h5 h5 h7 h6 DQS rds:h1,h1 CH3 RX Vref:28.9%, TX Vref:21.8%,0.0% DQ rds:h2 h7 h7 h2 h6 h2 h7 h1, h5 l0 h5 l0 h1 h5 h1 h1 stride=0x2, ddr_config=0x0 hash ch_mask0-1 0x20 0x40, bank_mask0-3 0xa00 0x1400 0x2800 0x0, rank_mask0 0x0 change to F1: 528MHz ch0 ttot10 ch1 ttot10 ch2 ttot10 ch3 ttot10 change to F2: 1068MHz ch0 ttot14 ch1 ttot12 ch2 ttot12 ch3 ttot14 change to F3: 1560MHz ch0 ttot16 ch1 ttot16 ch2 ttot14 ch3 ttot16 change to F0: 2112MHz ch0 ttot18 ch1 ttot18 ch2 ttot18 ch3 ttot18 out INFO: Preloader serial: 2 NOTICE: BL31: v2.3():v2.3-942-g98eaeb2f3:derrick.huang, fwver: v1.53 NOTICE: BL31: Built : 12:10:56, Aug 25 2025 INFO: spec: 0x1 INFO: code: 0x88 INFO: customer demand: 0x0 INFO: ext 32k is not valid INFO: ddr: stride-en 4CH INFO: GICv3 without legacy support detected. INFO: ARM GICv3 driver initialized in EL3 INFO: valid_cpu_msk=0xff bcore0_rst = 0x0, bcore1_rst = 0x0 INFO: l3 cache partition cfg-0 INFO: system boots from cpu-hwid-0 INFO: disable memory repair INFO: idle_st=0x21fff, pd_st=0x11fff9, repair_st=0xfff70001 INFO: dfs DDR fsp_params[0].freq_mhz= 2112MHz INFO: dfs DDR fsp_params[1].freq_mhz= 528MHz INFO: dfs DDR fsp_params[2].freq_mhz= 1068MHz INFO: dfs DDR fsp_params[3].freq_mhz= 1560MHz INFO: BL31: Initialising Exception Handling Framework INFO: BL31: Initializing runtime services WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK ERROR: Error initializing runtime service opteed_fast INFO: BL31: Preparing for EL3 exit to normal world INFO: Entry point address = 0x200000 INFO: SPSR = 0x3c9 ```