Nick A

I was looking at the v4l2 patches for chromium. I think we can apply this to cedrus. First, we apply these two patches. https://github.com/armbian/build/blob/f55a87d469b0634f72bc857f773a52a466f66292/patch/kernel/archive/rockchip64-6.6/media-0001-dma-mapping-let-dma_alloc_noncontiguous-allow-DMA_AT.patch https://github.com/armbian/build/blob/f55a87d469b0634f72bc857f773a52a466f66292/patch/kernel/archive/rockchip64-6.6/media-0002-Enable-non-coherent-dst-bufs-for-Hantro-V4L2-driver.patch For the last patch we replace it with our own by editing /drivers/staging/media/sunxi/cedrus/cedrus_video.c and adding "dst_vq->allow_cache_hints = 1;". You will see it at the very bottom of the cedrus_video.c file. https://github.com/armbian/build/blob/f55a87d469b0634f72bc857f773a52a466f66292/patch/kernel/archive/rockchip64-6.6/media-0003-Enable-non-coherent-dst-bufs-for-Rkvdec-V4L2-driver.patch From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: amazingfate <liujianfeng1994@gmail.com> Date: Fri, 3 Nov 2023 18:07:24 +0800 Subject: Enable non-coherent dst bufs for Rkvdec V4L2 driver --- drivers/staging/media/rkvdec/rkvdec.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c index 84a41792cb4b..b35f7e1b8a20 100644 --- a/drivers/staging/media/rkvdec/rkvdec.c +++ b/drivers/staging/media/rkvdec/rkvdec.c @@ -755,6 +755,7 @@ static int rkvdec_queue_init(void *priv, dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; dst_vq->lock = &rkvdec->vdev_lock; dst_vq->dev = rkvdec->v4l2_dev.dev; + dst_vq->allow_cache_hints = 1; return vb2_queue_init(dst_vq); } -- Armbian https://github.com/torvalds/linux/blob/master/drivers/staging/media/sunxi/cedrus/cedrus_video.c dst_vq->dev = ctx->dev->dev; dst_vq->allow_cache_hints = 1; return vb2_queue_init(dst_vq); } https://github.com/armbian/build/pull/5883 Then we have to create our own udev rules. SUBSYSTEM=="video4linux", ATTR{name}=="rockchip,rk3568-vpu-dec", SYMLINK+="video-dec%n" SUBSYSTEM=="media", ATTR{model}=="hantro-vpu", SYMLINK+="media-dec%n" This is from H6 dtsi... I think we need to add this to the h616 dtsi to get the hantro-vpu module to load. https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi video-codec-g2@1c00000 { compatible = "allwinner,sun50i-h6-vpu-g2"; reg = <0x01c00000 0x1000>; interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_VP9>, <&ccu CLK_VP9>; clock-names = "bus", "mod"; resets = <&ccu RST_BUS_VP9>; iommus = <&iommu 5>; }; if you see something like this in your dmesg then we are on right track. https://forum.banana-pi.org/t/bpi-r2-pro-ubuntu-vpu-support-decode-and-encode/13776/16 We might need to use ubuntu's version of chromium? Not sure if the debian version is patched for v4l2. https://github.com/saiarcot895/chromium-ubuntu-build/issues/65

Yes, you need it.

Javad, Have you patched your u-boot? You need these three patch files. https://github.com/NickAlilovhttps://github.com/NickAlilovic/build/blob/v20241125/patch/u-boot/u-boot-sunxi/106-Add-int-phy-eth-H313-h616-with-AC300.patch https://github.com/NickAlilovic/build/blob/v20241125/patch/u-boot/u-boot-sunxi/106-Add-int-phy-eth-H313-h616-with-AC300.patch https://github.com/NickAlilovic/build/blob/v20241125/patch/u-boot/u-boot-sunxi/dts-Transpeed-8K618-T-Enable-Ethernet.patch For your custom Kernel you need https://github.com/NickAlilovic/build/blob/v20241125/patch/kernel/archive/sunxi-6.10/patches.armbian/arm64-dts-allwinner-h618-add-Transpeed-8K618-T-support.patch The last two patches adds this to your u-boot and kernel DTS. aliases { ethernet0 = &emac1; ethernet1 = &sdio_wifi; serial0 = &uart0; }; &emac1 { pinctrl-names = "default"; pinctrl-0 = <&rmii_pins>; phy-mode = "rmii"; phy-handle = <&rmii_phy>; phy-supply = <&reg_aldo1>; allwinner,rx-delay-ps = <3100>; allwinner,tx-delay-ps = <700>; status = "okay"; }; &mdio1 { rmii_phy: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0>; }; }; You already have the EPHY 200 patched in your kernel. You have to edit your kernel config to enable it. # # MII PHY device drivers # CONFIG_AC200_PHY=m # # Multifunction device drivers # CONFIG_MFD_AC200=m # # PHY Subsystem # CONFIG_AC200_PHY_CTL=m

Reinaldo if you want to modify the android kernel visit the XDA forums. Android uses an old linux kernel with Board Support Package (BSP) provided by Allwinner. Armbian build uses the mainline linux kernel with patches. No support from Allwinner. Just a few hackers that reversed engineered and back port sources from the BSP kernel.

Remember you have a custom kernel. You need to block kernel updates with the armbian config tool.

@UnhealthyTweak that's the thing about these TVBoxs.. It's community supported. Unless someone has the same box as yours and releases the image. You might be waiting forever. I have a transpeed 8K618-T and even this box has more than one wifi/bluetooth chip. Usually it's a broadcom wifi chip and only needs firmware changes. Some boxes need a patch to include the firmware like broadcom 43342. Your box has a different wifi chip. https://github.com/LYU4662/t95zplus-h618-build/tree/master/userpatches/kernel/archive/sunxi-6.7 Try this image.. if it doesn't work it might be the GPIO # that's different. You would need to extract your gpio # from the orignal android DTS.

aw869a chip uses the aic8800 firmware. The drivers are old but have been ported to newer kernel. You can find patches here. https://github.com/LYU4662/t95zplus-h618-build/tree/master/userpatches/kernel/archive/sunxi-6.7 For internal storage not working, You need to extract your dts and find the correct gpio settings. USB2 probably needs to be enable in the DTS. IR not working. There are posts a few pages back that enables IR.

If you are just editing a dts there's a way to compile a new dtb and replace the one in your sdcard. https://stackoverflow.com/questions/21670967/how-to-compile-dts-linux-device-tree-source-files-to-dtb If you are editing more than a dts. You can compile the Armbian kernel with all the patches applied. Go into the cache folder and edit the kernel sources. Then compile the kernel manually. When done replace your kernel binary and modules in your SD card.

when i create my patches they are nothing like the ones that Nick provided me. (patches to add tanix-tx6s-axp313.dts to uboot and kernel) If you can post your patches... I can tell you where you went wrong. I use xfce desktop. To get line out working I have to manually switch it in the pulse audio settings menu. I don't use KERNEL_GIT=shallow option. Not sure if you are having issues using this option. I would avoid it for now. bluetooth and video acceleration is still a work in progress. For bluetooth try these instructions from afiftyp For video acceleration using v4l2 Video acceleration in chromium (It looks like we need to add "allow_cache_hints = 1;" to the pitfrost driver. Not sure what else needs changes.) https://github.com/armbian/build/pull/5883 https://github.com/armbian/build/commit/f55a87d469b0634f72bc857f773a52a466f66292 https://github.com/amazingfate/chromium-libv4l2-patches https://github.com/saiarcot895/chromium-ubuntu-build/issues/65 I haven't had time to test these patches.

It's there. You just need to remove the "+". I used this shell script command. Editing it by hand would take forever. This removes the first character on each line. sed 's/^.\{1\}//' 152-add-tanix-tx6s-defconfig.patch > output.patch /dts/upstream/src/arm64/allwinner/sun50i-h616-tanix-tx6s.dts // SPDX-License-Identifier: (GPL-2.0+ or MIT) /* * Copyright (C) 2021 Arm Ltd. */ /dts-v1/; #include "sun50i-h616.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/leds/common.h> / { model = "Tanix TX6s"; compatible = "tanix,tx6s", "allwinner,sun50i-h616"; aliases { mmc0 = &mmc0; mmc1 = &mmc1; mmc2 = &mmc2; ethernet0 = &emac1; serial0 = &uart0; }; chosen { stdout-path = "serial0:115200n8"; }; reg_vcc5v: vcc5v { /* board wide 5V supply directly from the DC input */ compatible = "regulator-fixed"; regulator-name = "vcc-5v"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-always-on; }; }; &ehci0 { status = "okay"; }; &ehci2 { status = "okay"; }; &ir { status = "okay"; }; &emac1 { pinctrl-names = "default"; pinctrl-0 = <&rmii_pins>; phy-mode = "rmii"; phy-handle = <&rmii_phy>; phy-supply = <&reg_aldo1>; allwinner,rx-delay-ps = <3100>; allwinner,tx-delay-ps = <700>; status = "okay"; }; &mdio1 { rmii_phy: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <1>; }; }; &r_i2c { status = "okay"; axp305_1: pmic@36 { compatible = "x-powers,axp305", "x-powers,axp805", "x-powers,axp806"; reg = <0x36>; /* dummy interrupt to appease the driver for now */ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <1>; }; }; &mmc0 { vmmc-supply = <&reg_dcdce>; //cd-gpios = <&pio 8 16 GPIO_ACTIVE_LOW>; /* PI16 */ broken-cd; bus-width = <4>; status = "okay"; }; &mmc1 { vmmc-supply = <&reg_dcdce>; broken-cd; bus-width = <4>; status = "okay"; }; &mmc2 { vmmc-supply = <&reg_dcdce>; bus-width = <8>; non-removable; cap-mmc-hw-reset; status = "okay"; }; &ohci0 { status = "okay"; }; &ohci2 { status = "okay"; }; &r_rsb { status = "okay"; axp305: pmic@745 { compatible = "x-powers,axp305", "x-powers,axp805", "x-powers,axp806"; interrupt-controller; #interrupt-cells = <1>; reg = <0x745>; x-powers,self-working-mode; vina-supply = <&reg_vcc5v>; vinb-supply = <&reg_vcc5v>; vinc-supply = <&reg_vcc5v>; vind-supply = <&reg_vcc5v>; vine-supply = <&reg_vcc5v>; aldoin-supply = <&reg_vcc5v>; bldoin-supply = <&reg_vcc5v>; cldoin-supply = <&reg_vcc5v>; regulators { reg_aldo1: aldo1 { regulator-always-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-name = "vcc-sys"; }; reg_aldo2: aldo2 { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-name = "vcc3v3-ext"; status = "disabled"; }; reg_aldo3: aldo3 { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-name = "vcc3v3-ext2"; status = "disabled"; }; reg_bldo1: bldo1 { regulator-always-on; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-name = "vcc1v8"; }; reg_bldo2: bldo2 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-name = "vcc1v8-2"; status = "disabled"; }; bldo3 { /* unused */ }; bldo4 { /* unused */ }; cldo1 { regulator-min-microvolt = <2500000>; regulator-max-microvolt = <2500000>; regulator-name = "vcc2v5"; }; cldo2 { /* unused */ }; cldo3 { /* unused */ }; reg_dcdca: dcdca { regulator-always-on; regulator-min-microvolt = <810000>; regulator-max-microvolt = <1080000>; regulator-name = "vdd-cpu"; }; reg_dcdcc: dcdcc { regulator-always-on; regulator-min-microvolt = <810000>; regulator-max-microvolt = <1080000>; regulator-name = "vdd-gpu-sys"; }; reg_dcdcd: dcdcd { regulator-always-on; regulator-min-microvolt = <1360000>; regulator-max-microvolt = <1360000>; regulator-name = "vdd-dram"; }; reg_dcdce: dcdce { regulator-boot-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-name = "vcc-eth-mmc"; }; sw { /* unused */ }; }; }; }; &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_ph_pins>; status = "okay"; }; &usbotg { dr_mode = "host"; /* USB A type receptable */ status = "okay"; }; &usbphy { status = "okay"; }; /configs/tanix_tx6s_defconfig CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun50i-h616-tanix-tx6s" CONFIG_SPL=y CONFIG_SUNXI_DRAM_H616_DDR3_1333=y CONFIG_DRAM_CLK=648 CONFIG_DRAM_ODT_EN=y CONFIG_DRAM_SUN50I_H616_UNKNOWN_FEATURE=y CONFIG_DRAM_SUN50I_H616_BIT_DELAY_COMPENSATION=y CONFIG_DRAM_SUN50I_H616_READ_CALIBRATION=y CONFIG_DRAM_SUN50I_H616_DX_ODT=0x03030303 CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e CONFIG_DRAM_SUN50I_H616_CA_DRI=0x00001c12 CONFIG_DRAM_SUN50I_H616_ODT_EN=0x00000001 CONFIG_DRAM_SUN50I_H616_TPR0=0xc0000c05 CONFIG_DRAM_SUN50I_H616_TPR2=0x00000000 CONFIG_DRAM_SUN50I_H616_TPR10=0x2f0007 CONFIG_DRAM_SUN50I_H616_TPR11=0xffffdddd CONFIG_DRAM_SUN50I_H616_TPR12=0xfedf7557 CONFIG_MACH_SUN50I_H616=y CONFIG_R_I2C_ENABLE=y CONFIG_SPL_I2C=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=100000 CONFIG_PHY_REALTEK=y CONFIG_SUN8I_EMAC=y CONFIG_I2C3_ENABLE=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x40 CONFIG_MMC_SUNXI_SLOT_EXTRA=2

Try this MiniArch image.. if it boots then you can copy over the dts from MiniArch to Armbian. https://github.com/warpme/miniarch/releases/download/v20241118/MiniArch-20240715-6.12.0-board-h616.tanix_tx6s-SD-Image.img.xz U-boot: https://github.com/warpme/minimyth2/blob/master/script/bootloaders/u-boot-h616/files/152-add-tanix-tx6s-defconfig.patch https://github.com/warpme/minimyth2/blob/master/script/bootloaders/u-boot-h616/files/157-add-tanix_tx6s_kingston_lpddr3_defconfig.patch Kernel: https://github.com/warpme/minimyth2/blob/master/script/kernel/linux-6.11/files/0645-arm64-dts-allwinner-h616-add-Tanix-TX6s-TVbox.patch

There's a fix for the thermal sensor error. I'll add this to 6.10 kernel. [ 23.775976] platform 5070400.thermal-sensor: deferred probe pending: platform: wait for supplier https://github.com/armbian/build/blob/9e6ef2c3d560ee48edd3a5a47fce070277c2a5d2/patch/kernel/archive/sunxi-6.11/Fix-broken-allwinner-sram-dependency-on-h616-h618.patch You can find the latest 6.10 kernel release with thermal fixes here https://github.com/NickAlilovic/build/releases/tag/20241125

What you are referring as "android" dts is nothing more than a device tree wrote for a very old Linux kernel (probably 3.10 or 3.14). As long as things change during time, so the device tree specifications become more standardized and well-defined. Device trees for old kernels (3.10 is very old nowadyas) are very messy and generally harder to read and understand.

If someone has the time maybe we can enable v4l2 support in chromium like the rockchip has.. https://github.com/armbian/build/pull/5883 https://github.com/armbian/build/commit/f55a87d469b0634f72bc857f773a52a466f66292 https://github.com/amazingfate/chromium-libv4l2-patches https://github.com/saiarcot895/chromium-ubuntu-build/issues/65

That's more android related. You would have to ask the XDA forums. You could make a backup using Armbian. But you would need to boot Armbian first. Do you have the correct drivers install on windows for your CH340? Putty should be set to 115200 baud rate. To check if your UART is working try booting into android first. You should see the android u-boot messages. Then try the non secure boot armbian images.

Your box is looking for the brcmfmac4334-sdio firmware. /lib/firmware/brcm/brcmfmac4334-sdio.transpeed,8k618-t.bin /lib/firmware/brcm/brcmfmac4334-sdio.txt Armbian already has the firmware for it. You need to rename these files. cp brcmfmac4334-sdio.bin brcmfmac4334-sdio.transpeed,8k618-t.bin cp brcmfmac4334-sdio.rockchip,rk3318-box.txt brcmfmac4334-sdio.txt [ 7.570071] sunxi-ir 7040000.ir: initialized sunXi IR driver [ 7.641713] brcmfmac: brcmf_fw_alloc_request: using brcm/brcmfmac4334-sdio for chip BCM4334/3 [ 7.644004] brcmfmac mmc0:0001:1: Direct firmware load for brcm/brcmfmac4334-sdio.transpeed,8k618-t.bin failed with error -2

Your TX0 and RX0 wires need to be crossed over. TX0 red connects to RX0 and RX0 white connects to TX0.

I haven't tried this.. but maybe this extension will work for you. ytdl server Chrome extension and Firefox add-on that adds context menu option to play youtube videos with mpv (or other external player). https://github.com/agiz/youtube-mpv?tab=readme-ov-file

Your box probably has secure boot enabled... Give this image a try. Let me know if you get any output from the UART. https://github.com/NickAlilovic/build/releases/download/v20240716/Armbian-20240716-unofficial_24.5.0-trunk_Transpeed-8k618-t_bookworm_edge_6.7.12_xfce_desktop_Secure_Boot.img.tar.xz

Try this miniarch image. If it boots then you can port over the files needed to boot armbian. https://github.com/warpme/miniarch https://github.com/warpme/miniarch/releases/download/v20240916/MiniArch-20240715-6.10.10-board-h616.tanix_tx6s_axp313-SD-Image.img.xz You should also install a serial console to you UART port. You can see the UART pins (GND, TX0, RX0) top left corner of second picture. https://linux-sunxi.org/UART

I have been looking at the code and there's been a lot of changes between H3/H5 and H616/H618 SOC's. H616/H618 now has a TVE_TOP register. H616/H618 uses the first DAC and moved the DAC MAP to TVE_TOP. https://linux-sunxi.org/images/2/24/H616_User_Manual_V1.0_cleaned.pdf Module Name Base Address TVE_TOP 0x06520000 TVE 0x06524000 Register Name Offset Description TVE_DAC_MAP 0x0020 TV Encoder DAC MAP Register TVE_DAC_STATUS 0x0024 TV Encoder DAC STAUTS Register TVE_DAC_CFG0 0x0028 TV Encoder DAC CFG0 Register TVE_DAC_CFG1 0x002C TV Encoder DAC CFG1 Register TVE_DAC_CFG2 0x0030 TV Encoder DAC CFG2 Register TVE_DAC_CFG3 0x0034 TV Encoder DAC CFG2 Register TVE_DAC_TEST 0x00F0 TV Encoder DAC TEST Register H3/H5 TV Encoder Enable Register use to handle the DAC mapping. If you look at the two pdf's you can see the changes. https://linux-sunxi.org/images/1/1e/Allwinner_A10_User_manual_V1.5.pdf Module Name Base Address TVE 0x01C0A000 Register Name Offset Description TVE_000_REG 0x0000 TV Encoder Enable Register We need to modify the kernel TVE driver. https://github.com/torvalds/linux/blob/master/drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_TOP_DAC_MAP 0x020 #define SUN4I_TVE_TOP_EN_DAC_MAP_MASK GENMASK(6, 4) #define SUN4I_TVE_TOP_EN_DAC_MAP(dac, out) (((out) & 0xf) << (dac + 1) * 4) #define SUN4I_TVE_TOP_DAC_TEST 0x0F0 if (tv->quirks->hastvtop) { /* Enable and map the DAC to the output */ regmap_update_bits(tv->top_regs, SUN4I_TVE_TOP_DAC_MAP, SUN4I_TVE_TOP_EN_DAC_MAP_MASK, SUN4I_TVE_TOP_EN_DAC_MAP(0, 1) | SUN4I_TVE_TOP_EN_DAC_MAP(1, 2) | SUN4I_TVE_TOP_EN_DAC_MAP(2, 3) | SUN4I_TVE_TOP_EN_DAC_MAP(3, 4)); } else { /* Enable and map the DAC to the output */ regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG, SUN4I_TVE_EN_DAC_MAP_MASK, SUN4I_TVE_EN_DAC_MAP(0, 1) | SUN4I_TVE_EN_DAC_MAP(1, 2) | SUN4I_TVE_EN_DAC_MAP(2, 3) | SUN4I_TVE_EN_DAC_MAP(3, 4)); } I still need to modify this part... /* Configure the DAC for a composite output */ regmap_write(tv->regs, SUN4I_TVE_DAC0_REG, SUN4I_TVE_DAC0_DAC_EN(0) | (tv_mode->dac3_en ? SUN4I_TVE_DAC0_DAC_EN(3) : 0) | SUN4I_TVE_DAC0_INTERNAL_DAC_37_5_OHMS | SUN4I_TVE_DAC0_CHROMA_0_75 | SUN4I_TVE_DAC0_LUMA_0_4 | SUN4I_TVE_DAC0_CLOCK_INVERT | (tv_mode->dac_bit25_en ? BIT(25) : 0) | BIT(30)); To access the TVE_TOP DAC MAP Register we need to first enable the TVE_TOP clocks. (in function sun4i_tv_bind()) static const struct regmap_config sun4i_tv_top_regmap_config = { .reg_bits = 32, .val_bits = 32, .reg_stride = 4, .max_register = SUN4I_TVE_TOP_DAC_TEST, .name = "tv-top", }; /* tve top */ if (tv->quirks->hastvtop) { top_regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(top_regs)) { dev_err(dev, "Couldn't map the TV TOP registers\n"); return PTR_ERR(top_regs); } tv->top_regs = devm_regmap_init_mmio(dev, top_regs, &sun4i_tv_top_regmap_config); if (IS_ERR(tv->top_regs)) { dev_err(dev, "Couldn't create the TV TOP regmap\n"); return PTR_ERR(tv->top_regs); } tv->top_reset = devm_reset_control_get(dev, "rst_bus_tve_top"); if (IS_ERR(tv->top_reset)) { dev_err(dev, "Couldn't get our reset line\n"); return PTR_ERR(tv->top_reset); } ret = reset_control_deassert(tv->top_reset); if (ret) { dev_err(dev, "Couldn't deassert our reset line\n"); return ret; } tv->top_clk = devm_clk_get(dev, "clk_bus_tve_top"); if (IS_ERR(tv->top_clk)) { dev_err(dev, "Couldn't get the TV TOP clock\n"); ret = PTR_ERR(tv->top_clk); goto err_assert_reset; } clk_prepare_enable(tv->top_clk); } This is from the H616 user manual. Figure 7- 10. DAC Calibration 10-bit calibration value is burned into efuse. Every time software can read the 10-bit calibration value from efuse, to control BIAS current and BIAS current switch, then a specific BIAS current is generated to calibrate maximum output voltage of DAC. We need to extract the DAC calibration value (tvout 32) from SID. https://linux-sunxi.org/SID_Register_Guide hexdump -C /sys/bus/nvmem/devices/sunxi-sid0/nvmem H6 Name Offset Size Description CHIPID 0x00 128 bit Chip-ID, also known as SID BROM_CONFIG 0x10 32 bit unknown, "16 bits config, 16 bits try" THERMAL_SENSOR 0x14 64 bit Thermal sensor calibration data TF_ZONE 0x1c 128 bit unknown, probably reserved for Trusted Firmware OEM_PROGRAM 0x2c 160 bit unknown, "emac 16 + tvout 32 + reserv 112" Add quirks for h616. Not sure if .unknown is needed?? static const struct sun4i_tv_quirks h616_quirks = { .calibration = 0x?????????????, .unknown = 1, .hastvtop = true, }; static const struct of_device_id sun4i_tv_of_table[] = { { .compatible = "allwinner,sun4i-a10-tv-encoder", .data = &a10_quirks }, { .compatible = "allwinner,sun8i-h3-tv-encoder", .data = &h3_quirks }, { .compatible = "allwinner,sun50i-h5-tv-encoder", .data = &h5_quirks }, { .compatible = "allwinner,sun50i-h616-tv-encoder", .data = &h616_quirks }, { /* sentinel */ }, }; The dtsi might look similar to this. Not sure if it's correct. I think we need to add <&ccu CLK_TVE> to tcon_tv0 clocks. tcon_tv0: lcd-controller@6515000 { compatible = "allwinner,sun50i-h6-tcon-tv", "allwinner,sun8i-r40-tcon-tv"; reg = <0x06515000 0x1000>; interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_TCON_TV0>, <&tcon_top CLK_TCON_TOP_TV0>; clock-names = "ahb", "tcon-ch1"; resets = <&ccu RST_BUS_TCON_TV0>; reset-names = "lcd"; ports { #address-cells = <1>; #size-cells = <0>; tcon_tv0_in: port@0 { reg = <0>; tcon_tv0_in_tcon_top_mixer0: endpoint@0 { reg = <0>; remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>; }; }; tcon_tv0_out: port@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; tcon_tv0_out_tve: endpoint@0 { reg = <0>; remote-endpoint = <&tve_in_tcon_tv0>; }; tcon_tv0_out_tcon_top: endpoint@1 { reg = <1>; remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>; }; }; }; }; tve: tv-encoder@6520000 { compatible = "allwinner,sun50i-h616-tv-encoder"; reg = <0x06520000 0x100>, <0x06524000 0x3fc>; clocks =<&ccu CLK_BUS_TVE_TOP>, <&ccu CLK_BUS_TVE0>; clock-names = "clk_bus_tve_top", "clk_bus_tve"; resets = <&ccu RST_BUS_TVE_TOP>, <&ccu RST_BUS_TVE0>; reset-names = "rst_bus_tve_top", "rst_bus_tve"; status = "disabled"; port { tve_in_tcon_tv0: endpoint { remote-endpoint = <&tcon_tv0_out_tve>; }; }; }; I haven't looked into the mixer1 part of the patch. Not sure if H616/H618 has one. I can't find the base address in the H616 user manual. BSP kernel code that might help us. https://github.com/AvaotaSBC/linux/tree/main/bsp/drivers/video/sunxi/disp2/tv https://github.com/AvaotaSBC/linux/tree/main/bsp/drivers/video/sunxi/disp2/disp/de

This patch is in all my builds. For orangepiezero3 I would use my main branch. I haven't test the other branches with zero3. If you are using my main branch, you can disable any patch by adding (-) infront of the patch list files series.armbian and series.conf located in https://github.com/NickAlilovic/build/tree/main/patch/kernel/archive/sunxi-6.7

This patch is a problem for ffmpeg7.1 v4l2_request miniarch 6.11 kernel "disable cedrus afbc as it not works wth ffmpeg7.1 v4l2_request" https://github.com/warpme/minimyth2/commit/c9743d01be4b20d44ae5bf8bf59e04e3a238598b#diff-8cd76cccf3166ac60fa54f50e375720ff39bbf2d3e9765ee3f787c94b81a3894R110 My Armbian build 6.10 kernel https://github.com/NickAlilovic/build/blob/v20241007/patch/kernel/archive/sunxi-6.10/patches.armbian/0551-media-cedrus-Implement-AFBC-YUV420-formats-for-H265.patch

You can change your edge kernel in config/sources/families/include/sunxi64_common.inc case $BRANCH in legacy) declare -g KERNEL_MAJOR_MINOR="6.1" # Major and minor versions of this kernel. declare -g KERNELBRANCH="tag:v6.1.104" ;; current) declare -g KERNEL_MAJOR_MINOR="6.6" # Major and minor versions of this kernel. declare -g KERNELBRANCH="tag:v6.6.44" ;; edge) declare -g KERNEL_MAJOR_MINOR="6.10" # Major and minor versions of this kernel. declare -g KERNELBRANCH="tag:v6.10.9" ;; esac

Thanks for the update afiftyp. I'll give it a try. I thought maybe the issue was with my dts settings. Bluetooth only works when I boot into android and enable bluetooth. Then reboot back to Armbian. I don't use bluetooth much so I haven't looked into it. This code is from orange pi zero 2. https://github.com/NickAlilovic/build/blob/74d622f5b071acae4b61904e15f3da2f055c2167/patch/kernel/archive/sunxi-6.1/patches.armbian/arm64-dts-h616-add-wifi-support-for-orange-pi-zero-2.patch#L43 wifi_pwrseq: wifi-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rtc 1>; + clock-names = "osc32k-out"; + reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */ + post-power-on-delay-ms = <200>; + }; My code is similar to orange pie. But I have a pinctrl-0 = <&x32clk_fanout_pin>; and no delay. https://github.com/NickAlilovic/build/blob/74d622f5b071acae4b61904e15f3da2f055c2167/patch/kernel/archive/sunxi-6.7/patches.armbian/arm64-dts-allwinner-h618-add-Transpeed-8K618-T-TV-box.patch#L121C1-L128C12 + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rtc CLK_OSC32K_FANOUT>; + clock-names = "ext_clock"; + pinctrl-0 = <&x32clk_fanout_pin>; + pinctrl-names = "default"; + reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */ + }; This part confuses me.. clock-names = "osc32k-out"; I think it should be clock-names = "ext_clock"; Only the Armbian patches use "osc32k-out" for wifi_pwrseq clock names. I guess you can name it whatever you like it will always use &rtc 1 or &rtc CLK_OSC32K_FANOUT. https://github.com/torvalds/linux/blob/8e929cb546ee42c9a61d24fae60605e9e3192354/include/dt-bindings/clock/sun6i-rtc.h https://github.com/torvalds/linux/blob/8e929cb546ee42c9a61d24fae60605e9e3192354/drivers/mmc/core/pwrseq_simple.c#L120C20-L120C50 pwrseq->ext_clk = devm_clk_get(dev, "ext_clock"); if (IS_ERR(pwrseq->ext_clk) && PTR_ERR(pwrseq->ext_clk) != -ENOENT) return dev_err_probe(dev, PTR_ERR(pwrseq->ext_clk), "external clock not ready\n"); However, I did find the clock name "osc32k-out" in the RTC portion of h6.dtsi. The h616.dtsi doesn't have any clock-output-names. rtc: rtc@7000000 { compatible = "allwinner,sun50i-h6-rtc"; reg = <0x07000000 0x400>; interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; clock-output-names = "osc32k", "osc32k-out", "iosc"; #clock-cells = <1>; }; Also here. https://github.com/torvalds/linux/blob/6485cf5ea253d40d507cd71253c9568c5470cd27/drivers/rtc/rtc-sun6i.c#L232 static void __init sun6i_rtc_clk_init(struct device_node *node, const struct sun6i_rtc_clk_data *data) { struct clk_hw_onecell_data *clk_data; struct sun6i_rtc_dev *rtc; struct clk_init_data init = { .ops = &sun6i_rtc_osc_ops, .name = "losc", }; const char *iosc_name = "rtc-int-osc"; const char *clkout_name = "osc32k-out"; const char *parents[2]; u32 reg; of_property_read_string_index(node, "clock-output-names", 1, &clkout_name); rtc->ext_losc = clk_register_gate(NULL, clkout_name, init.name, 0, rtc->base + SUN6I_LOSC_OUT_GATING, SUN6I_LOSC_OUT_GATING_EN_OFFSET, 0, &rtc->lock); Because the there's no "clock-output-names" in the h616.dtsi.. char *clkout_name = "osc32k-out"; does not change. Maybe you accidentally used the rtc-sun6i.c clock.