I've finally managed to fix my (rather old) M3 by building a new U-Boot V2024.01 and modifying BananapiM3-defconfig by:
CONFIG_AXP_DCDC2_VOLT=1000 # (VDD CPUA, was: 900)
CONFIG_AXP_DCDC3_VOLT=1000 # (VDD CPUB, was: 900)
CONFIG_AXP_DCDC5_VOLT=1400 # (VCC_DDRAM, was: 1200)
This increases the voltage for LPDDRAM by 200mV and CPU cores by 100mV each.
I'm now able to build C++ projects even with -j8, where BPiM3 crashed immediately before.
Also, armbianmonitor -z now works and shows its final statistics:
bert@bananapim3:~$ sudo armbianmonitor -z
[sudo] Passwort für bert:
Preparing benchmark. Be patient please...
7-Zip (a) [32] 16.02 : Copyright (c) 1999-2016 Igor Pavlov : 2016-05-21
p7zip Version 16.02 (locale=de_DE.UTF-8,Utf16=on,HugeFiles=on,32 bits,8 CPUs LE)
LE
CPU Freq: 21333333 64000000 - - - - - - 2048000000
RAM size: 2011 MB, # CPU hardware threads: 8
RAM usage: 1765 MB, # Benchmark threads: 8
Compressing | Decompressing
Dict Speed Usage R/U Rating | Speed Usage R/U Rating
KiB/s % MIPS MIPS | KiB/s % MIPS MIPS
22: 1926 773 242 1874 | 94698 791 1021 8077
23: 1753 756 236 1787 | 90053 789 988 7793
24: 1669 764 235 1795 | 85688 786 956 7521
25: 1587 770 235 1812 | 82218 792 923 7317
---------------------------------- | ------------------------------
Avr: 766 237 1817 | 790 972 7677
Tot: 778 605 4747
Monitoring output recorded while running the benchmark:
Two CPU clusters are available for monitoring
Time CPU_cl0/CPU_cl1 load %cpu %sys %usr %nice %io %irq C.St.
20:08:36 1728/1728 MHz 0.11 6% 2% 2% 0% 0% 0% 0/5
20:08:41 576/ 576 MHz 0.10 0% 0% 0% 0% 0% 0% 0/5
20:08:46 1728/ 576 MHz 0.09 1% 0% 0% 0% 0% 0% 0/5
20:08:56 1728/1728 MHz 0.95 83% 3% 79% 0% 0% 0% 0/5
20:09:02 1728/1728 MHz 1.60 98% 2% 95% 0% 0% 0% 0/5
20:09:07 1728/1728 MHz 2.88 97% 2% 95% 0% 0% 0% 0/5
20:09:13 1728/1728 MHz 3.53 98% 2% 96% 0% 0% 0% 0/5
20:09:26 1728/1728 MHz 3.89 98% 0% 97% 0% 0% 0% 0/5
20:09:31 1728/1728 MHz 4.60 90% 0% 90% 0% 0% 0% 0/5
20:09:37 1728/1728 MHz 5.03 91% 6% 85% 0% 0% 0% 0/5
20:09:44 1728/1728 MHz 5.94 98% 4% 94% 0% 0% 0% 0/5
20:09:49 1728/1728 MHz 6.35 98% 4% 94% 0% 0% 0% 0/5
20:10:02 1728/1728 MHz 6.48 96% 1% 95% 0% 0% 0% 0/5
20:10:11 1728/1728 MHz 6.96 82% 2% 80% 0% 0% 0% 0/5
Time CPU_cl0/CPU_cl1 load %cpu %sys %usr %nice %io %irq C.St.
20:10:17 1728/1728 MHz 7.20 92% 4% 87% 0% 0% 0% 0/5
20:10:28 1728/1728 MHz 7.48 99% 3% 95% 0% 0% 0% 0/5
20:10:35 1728/1728 MHz 7.94 99% 4% 95% 0% 0% 0% 0/5
20:10:43 1728/1728 MHz 8.26 99% 3% 95% 0% 0% 0% 0/5
20:10:48 1728/1728 MHz 8.32 97% 3% 93% 0% 0% 0% 0/5
20:11:01 1728/1728 MHz 8.29 96% 1% 94% 0% 0% 0% 0/5
20:11:09 1728/ 576 MHz 7.81 70% 0% 69% 0% 0% 0% 0/5
20:11:15 1728/1728 MHz 8.14 79% 7% 70% 0% 0% 0% 0/5
20:11:20 1728/1728 MHz 8.21 92% 4% 88% 0% 0% 0% 0/5
20:11:26 1728/1728 MHz 8.52 98% 4% 94% 0% 0% 0% 0/5
20:11:32 1728/1728 MHz 8.64 98% 4% 94% 0% 0% 0% 0/5
20:11:39 1728/1728 MHz 8.91 99% 3% 95% 0% 0% 0% 0/5
20:11:46 1728/1728 MHz 9.00 99% 3% 95% 0% 0% 0% 0/5
20:11:51 1728/1728 MHz 9.08 99% 3% 95% 0% 0% 0% 0/5
20:11:58 1728/1728 MHz 9.53 98% 3% 95% 0% 0% 0% 0/5
Time CPU_cl0/CPU_cl1 load %cpu %sys %usr %nice %io %irq C.St.
20:12:05 1728/1728 MHz 9.65 98% 3% 95% 0% 0% 0% 0/5
20:12:11 1728/1728 MHz 9.76 99% 3% 95% 0% 0% 0% 0/5
20:12:16 1728/1728 MHz 9.70 99% 3% 95% 0% 0% 0% 0/5
20:12:22 1728/1728 MHz 9.72 97% 3% 93% 0% 0% 0% 0/5
20:12:28 1728/1728 MHz 9.68 97% 3% 94% 0% 0% 0% 0/5
20:12:40 1728/1728 MHz 9.47 92% 4% 88% 0% 0% 0% 0/5
20:12:49 1728/1728 MHz 9.28 99% 0% 99% 0% 0% 0% 0/5
