Icenowy

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About Icenowy

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  1. Icenowy

    allwinner h6 ethernet internal error

    @martinayotte I remember in mainline Linuc I killed sun50i-h6-emac in driver, and it only exists as a fallback compatible string.
  2. @5kft H5 is troublesome on thermal sensor, because the raw value - temperature function is not a single line, but two segments of line. I don't know how is this dealed in sun4i-gpadc-iio.
  3. Read `process/submitting-patches.rst` in kernel source tree; and don't hesitate to try ;-)
  4. Yes, quite low -- BPi M2-Zero gets it just because I have that board. I just do not like to write patches for boards I don't own ;-)
  5. Icenowy

    Error building for orangepi lite2

    I'm not sure, my distro uses 4.19 and omitted 4.18.
  6. Icenowy

    Orange Pi Lite2 wireless support

    You can drop my branch now and use ARM-Software upstream, the power down function is already merged.
  7. Currently what I heard is that the extra USB2 port is on some NC pin.
  8. Mikey from Sinovoip showed me some photos on kernel logs that is said to be booting A40i with mainline U-Boot. (Of course this makes no difference as mainline U-Boot doesn't try to recognize the print on the chip ;-) )
  9. Icenowy

    OrangePi Lite2 USB3 working...

    There needs someone with this board to adapt it. Some device tree knowledges will be needed.
  10. Icenowy

    Trying to compile Pine H64

    Could you perform another trial, this times on the DRAM initialization code? Comment out all contents in `mctl_set_master_priority()` in u-boot/arch/arm/mach-sunxi/dram_sun50i_h6.c, or just comment out the call to the function. This will disable the QoS of the memory controller.
  11. Icenowy

    Trying to compile Pine H64

    Could you `devmem 0x03001510 w 0x03000002` before testing? (Although I cannot ensure whether this will help...)
  12. Icenowy

    Trying to compile Pine H64

    Surely OK! Do them appear on other SoCs w/ DWC3? Maybe I need to check the DRAM controller or bus clocking code?
  13. Icenowy

    Trying to compile Pine H64

    I suggest you check your board's speed bin. According to the source code, it's at the 0x1c offset of the SID, bit 5-7 (counted from LSB). 0b011 is best, 0b010 is middle (these use the lower voltage DVFS table, with 1800MHz @ 1100mV), 0b001 is worst (this uses the higer voltage table, 1800MHz @ 1160mV). Here's a FEL command to calculate the speed bin (on bash): ``` echo $((($(sunxi-fel readl 0x0300621c) >> 5) & 0x7)) ``` On my early Pine H64 model A sample and my early (current) model B sample (both with ID "H7309BA 6842" printed on the SoC) they're bin 1, and my later Pine H64 model A sample ("H6448BA 7782") it's bin 3.
  14. Icenowy

    Trying to compile Pine H64

    It seems that you attached a USB3 Ethernet on XHCI. Have you tested it?
  15. Icenowy

    Trying to compile Pine H64

    BTW (off topic of this post) the NS1068 quirk in kernel cmdline can be dropped now, as it's mainlined by me. NS1066 one should still be kept as I didn't get a quirky NS1066 (my NS1066 just doesn't announce UAS).