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cu6apum

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Everything posted by cu6apum

  1. Well. Hi. Now I'm getting deeper into this CPU, and would love to port Armbian onto it as carefully as possible. This is a neat tiny debian I really loved on rk3399. The above mentioned ubuntu boots and works ok, well, just before things get close to apt upgrade. The kernel (and whole boot machine) are put aside, on a separate fat partition, never even mounted, so the "natively" installed kernel and uboot are dummy and unaware of real ones. This WILL become a problem sooner or later; I was struggling through (really weird) Rockchip boot system, and defeated it only with help of Armbian, @Igor and a qualified Rockchip technician in this forum. So I'm definitely yours with Sunplus, too. It's the only 512M embedded DRAM system-in-a-chip that meets my needs, and I do see quite some perspectives for DIYers and profi with it - imagine 4core ARMv7 with half a gig, in TQFP (not BGA! even not QFN) package, that any baby can solder onto his PCB. Monster Arduino. Now. I'm trying to transplant what I have out of an official buildroot/yocto into Armbian, in order to have a full-featured properly upgradable and stable system. Is there any beginner guide for this? I got stuck on the very first step: the SIP does have both uboot (customized) and xboot; moreover, the images for heterogenous cores (arm5 and 8051) must be built, available for correct upgrade, and loadable before linux starts. Don't really want to glue a frankenstein out of a common build, despite can do so. Not a clean solution.
  2. I see no crime in the clock tree. What is the dai/codec combo (dts?) and what does it try to do? I never touched that M4 yet. Is the sound ok, or?.. Etc, etc.
  3. Thanks. Actually everything's been done by a kind genius, mr. Zhang from the very Rockchip. He is a very responsive and caring person! I had only to slightly touch the simple-card-utils.c so the driver sets the clock accordingly to the sample rate (there was only fixed multiplier available OOB). The docs, as I cited above, say nothing on whether clkin_i2s can be an input. Yes, it can, and even on the same pin. We don't even need to mod the code, everything's done in devicetree! We just have to declare this clock in the DTS, and (in my case) set it as gpio-mux-clock, not a fixed one. This was my insane idea, I didn't believe it could work, but it did. The whole clock tree of this CPU looks beautifully logical, one can do miracles with it, once he catches the idea. Finally we have a precious hi-end data source for a serious grade DAC. The difference from Sitara that I love is 6 cores, PCIE for m.2 SSD, MIPI for a nice display, and lots of nice peripheria. So, the DTS: + osc45m: osc45m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <45158400>; + }; + + osc49m: osc49m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <49152000>; + }; + clkin_i2s: clkin_i2s { - compatible = "fixed-clock"; + compatible = "gpio-mux-clock"; #clock-cells = <0>; - clock-frequency = <12288000>; clock-output-names = "clkin_i2s"; + clocks = <&osc45m>, <&osc49m>; + select-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; };
  4. Uhm well, all those clairvoyants are on vacation right now. Would you please cat /sys/kernel/debug/clk summary here?
  5. Solved. Msg me if interested (though I doubt anyone is... )
  6. Gigantic thanks to @iamdrq for immediate and comprehensive help - I'm finally alive with my display. The things I missed were: a) the patch from Tommy did not lay properly onto the 5.10.21, only 1 of 3 records were hit. I had to edit the file by hand after I realized that; it's pretty easy. b) the "compatible" clause must match the Thierry's code - obvious, hun? That was the easiest part. (The easiest to miss...) c) remove the bus-format = <0x100a> line: after that the kernel stops crashing! d) in my case the lcd-reset pin was stuck in LOW, despite it's declared pull-up in pinctrl. I had to change GPIO_ACTIVE_LOW to _HIGH in reset_gpios - an ambiguous thing left to examine: I was thinking that ACTIVE means "when acting", ie, during reset. Solved. Recommended for usage!
  7. Yes, I did, the "compatible" string was incompatible. Now - worse. The system catches the panel and crashes... Starting kernel ... [ 3.404406] rockchip-pcie f8000000.pcie: PCIe link training gen1 timeout! [ 3.995660] Unable to handle kernel paging request at virtual address 000000000000100a [ 3.996452] Mem abort info: [ 3.996724] ESR = 0x96000044 [ 3.997010] EC = 0x25: DABT (current EL), IL = 32 bits [ 3.997493] SET = 0, FnV = 0 [ 3.997783] EA = 0, S1PTW = 0 [ 3.998077] Data abort info: [ 3.998346] ISV = 0, ISS = 0x00000044 [ 3.998698] CM = 0, WnR = 1 [ 3.998979] user pgtable: 4k pages, 48-bit VAs, pgdp=0000000044ba4000 [ 3.999563] [000000000000100a] pgd=0000000000000000, p4d=0000000000000000 [ 4.000195] Internal error: Oops: 96000044 [#1] PREEMPT SMP [ 4.000702] Modules linked in: stmmac pcs_xpcs pwm_bl adc_keys [ 4.001268] CPU: 1 PID: 44 Comm: kworker/1:1 Not tainted 5.10.21+ #5 [ 4.001843] Hardware name: FriendlyElec NanoPC-T4 (DT) [ 4.002328] Workqueue: events deferred_probe_work_func [ 4.002807] pstate: 80000005 (Nzcv daif -PAN -UAO -TCO BTYPE=--) [ 4.003360] pc : drm_bus_flags_from_videomode+0x0/0x78 [ 4.003831] lr : of_get_drm_display_mode+0x94/0xd0 [ 4.004268] sp : ffff80001259b5e0 [ 4.004576] x29: ffff80001259b5e0 x28: ffff800010f88240 [ 4.005074] x27: ffff000079b2dc88 x26: 0000000000001000 [ 4.005569] x25: 0000000000000034 x24: ffff800011809000 [ 4.006062] x23: ffff00007fbdb628 x22: 000000000000100a [ 4.006555] x21: ffff000044b63500 x20: 0000000000000000 [ 4.007059] x19: ffff800011809000 x18: ffffffffffffffff [ 4.007581] x17: 0000000000000000 x16: 0000000000000000 [ 4.008077] x15: ffff800011809948 x14: ffff000044b63570 [ 4.008573] x13: ffff000044b63558 x12: 0000000000000038 [ 4.009067] x11: 0000000000000004 x10: 0000000005f5e0ff [ 4.009560] x9 : 00000000ffffffd8 x8 : 0000000000000500 [ 4.010054] x7 : 0000000000000000 x6 : ffffffffffffffff [ 4.010547] x5 : 0000000000000000 x4 : ffffffffffffffff [ 4.011039] x3 : ffff0a00ffffff04 x2 : 55b2922229ecb700 [ 4.011532] x1 : 000000000000100a x0 : ffff80001259b628 [ 4.012025] Call trace: [ 4.012265] drm_bus_flags_from_videomode+0x0/0x78 [ 4.012710] panel_simple_get_modes+0x64/0x140 [ 4.013122] drm_panel_get_modes+0x20/0x38 [ 4.013505] panel_bridge_connector_get_modes+0x14/0x20 [ 4.013986] drm_helper_probe_single_connector_modes+0x1d0/0x770 [ 4.014535] drm_client_modeset_probe+0x238/0x1078 [ 4.014978] __drm_fb_helper_initial_config_and_unlock+0x48/0x4c0 [ 4.015535] drm_fb_helper_initial_config+0x40/0x50 [ 4.015987] rockchip_drm_fbdev_init+0x5c/0x100 [ 4.016406] rockchip_drm_bind+0x17c/0x1d0 [ 4.016788] try_to_bring_up_master+0x274/0x2d0 [ 4.017206] __component_add+0xc8/0x190 [ 4.017563] component_add+0x10/0x18 [ 4.017899] dw_mipi_dsi_rockchip_host_attach+0x28/0xd8 [ 4.018379] dw_mipi_dsi_host_attach+0xcc/0x130 [ 4.018797] mipi_dsi_attach+0x24/0x38 [ 4.019146] panel_simple_dsi_probe+0x450/0x548 [ 4.019563] mipi_dsi_drv_probe+0x1c/0x28 [ 4.019936] really_probe+0x20c/0x518 [ 4.020277] driver_probe_device+0xec/0x158 [ 4.020664] __device_attach_driver+0xa4/0x118 [ 4.021077] bus_for_each_drv+0x70/0xc8 [ 4.021432] __device_attach+0xf0/0x178 [ 4.021789] device_initial_probe+0x10/0x18 [ 4.022175] bus_probe_device+0x94/0xa0 [ 4.022531] deferred_probe_work_func+0x80/0xd0 [ 4.022951] process_one_work+0x204/0x4d8 [ 4.023324] worker_thread+0x48/0x458 [ 4.023664] kthread+0x110/0x148 [ 4.023969] ret_from_fork+0x10/0x1c [ 4.024311] Code: b9002822 b9401802 17ffffe1 d503201f (b900003f) [ 4.024869] ---[ end trace 42c12b53ce8568e5 ]---
  8. Hi there! I'm trying to follow your experience, compiled your patch, but either with or without it, the mipi display does not appear anywhere. The dts is forked from the Firefly howto, and WAS working oob in rockchip 4.4. Now only backlight is on (which is good) and no sound of the panel (which is bad). The howto page is here: http://wiki.t-firefly.com/en/Firefly-RK3399/driver_lcd.html Maybe i forgot something essential in dts? Thank you.
  9. clkin_i2s A mysterious name found only twice in TRM, never in Datasheet, and once in clk-rk3399.c. Stuck. Good night.
  10. OK. i2s_8ch_mclk: i2s-8ch-mclk { rockchip,pins = <4 0 RK_FUNC_1 &pcfg_pull_none>; }; RK_FUNC_1 means 1, hence But how do i make it i2s_clk INPUT????
  11. Now. 1. /sys/kernel/debug/clk/clk_summary says: pll_gpll 1 1 800000000 0 0 gpll 26 34 800000000 0 0 clk_i2s1_div 1 1 22222223 0 0 clk_i2s1_mux 1 1 22222223 0 0 clk_i2s1 2 2 22222223 0 0 clk_i2sout_src 0 0 22222223 0 0 clk_i2sout 0 0 22222223 0 0 clk_i2s1_frac 0 0 627199 0 0 clk_i2s2_div 0 1 400000000 0 0 clk_i2s2_frac 0 1 11289600 0 0 clk_i2s2_mux 0 1 11289600 0 0 clk_i2s2 0 1 11289600 0 0 clk_i2s0_div 0 0 800000000 0 0 clk_i2s0_frac 0 0 40000000 0 0 clk_spdif_rec_dptx 0 1 200000000 0 0 2. According to the Datasheet, GPIO4_A0/I2S_CLK is the clock pin. Out of the box, I see it as Output, and the masterclock is being fed by the RK. I Need to make it input to "clkin_i2s". 3. No track of "clkin_i2s" found in pinctrl, nor in clk summary. Digging.
  12. Hi there. I have some audio project on different SOM/SOC boards, now my task is to bring an i2s DAC on RK3399. I use external high-quality clock for i2s and need to make the Rockchip the masterclock slave. This is the case where I find no tail to pull yet, due to VERY cumbersome device tree, poorly documented and poorly explored. For instance, the CPU datasheet says that I2S_MCLK is output only, whilst I could find the opposite in the TRM. Moreover, the clock tree explained there, says that I can use CLKIN_I2S not only for i2s interfaces, but for spdif also! (Also there is explained some "bitclock slave mode", it's even implemented in the DAI driver, but for my application it's barely usable because of jitter loops introduced by the FPGA.) Now the question is - HOW. I attach the screenshot of the TRM depicting the clock source selection. The clock id I meant above, is 65 here, IO_CLK. Need to find out how these registers are linked together in the DTB! The second question is related mainly to the driver, I will need a GPIO to switch between x44.1/x48 clock grids, but this looks more feasible than to dig the DTB stuff. Please assist! Thank you.
  13. Hiya! Thanks for pointing. Me is trying to make a youtube box out of a nanopc-T4 freed after some research I bought it for. I'm honestly shocked by the fact that firefox in Armbian 20.08.2 boils the CPU to whizzing fan and the fps in youtube is 10-15! The default ubuntu install from friendlyelec was running absolutely cool and smooth. I think that Armbian does not use any HW acceleration by default...
  14. Well, hi. I just can't get the very idea of something having QUIETLY stop working in a newer kernel. This is not an Armbian prob, no. And only hell knows where is it (btw, this is the fact I dislike VERY seriously about current linuces). Having reverted to 4.4 ubuntu let me solve this AT LEAST using some error output! Several thousand peeks and pokes, and we're in. Now I'm getting into another big battle: mainline drivers for KSZ9xxx ethernet switch I must control, are present only in 5.x - so will look to transplant them into 4.4.
  15. Thank everybody for MASSIVE support... Either 5.x kernels are not working with MIPI/DSI, or the DTB structure has changed so hard so I cannot get even a dmesg on whether or not the panel is detected at all. Managed to boot ubuntu with 4.4.179 (armbian REFUSED to boot whatever I do), decompiled the old successful DTB, modded the distro one (still no source files; there's only nonworking crap in source tree) and combined. After 2 more days I do have the panel alive.
  16. Still no backlight despite it shows "okay" in the devtree... Will short the BL pin temporarily to Vcc, will see... i suspect the dsi port is down. WHY???
  17. After spending another day I got the following. 1. DTB compiles now with no errors on the current system. Shall i post the source? 2. There's NO sound about mipi/dsi neither in the boot log, nor in dmesg. On the older system it's showing as initialized. 3. The backlight is OFF. No idea what's going on, BECAUSE 5. The panel and the mipi@ff960000 are PRESENT in /proc/devicetree with status OKAY!!! UPD. 6. dw_mipi_dsi module is loaded and used by rockchipdrm module. Still no display visible to X. Another night and some more strong tea.
  18. My working piece of code that I would love to make alive in 5.8:
  19. Hi there. More than a year ago i started a project on this CPU and mainly succeeded with Nanopc-T4 board, old Armbian (5.95/4.4.179) and a custom DTB. The hardware project included the SBC and a Chinese TFT dashboard-style display panel (thus - MIPI/DSI, as I could not find the same for LVDS). Mainly using the poke-and-peek method I collected the way to mod the DTS so the DSI port is active, and the display worked like a charm. Mostly I pasted the DSI part from OrangePi DTS. I must admit that that turned out to be pure luck. Because once I moved (after big pause) to the SOM and self-designed carrier board (identical in USB, SSD, MMC, video section to FriendlyElec's carrier PCB) the image refused to boot, so does it on original SOM-RK3399 dev board. Simply "Loading the kernel..." and then total death. The really silly decision was to purge the old install and roll on the most current image. (20.08.2/5.8.6). It does boot! However, the DTB differs so much from 4.4 so I literally have no idea HOW to insert the panel code to make it work! I tried to push the old DTB into the current uboot, and it says it cannot reserve memory for FDT (the old file is 160+KB size, the current ones are ~70KB, maybe this is the reason?) and even does not reach the kernel. The piece of panel-related code (copied from old OrangePi DTS) conflicts in the new structure with almost all phandles, some pincontrols, resets et al. I feel totally lost, as I can't catch the very tail of all that FDT mystique in order to unroll it in my mind. The first logic conflict is that ALL the main peripherals in the T4 and the SOM must be totally compatible, whilst they eventually are not - otherwise the old image HAS to boot cleanly on the SOM, etc etc. Please assist, I'd love not to bury this project.
  20. I will second this (albeit with another display). Have put a LOT of effort to make it work with 4.4.179 on a nanopc-T4 board, now I'm failing to pull it alive on rk3399-SOM breakout board. Getting crazy!!! Either the panel is dead, or the board hangs on boot. All I did before is put an init script for the panel in a pretty standard piece of DTS taken from orangepi folder. Now - overlays?! How do I?! Please please assist. How to convert previous format to the current. Can post the source. Thank you!
  21. Hey, maybe you'll help further. Any way I try mpv, I get Error when calling vdp_device_create_x11: 25. Noticed that I don't have /dev/cedar_dev despite CONFIG_VIDEO_SUNXI_CEDAR=y in the kernel (included in armbian image, 3.4.113-sun7i). I tried to create the device, sunxi_cedar_mod cedar_dev c243:0 in /lib/modules/modules.devname, and then I get Bus error with mpv. What am I doing wrong? libcedrus, libvdpau, libvdpau-sunxi built from sources, no errors. Thank you. EDIT: solved, sorry. Put sunxi_ve_mem_reserve in wrong place. Should be in boot.cmd. EDIT2: https://addons.mozilla.org/en-US/firefox/addon/watch-with-mpv/ :)
  22. Many thanks Igor. Youtube-dl looks like a downloader tho. Still can't get the idea of using crutches in a place they're not for. No way for a video overlay in a plugin? Theoretically? Or WIP?
  23. Hi back, newbie here. Got an old Cubietruck, trying to make a simple youtube player for kids out of it. Installed mali (triangle ok) and fbturbo (x11 logs fine, but can't start test! sunxi_disp_init() failed - ???) Started firefox and youtube - swaaamp, freezes every frame with 100% cpu load.... Read this topic shortly. Feel confused! If there's a dedicated h.264 (or whatever) player capable of using hw acceleration - why no youtube plugin for iceweasel???? Thanks in advance. And, hey, yes, what's wrong with fbturbo tests?
  24. cu6apum

    H3 SPI

    Hi there. Newbie here! Would anyone please point me on a place in the datasheet where the maximum SPI speed for H3 is indicated? Thank you.
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