5kft

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  1. Hi @JamesX, excellent - glad to hear this!
  2. Agreed - congratulations on an amazing effort! The scope of devices that Armbian supports and how well it all works is simply incredible
  3. Unfortunately I don't have a Zero Plus so I can't really speak to specifics regarding it, but if you are running the 4.19.y kernel then you shouldn't have to do anything in this regard - it should work properly by default...?
  4. Hi @sfx2000, the NEO2 v1.1 board provides a maximum core voltage of 1.3v, hence the default warnings about the higher operating points - they aren't supported.
  5. Hi @Igor, I just tested both I2C and SPI on the Plus2 H5 and both appear to work. Both tests were to devices connected to the pin header. The SPI test was using a 4MB SPI flash part, and the I2C test was just to detect an SH1106 OLED display connected to TWI0-SDA/SCK (display is configured at I2C address 0x3c): root@orangepizeroplus2:~/tmp# dd if=/dev/random of=test.dat bs=1024 count=4096 iflag=fullblock 4096+0 records in 4096+0 records out 4194304 bytes (4.2 MB, 4.0 MiB) copied, 8.29973 s, 505 kB/s root@orangepizeroplus2:~/tmp# root@orangepizeroplus2:~/tmp# flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=16000 -w test.dat flashrom v0.9.9-r1954 on Linux 4.19.4-sunxi64 (aarch64) flashrom is free software, get the source code at https://flashrom.org Calibrating delay loop... OK. Found Winbond flash chip "W25Q32.V" (4096 kB, SPI) on linux_spi. Reading old flash chip contents... done. Erasing and writing flash chip... Erase/write done. Verifying flash... VERIFIED. root@orangepizeroplus2:~/tmp# flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=16000 -r test2.dat flashrom v0.9.9-r1954 on Linux 4.19.4-sunxi64 (aarch64) flashrom is free software, get the source code at https://flashrom.org Calibrating delay loop... OK. Found Winbond flash chip "W25Q32.V" (4096 kB, SPI) on linux_spi. Reading flash... done. root@orangepizeroplus2:~/tmp# md5sum test*.dat 979776e45a0b9fd7caf154f4f1bbbbf4 test2.dat 979776e45a0b9fd7caf154f4f1bbbbf4 test.dat root@orangepizeroplus2:~/tmp# root@orangepizeroplus2:~/tmp# i2cdetect -y 0 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 30: -- -- -- -- -- -- -- -- -- -- -- -- 3c -- -- -- 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 70: -- -- -- -- -- -- -- -- root@orangepizeroplus2:~/tmp# root@orangepizeroplus2:~/tmp# cat /boot/armbianEnv.txt verbosity=1 console=both overlay_prefix=sun50i-h5 overlays=usbhost2 usbhost3 spi-spidev i2c0 param_spidev_spi_bus=1 rootdev=UUID=2b29fd0a-3553-4999-be20-f3175d84e624 rootfstype=ext4 usbstoragequirks=0x2537:0x1066:u,0x2537:0x1068:u root@orangepizeroplus2:~/tmp# Very nice how well it all is working!
  6. This all looks good (mine is identical)... I tried a different monitor as well and that also works for me (1080p 24" LG). Does the 4.14 kernel work for you in the same exact H/W configuration?
  7. Interesting...both of mine boot and work fine with HDMI - bootloader logo, kernel boot, and HDMI console all work okay (tested using a wireless keyboard, which works as well): Did you try a different monitor and/or HDMI cable? What does "dmesg | grep -i hdmi" show for you?
  8. Hi, this should now be fixed with https://github.com/armbian/build/commit/e0f27fff66220e56b6419879957af28fa46ff84f. I tested this on an unmodified Plus2 H5 (i.e., missing MOSFET in the regulator switching circuit). Without this change the boot would fail as @guidol noted (heartbeat, then stops, and the board hangs); with this change it boots and runs just fine, and the maximum CPU clock rate is properly limited.
  9. Quick note - I just built dev for R1 and it works well - did a cursory test of 4.19.2-sunxi and wireless, USB, DVFS/cpufreq, etc. and everything works. It does have the following warnings (as you noted previously), but the core speeds seem to work fine up to 1.3v/1.01GHz: [ 8.116042] core: _opp_supported_by_regulators: OPP minuV: 1320000 maxuV: 1320000, not supported by regulator [ 8.116069] cpu cpu0: _opp_add: OPP not supported by regulators (1056000000) [ 8.116263] core: _opp_supported_by_regulators: OPP minuV: 1320000 maxuV: 1320000, not supported by regulator [ 8.116280] cpu cpu0: _opp_add: OPP not supported by regulators (1104000000) [ 8.116512] core: _opp_supported_by_regulators: OPP minuV: 1320000 maxuV: 1320000, not supported by regulator [ 8.116527] cpu cpu0: _opp_add: OPP not supported by regulators (1152000000) [ 8.116725] core: _opp_supported_by_regulators: OPP minuV: 1320000 maxuV: 1320000, not supported by regulator [ 8.116737] cpu cpu0: _opp_add: OPP not supported by regulators (1200000000) [ 8.116903] core: _opp_supported_by_regulators: OPP minuV: 1340000 maxuV: 1340000, not supported by regulator [ 8.116922] cpu cpu0: _opp_add: OPP not supported by regulators (1224000000) [ 8.117152] core: _opp_supported_by_regulators: OPP minuV: 1340000 maxuV: 1340000, not supported by regulator [ 8.117170] cpu cpu0: _opp_add: OPP not supported by regulators (1248000000) [ 8.117376] core: _opp_supported_by_regulators: OPP minuV: 1340000 maxuV: 1340000, not supported by regulator [ 8.117392] cpu cpu0: _opp_add: OPP not supported by regulators (1296000000) [ 8.117557] core: _opp_supported_by_regulators: OPP minuV: 1400000 maxuV: 1400000, not supported by regulator [ 8.117572] cpu cpu0: _opp_add: OPP not supported by regulators (1344000000) [ 8.117755] core: _opp_supported_by_regulators: OPP minuV: 1400000 maxuV: 1400000, not supported by regulator [ 8.117769] cpu cpu0: _opp_add: OPP not supported by regulators (1368000000)
  10. When the latest tree is built and released and you switch to it, then you should change "cpu-clock-1.3GHz" to "cpu-clock-1.3GHz-1.3v". You can check for this in "/boot/dtb/allwinner/overlay/".
  11. 5kft

    Quick review of NanoPi Fire3

    Hi @shaun27, I just implemented support for this for the Fire3 and have pushed the changes into Armbian (see https://github.com/armbian/build/commit/1301f9f8c254d8408b9136948c786dffa5007acd). The power button/PWRKEY now works for both powering up the board as well as powering it down
  12. I found an old laser IR thermometer I have and when aiming measuring the heatsink on the Core2 it doesn't seem too far off (e.g. 32C measured vs 34 reported via "temp"). Perhaps the previous implementation was incorrect? I'm curious what your results will be!
  13. Quick note - the Nano Pi Neo Core2 works as well with the new kernel. Very nice that it clocks up to 1.37GHz by default now! root@nanopineocore2:~# cat /proc/version Linux version 4.19.2-sunxi64 (root@gandalf) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)) #11 SMP Sun Nov 18 13:40:50 UTC 2018 root@nanopineocore2:~# cpufreq-info -c 0 cpufrequtils 008: cpufreq-info (C) Dominik Brodowski 2004-2009 Report errors and bugs to cpufreq@vger.kernel.org, please. analyzing CPU 0: driver: cpufreq-dt CPUs which run at the same hardware frequency: 0 1 2 3 CPUs which need to have their frequency coordinated by software: 0 1 2 3 maximum transition latency: 2.04 ms. hardware limits: 120 MHz - 1.37 GHz available frequency steps: 120 MHz, 240 MHz, 480 MHz, 648 MHz, 816 MHz, 960 MHz, 1.01 GHz, 1.06 GHz, 1.10 GHz, 1.15 GHz, 1.20 GHz, 1.22 GHz, 1.25 GHz, 1.30 GHz, 1.34 GHz, 1.37 GHz available cpufreq governors: conservative, userspace, powersave, ondemand, performance, schedutil current policy: frequency should be within 408 MHz and 1.37 GHz. The governor "ondemand" may decide which speed to use within this range. current CPU frequency is 480 MHz (asserted by call to hardware). cpufreq stats: 120 MHz:0.01%, 240 MHz:0.04%, 480 MHz:73.59%, 648 MHz:0.10%, 816 MHz:0.01%, 960 MHz:0.02%, 1.01 GHz:0.00%, 1.06 GHz:0.01%, 1.10 GHz:0.00%, 1.15 GHz:0.01%, 1.20 GHz:0.01%, 1.22 GHz:0.00%, 1.25 GHz:0.02%, 1.30 GHz:0.04%, 1.34 GHz:0.00%, 1.37 GHz:26.15% (55) root@nanopineocore2:~#
  14. Hi @Igor, just a quick note - I had to make a small fix for Orange Pi Zero Plus (https://github.com/armbian/build/commit/b0f92ee58c6cbefbbcd52dcb93e1128c7528cb54); with this change this board seems to work fine now as well with the new 4.19.y kernel.
  15. Thanks @Icenowy! I will try to dig further into this when I get time...!