Sl8rBug Posted April 17, 2022 Posted April 17, 2022 Because I have updated to Armbian 22.02 with the linux 5.15.25 kernel and I am using the rk3328-nanopi-r2-rev00 device tree, I thought I should share what I have discovered. 1/ I had trouble setting up a one-wire device (ds18b20 temperature sensor). I think the w1-gpio pin assigned in the supplied overlay is messing up access of the SD card. I found some helpful information from this post: https://forum.pine64.org/showthread.php ... #pid100639 I copied the overlay code, modified it to use GPIO2_A2 (pin 7 on the 26pin header), compiled it and copied the new dtbo file to "/boot/overlay-user/" . Added the "user_overlays=rockchip-w1-gpio" line to "/boot/armbianEnv.txt" and rebooted. Success. I was able to read the ds18b20. (I have since discovered the utility "armbian-add-overlay" would have done the compile, copy and edit steps all at once.) The steps I took: Overlay filename: rockchip-w1-gpio.dts /dts-v1/; /plugin/; / { compatible = "rockchip,rk3328"; fragment@0 { target-path = "/"; __overlay__ { w1: onewire@0 { compatible = "w1-gpio"; pinctrl-names = "default"; gpios = <&gpio2 2 0>; status = "okay"; }; }; }; }; You will probably need to install the device-tree-compiler. sudo apt install device-tree-compiler Compile the overlay: dtc -I dts -O dtb -o rockchip-w1-gpio.dtbo rockchip-w1-gpio.dts Copy the compiled overlay: sudo cp rockchip-w1-gpio.dtbo /boot/overlay-user/ Add the "user_overlays=rockchip-w1-gpio" line (without quotes) to "/boot/armbianEnv.txt" and reboot. I have learnt a bit more about "Device Trees" and "dt overlays" (I still don't understand how it all works), it turns out overlays can be used to change (somewhat) what has been configured in the Device Tree being used. So here are some more overlays that I have come up with after grabbing snippets from here and there. 2/ I have read of people editing and recompiling the device tree dtb file to enable the USB-OTG to be used as a "normal" USB port. I have created an overlay that changes the dr_mode of the USB-OTG from "otg" to "host". Overlay filename: rockchip-usb-otg.dts /dts-v1/; /plugin/; / { compatible = "rockchip,rk3328-usb\0rockchip,rk3066-usb\0snps,dwc2"; fragment@0 { target-path = "/usb@ff580000"; __overlay__ { dr_mode = "host"; }; }; }; Compile: dtc -@ -I dts -O dtb -o rockchip-usb-otg.dtbo rockchip-usb-otg.dts Copy the compiled overlay to /boot/overlay-user/ and add "rockchip-usb-otg" (without quotes) to /boot/armbianEnv.txt on the "user_overlays=" line. After a reboot, check by plugging a "9-hole To Dual USB2.0 Female Header Adapter Cable" (or similar) onto the USB header and plug a couple of flash drives in to the USB sockets. Type lsblk and the resulting output should show /dev/sda and /dev/sdb. 3/ The rk3328-nanopi-r2.dtb doesn't enable "pwm". PWM is handy for controlling the speed of a cooling fan. There is a header on the board for just a thing. (2Pin JST ZH 1.5mm Connector for 5V Fan) Overlay filename: rockchip-pwm-gpio.dts /dts-v1/; /plugin/; / { compatible = "rockchip,rk3328"; fragment@0 { target-path = "/pwm@ff1b0020"; __overlay__ { status = "okay"; }; }; }; Compile, copy and edit as above and reboot. ls /sys/class/pwm/ This should show "pwmchip0" is available. To be able to control "PWM" from userspace, a couple of other things need to be in place. The user needs to be a member of the "gpio" group and some udev rules need to be in place. filename: 50-pwm.rules SUBSYSTEM=="pwm*", PROGRAM="/bin/sh -c '\ chown -R root:gpio /sys/class/pwm && chmod -R 770 /sys/class/pwm;\ chown -R root:gpio /sys/devices/platform/*.pwm/pwm/pwmchip* && chmod -R 770 /sys/devices/platform/*.pwm/pwm/pwmchip*\ '" Copy the 50-pwm.rules file to:- "/etc/udev/rules.d/" (without the quotes) Reload the udev rules. udevadm control --reload-rules ; udevadm trigger Here is a shell script to setup the PWM. Values for period and duty-cycle width may be changed as required. filename: setpwm.sh #! /usr/bin/bash # activate the PWM. echo 0 > /sys/class/pwm/pwmchip0/export #Wait for export to settle sleep 2 # set period to 10ms echo 10000000 > /sys/class/pwm/pwmchip0/pwm0/period # set normal polarity. needs to be reset explicitly. Bug? echo "inversed" > /sys/class/pwm/pwmchip0/pwm0/polarity echo "normal" > /sys/class/pwm/pwmchip0/pwm0/polarity # enable the PWM echo 1 > /sys/class/pwm/pwmchip0/pwm0/enable # set duty cycle to 1ms echo 1000000 > /sys/class/pwm/pwmchip0/pwm0/duty_cycle 4/ The NanoPi NEO3 has a push button. From documentation I have found, indicates that it is supposedly a reset button, but it seems to have no effect. This overlay renames the button and sets the function to "Power Off" (or "Reset"). I wanted it to shutdown the NEO3, so I have configured it as "KEY_POWER" (0x74). Change line 15 to "linux,code = <0x198>;" for a Reset button. Overlay filename: rockchip-power-button.dts /dts-v1/; /plugin/; / { compatible = "rockchip,rk3328"; fragment@0 { target-path = "/"; __overlay__ { gpio-keys { button@0 { label = "k1_button"; linux,code = <0x74>; //0x198 = KEY_RESTART, 0x74 = KEY_POWER }; }; }; }; }; Compile, copy and edit as above and reboot. Press the button and the NEO3 should shutdown (or restart). 5/ Apparently the NanoPi R2 has two additional LEDS, ("lan-led" and "wan-led") that the NEO3 does not. The rk3328-nanopi-r2.dtb assigns these LEDS to GPIO pins that are on the 26pin header that would be used as normal GPIO or used by I2S and SPI on the NEO3. To make these pins available for use, I have made an overlay that re-assigns the "lan-led" and "wan-led" to gpios that (according to the NEO3 schematic) are not used on the NEO3. Overlay filename: rockchip-leds.dts /dts-v1/; /plugin/; / { compatible = "rockchip,rk3328"; fragment@0 { target-path = "/"; __overlay__ { gpio-leds { led@2 { gpios = <&gpio0 5 0>; }; led@3 { gpios = <&gpio0 6 0>; }; }; }; }; }; Compile, copy and edit as above and reboot. Check by using "gpioinfo" gpioinfo gpiochip0 The output will show that the "lan-led" and "wan-led" are now assigned to gpiochip0, lines 5 and 6 respectively. I believe that using these simple Device Tree Overlays, has made my NanoPi NEO3 perform as it was intended. I have found one flaw. After upgrading to the latest armbian kernel, 20.02, two GPIO pins will not change state. They are GPIO2_B7/I2S1_MCLK (gpiochip2, 15) and GPIO3_B0/SPI_CSN0 (gpiochip3, 8). Something is loaded during boot that sets them both High (I have LEDs connected and can see when they go High). Using the commands "gpioset gpiochip2 15=0" and "gpioset gpiochip3 8=0" does not turn the LEDs off. There are no errors or warnings when using the commands and "gpioinfo" shows that the pins are "input active-high". This effect did not happen using the previous kernel and happens late in the boot process. I am ruling out any Device Tree problems as the Green Status LED is flashing happily well before either pin goes high. Regards, John 2 Quote
usual user Posted April 17, 2022 Posted April 17, 2022 5 hours ago, Sl8rBug said: I have found one flaw. Out of curiosity, can you post the output of cat /sys/kernel/debug/gpio and cat /sys/kernel/debug/pinctrl/pinctrl-rockchip-pinctrl/pinmux-pins while the gpioset command is running? Don't forget to put the logs in spiolers (The eye icon in the tool line of the editor). 0 Quote
Sl8rBug Posted April 18, 2022 Author Posted April 18, 2022 usual user, thanks for your interest. Here are the outputs you requested. cat /sys/kernel/debug/gpio Spoiler gpiochip0: GPIOs 0-31, parent: platform/ff210000.gpio0, gpio0: gpio-0 ( |k1_button ) in hi ACTIVE LOW gpio-2 ( |status_led ) out hi gpio-5 ( |lan_led ) out lo gpio-6 ( |wan_led ) out hi gpio-30 ( |sdmmc-regulator ) out lo ACTIVE LOW gpiochip1: GPIOs 32-63, parent: platform/ff220000.gpio1, gpio1: gpio-50 ( |snps,reset ) out hi ACTIVE LOW gpio-60 ( |vccio_sd ) out hi gpiochip2: GPIOs 64-95, parent: platform/ff230000.gpio2, gpio2: gpio-66 ( |onewire@0 ) out hi gpio-86 ( |vcc-rtl8153-regulato) out hi gpiochip3: GPIOs 96-127, parent: platform/ff240000.gpio3, gpio3: gpiochip5: GPIOs 509-509, parent: platform/ff100000.syscon:gpio, ff100000.syscon:gpio: gpiochip4: GPIOs 510-511, parent: platform/rk805-pinctrl, rk805-gpio, can sleep: cat /sys/kernel/debug/pinctrl/pinctrl-rockchip-pinctrl/pinmux-pins Spoiler Pinmux settings per pin Format: pin (name): mux_owner gpio_owner hog? pin 0 (gpio0-0): gpio-keys gpio0:0 function rockchip-key group gpio-key1 pin 1 (gpio0-1): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 2 (gpio0-2): gpio-leds gpio0:2 function gpio-leds group leds-gpio pin 3 (gpio0-3): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 4 (gpio0-4): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 5 (gpio0-5): (MUX UNCLAIMED) gpio0:5 pin 6 (gpio0-6): (MUX UNCLAIMED) gpio0:6 pin 7 (gpio0-7): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 8 (gpio0-8): ff540000.ethernet (GPIO UNCLAIMED) function gmac-1 group rgmiim1-pins pin 9 (gpio0-9): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 10 (gpio0-10): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 11 (gpio0-11): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 12 (gpio0-12): ff540000.ethernet (GPIO UNCLAIMED) function gmac-1 group rgmiim1-pins pin 13 (gpio0-13): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 14 (gpio0-14): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 15 (gpio0-15): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 16 (gpio0-16): ff540000.ethernet (GPIO UNCLAIMED) function gmac-1 group rgmiim1-pins pin 17 (gpio0-17): ff540000.ethernet (GPIO UNCLAIMED) function gmac-1 group rgmiim1-pins pin 18 (gpio0-18): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 19 (gpio0-19): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 20 (gpio0-20): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 21 (gpio0-21): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 22 (gpio0-22): ff540000.ethernet (GPIO UNCLAIMED) function gmac-1 group rgmiim1-pins pin 23 (gpio0-23): ff540000.ethernet (GPIO UNCLAIMED) function gmac-1 group rgmiim1-pins pin 24 (gpio0-24): ff540000.ethernet (GPIO UNCLAIMED) function gmac-1 group rgmiim1-pins pin 25 (gpio0-25): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 26 (gpio0-26): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 27 (gpio0-27): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 28 (gpio0-28): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 29 (gpio0-29): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 30 (gpio0-30): sdmmc-regulator gpio0:30 function sdmmc0-1 group sdmmc0m1-pin pin 31 (gpio0-31): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 32 (gpio1-0): ff500000.mmc (GPIO UNCLAIMED) function sdmmc0 group sdmmc0-bus4 pin 33 (gpio1-1): ff500000.mmc (GPIO UNCLAIMED) function sdmmc0 group sdmmc0-bus4 pin 34 (gpio1-2): ff500000.mmc (GPIO UNCLAIMED) function sdmmc0 group sdmmc0-bus4 pin 35 (gpio1-3): ff500000.mmc (GPIO UNCLAIMED) function sdmmc0 group sdmmc0-bus4 pin 36 (gpio1-4): ff500000.mmc (GPIO UNCLAIMED) function sdmmc0 group sdmmc0-cmd pin 37 (gpio1-5): ff500000.mmc (GPIO UNCLAIMED) function sdmmc0 group sdmmc0-dectn pin 38 (gpio1-6): ff500000.mmc (GPIO UNCLAIMED) function sdmmc0 group sdmmc0-clk pin 39 (gpio1-7): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 40 (gpio1-8): ff540000.ethernet (GPIO UNCLAIMED) function gmac-1 group rgmiim1-pins pin 41 (gpio1-9): ff540000.ethernet (GPIO UNCLAIMED) function gmac-1 group rgmiim1-pins pin 42 (gpio1-10): ff540000.ethernet (GPIO UNCLAIMED) function gmac-1 group rgmiim1-pins pin 43 (gpio1-11): ff540000.ethernet (GPIO UNCLAIMED) function gmac-1 group rgmiim1-pins pin 44 (gpio1-12): ff540000.ethernet (GPIO UNCLAIMED) function gmac-1 group rgmiim1-pins pin 45 (gpio1-13): ff540000.ethernet (GPIO UNCLAIMED) function gmac-1 group rgmiim1-pins pin 46 (gpio1-14): ff540000.ethernet (GPIO UNCLAIMED) function gmac-1 group rgmiim1-pins pin 47 (gpio1-15): ff540000.ethernet (GPIO UNCLAIMED) function gmac-1 group rgmiim1-pins pin 48 (gpio1-16): ff540000.ethernet (GPIO UNCLAIMED) function gmac-1 group rgmiim1-pins pin 49 (gpio1-17): ff540000.ethernet (GPIO UNCLAIMED) function gmac-1 group rgmiim1-pins pin 50 (gpio1-18): (MUX UNCLAIMED) gpio1:50 pin 51 (gpio1-19): ff540000.ethernet (GPIO UNCLAIMED) function gmac-1 group rgmiim1-pins pin 52 (gpio1-20): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 53 (gpio1-21): ff540000.ethernet (GPIO UNCLAIMED) function gmac-1 group rgmiim1-pins pin 54 (gpio1-22): ff540000.ethernet (GPIO UNCLAIMED) function gmac-1 group rgmiim1-pins pin 55 (gpio1-23): ff540000.ethernet (GPIO UNCLAIMED) function gmac-1 group rgmiim1-pins pin 56 (gpio1-24): 1-0018 (GPIO UNCLAIMED) function pmic group pmic-int-l pin 57 (gpio1-25): ff540000.ethernet (GPIO UNCLAIMED) function gmac-1 group rgmiim1-pins pin 58 (gpio1-26): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 59 (gpio1-27): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 60 (gpio1-28): (MUX UNCLAIMED) gpio1:60 pin 61 (gpio1-29): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 62 (gpio1-30): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 63 (gpio1-31): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 64 (gpio2-0): ff130000.serial (GPIO UNCLAIMED) function uart2-1 group uart2m1-xfer pin 65 (gpio2-1): ff130000.serial (GPIO UNCLAIMED) function uart2-1 group uart2m1-xfer pin 66 (gpio2-2): (MUX UNCLAIMED) gpio2:66 pin 67 (gpio2-3): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 68 (gpio2-4): ff160000.i2c (GPIO UNCLAIMED) function i2c1 group i2c1-xfer pin 69 (gpio2-5): ff160000.i2c (GPIO UNCLAIMED) function i2c1 group i2c1-xfer pin 70 (gpio2-6): ff1b0020.pwm (GPIO UNCLAIMED) function pwm2 group pwm2-pin pin 71 (gpio2-7): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 72 (gpio2-8): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 73 (gpio2-9): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 74 (gpio2-10): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 75 (gpio2-11): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 76 (gpio2-12): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 77 (gpio2-13): ff250000.tsadc (GPIO UNCLAIMED) function tsadc group otp-out pin 78 (gpio2-14): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 79 (gpio2-15): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 80 (gpio2-16): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 81 (gpio2-17): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 82 (gpio2-18): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 83 (gpio2-19): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 84 (gpio2-20): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 85 (gpio2-21): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 86 (gpio2-22): vcc-rtl8153-regulator gpio2:86 function usb group usb30-en-drv pin 87 (gpio2-23): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 88 (gpio2-24): ff150000.i2c (GPIO UNCLAIMED) function i2c0 group i2c0-xfer pin 89 (gpio2-25): ff150000.i2c (GPIO UNCLAIMED) function i2c0 group i2c0-xfer pin 90 (gpio2-26): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 91 (gpio2-27): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 92 (gpio2-28): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 93 (gpio2-29): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 94 (gpio2-30): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 95 (gpio2-31): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 96 (gpio3-0): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 97 (gpio3-1): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 98 (gpio3-2): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 99 (gpio3-3): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 100 (gpio3-4): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 101 (gpio3-5): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 102 (gpio3-6): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 103 (gpio3-7): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 104 (gpio3-8): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 105 (gpio3-9): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 106 (gpio3-10): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 107 (gpio3-11): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 108 (gpio3-12): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 109 (gpio3-13): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 110 (gpio3-14): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 111 (gpio3-15): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 112 (gpio3-16): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 113 (gpio3-17): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 114 (gpio3-18): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 115 (gpio3-19): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 116 (gpio3-20): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 117 (gpio3-21): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 118 (gpio3-22): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 119 (gpio3-23): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 120 (gpio3-24): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 121 (gpio3-25): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 122 (gpio3-26): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 123 (gpio3-27): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 124 (gpio3-28): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 125 (gpio3-29): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 126 (gpio3-30): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 127 (gpio3-31): (MUX UNCLAIMED) (GPIO UNCLAIMED) Everything looks as expected, but I hope you can see something I cannot. Regards, John 0 Quote
usual user Posted April 18, 2022 Posted April 18, 2022 3 hours ago, Sl8rBug said: Here are the outputs you requested. Thanks for the logs. Luckily, you didn't do what I asked for, but that gives me an idea of what's going on. Here are the log snippets of my device running with and without gpioset: Spoiler gpio: . . . gpiochip1: GPIOs 32-63, parent: platform/ff730000.gpio, gpio1: gpio-32 (con1-07 ) gpio-33 (con1-11 ) gpio-35 (con1-13 ) gpio-36 (con1-15 ) gpio-50 (con1-12 ) gpio-54 (con1-16 ) gpio-55 (con1-18 ) gpio-56 (con1-22 ) . . . pinmux-pins: . . . pin 36 (gpio1-4): (MUX UNCLAIMED) (GPIO UNCLAIMED) pin 37 (gpio1-5): (MUX UNCLAIMED) (GPIO UNCLAIMED) . . . gpioset -m wait gpiochip1 4=0 5=0 gpio: . . . gpiochip1: GPIOs 32-63, parent: platform/ff730000.gpio, gpio1: gpio-32 (con1-07 ) gpio-33 (con1-11 ) gpio-35 (con1-13 ) gpio-36 (con1-15 |gpioset ) out lo gpio-37 ( |gpioset ) out lo gpio-50 (con1-12 ) gpio-54 (con1-16 ) gpio-55 (con1-18 ) gpio-56 (con1-22 ) . . . pinmux-pins: . . . pin 36 (gpio1-4): (MUX UNCLAIMED) gpio1:36 pin 37 (gpio1-5): (MUX UNCLAIMED) gpio1:37 . . . On my device, pin 36 is configured as a GPIO resource, while pin 37 is not. With further consideration it is clear that even a non-wired SOC resource can be occupied by a process. However, the result is inaccessible from the outside. Because your gpio log has no entries for pin 79 and 104 without a running gpioset process, it can be assumed that they are not configured as GPIO resource (DTB). Your uboot probably configures these lines as GPIO resources, but if the kernel takes over later, they will probably be shut down by power management as an unconfigured resource (DTB). 0 Quote
Lamerjack Posted September 6, 2023 Posted September 6, 2023 My Nanopi Neo3 after a reboot hangs. I have to remove power and apply again. I read that is due to Device Tree. Someone has a suggestion to fix it? 0 Quote
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