alr Posted March 16, 2017 Share Posted March 16, 2017 Hello, I have a custom board with A20 and I like to share the UART7(I20/I21) pins. I mean sometimes used as UART and other times used as output ports. Should I always change the FEX file to use one u other functionality. The perfect way is using both option without restart the system. Thanks! Link to comment Share on other sites More sharing options...
zador.blood.stained Posted March 16, 2017 Share Posted March 16, 2017 You should be able to reconfigure the pin controller "live" (without a reboot) using devmem2 (or something similar) by writing directly to the port control registers. You may want to check PyA20 or other GPIO libraries for the code examples. Link to comment Share on other sites More sharing options...
alr Posted March 16, 2017 Author Share Posted March 16, 2017 40 minutes ago, zador.blood.stained said: You should be able to reconfigure the pin controller "live" (without a reboot) using devmem2 (or something similar) by writing directly to the port control registers. You may want to check PyA20 or other GPIO libraries for the code examples. Thanks for the answer! So you are saying that with devmem2 I can set the memory value to the 0x01C20800 + 0x128 (offset) = PI_CFG2 and change the 22:20 and 18:16 bits from 0b001 to 0b011 and 0b011 to 0b001. To use as output pins or UART7 pins. Should I change anything else to allow the UART7 functionality ?. I assume that I also must to change the PI_PULL0 Offset: 0x13C to match the pullup configs into the FEX file : uart_tx = port:PI20<3><1><default><default> uart_rx = port:PI21<3><1><default><default> Thanks for the hint! Link to comment Share on other sites More sharing options...
zador.blood.stained Posted March 16, 2017 Share Posted March 16, 2017 2 hours ago, alr said: So you are saying that with devmem2 I can set the memory value to the 0x01C20800 + 0x128 (offset) = PI_CFG2 and change the 22:20 and 18:16 bits from 0b001 to 0b011 and 0b011 to 0b001. Yes, something like this. But I would probably keep them as UART by default (or rather they will be configured for the UART if you have UART7 enabled in FEX), and then you should be able to switch them to functions 0 or 1 when needed. 2 hours ago, alr said: I assume that I also must to change the PI_PULL0 Offset: 0x13C to match the pullup configs into the FEX file Most likely yes if there are no external pull-ups on these lines Meanwhile I remembered that sunxi-pio is better as an example and may even work as is as a standalone command line tool: https://github.com/linux-sunxi/sunxi-tools/blob/master/pio.c Link to comment Share on other sites More sharing options...
Solution alr Posted March 22, 2017 Author Solution Share Posted March 22, 2017 Thanks again for the idea! I finally got the UART7/GPIO shared pins working without problems. I´m using gpio_lib. Link to comment Share on other sites More sharing options...
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