usual user

I'm currently at: # uname -a Linux micro-015 6.13.0-0.rc1.20241204gitfeffde684ac2.17.fc42.aarch64 #1 SMP PREEMPT_DYNAMIC Sat Dec 7 11:18:10 CET 2024 aarch64 GNU/Linux

Works for me as for @rmrf. iperf3 -c ... [ ID] Interval Transfer Bitrate Retr [ 5] 0.00-10.00 sec 1.10 GBytes 942 Mbits/sec 0 sender [ 5] 0.00-10.01 sec 1.09 GBytes 938 Mbits/sec receiver iperf3 -R -c ... [ ID] Interval Transfer Bitrate Retr [ 5] 0.00-10.00 sec 412 MBytes 345 Mbits/sec 485 sender [ 5] 0.00-10.00 sec 410 MBytes 344 Mbits/sec receiver

Ok, then no further action needs to be taken and your solution can be used by others in the future. I also don't need any other firmware because my current one works according to my needs. And for an update, I know how to build and debug it if necessary.

To get help, you have to provide proper logs. In case of boot problems, these are serial console logs. https://debug.armbian.de

Out of curiosity, I played around a bit with the sources offered. The overlay compiled from the spi-ili9341-tft.dts source cannot be applied statically to the base DTB. It seems to have something to do with the externally used labels. Unfortunately, my DTC package is currently in FTBFS condition and I can't investigate the cause further at the moment. I have therefore rewritten the overlay in absolute path notation. I used the given properties for this. I can't make a statement about their correctness, because I don't have a complete circuit diagram or any necessary data sheets at hand. I'm not particularly familiar with the Allwinner devicetree binding documentation, but as far as I can tell, the properties, when applied to the base DTB statically, are compliant. If you want, you can run the attached DTB with your device. All components are already statically applied, so you should disable any other dynamically applied overlays. I would be interested in the "/sys/kernel/debug/gpio" content. sun4i-a10-pcduino2.dtb

Allready landed in mainline, you get the fix out-of-the-box since v6.11-rc3.

This says that the necessary short circuit was not present when the MaskRom code scanned for boot devices. The short circuit must be ensured before the power supply is switched on, and must be maintained until a few seconds later. The procedure is a three-handed job. One hand fixes the PCB, one hand holds the tweezers, and one hand switches on the power supply. This can only be reliably ensured with a shelf holder who uses Pogo pinns. IMHO a bad board design for a tinker device. A push button or at least holes for a plug contact to connect a proper switch if necessary would be the better solution. Be grateful to your board designer.

Since the "upgrade button" is only software readable, and the firmware (U-Boot) that does it is corrupt, only this method remains. In MaskRom_mode I would first delete the corrupt firmware in the eMMC, so that the firmware loading falls back to the microSD card. This allows different firmware variants to be tested without having to use the clunky method to get into the MaskRom_mode. Then I would prepare a microSD card with supposedly suitable firmware and boot the device with it. The function can be verified looking at the serial console output. Once a suitable firmware has been identified, I would add an OS image to the microSD card to evaluate the full functionality. It may be possible to speed up the procedure if a complete image with suitable integrated firmware is already available. Finally, if necessary, the firmware can be placed in the eMMC again.

Since I don't even know which system component the supposed GPIO line is connected to, I could only speculate wildly. The appearance is certainly due to the wiring in the DT, but this is also a speculation to which I do not want to comment further, but leave it to qualified people. Alternatively, you could look in the exact DT sources from which the DTBs used at runtime were assembled, but I don't have access to that. You could also add the line to the output with: gpioset --consumer=reset -c0 234=on but it certainly won't give the same functionality as in the original case, as it's a completely different use case.

Your device stalls in early firmware not even the payload (U-Boot) is reached. Which OS is used is anything but important at this point. Make sure that a suitable firmware is used before you worry about the userspace. Devices with Rockchip SOCs are unbrickable, you can recover at any time by restoring a suitable firmware.

Since there is no public link to the result, I suspect it. Since a single false character in a DTS(O) can already lead to a malfunction in its consuming code, this is completely unsuitable for debugging. If the DTB's build framework is added as a source of error, be my guest, but please don't expect any help from me in this case. It's the same as asking an application developer to identify a bug in the compilation toolchain by disassembling their binary application code without having access to the exact sources from which the particular binay was built.

IMHO it is much more likely that the DT description is incorrect, but with the Armbian DT workflow there is not the slightest possibility to verify it automatically with the binding documentation. But since not even the original DT sources are readily available, you can't even validate them manually. And once sources are available, they are usually written in disassembler syntax, which does not make them easier to read. In addition, there is the fact that many attempts are made to merge snippets of DTS from different devices by "copy & paste" in the hope of magically getting a working device. This is just as doomed to failure as the attempt to use arbitrary schematic snippets of various devices to describe a certain PCB for a specific device. In the DT world it is even more challenging, because the DT layout is even use case dependent and runtime changeable.

Ok, you have confirmed that the GPIO line can be properly acquired by a suitable process and the GPIO subsystem is working as expected. The SPI subsystem does not seem to do this as desired for the CS line. Whether this is due to a bug patched out of tree in the 5.15.88 kernel, or just a configuration error in the DT, I can't say, since you haven't published any DT sources on how your SPI controller is wired. I'm interested in the original sources from which the DTB was created, and not any from some disassembled DTB, as this has lost valuable information that was striped out during the assembly of the DTB. But I also know that it is very difficult to acquire them with an Armbian build system since they most probably only exist as build artifacts which get composed from various patches.

"/sys/kernel/debug/gpio" represents what the kernel has instantiated. Its accuracy depends on the exact description (DT), as the layout cannot be probed. But many people think they can copy DT fragments of similar devices together to get an exact description of a particular device without verification. But it's just like a device schematic, it will never accurately replicate the layout design of another device. DT is just one step further, as it can change the layout itself at runtime. The test was intended to verify that the GPIO subsystem is correctly configured and that the GPIO line can be acquired from a native GPIO process. This is because the line cannot be operated as a native CS line by the SPI IP but only emulated with the cooperation of the GPIO Subsystem. Mine does:

Of course, I don't know which patches Armbian has applied at times, but what looks suspicious is the fact that the gpio line numbers used in the "/sys/kernel/debug/gpio" logs for the gpiochip1 differ. This shouldn't be caused by the DT, and if it is, it should be the same as using the 5.15.88 variant again. To test the basic function of the GPIO subsystem in 6.6.16, post the state of "/sys/kernel/debug/gpio" while gpioset -c0 34=on is running at the same time with root permissions.