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msubasic

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Everything posted by msubasic

  1. Hi all, another data point and an alternative to the 1-bit overlay. I had exactly this error on my M2U (sunxi-mmc 1c11000.mmc: data error, sending stop command / send stop command failed, then the eMMC host hangs). I run LibreELEC (kernels 6.6 and 6.16), but the device tree is mainline, the same as Armbian's. In my case the problem is the clock, not the bus width: the stock dts has no max-frequency on the eMMC node, so it runs 8-bit DDR52 at 50 MHz. Capping it at 40 MHz (the driver ends up at 37.5 MHz) fixed it with the full 8-bit DDR bus: 50 MHz: fails within 0.5 s, every time 37.5 MHz: 0 errors in a 33 min soak (6× full read + write/sha256 verify across the whole eMMC), and the system has run from eMMC since 25 MHz: also passes Speeds at 37.5 MHz: read ~61 MB/s, write ~25 MB/s. A 1-bit bus would be a fraction of that. eMMC: Samsung 8WPD3R (eMMC 5.0), close to the 8GTF4R in goosnarrggh's log. You can test this live without changing anything permanently (as root, booted from SD): mount -t debugfs none /sys/kernel/debug cat /sys/kernel/debug/mmc*/ios # find the host showing "bus width: 3 (8 bits)" echo 40000000 > /sys/kernel/debug/mmcN/clock dd if=/dev/mmcblkX of=/dev/null bs=4M # watch dmesg (Note: if 50 MHz already hung the controller, you need a cold power-off first. A reboot doesn't reset it.) Overlay (the same overlay, without the compatible line, runs on my board under LibreELEC, loaded by U-Boot; this version is checked with fdtoverlay but not tested on Armbian itself, so feedback welcome). For Armbian it should go in as a user overlay with armbian-add-overlay sun8i-r40-bananapi-m2-ultra-emmc-40mhz.dts: /dts-v1/; /plugin/; / { compatible = "allwinner,sun8i-r40"; fragment@0 { target-path = "/soc/mmc@1c11000"; __overlay__ { max-frequency = <40000000>; }; }; }; Remove the 1-bit overlay when you try this one. If 40 MHz isn't stable on your board, try 25000000. That fits 赵凌's observation that 4-bit works where 8-bit doesn't: both lower the load on the bus, but the clock cap keeps 8-bit speed.

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