jbuzar

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About jbuzar

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  1. No, I do not see any limit in user space. cpufreq-info shows "hardware limits: 408 MHz - 1.42 GHz" for CPU 0-3 and "hardware limits: 408 MHz - 1.80 GHz" for CPU 4 and 5. Highest entries in dts are opp-1512000000 and opp-1992000000. Maybe there is a setting somewhere that excludes them, but I do not see it.
  2. I saw the entries for higher frequencies exist in the file and I gave up on this. I guess the limit is set somewhere at very low level even lower than the device tree file. Would be nice of one of the experts could give a hint.
  3. I just see that the rk3399 datasheet states 1.8 and 1.4GHz as the maximum CPU frequencies. I thought it was 2 and 1.5 like advertised with the rk3399 boards. In this case I agree the stable kernel should limit it to the values from the datasheet. Still I use active cooling and constant 2GHz works fine since weeks. I will switch the drivers/clk/rockchip/clk-rk3299.c file with the one from the dev kernel and that should probably give me back the 2GHz.
  4. Looks like this is a difficult question... I am installing now kernel sources and check if I find the place. I just wonder why it should be limited in the kernel source when device-tree is there to do such low-level stuff.
  5. With the stable images for NanoPi M4 I see CPU speed is limited to 1.8Mhz, whereas with nightly builds I get up to 2GHz for the fast cores. I would rather like to stay with stable image, also because boot time is much longer with nightly builds. What is the easiest way to enable up to 2GHz CPU speeds with stable build? JB
  6. Thanks, I managed to get spidev device appear by adding additional spidev bindings to dts.
  7. I have problem getting SPI work on Orange Pi Zero nightly build Armbian_5.26.170213_Orangepizero_Ubuntu_xenial_dev_4.10.0.7z. I decompiled sun8i-h2plus-orangepi-zero.dtd, changed status of spi1 from "disabled" to "okay", disabled UART3 and led_pins@0 as they share pins, compiled dtb and copied to /boot/dtb. After reboot I did "modprobe spidev" and I still do not see any spi devices in /dev. Do I do something wrong or is there something different in kernel 4.10.0?
  8. How much work would it be to port your solution to H3 boards like Nanopi Neo?
  9. jbuzar

    H3 SPI

    What does "large SPI transfer" mean in KB, MB?
  10. jbuzar

    H3 SPI

    We also would like to do continuous SPI communication and experience the CS delays. Will this eventually be improved in 4.10 kernel?