martinayotte
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Posts posted by martinayotte
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From the log above, we can see that both u-boot are not the same version.
Are you sure that when you did "dd if=u-boot-sunxi-with-spl.bin of=/dev/mmcblk1 bs=1024 seek=8" it was the proper u-boot file ?
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First, from what I'm aware, only Mainline kernel support SPI-NOR, so Legacy won't work.
Second, the clock on the chip is only present during transactions and idle the rest of the time, so connecting an oscilloscope is a bit useless since during boot the only transaction happening is the JEDEC ID query which last only few microseconds.
Third, DTS is only use in Mainline. Legacy is using FEX, but again no SPI-NOR support in Legacy.
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But U5 is a SY8008B chip, so where the words "CI LPS A16q2" come from ?
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This is because USB-TTL been un-powered, it acts like a Pull-Down on the RX signal, which is seen as BREAK condition.
Never leave a USB-TTL on header when not in use.
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His goal wasn't to upload firmware, but to do serial communication between OPi and Arduino.
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You don't need to do all this since nightly builds already provides SPI-NOR support. The only thing you have to do is changing the partitions sizes in the current DT :
spi@01c68000 {
compatible = "allwinner,sun8i-h3-spi";
reg = <0x1c68000 0x1000>;
interrupts = <0x0 0x41 0x4>;
clocks = <0x2 0x1e 0x2 0x52>;
clock-names = "ahb", "mod";
dmas = <0x19 0x17 0x19 0x17>;
dma-names = "rx", "tx";
pinctrl-names = "default";
pinctrl-0 = <0x1a>;
resets = <0x2 0xf>;
status = "okay";
#address-cells = <0x1>;
#size-cells = <0x0>;
linux,phandle = <0x4c>;
phandle = <0x4c>;
spi-flash@0 {
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-max-frequency = <0x989680>;
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <0x1>;
#size-cells = <0x1>;
partition@0 {
label = "uboot";
reg = <0x0 0x100000>;
};
partition@100000 {
label = "env";
reg = <0x100000 0x100000>;
};
partition@200000 {
label = "data";
reg = <0x200000 0x200000>;
};
};
};
};You will see the MTD partitions by doing "cat /proc/mtd", and you can use flashcp from mtd-utils to write to /dev/mtd0.
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CI LPS A16q2
What component is that ?
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For UARTs, you don't need those library, you only need to access kernel serial device, such /dev/ttyS1, using python-serial.
For example, the following piece of code will print any character received on RX :
import serial serport = serial.Serial("/dev/ttyS1", 115200, timeout=1) while True: while serport.inWaiting() > 0: c = serport.read() print c -
console=ttySAC2, 115200n8.That is a strange port ! It is usually ttyS0 ...
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Last weekend, I've built and upgraded almost all my boards (2E/PC/PC+/Zero) and they are all on 4.10 now.
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I *think* they're just bitbanging spi on that lib but not sure.
No ! it is using kernel spidev transactions thru /dev/spidev*.* devices.
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That is also another solution ...
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I don't know about specific WS2812 protocol, but doing an SPI transfer is about as simple as :
from pyA20 import spi spi.open("/dev/spidev0.0", mode=0, delay=0, bits_per_word=8, speed=5000000) data = [0,1,2,3,4,5,6,7,8,9] spi.xfer(data, len(data)) -
There are many ways. Some more complex than others.
The simplest on is running a startup script and call it in /etc/rc.local :
#!/bin/sh -e # # rc.local # # This script is executed at the end of each multiuser runlevel. # Make sure that the script will "exit 0" on success or any other # value on error. # # In order to enable or disable this script just change the execution # bits. # # By default this script does nothing. /root/my-startup-script.sh & exit 0
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No, SPI Flash comes empty, you need to push u-boot-sunxi-with-spl.bin into it using mtd-utils.
flashcp /usr/lib/linux-u-boot-dev-pine64_5.24_arm64/u-boot-sunxi-with-spl.bin /dev/mtd0
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Yes, spidev0.0 is dedicated to on-board SPI Flash.
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If you use Mainline, then simply remove the whole xradio paragraph in DT.
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For me "time is the missing ingredient" ...
If you have some spare time, you could check the latency time between the FIFO fills, and also if CS is asserted during the whole large transfer, not only during the FIFO size of 64 bits.
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I doubt there will be huge performance gain, because even with DMA, there will be some latency for DMA buffer been filled.
When I ported the FIFO large transfer, I said that when I get a chance, I will check the latency with logic analyser, but I didn't got chance yet.
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What do you mean about the SPI driver ?
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I have built one image a week ago ...
Are you using Armbian build process ?
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Could be several possibilities :
- check your wiring again.
- check if the Flash chip part number/manufacturer is in the list of flashrom/flashchips.h
- provide us the log output of the execution to see what JEDEC ID is reported.
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It is good to disable it in the DT, but I presume leaving PA20 floating won't disable power since floating has similar effect to HIGH level on most chips.
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u-boot for OPi+2E is currently from v2017.01 mainline from http://git.denx.de/u-boot.git
What's needed to upgrade Orange Pi 2E+ from legacy?
in Advanced users - Development
Posted
Why don't you build it by using those instructions ?
https://docs.armbian.com/Developer-Guide_Build-Preparation/