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How to install armbian in h618?

alienxz77b

By alienxz77b
in Allwinner CPU Boxes

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nitrolack

nitrolack

Posted
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Put the vontar miniarch distro on a sd card and put it into the TV Box i posted earlier. It works, but i do need to look to get wifi working. But firstly i does work.
Didn't install miniarch right now to the tv box, cause i want to save the current os on it, before i install it.


Already thank you guys, to find something which is running already.

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rick0cm

rick0cm

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Yes, another vote for the vontar minarch image mentioned above. It boots up on my board with the on chip ethernet and wifi working.

 

The miniarch dist is quite a bit more "stripped down" than I am used to.  It took a bit of work and adding packages to get my development

environment up and running.  Its usually not so much work with Armbian or other "normal" distributions.

 

.. perhaps a bit off thread for this Armbian forum..

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Nick A

Nick A

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Rick0cm, I think you have a vontar board maybe the manufacturer mistakenly used a transpeed cover.

 

This is the vontar patch miniarch uses. We can apply that to Armbian. 

https://github.com/warpme/minimyth2/blob/master/script/kernel/linux-6.6/files/0637-arm64-dts-allwinner-h618-add-vontar-h618-TVbox.patch

 

Some other patches maybe needed for the vontar patch to work. Like openvfd.  

https://github.com/warpme/minimyth2/tree/master/script/kernel/linux-6.6/files

 

We can add vontar to the "build/config/boards" as WIP (Work In Progress). Since it uses a different wifi than transpeed.

 

U-boot patches are here but I don't see one for vontar. Looks like vontar uses the tanix tx6s axp313 defconfig.  The Makefile has "export mm_U-BOOT_BOARD_TYPE = tanix_tx6s_axp313_defconfig".

https://github.com/warpme/minimyth2/tree/master/script/bootloaders/u-boot-h616/files

https://github.com/warpme/minimyth2/blob/master/script/bootloaders/board-h618.vontar_h618/Makefile

https://github.com/warpme/minimyth2/blob/master/script/bootloaders/u-boot-h616/files/53-add-tanix_tx6s_axp313_defconfig.patch

 

When I have time.. I'll try to get vontar in the wip boards menu to build armbian.

Edited by Nick A
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Nick A

Nick A

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Nitrolark, Miniarch already has done the hard work for you. Like adding patches to u-boot and the linux kernel to support your TV Box.

Arch linux is a simple, lightweight distribution. Warpme choose this distro to run mythtv2 on TV Boxes because he didn't need a full linux distro.

 

Here is the official Arch Linux for arm.

https://archlinuxarm.org/platforms/armv8/allwinner/pine64  This is the installation guide for pine64. This is the only Arm64 board supported right now.

 

You need the u-boot from tanix_tx6s_axp313_defconfig and a linux kernel that has the vontar patches.

https://linux-sunxi.org/U-Boot

https://linux-sunxi.org/Mainline_Kernel_Howto

 

Then use the rootfs from Archlinuxarm.

wget http://os.archlinuxarm.org/os/ArchLinuxARM-aarch64-latest.tar.gz

bsdtar -xpf ArchLinuxARM-aarch64-latest.tar.gz -C root

 

ArchLinuxARM-aarch64-latest.tar.gz rootfs might only have the minimal packages needed to run the Arch distro anyways. You probably have to spend a lot of time adding packages like Rick0cm did on his box.

 

I think it would be easier to add Vontar to Armbian. Armbian Build Tools has everthing you need to make a custom server or desktop image. 

 

The reason I suggested Miniarch was because Warpme already has all the lastest patches for our boards. Applying them to Armbian can be pain because you have patches that are from older kernel and u-boot versions. Also, you have to work with patches from other boards that have been mainlined in Armbian that might have changed the source code you are trying to patch. Most of the patches will give you Hunk FAILED errors. You might get lucky with some of patches. Understanding C programming and Linux source is needed to get these patches to work.

Edited by Nick A
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hexdump

hexdump

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one thing to keep in mind is that the warpme tree and its patches on github has not been updated for a few months now except for the changelog and readme changes - all other changes which are in the last miniarch images are not available online so far ...

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afiftyp

afiftyp

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Hi out there. I am new here and have a Transspeed M98-8k board. I opened the box attached are two pictures of the board.

As already mentioned here I also found the connector for the serial console. Connecting a ttl converter I was able to see the messages during bootup.

Unfortunately no input was possible from the terminal. The reason is that the receive path is not completely populated on the board.  There is is tiny N-Channel MOS missing at the location marked in the image. After fitting such a sot23 part sending characters is working and i can control uboot and log into the system after booting.

First I have installed PRxxxx_20240202_87c56ad34_Armbian-unofficial_24.2.0-trunk_Transpeed-8k618-t_bookworm_edge_6.7.3.tar.xz onto a SD card.

This was booting up well and I did the initial armbian setting via hdmi and usb keyboard dongle. Unfortunately neither ethernet nor wifi was working.

A funny thing is that the wifi chip is marked ad sp6330 but the kernel loads the BCM4330 binary. 

[    8.210290] brcmfmac: brcmf_fw_alloc_request: using brcm/brcmfmac4330-sdio for chip BCM4330/4
[    9.318331] brcmfmac mmc3:0001:1: Direct firmware load for brcm/brcmfmac4330-sdio.clm_blob failed with error -2
[    9.598382] brcmfmac: brcmf_c_process_clm_blob: no clm_blob available (err=-2), device may have limited channels available
[    9.598407] brcmfmac: brcmf_c_process_txcap_blob: no txcap_blob available (err=-2)
[    9.598745] brcmfmac: brcmf_c_preinit_dcmds: Firmware: BCM4330/4 wl0: Oct 25 2011 19:34:12 version 5.90.125.104
[   46.592488] ieee80211 phy0: brcmf_p2p_create_p2pdev: timeout occurred
[   46.592518] ieee80211 phy0: brcmf_cfg80211_add_iface: add iface p2p-dev-wlan0 type 10 failed: err=-5

So far I have not found the clue how to get the onboard wifi working.

On ethernet I would guess that something has to be enabled via the dtb.

 

I also tried the miniarch image. This gets ethernet running. Wifi is not working.

 

Ethernet on the armbian image also seems to be related to to uboot. I pu the miniarch uboot and the vontar dtb onto the armbian image and this enables ethernet. Only using the vontar dtb does not.

 

cropMG_20240302_173511_538.jpg

cropMG_20240302_173533_772.jpg

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Nick A

Nick A

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Try using the brcmfmac4330-sdio .bin and .txt files from here. Just place them in /lib/firmware/brcm. The kernel messages should tell you the exact name it's looking for. Do you have any other brcmfmac messages in your log file? 

https://github.com/LibreELEC/brcmfmac_sdio-firmware/tree/master

 

I haven't added the ethernet patches for the armbian transpeed yet. Haven't been able to get it to work. I'll look at it again sometime this week.

Edited by Nick A
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afiftyp

afiftyp

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I placed the files brcmfmac4330-sdio files into the brcm directory and generated a symbolic link brcmfmac4330-sdio.transpeed,8k618-t.bin to it.

There are no other kernel messages related to brcmfmac.

 

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afiftyp

afiftyp

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@Nick A great, ethernet works.

The TanixTX6s-axp313 image does not boot on the 8k618 so I can't tell if it makes wifi working. The brcm firmware from that image gives the same result.

I can be wrong but I think having read in the past that wifi and bluetooth somehow depend on each other?

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afiftyp

afiftyp

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I'm still failing to bring up my wifi chip. The chip, both wifi and bluetooth work with the original android firmware.

I uses an oscilloscope to identify some connections between H618 and the wifi chip. I think I found the BT related IOs, but it does not start either.

During this investigation I discovered a difference on the clock line between H618:PG10 and the LPO input on wifi. With armbian the clock is 29.00kHz versus 32,768kHz under Android. Could that be the reason why wifi it is not starting up completely?

Up to now I was not able to find where I could influence this clock rate. Any hint is welcome.

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Nick A

Nick A

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The current code for transpeed wifi is  

        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
                clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "ext_clock";
                pinctrl-0 = <&x32clk_fanout_pin>;
                pinctrl-names = "default";
                reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */
        };

  

                        x32clk_fanout_pin: x32clk-fanout-pin {
                                pins = "PG10";
                                function = "clock";
                        };

 

Search online I found this.. 

https://oftc.irclog.whitequark.org/linux-sunxi/2023-04-03

10:45 <warpme> so it looks wifi lpo is wired to PG10?

10:45 <apritzel> warpme: without a schematic I guess it's the best we can hope for. Take those Allwinner Android DTs with a grain of salt though.

10:48 <apritzel> looks like it: if you program PG10 to use mux 3, it will spit out the 32KHz clock on that pin, so you can use that where ever you need a 32KHz clock

10:57 <warpme> indeed: in android dt i see "allwinner,muxsel = <0x03>;" Can i use such entry also in mainline 6.2 dts?

10:59 <apritzel> no, not directly, but you can use something equivalent

11:01 <apritzel> we describe mux 3 for PG10 as "clock", so you describe that pin in a child of the pinctrl node (like all the other pins), and say: function = "clock";

11:02 <apritzel> and then reference this in your .dts, in the respective pinctrl-0 property

11:03 <apritzel> that should be in the wifi device's node, not in the mmc1 node, but I am not 100% sure that works

11:07 <warpme> so for pindef: will this be ok: https://pastebin.com/4eSuDYRL line380 ?

11:12 <warpme> and for dts: https://pastebin.com/37tUnZu9 line186?

11:13 <apritzel> yes, that's what I meant

 

TanixTX6s-axp313 has the same wifi code as Vontar. Tanix uses firmware (ap6330@SDIO) where as the Vontar uses (ap6334@SDIO).

 

This is the wifi code for Tanix and Vontar.

https://github.com/warpme/minimyth2/blob/master/script/kernel/linux-6.6/files/0633-arm64-dts-allwinner-h616-add-Tanix-TX6s-axp313-TVbox.patch

https://github.com/warpme/minimyth2/blob/master/script/kernel/linux-6.6/files/0637-arm64-dts-allwinner-h618-add-vontar-h618-TVbox.patch 

	wifi_pwrseq: wifi_pwrseq {
		compatible = "mmc-pwrseq-simple";
		clocks = <&rtc CLK_OSC32K_FANOUT>;
		clock-names = "ext_clock";
		pinctrl-names = "default";
		pinctrl-0 = <&clk_losc>; /* PG10 with MUX3 set */
	};
			clk_losc: clk-losc {
				pins = "PG10";
				function = "clock";
			};

I guess clk-losc is defined in another file where it sets the MUX3.

 

https://mjmwired.net/kernel/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml

 

Orange pi 3/2/2w also have similar code for wifi. But they reset-gpios and add a power-on delay. 

https://github.com/warpme/minimyth2/blob/7a38452780ca72c198d75b9ca5fccb0c307e5b81/script/kernel/linux-6.5/files/0638-arm64-dts-allwinner-h618-add-opi-2w.patch#L113 

	wifi_pwrseq: wifi-pwrseq {
		compatible = "mmc-pwrseq-simple";
		clocks = <&rtc CLK_OSC32K_FANOUT>;
		clock-names = "ext_clock";
		pinctrl-names = "default";
		pinctrl-0 = <&clk_losc>; /* PG10 with MUX3 set */
		reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */
		post-power-on-delay-ms = <200>;
	};

 

You probably need this patch too. 0110-drivers-net-wireless-brcmfmac-add-ap6330-firmware.patch 

diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
index a907d7b06..ec71996c7 100644
--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
@@ -619,13 +619,17 @@ BRCMF_FW_DEF(4354, "brcmfmac4354-sdio");
 BRCMF_FW_DEF(4356, "brcmfmac4356-sdio");
 BRCMF_FW_DEF(4373, "brcmfmac4373-sdio");
 
+/* AMPAK */
+BRCMF_FW_DEF(AP6330, "brcmfmac-ap6330-sdio");
+
 static const struct brcmf_firmware_mapping brcmf_sdio_fwnames[] = {
 	BRCMF_FW_ENTRY(BRCM_CC_43143_CHIP_ID, 0xFFFFFFFF, 43143),
 	BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0x0000001F, 43241B0),
 	BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0x00000020, 43241B4),
 	BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0xFFFFFFC0, 43241B5),
 	BRCMF_FW_ENTRY(BRCM_CC_4329_CHIP_ID, 0xFFFFFFFF, 4329),
-	BRCMF_FW_ENTRY(BRCM_CC_4330_CHIP_ID, 0xFFFFFFFF, 4330),
+	BRCMF_FW_ENTRY(BRCM_CC_4330_CHIP_ID, 0xFFFFFFEF, 4330),
+	BRCMF_FW_ENTRY(BRCM_CC_4330_CHIP_ID, 0x10, AP6330),
 	BRCMF_FW_ENTRY(BRCM_CC_4334_CHIP_ID, 0xFFFFFFFF, 4334),
 	BRCMF_FW_ENTRY(BRCM_CC_43340_CHIP_ID, 0xFFFFFFFF, 43340),
 	BRCMF_FW_ENTRY(BRCM_CC_43341_CHIP_ID, 0xFFFFFFFF, 43340),

 

Try the Vontar image again and see if you are getting a 32Khz clock?

 

You can use my linux kernel dts with these changes and compile a new image using my build. Adding your box to the build/config/boards as a .wip would be even better.

 

Edited by Nick A
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afiftyp

afiftyp

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Thank you @Nick A for the detailed information. I checked the Vontar image again but no onboard wifi because of timeout even after symbolic linking the right .bin file to the requested name. And not surprising, I only measure 29kHz.

My guess is that the wifi/bt module can not sync communication with the SOC because of the wrong frequency.

I have also decompiled the fdt from Android and it looks quite similar regarding the configuration of the PG10 output. One difference is however that the fdt explicitly defines a fixed 32kHz entry.

Quote

    osc32k-clk {
        #clock-cells = <0x00>;
        compatible = "fixed-clock";
        clock-frequency = <0x8000>;
        clock-output-names = "osc32k";
        phandle = <0x0b>;
    };

 

        rtc_ccu@7000000 {
            compatible = "allwinner,sun50iw9-rtc-ccu";
            reg = <0x00 0x7000000 0x00 0x400>;
            #clock-cells = <0x01>;
            clocks = <0x0b>;
            clock-names = "losc";
            #reset-cells = <0x01>;
            phandle = <0x0e>;
        };

 

        rfkill {
            compatible = "allwinner,sunxi-rfkill";
            status = "okay";
            chip_en;
            power_en;
            pinctrl-0 = <0x63>;
            pinctrl-names = "default";
            phandle = <0xcc>;

            wlan {
                compatible = "allwinner,sunxi-wlan";
                clocks = <0x0e 0x04>;
                clock-names = "osc32k-out";
                wlan_busnum = <0x01>;
                wlan_power;
                wlan_regon = <0x23 0x06 0x12 0x00>;
                wlan_hostwake = <0x23 0x06 0x0f 0x00>;
                wakeup-source;
                phandle = <0xcd>;
            };

            bt {
                compatible = "allwinner,sunxi-bt";
                clocks = <0x0e 0x04>;
                clock-names = "osc32k-out";
                bt_power;
                bt_rst_n = <0x23 0x06 0x13 0x01>;
                phandle = <0xce>;
            };
        };

 

            losc_out@0 {
                allwinner,pins = "PG10";
                allwinner,function = "x32kfout";
                allwinner,muxsel = <0x03>;
                allwinner,drive = <0x02>;
                allwinner,pull = <0x01>;
                phandle = <0x63>;
            };

I have also looked in the H618 datasheet for clock and rtc but I could not match that to the source in the kernel yet. I was looking to find a simple way to feed the pin with the 32kHz.

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Nick A

Nick A

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I found more information on 32kHz clock. Starting at page 275.

https://www.scs.stanford.edu/~zyedidia/docs/allwinner/h616.pdf

 

3.13.3.4.6. RC Calibration

The basic circuit of RC calibration is shown in Figure 3-39. Whether to output the calibrated RC clock can be selected by the RC_Cali_SEL control bit, the calibration principle is as follows.

http://nskhuman.ru/allwinner/h616reglist.php?nreg=153

 

3.13.3.5.3. Fanout

Set the bit0 of 32K_FANOUT_GATING_REG to 1, and ensure that external pull-up resistor and voltage are normal, then 32.768 kHz fanout square wave can be output.

Fanout: The clock source of fanout can select RTC_32K, or 32K divided by PLL_PERI(2X), or 32K divided by HOSC.

http://nskhuman.ru/allwinner/h616reglist.php?nreg=161

 

/*
 * There are other differences between models, including:
 *
 *   - number of GPIO pins that can be configured to hold a certain level
 *   - crypto-key related registers (H5, H6)
 *   - boot process related (super standby, secondary processor entry address)
 *     registers (R40, H6)
 *   - SYS power domain controls (R40)
 *   - DCXO controls (H6)
 *   - RC oscillator calibration (H6)
 *
 * These functions are not covered by this driver.
 */

 

I guess there's no function to calibrate the internal RC oscillator yet.

https://github.com/torvalds/linux/blob/master/drivers/rtc/rtc-sun6i.c

 

This is the 32K_FANOUT_GATING_REG.

#define SUN6I_LOSC_OUT_GATING            0x0060

 

    rtc->ext_losc = clk_register_gate(NULL, clkout_name, init.name,
                      0, rtc->base + SUN6I_LOSC_OUT_GATING,
                      SUN6I_LOSC_OUT_GATING_EN_OFFSET, 0,
                      &rtc->lock);

 

If we can find out which clock source we are using and change it to something more accurate? All though, Calibrating the RTC is the ideal solution.

 

On these cheap boxes there is no external 32KHz oscillator. 

Edited by Nick A
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afiftyp

afiftyp

Posted
Posted
On 3/15/2024 at 11:33 PM, Nick A said:

Maybe you can try loading the original firmware .bin and .txt from android.

That was one of the first things I tried but the result was the same.

 

I know the document and I think there is code in "drivers/clk/sunxi-ng/ccu-sun6i-rtc.c". It is compiles as a kernel module but it doesn't get loaded. I'll put a few printk to see if its called and what happens inside.

 

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Nick A

Nick A

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You are right there is calibration code here.  

static int ccu_iosc_32k_prepare(struct clk_hw *hw)
{
	struct ccu_common *cm = hw_to_ccu_common(hw);
	u32 val;

	if (!have_iosc_calibration)
		return 0;

	val = readl(cm->base + IOSC_CLK_CALI_REG);
	writel(val | IOSC_CLK_CALI_EN | IOSC_CLK_CALI_SRC_SEL,
	       cm->base + IOSC_CLK_CALI_REG);

	return 0;
}

static void ccu_iosc_32k_unprepare(struct clk_hw *hw)
{
	struct ccu_common *cm = hw_to_ccu_common(hw);
	u32 val;

	if (!have_iosc_calibration)
		return;

	val = readl(cm->base + IOSC_CLK_CALI_REG);
	writel(val & ~(IOSC_CLK_CALI_EN | IOSC_CLK_CALI_SRC_SEL),
	       cm->base + IOSC_CLK_CALI_REG);
}

static unsigned long ccu_iosc_32k_recalc_rate(struct clk_hw *hw,
					      unsigned long parent_rate)
{
	struct ccu_common *cm = hw_to_ccu_common(hw);
	u32 val;

	if (have_iosc_calibration) {
		val = readl(cm->base + IOSC_CLK_CALI_REG);

		/* Assume the calibrated 32k clock is accurate. */
		if (val & IOSC_CLK_CALI_SRC_SEL)
			return LOSC_RATE;
	}

	val = readl(cm->base + IOSC_32K_CLK_DIV_REG) & IOSC_32K_CLK_DIV;

	return parent_rate / IOSC_32K_PRE_DIV / (val + 1);
}

static unsigned long ccu_iosc_32k_recalc_accuracy(struct clk_hw *hw,
						  unsigned long parent_accuracy)
{
	struct ccu_common *cm = hw_to_ccu_common(hw);
	u32 val;

	if (have_iosc_calibration) {
		val = readl(cm->base + IOSC_CLK_CALI_REG);

		/* Assume the calibrated 32k clock is accurate. */
		if (val & IOSC_CLK_CALI_SRC_SEL)
			return 0;
	}

	return parent_accuracy;
}

 

So I was looking at the code and I believe it's not the way the user manual calibrates the internal 32kHz clock.. I think it has to do with this.

 

"One major difference regarding the H6 is the 24 MHz crystal is now routed through the RTC, as a digitally compensated oscillator (DCXO). This is not covered in this patch and will be supported later. Other differences are either unrelated to RTC or clock functionality, such as boot or crypto related registers, or the driver simply doesn't use the feature in question. One example of the latter is the calibration function for the RC oscillator. We consider this clock to be very bad and avoid using it."

https://patchwork.kernel.org/project/linux-arm-kernel/patch/20181128093013.24442-7-wens@csie.org/

 

This code seems to be using the prescaler. IOSC_32K_PRE_DIV.

Edited by Nick A
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afiftyp

afiftyp

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Hello Nick A. I got my ugly wifi up ad running. In the end I have the .bin and .txt files that are used with Android

Quote

brcmfmac4330-sdio.transpeed,8k618-t.bin -> fw_bcm40183b2_ag.bin

brcmfmac4330-sdio.txt -> nvram_ap6330.txt

In addition I had to modify the dtb for mmc1 so that vqmmc-supply =  <&reg_dldo1>;

This enables 3.3V instead of 1.8.

 

I will check if the 0110-drivers-net-wireless-brcmfmac-add-ap6330-firmware.patch makes the difference so that the Android firmware isn't needed.

 

Regarding the 32kHz clock i found the following:

- the code from the file that has some calibration is not called because call to it's _probe function can never happen. It is in rtc/rtc-sun6i.c

Quote

static int sun6i_rtc_probe(struct platform_device *pdev)
{
    struct sun6i_rtc_dev *chip = sun6i_rtc;
    struct device *dev = &pdev->dev;

      ;

      ;

    if (!chip) {
        chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
        if (!chip)
            return -ENOMEM;

        spin_lock_init(&chip->lock);

        chip->base = devm_platform_ioremap_resource(pdev, 0);

        if (IS_ERR(chip->base))
            return PTR_ERR(chip->base);


        if (IS_REACHABLE(CONFIG_SUN6I_RTC_CCU)) {
            ret = sun6i_rtc_ccu_probe(dev, chip->base);
 

At that point chip has already a pointer assigned

 

- I think for calibrated 32kkHz clock both the IOSC_CLK_CALI_REG and the LOSC_OUT_GATING_REG need to be managed.

 

BTW when I compile the image from the build environment I have no 100M Ethernet. No idea why.

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Nick A

Nick A

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Posted

Good work.

Try the official linux firmware see if that works. https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/brcm

 

I compiled both the current and edge kernels today and didn't have any Ethernet issues. Maybe something changed in your build? 

 

I only have the HDMI audio patches applied to the edge kernel. If you need HDMI audio stick with edge.  

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afiftyp

afiftyp

Posted
Posted

Hi all,

I can withdraw some of my speculations:

Quote

[   23.140145] ieee80211 phy0: brcmf_p2p_create_p2pdev: timeout occurred
[   23.140172] ieee80211 phy0: brcmf_cfg80211_add_iface: add iface p2p-dev-wlan0 type 10 failed: err=-5

This seems to be normal in the log and does not indicate that wifi isn't working

 

There is no need to touch the voltage setting for the SP/AP6330 module in the device tree. This kind of settings seem to be adjusted by the code in the kernel module

Quote

lrwxrwxrwx 1 root root 21 Mar  8 14:55 brcmfmac4330-sdio.transpeed,8k618-t.bin -> brcmfmac4330-sdio.bin
lrwxrwxrwx 1 root root 24 Apr  2 09:32 brcmfmac4330-sdio.transpeed,8k618-t.txt -> brcmfmac-ap6330-sdio.txt

In the end, the symbolic links above were sufficient to get wifi working on the this SP6330 module. It is using a 26MHz xtal and the brcmfmac-ap6330-sdio.txt has this.

 

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afiftyp

afiftyp

Posted
Posted

Now the 32k clock is working. I do not find the manual easy tu understand on what has to be done so it was try and error until the auto calibration worked und gives a usable 32k clock.

This 32k clock is required to enable bluetooth on my SP6330. Without the clean clock the driver was not able to identify the ID of the module.

Attached are two patches.

One changes the sunxi rtc driver to calibrate the clock. The kernel needs to be recompiled to include the change.

The second patch extends the device tree to include bluetooth connected to uart1. It also adds a device tree overlay that can be activated and turns on spdif-tx on the optical output.

 

Not sure if my changes are god enough to convince armbian experts but it is at lease an idea to get things working.

 

Wit bluetooth i had the additional problem that it comes up with a default device address. One have to change it and that makes usable.

Code-to-enable-Internal-OSC-Clock-Auto-Calibration.patch Add-Bluetooth-and-spdif-tx-for-transeed8k.patch

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Nick A

Nick A

Posted
Posted (edited)

Hi afiftyp,

Thanks for the patches. I added them to my build. Unfortunately, bluetooth doesn't work for me.

  

[    7.691181] Bluetooth: Core ver 2.22
[    7.691282] NET: Registered PF_BLUETOOTH protocol family
[    7.691287] Bluetooth: HCI device and connection manager initialized
[    7.691306] Bluetooth: HCI socket layer initialized
[    7.691315] Bluetooth: L2CAP socket layer initialized
[    7.691331] Bluetooth: SCO socket layer initialized
.
.
.
[    7.873425] Bluetooth: HCI UART driver ver 2.3
[    7.873455] Bluetooth: HCI UART protocol H4 registered
[    7.873460] Bluetooth: HCI UART protocol BCSP registered
[    7.873560] Bluetooth: HCI UART protocol LL registered
[    7.873565] Bluetooth: HCI UART protocol ATH3K registered
[    7.873603] Bluetooth: HCI UART protocol Three-wire (H5) registered
[    7.873789] Bluetooth: HCI UART protocol Intel registered
[    7.873882] Bluetooth: HCI UART protocol Broadcom registered
[    7.873914] Bluetooth: HCI UART protocol QCA registered
[    7.873919] Bluetooth: HCI UART protocol AG6XX registered
[    7.873949] Bluetooth: HCI UART protocol Marvell registered
.
.
.
[   10.147991] Bluetooth: hci1: command 0x0c03 tx timeout
[   10.148042] Bluetooth: hci1: BCM: Reset failed (-110)

 

Edited by Nick A
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afiftyp

afiftyp

Posted
Posted

Hi Nick,

thanks for adding the patches. I updated from git, recompiled the image and wrote it to SD. All is as expected. Here is my bluetooth output from dmesg:

Quote

%%%%%@transpeed-8k618-t:~$ dmesg | grep Blue
[    7.235151] Bluetooth: Core ver 2.22
[    7.235268] Bluetooth: HCI device and connection manager initialized
[    7.235284] Bluetooth: HCI socket layer initialized
[    7.235292] Bluetooth: L2CAP socket layer initialized
[    7.235310] Bluetooth: SCO socket layer initialized

.

.

.
[    7.390561] Bluetooth: HCI UART driver ver 2.3
[    7.390586] Bluetooth: HCI UART protocol H4 registered
[    7.390591] Bluetooth: HCI UART protocol BCSP registered
[    7.390669] Bluetooth: HCI UART protocol LL registered
[    7.390675] Bluetooth: HCI UART protocol ATH3K registered
[    7.390720] Bluetooth: HCI UART protocol Three-wire (H5) registered
[    7.390880] Bluetooth: HCI UART protocol Intel registered
[    7.390980] Bluetooth: HCI UART protocol Broadcom registered
[    7.391011] Bluetooth: HCI UART protocol QCA registered
[    7.391016] Bluetooth: HCI UART protocol AG6XX registered
[    7.391043] Bluetooth: HCI UART protocol Marvell registered

.

.

.
[    7.728985] Bluetooth: hci0: BCM: chip id 62
[    7.731418] Bluetooth: hci0: BCM: features 0x0f
[    7.754771] Bluetooth: hci0: BCM4330B1
[    7.754786] Bluetooth: hci0: BCM4330B1 (002.001.003) build 0000
[    7.839508] Bluetooth: hci0: BCM4330B1 'brcm/BCM4330B1.hcd' Patch
[    7.853018] systemd[1]: Reached target bluetooth.target - Bluetooth Support.

.

.

.
[   13.305399] Bluetooth: hci0: BCM: features 0x0f
[   13.328864] Bluetooth: hci0: BCM4330B1 37.4 MHz Class 1 Ampak
[   13.328890] Bluetooth: hci0: BCM4330B1 (002.001.003) build 0000
[   13.331244] Bluetooth: hci0: BCM: Using default device address (43:30:b1:00:00:00)

I thick communication with the BT module is not coming up on your board because otherwise there should be a message line BCM: chip id xx.

My suspicion would be that some of the BT control signals  are connected to different GPIO or UART on your hardware.

I have used the gpio utilities to identify the ports (without bluetooth being in the device tree).

 

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didier nouveau

didier nouveau

Posted
Posted (edited)

Don't know if it is useful, but here you can get latest stock firmware for the Transpeed M98-8K PLUS:

 

https://drive.google.com/file/d/1TUFhd1Y24rMWS46MacF04fJSosWfKAKR/view

 

Open Source Version of Allwinner PhoenixCard to Dump, Unpack, Flash Allwinner IMG Files on Linux:

 

https://github.com/YuzukiTsuru/OpenixCard

Edited by didier nouveau
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