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I have a custom PCIe x4 lane card that I'm trying to integrate with a RockPro64 SBC. This custom card has been tested with many users on different platforms including a linux x86 system. When I try this card in a RK3399 system, I get a strange result when I view the assigned address space with the lspci command. It appears the address assigned is the exact value of the BAR address size for each BAR. If I change the BAR size the assigned address changes to that value. Below is a dmesg dump along with a lspci output for my device. Device is  [ad00:001e]. Any guidance?

 

dmesg:

[    2.395091] rockchip-pcie f8000000.pcie: host bridge /pcie@f8000000 ranges:
[    2.395148] rockchip-pcie f8000000.pcie:      MEM 0x00fa000000..0x00fbdfffff -> 0x00fa000000
[    2.395175] rockchip-pcie f8000000.pcie:       IO 0x00fbe00000..0x00fbefffff -> 0x00fbe00000
[    2.396226] rockchip-pcie f8000000.pcie: supply vpcie1v8 not found, using dummy regulator
[    2.396376] rockchip-pcie f8000000.pcie: supply vpcie0v9 not found, using dummy regulator
[    2.571466] rockchip-pcie f8000000.pcie: wait 1000 ms (from device tree) before bus scan
[    3.582289] rockchip-pcie f8000000.pcie: PCI host bridge to bus 0000:00
[    3.582303] pci_bus 0000:00: root bus resource [bus 00-1f]
[    3.582316] pci_bus 0000:00: root bus resource [mem 0xfa000000-0xfbdfffff]
[    3.582330] pci_bus 0000:00: root bus resource [io  0x0000-0xfffff] (bus address [0xfbe00000-0xfbefffff])
[    3.582387] pci 0000:00:00.0: [1d87:0100] type 01 class 0x060400
[    3.582547] pci 0000:00:00.0: supports D1
[    3.582557] pci 0000:00:00.0: PME# supported from D0 D1 D3hot
[    3.588072] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    3.588301] pci 0000:01:00.0: [ad00:001e] type 00 class 0x000000
[    3.588382] pci 0000:01:00.0: reg 0x10: [mem 0xfffffe00-0xffffffff]
[    3.588455] pci 0000:01:00.0: reg 0x18: [mem 0xffe00000-0xffffffff]
[    3.588606] pci 0000:01:00.0: Upstream bridge's Max Payload Size set to 128 (was 256, max 256)
[    3.588632] pci 0000:01:00.0: Max Payload Size set to 128 (was 128, max 128)
[    3.589238] pci_bus 0000:01: busn_res: [bus 01-1f] end is updated to 01
[    3.589272] pci 0000:00:00.0: BAR 14: assigned [mem 0xfa000000-0xfa2fffff]
[    3.589287] pci 0000:00:00.0: PCI bridge to [bus 01]
[    3.589302] pci 0000:00:00.0:   bridge window [mem 0xfa000000-0xfa2fffff]
[    3.589497] pcieport 0000:00:00.0: enabling device (0000 -> 0002)
[    3.589853] pcieport 0000:00:00.0: PME: Signaling with IRQ 37
[    3.590302] pcieport 0000:00:00.0: AER: enabled with IRQ 37

 

lspci -v:

00:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3399 PCI Express Root Port (prog-if 00 [Normal decode])
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 37
Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
Memory behind bridge: fa000000-fa2fffff [size=3M] [32-bit]
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- VGA16- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: <access denied>
Kernel driver in use: pcieport

01:00.0 Non-VGA unclassified device: Alta Data Technologies LLC Device 001e
Subsystem: Alta Data Technologies LLC Device 001e
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin A routed to IRQ 0
Region 0: Memory at fffffe00 (32-bit, non-prefetchable) [disabled] [size=512]
Region 2: Memory at ffe00000 (32-bit, non-prefetchable) [disabled] [size=2M]
Capabilities: <access denied>

 

 

Edited by JHadd

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