CubieTruck Plus 5 H8 Allwinner

[Guest Tom]

Hello, I just bought a CubieTruck Plus and I'm looking for ARMBIAN release. What should I take? It must compile a new version? Thank you for your answers.

[tkaiser]

Pretty uninteresting board (limited I/O bandwidth, ultra slow 'SATA', high CPU performance would need liquid cooling). Please read through http://forum.armbian.com/index.php/topic/657-cubitruck-plus-cubieboard-5/to understand.

 

A83T/H8 boards are currently not supported. Might change since we have now mainline u-boot support for these boards but to be honest: all available H8/A83T boards aren't worth a closer look (except for people that find a high count of slow Cortex-A7 CPU cores interesting)

[LinuXperia]

HI all.

Why are the Sources for the CubieTruck Plus H8 not included in Armbian?

On GitHub Cubieboard has the Sources for the Board Uploaded.

 

https://github.com/cubieboard/Cubietruck_Plus-u-boot

https://github.com/cubieboard/Cubietruck_Plus-binaries

https://github.com/cubieboard/Cubietruck_Plus-kernel-source

 

I have recently buyed a CubieTruck Plus.

Wanted test Armbian on it so i downloaded Armbian and tryed to build a new Image for the Cubie Truck Plus

but could not see anywhere that this board is supported in Armbian despite the fact that sources are available on github.

 

I gladly would love to help armbian to support this Board in case any help is needed.

[tkaiser]

Just enter 'cubietruck plus' here https://www.armbian.com/search_gcse/ to read through all the threads that exist already where it's explained why Cubietruck Plus is such a bad choice. TL;DR: Armbian is not about dealing with crappy bootloaders and crappy kernels. And there's still nothing else for H8/A83T boards available. I hope one of the mods merges this unnecessary sub thread soon to any of those other threads.

[LinuXperia]

HI tkaiser.

Thank you very much for your fast reply and for your engagement to keep the forum focused.

I did searched several times the Forum for 'cubietruck plus' using the forum search functionality but did not find anything related to this board.

Looks like i should have sued the google search instead. thanks for the tip!

 

I am ready to invest time and a little money to get this board supported.

if somebody has some tips where to start let me know.

i will soon fork the armbian github tree and start adding some stuff for this board.

Step 1 would be to get the newest version of uboot to compile and test it successfull.

[tkaiser]

For me the internal forum search is close to unusable unfortunately. In case you want to waste any time on this board you better check wens' work (linux-sunxi community, AFAIK he's the only one in this world still working on H8/A83T boards, at least I've not seen that much from Vishnu the last 4 months). With Armbian your best starting point is the bananapim3.wip file since both boards share most design flaws and H8 and A83T are the same anyway.

 

Edit: I hope you don't like this board due to its 'SATA port'? Since it's not SATA, it's slow as hell and also broken. GL830 swallows your data if it's at the end of a disk: http://www.cnx-software.com/2017/03/16/suptronics-x800-2-5-sata-drive-expansion-board-and-cases-for-raspberry-pi-23-and-odroid-c2-boards/#comments

[Igor]

1 hour ago, LinuXperia said:

Step 1 would be to get the newest version of uboot to compile and test it successfull.

 

Basic mainline U-boot support exits for months, but it lacks of some very important feature - smp. You can boot the board (I did my Banana M3 which is very similar) but only one core is running. There are some patches for this but am not sure if they work or if they were merged anywhere. If / when this will be fixed, you could run those two boards for basic services ... except SATA related since its crappy by design / hw.

[LinuXperia]

Hi Igor!

Thanks a lot for the Info!

 

I was able in the last hours to finaly compile, build and run successfull the u-boot loader CubieTruck uploaded to GitHub for the CubieTruck Plus 5 Board.

The Code itself that CubieBoards uploaded to github is not complete so i had to add missing files to the code to finaly compile it and run it on my CubieTruck Plus board.

 

After this i maked a Patch from this u-boot CubieTruck Plus 5 source repository to the original allwiner one to find all the missing parts and changes so i am able to apply them

later to mainline u-boot.

 

Here is the Link to the Diff Patch for the CubieTruck Plus 5 in case anybody is interessted.

 

https://mega.nz/#!OIpxmCiK!v8W4axaEBSyhwwGNBhIn7oCK66xxhrEiPZMo-Er8MG0

 

The Patch Itself need some cleansing but its full complete.

I see some interessting lines that can be used to get mainline u-boot sources to finaly support CubieTruck Plus in full mode.

 

just use as a search query "sun8iw6" to find the most relevant patch code for the CubieTruck Plus 5 Board.

Spoiler

+ /home/linuxperia/CubieBoardPlus/Cubietruck_Plus-u-boot/u-boot-2011.09/include/configs/sun8iw6p1.h \

diff --git a/tmp/bootloader/u-boot-2011.09/arch/arm/cpu/armv7/sun8iw6/mmc/mmc.h b/u-boot-2011.09/arch/arm/cpu/armv7/sun8iw6/mmc/mmc.h
old mode 100644
new mode 100755
index db1d570..9ae56a6
--- a/tmp/bootloader/u-boot-2011.09/arch/arm/cpu/armv7/sun8iw6/mmc/mmc.h
+++ b/u-boot-2011.09/arch/arm/cpu/armv7/sun8iw6/mmc/mmc.h
@@ -29,6 +29,7 @@
 #define MMC_VERSION_5_0		(MMC_VERSION_MMC | 0x50)
 
 #define MMC_MODE_HS		0x001
+#define MMC_MODE_DDR_52MHz 0x002
 #define MMC_MODE_HS_52MHz	0x010
 #define MMC_MODE_4BIT		0x100
 #define MMC_MODE_8BIT		0x200
@@ -87,6 +88,8 @@
 
 #define MMC_HS_TIMING		0x00000100
 #define MMC_HS_52MHZ		0x2
+#define MMC_DDR_52MHZ       0x4
+
 
 #define OCR_BUSY		0x80000000
 #define OCR_HCS			0x40000000
@@ -155,6 +158,9 @@
 #define EXT_CSD_BUS_WIDTH_1	0	/* Card is in 1 bit mode */
 #define EXT_CSD_BUS_WIDTH_4	1	/* Card is in 4 bit mode */
 #define EXT_CSD_BUS_WIDTH_8	2	/* Card is in 8 bit mode */
+#define EXT_CSD_BUS_DDR_4	5	/* Card is in 4 bit ddr mode */
+#define EXT_CSD_BUS_DDR_8	6	/* Card is in 8 bit ddr mode */


+int sunxi_clock_get_pll6(void)
+{
+     unsigned int reg_val;
+     int factor_n, div1,div2, pll6;
+     reg_val = readl(CCMU_PLL_PERIPH_CTRL_REG);
+     factor_n = ((reg_val >> 8) & 0xff);
+     div1 = ((reg_val >> 16) & 0x1) + 1;
+     div2 = ((reg_val >> 18) & 0x1) + 1;
+     pll6 = 24 * factor_n/div1/div2;
+     return pll6;
+}
+

+
+
+static int mmc_2xmode_config_clock(struct mmc *mmc, unsigned clk)
+{
+	struct sunxi_mmc_host* mmchost = (struct sunxi_mmc_host *)mmc->priv;
+	unsigned rval = readl(&mmchost->reg->clkcr);
+	unsigned int clkdiv = 0;
+	unsigned int rntsr = readl(&mmchost->reg->ntsr);
+	//unsigned int rgctrl = readl(&mmchost->reg->gctrl);
+
+	/* Disable Clock */
+	rval &= ~(1 << 16);
+	writel(rval, &mmchost->reg->clkcr);
+	if(mmc_update_clk(mmc))
+		return -1;
+
+	//disable mclk first
+	writel(0x4000000,mmchost->mclkbase);
+	mmcdbg("mmc %d mclkbase 0x%x\n",mmchost->mmc_no, readl(mmchost->mclkbase));
+
+	/*NTSR*/
+	rntsr |= (1<<31);
+	mmcdbg("mmc %d rntsr 0x%x\n",mmchost->mmc_no,rntsr);
+	writel(rntsr, &mmchost->reg->ntsr);
+
+
+	/*set ddr mode*/
+	//if(mmc->io_mode){
+	//	mmcdbg("first %d rgctrl 0x%x\n",mmchost->mmc_no,rgctrl);
+	//	rgctrl |= 1 << 10;
+	//	writel(rgctrl, &mmchost->reg->gctrl);
+	//	mmcdbg("after %d rgctrl 0x%x\n",mmchost->mmc_no,readl(&mmchost->reg->gctrl));
+	//}
+	//else{
+	//	mmcdbg("mmc not set ddr mmc->io_mode = %x\n",mmc->io_mode);
+	//}
+
+	if (clk <=400000) {
+		mmchost->mclk = 400000;
+		writel(0x4001000e, mmchost->mclkbase);
+		mmcdbg("mmc %d mclkbase 0x%x\n",mmchost->mmc_no, readl(mmchost->mclkbase));
+	} else {
+		u32 pllclk;
+		u32 n,m;
+
+		pllclk = sunxi_clock_get_pll6() * 1000000;
+		/*set ddr mode clock*/
+		if(mmc->io_mode){
+			clkdiv = pllclk /( clk *4 ) - 1;
+		}else{
+			clkdiv = pllclk /( clk *2 ) - 1;
+		}
+
+		if (clkdiv < 16) {
+			n = 0;
+			m = clkdiv;
+		} else if (clkdiv < 32) {
+			n = 1;
+			m = clkdiv>>1;
+		} else {
+			n = 2;
+			m = clkdiv>>2;
+		}
+		mmchost->mclk = clk;
+
+		if (clk <= 26000000){
+			writel(0x41000000| (n << 16) | m, mmchost->mclkbase);
+		}else{
+			writel(0x41000000 | (n << 16) | m, mmchost->mclkbase);
+		}
+		mmcdbg("init mmc %d pllclk %d, clk %d, mclkbase %x\n",mmchost->mmc_no,
+				pllclk, mmchost->mclk, readl(mmchost->mclkbase));
+		mmcdbg("Get round clk %d\n",pllclk/(1<<n)/(m+1)/2);
+		if (mmc->io_mode)
+			mmc->clock = pllclk/(1<<n)/(m+1)/2/2;
+		else
+		   mmc->clock = pllclk/(1<<n)/(m+1)/2;
+	}
+	//re-enable mclk
+	writel(readl(mmchost->mclkbase)|(1<<31),mmchost->mclkbase);
+	mmcdbg("mmc %d mclkbase 0x%x\n",mmchost->mmc_no, readl(mmchost->mclkbase));
+	/*
+	 * CLKCREG[7:0]: divider
+	 * CLKCREG[16]:  on/off
+	 * CLKCREG[17]:  power save
+	 */
+	/* Change Divider Factor */
+	rval &= ~(0xFF);
+	if (mmc->io_mode)
+		rval |= 0x1;
+	writel(rval, &mmchost->reg->clkcr);
+	if(mmc_update_clk(mmc)){
+		mmcdbg("mmc %d disable clock failed\n",mmchost->mmc_no);
+		return -1;
+	}
+	/* Re-enable Clock */
+	rval |= (3 << 16);
+	writel(rval, &mmchost->reg->clkcr);
+	if(mmc_update_clk(mmc)){
+		mmcinfo("mmc %d re-enable clock failed\n",mmchost->mmc_no);
+		return -1;
+	}
+
+	dumphex32("ccmu", (char*)SUNXI_CCM_BASE, 0x100);
+	dumphex32("gpio", (char*)SUNXI_PIO_BASE, 0x100);
+	dumphex32("mmc", (char*)mmchost->reg, 0x100);
+
+	mmcdbg("mmc %d ntsr 0x%x\n",mmchost->mmc_no,readl(&mmchost->reg->ntsr));
+	return 0;
+
+}
+
+
+
+
+
  
 /* winner's mmc controller definition */
+typedef struct _boot_sdcard_info_t
+{
+	__s32               card_ctrl_num;                //?¨¢¡§112|¨¬???¡ì|¨¬???¡§oy
+	__s32				boot_offset;                  //????¡ì??¡ì????£¤??o¡§??¨º????-o¡§a??¡§¡è¡§a?¡è???|¨¬?1¡§1¡§¡è¡§a
+	__s32 				card_no[4];                   //|¨¬?¨¤???????£¤|¨¬???¡ìo?, 16-31:GPIO?¨¤¡§¡èo??¨º?0-15:¡§o|¨¬?¡§o??¡ì????????¨¤¡§¡èo?
+	__s32 				speed_mode[4];                //??¡ì|¨¬??¡§¡ä?¡§¡§??¨º¡§o??¨º?0?¨ºo|¨¬¡§a?¡§¡ä?¨º????¡§1?¨ºo???¡§¡ä
+	__s32				line_sel[4];                  //??¡ì|¨¬??????¨º?0: 1???¨º????¡§1?¨º?4??
+	__s32				line_count[4];                //??¡ì¡§o1¡§????|¨¬???¡§oy
+	__s32  	        	sdc_2xmode[4];
+	__s32				ddrmode[4];
+	__s32               sdc_f_max[4]; 
+
+}
+boot_sdcard_info_t;
  
--- a/tmp/bootloader/u-boot-2011.09/arch/arm/cpu/armv7/sun8iw6/spl/clock_spl.c
+++ b/u-boot-2011.09/arch/arm/cpu/armv7/sun8iw6/spl/clock_spl.c
+void set_pll( void )
+{
+	__u32 reg_val;
+
+	//select C0_CPUX  clock src: OSC24M£¬AXI divide ratio is 2
+	//cpu/axi clock ratio
+	writel((1<<16 | 1<<0), CCMU_CPUX_AXI_CFG_REG);
+    //set PLL_C0CPUX, the  default  clk is 408M  ,PLL_OUTPUT= 24M*N/P
+	reg_val = 0x82001100;
+	writel(reg_val, CCMU_PLL_C0CPUX_CTRL_REG);
+    //wait pll1 stable
+#ifndef CONFIG_SUNXI_FPGA
+	do
+	{
+		reg_val = readl(CCMU_PLL_STB_STATUS_REG);
+	}
+	while(!(reg_val & 0x1));
+#endif
+
+    //set PLL_C1CPUX, the  default  clk is 408M  ,PLL_OUTPUT= 24M*N/P
+    reg_val = 0x82001100;
+    writel(reg_val, CCMU_PLL_C1CPUX_CTRL_REG);
+    //wait pll1 stable
+#ifndef CONFIG_SUNXI_FPGA
+    do
+    {
+        reg_val = readl(CCMU_PLL_STB_STATUS_REG);
+    }
+    while(!(reg_val & 0x2));
+#endif
+    //enable pll_hsic, default is 480M
+    writel(0x42800, CCMU_PLL_HSIC_CTRL_REG);  //set default value
+    writel(readl(CCMU_PLL_HSIC_CTRL_REG) | (1U << 31), CCMU_PLL_HSIC_CTRL_REG);
  
--- a/tmp/bootloader/u-boot-2011.09/arch/arm/include/asm/arch-sun8iw6/cpu.h
+++ b/u-boot-2011.09/arch/arm/include/asm/arch-sun8iw6/cpu.h
@@ -91,10 +91,13 @@
 #define SUNXI_UART4_BASE			0X01C29000
 #define SUNXI_UART5_BASE			0X01C29400
 
+#define SUNXI_TWI_OFFSET			(0x400)
+#define SUNXI_TWI_COUNT				(4)
 #define SUNXI_TWI0_BASE				0X01C2AC00
 #define SUNXI_TWI1_BASE				0X01C2B000
 #define SUNXI_TWI2_BASE				0X01C2B400
 #define SUNXI_TWI3_BASE				0X01C2B800
+#define SUNXI_CPUS_TWI_BASE      		0x01f02400
 
@@ -244,17 +255,21 @@ int do_boota_linux (struct fastboot_boot_img_hdr *hdr)
strcat((char *)hdr->cmdline, " partitions=");
strcat((char *)hdr->cmdline, s);

  -
+#if defined(CONFIG_SUN8IW6P1)
+		strcat((char *)hdr->cmdline, " axp_chipid=");
+		sprintf(data, "%d", plat_get_chip_id());
+		strcat((char *)hdr->cmdline, data);
+#endif

  
  ...

 

 

[LinuXperia]

HI all.
Just want report that after i filled out a bug issue report, cubieboard added the missing source files for the u-boot loader and fixed the compile build errors.
Now without any problems anybody can compile and build the legacy u-boot loader from sources for the Cubie Truck Plus board.

https://github.com/cubieboard/Cubietruck_Plus-u-boot/commit/a2f7a0903f4c393163fc656ae2af557bcaaff3f6

If everything works like expected we should have beginning of next week probably also some results related to mainline bootloader for the cubietruck plus. :-)
Will report back on Monday 17 May more about it.

Mainline Linux Kernel hopefully around end of May.
Happy looking forward running my Cubietrcuk Plus Board wiht newest software :-)

@Keiser Thanks a lot for sharing your highly valuable experience related to the Sata Interface.
I buyed it for several reasons its not my only allwiner board. have dozens of orange pi's too :-)

I just love new hardware like the H8 CPU.