More than one 1 Wire pin

[dotbg]

Board OPi Zero 512,  NEXT kernel 4.13.7, last Sunday compiled.

I'm trying do start more than one Dallas 1 wire interface. My primary idea was to add second w1-gpio overlay but no success. The next one is to edit device tree for w1-gpio to add another pin, and then to edit fixup script. And need some help to understand this ( copied from sun8i-h3-w1-gpio.dts )

 

fragment@0 {
target = <&pio>;
__overlay__ {
w1_pins: w1_pins {
pins = "PD14";
function = "gpio_in";
};
};
};

fragment@1 {
target-path = "/";
__overlay__ {
onewire@0 {
compatible = "w1-gpio";
pinctrl-names = "default";
pinctrl-0 = <&w1_pins>;
gpios = <&pio 3 14 0>; /* PD14 */
status = "okay";
};
};
};
 

What exactly w1_pins: w1_pins mean? w1_pins{} is some kind of definition? Any driver limitations for pins count?

 

btw: I be grateful for any other ideas how to enable second 1 Wire pin.

[martinayotte]

Why do you need a second OneWire ?

OneWire is a bus, you can have several devices sharing the same bus.

Anyway, I don't think the kernel driver support more than 1 bus.

[dotbg]

Because fail of one device drops down the whole bus.

p.s. 10x for answer. Anyway, I manage to bring up 3 pins. Kernel driver fully support more than one bus.

[martinayotte]

You're right ! I didn't looked at Documentation/devicetree/bindings/w1/w1-gpio.txt, multiple buses can be specified simply by separating them with commas...