SPI issue on BananaPi M2 (sun6i)

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Hello, guys,

has anyone ever faced issues with SPI controller on BananaPi M2 ?

I am having a  weird issue which is confirmed by at least 2 peripherals: Waveshare 3.5 LCD and NRF24 wireless chip.

The data incoming from MISO is always shifted by 1 bit to the left. , i.e. reading STATUS register of NRF24 gives 0x1C instead of expected value 0xE. The same story with other registers.  Saleae logic analyzer is always showing correct pictures !!! See attached image as an example of reading STATUS register from NRF24: master is sending 0x07 and receiving 0x0E (14).

I have tweaked byte rate and other parameters - no result. I have finally tried to connect using the bitbang SPI gpio driver and it worked as expected.

Does this mean the A31s SPI is broken? It is hard to believe in that... Or it is still a kernel (sun6i SPI driver or whatever) issue ? I am using Kernel 4.13 and 4.14.




Screenshot from 2017-11-16 17-51-53.png

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Armbian is a community driven open source project. Do you like to contribute your code?

I have a similar problem, the screen is tearing and I get SPI 110 errors filling up the dmesg log. Somebody mentioned the maximum transfer size should be the FIFO size (or FIFO size - 1) rather than the maximum transfer size (or maximum transfer size - 1).  I tried all that and it did not seem to help. If I change the txbuflen to something smaller (like 16384 instead of 65536 or 32768), the tearings seem to happen less often. This happens to both SPIs, I have attached an image showing the tearings - note the extra rectangles (above the login box) on both screens.




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Yes, you were 100% right.

I was able to overcome the issue  by rewriting the driver a little bit so that the maximum transfer length is always the FIFO size.

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