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Armbian Stretch 4.19.13 (Orange Pi Lite) - SPIDev0.0 Generates Extra SCK Cycle


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Posted

Hi,

 

I moved from Jessie to Stretch. On Jessie i looked under a scope and generated SCK (Orange Pi Lite is Master) is clean. However, after i switch to Stretch, my SPI Slave doesn't work anymore and further investigation reviews that it has similar problem as previous builds that extra clock cycle is generated before data is transfered. The behaviour is exactly similar to following image posted by another forumer but for earlier builds. I am not sure whether any of you experience the same problem. Thanks

 

my armbianEnv.txt

verbosity=1

logo=disabled

console=both

disp_mode=1920x1080p60

overlay_prefix=sun8i-h3

rootdev=UUID=25d9957f-6c04-4354-aa09-6b9c6f162257

rootfstype=ext4

overlays=spi-add-cs1 spi-spidev

param_spidev_spi_bus=0

param_spidev_spi_cs=0

param_spidev_max_freq=100000000

usbstoragequirks=0x2537:0x1066:u,0x2537:0x1068:u

 

 

KakaoTalk_20170929_114853585.jpg

Posted

There is no deny that  SCK has extrac burst before data is transferred. Further investigation confirms that it happens right before the edge of CE0 (in my case active low). If you use the kernel to control CE0, then you are safe. However, if you use a manual way to control CE0 (like me), then you will have problem due to slave may mistakenly interprete the burst as a clock and read in a wrong info. I am not sure whether i consider luckily, the kernel generated CE0 is active low (by default?). If you need an active-high CE0, may be someone can share some thought on how to achieve this. Cheers 

Posted
6 hours ago, Felix said:

I have not tried it though because it is not documented in /boot/overlays/READMExxx for SPI

It is not implemented either in Armbian overlays, so you would need to decompile/recompile the spidev overlay manually ...

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