

jsorocil
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jsorocil reacted to cu6apum in RK3399 - dts - i2s clocking - need help
Thanks.
Actually everything's been done by a kind genius, mr. Zhang from the very Rockchip. He is a very responsive and caring person! I had only to slightly touch the simple-card-utils.c so the driver sets the clock accordingly to the sample rate (there was only fixed multiplier available OOB).
The docs, as I cited above, say nothing on whether clkin_i2s can be an input. Yes, it can, and even on the same pin. We don't even need to mod the code, everything's done in devicetree!
We just have to declare this clock in the DTS, and (in my case) set it as gpio-mux-clock, not a fixed one. This was my insane idea, I didn't believe it could work, but it did. The whole clock tree of this CPU looks beautifully logical, one can do miracles with it, once he catches the idea.
Finally we have a precious hi-end data source for a serious grade DAC. The difference from Sitara that I love is 6 cores, PCIE for m.2 SSD, MIPI for a nice display, and lots of nice peripheria.
So, the DTS:
+ osc45m: osc45m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <45158400>; + }; + + osc49m: osc49m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <49152000>; + }; + clkin_i2s: clkin_i2s { - compatible = "fixed-clock"; + compatible = "gpio-mux-clock"; #clock-cells = <0>; - clock-frequency = <12288000>; clock-output-names = "clkin_i2s"; + clocks = <&osc45m>, <&osc49m>; + select-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; };
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jsorocil got a reaction from tparys in I2S sound with RT5651
Success!
% uname -a Linux miki 5.10.21-rockchip64 #21.02.3 SMP PREEMPT Mon Mar 8 01:05:08 UTC 2021 aarch64 aarch64 aarch64 GNU/Linux % dpkg -l | grep -v ^rc | grep -E "linux-dtb-current|linux-image-current" ii linux-dtb-current-rockchip64 21.02.3 arm64 Linux DTB, version 5.10.21-rockchip64 ii linux-image-current-rockchip64 21.02.3 arm64 Linux kernel, version 5.10.21-rockchip64 % aplay -l **** List of PLAYBACK Hardware Devices **** xcb_connection_has_error() returned true card 0: realtekrt5651co [realtek,rt5651-codec], device 0: ff890000.i2s-rt5651-aif1 rt5651-aif1-0 [ff890000.i2s-rt5651-aif1 rt5651-aif1-0] Subdevices: 0/1 Subdevice #0: subdevice #0 card 1: hdmisound [hdmi-sound], device 0: ff8a0000.i2s-i2s-hifi i2s-hifi-0 [ff8a0000.i2s-i2s-hifi i2s-hifi-0] Subdevices: 1/1 Subdevice #0: subdevice #0 % grep -iE "name|linux|version" /etc/armbian-release BOARD_NAME="NanoPi M4V2" DISTRIBUTION_CODENAME=focal VERSION=21.02.3 LINUXFAMILY=rockchip64
Patched .dts:
--- a/dt-bindings/clock/rk3399-cru.h +++ b/dt-bindings/clock/rk3399-cru.h @@ -19,6 +19,7 @@ #define ARMCLKB 9 /* sclk gates (special clocks) */ +#define SCLK_I2SOUT_SRC 64 #define SCLK_I2C1 65 #define SCLK_I2C2 66 #define SCLK_I2C3 67 diff --git a/rk3399-som-rk3399v2.dts b/rk3399-som-rk3399v2.dts index 2626e27..6c708f8 100644 --- a/rk3399-som-rk3399v2.dts +++ b/rk3399-som-rk3399v2.dts @@ -75,6 +75,35 @@ }; }; }; + + rt5651_card: rt5651-sound { + status = "okay"; + compatible = "simple-audio-card"; + pinctrl-names = "default"; + pinctrl-0 = <&hp_det>; + + simple-audio-card,name = "realtek,rt5651-codec"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>; + + simple-audio-card,widgets = + "Microphone", "Mic Jack", + "Headphone", "Headphone Jack"; + simple-audio-card,routing = + "Mic Jack", "micbias1", + "IN2P", "Mic Jack", + "IN3P", "Mic Jack", + "Headphone Jack", "HPOL", + "Headphone Jack", "HPOR"; + + simple-audio-card,cpu { + sound-dai = <&i2s1>; + }; + simple-audio-card,codec { + sound-dai = <&rt5651>; + }; + }; }; // root/ node &vcc3v3_sys { @@ -114,3 +143,44 @@ }; }; }; + +&i2c1 { + status = "okay"; + i2c-scl-rising-time-ns = <300>; + i2c-scl-falling-time-ns = <15>; + clock-frequency = <200000>; + + rt5651: rt5651@1a { + #sound-dai-cells = <0>; + compatible = "realtek,rt5651"; + reg = <0x1a>; + clocks = <&cru SCLK_I2S_8CH_OUT>; + clock-names = "mclk"; + status = "okay"; + }; +}; + +&i2s1 { + assigned-clocks = <&cru SCLK_I2SOUT_SRC>; + assigned-clock-parents = <&cru SCLK_I2S1_8CH>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s_8ch_mclk>,<&i2s1_2ch_bus>; + rockchip,playback-channels = <2>; + rockchip,capture-channels = <2>; + #sound-dai-cells = <0>; + status = "okay"; +}; + +&pinctrl { + i2s1 { + i2s_8ch_mclk: i2s-8ch-mclk { + rockchip,pins = <4 RK_PA0 1 &pcfg_pull_none>; + }; + }; + + headphone { + hp_det: hp-det { + rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +};
Funny thing is that clk_parent will change after audio player is started:
% cat /sys/kernel/debug/clk/clk_i2sout_src/clk_parent clk_i2s1 % mpv <audiofile> % cat /sys/kernel/debug/clk/clk_i2sout_src/clk_parent clk_i2s0
But in both cases sound works on my SoM-RK3399v2 SBC :) -
jsorocil got a reaction from denni_isl in SPI flash boot doesn't work
Finally found the problem - HW "issue". My SPI flash is not soldered (no place on motherboard) - it is connected with wires which are (presumably) too long. Workaround is to reduce SPI speed in u-boot and Linux.
U-boot:
diff --git a/arch/arm/dts/rk3399-rockpro64.dtsi b/arch/arm/dts/rk3399-rockpro64.dtsi index 9bca258012..797dd80d38 100644 --- a/arch/arm/dts/rk3399-rockpro64.dtsi +++ b/arch/arm/dts/rk3399-rockpro64.dtsi @@ -677,7 +677,7 @@ flash@0 { compatible = "jedec,spi-nor"; reg = <0>; - spi-max-frequency = <10000000>; + spi-max-frequency = <1000000>; }; };
Linux:
Recompile your device tree with reduced SPI speed:
flash@0 { compatible = "jedec,spi-nor"; reg = <0>; - spi-max-frequency = <10000000>; + spi-max-frequency = <1000000>; };
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jsorocil got a reaction from piter75 in SPI flash boot doesn't work
Finally found the problem - HW "issue". My SPI flash is not soldered (no place on motherboard) - it is connected with wires which are (presumably) too long. Workaround is to reduce SPI speed in u-boot and Linux.
U-boot:
diff --git a/arch/arm/dts/rk3399-rockpro64.dtsi b/arch/arm/dts/rk3399-rockpro64.dtsi index 9bca258012..797dd80d38 100644 --- a/arch/arm/dts/rk3399-rockpro64.dtsi +++ b/arch/arm/dts/rk3399-rockpro64.dtsi @@ -677,7 +677,7 @@ flash@0 { compatible = "jedec,spi-nor"; reg = <0>; - spi-max-frequency = <10000000>; + spi-max-frequency = <1000000>; }; };
Linux:
Recompile your device tree with reduced SPI speed:
flash@0 { compatible = "jedec,spi-nor"; reg = <0>; - spi-max-frequency = <10000000>; + spi-max-frequency = <1000000>; };
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jsorocil got a reaction from Werner in SPI flash boot doesn't work
Finally found the problem - HW "issue". My SPI flash is not soldered (no place on motherboard) - it is connected with wires which are (presumably) too long. Workaround is to reduce SPI speed in u-boot and Linux.
U-boot:
diff --git a/arch/arm/dts/rk3399-rockpro64.dtsi b/arch/arm/dts/rk3399-rockpro64.dtsi index 9bca258012..797dd80d38 100644 --- a/arch/arm/dts/rk3399-rockpro64.dtsi +++ b/arch/arm/dts/rk3399-rockpro64.dtsi @@ -677,7 +677,7 @@ flash@0 { compatible = "jedec,spi-nor"; reg = <0>; - spi-max-frequency = <10000000>; + spi-max-frequency = <1000000>; }; };
Linux:
Recompile your device tree with reduced SPI speed:
flash@0 { compatible = "jedec,spi-nor"; reg = <0>; - spi-max-frequency = <10000000>; + spi-max-frequency = <1000000>; };
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jsorocil reacted to Panzerknacker in ROC-RK3399-PC (Renegade Elite)
Boot from SPI directly to NVME works:
Latest U-Boot v2021.01-rc4 + this patch:
rockchip: roc-pc-rk3399: fix boot from SPI flash on spi1
https://patchwork.kernel.org/project/linux-rockchip/list/?series=403611
To build uboot on roc-pc:
make roc-pc-mezzanine-rk3399_defconfig
make -j6
./tools/mkimage -n rk3399 -T rkspi -d tpl/u-boot-tpl.bin:spl/u-boot-spl.bin idbloader-spi.img
To deploy uboot on spi:
dd if=idbloader-spi.img of=spi.img
(#0x60000 = 393216 = 4096 * 96)
dd if=u-boot.itb of=spi.img bs=4096 seek=96
flashcp -v spi.img /dev/mtd0
in U-Boot:
edit boot_targets to have nvme0 as first entry
On NVME drive (e.g. Samsung 970EVOPlus):
/boot/extlinux/extlinux.conf:
label mainline-kernel
kernel /boot/Image
initrd /boot/Initrd
# fdt /rk3399-roc-pc.dtb
fdt /boot/rk3399-roc-pc-mezzanine.dtb
append earlycon=uart8250,mmio32,0xff1a0000 console=tty1 console=ttyS2,1500000 swiotlb=1 root=/dev/nvme0n1p1 rootwait rw rootfstype=ext4 init=/sbin/init
ls /boot:
Image (Image-5.10.0-next-20201223)
Initrd (Initrd-5.10.0-next-20201223)
rk3399-roc-pc-mezzanine.dtb (rk3399-roc-pc-mezzanine.dtb-5.10.0-next-20201223)
Kernel built on roc-pc:
Latest linux-next
make -j6
make modules_install
kernelversion=`cat ./include/config/kernel.release`
cp .config /boot/config-$kernelversion
mkinitramfs -c gzip -o ./initramfs-$kernelversion $kernelversion
mkimage -A arm64 -O linux -T ramdisk -C none -a 0 -e 0 -n initramfs -d ./initramfs-$kernelversion ./Initrd
cp arch/arm64/boot/Image /boot/Image
cp Initrd /boot
cp arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtb /boot
cp arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dtb /boot
cp arch/arm64/boot/Image /boot/Image-$kernelversion
cp Initrd /boot/Initrd-$kernelversion
cp arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtb /boot/rk3399-roc-pc.dtb-$kernelversion
cp arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dtb /boot/rk3399-roc-pc-mezzanine.dtb-$kernelversion
example .config:
config
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jsorocil reacted to martinayotte in Rock PI 4 A not starting
No ! Not true ! Trust me, or as Igor said, read the Rockchip datasheets !
All RK3399, as well as any other Rockchip SoC, are loading U-Boot from eMMC first.
The fact that some boards is looking at SDCard is simply that this U-Boot loaded from eMMC is checking for SDCard with specific format, partitions, or uEnv.ini, and then continue boot process from SDCard.