jock Posted August 15, 2021 Author Posted August 15, 2021 @RetroFan90 Thanks for the photos, firmwares and all the details! The HK1 Max (aka YX_RK3328 board) is already very well supported since it is the board I got here and it is the main developing asset I got. The H96 Max looks quite ordinary box, I took a look to the dtb and it seems pretty standard to me, should work fine out of the box. Do you have issues with some peripherals with the H96 Max? 2 Quote
Jason Duhamell Posted August 15, 2021 Posted August 15, 2021 I have a MX10 Pro TV box I have been trying to get working with the dreaded SV6051 wifi. The board silkscreen is labeled as MXQ-RK3328-D4_A VER: 1.2. The board itself is 4GB ram and 64GB eMMC and everything is working other than the wifi. So far I am only having luck with RK3318 mainline and the rk3328 legacy Station M1 builds. The board will not boot with the legacy rk3318 build. The other issue I have noticed is when I use rk3318-config to enable the alternate SDIO bus, it will hang on reboot. I have decompiled the DTS from the Android backup I made using the Multitool (Multitool is a lifesaver, thank you.). Spoiler /dts-v1/; / { compatible = "rockchip,rk3328-evb-avb\0rockchip,rk3328"; interrupt-parent = <0x01>; #address-cells = <0x02>; #size-cells = <0x02>; model = "Rockchip RK3328 EVB avb"; ddr_timing { compatible = "rockchip,ddr-timing"; ddr3_speed_bin = <0x15>; ddr4_speed_bin = <0x0c>; pd_idle = <0x00>; sr_idle = <0x00>; sr_mc_gate_idle = <0x00>; srpd_lite_idle = <0x00>; standby_idle = <0x00>; auto_pd_dis_freq = <0x42a>; auto_sr_dis_freq = <0x320>; ddr3_dll_dis_freq = <0x12c>; ddr4_dll_dis_freq = <0x271>; phy_dll_dis_freq = <0x190>; ddr3_odt_dis_freq = <0x64>; phy_ddr3_odt_dis_freq = <0x64>; ddr3_drv = <0x28>; ddr3_odt = <0x78>; phy_ddr3_ca_drv = <0x1b>; phy_ddr3_ck_drv = <0x15>; phy_ddr3_dq_drv = <0x15>; phy_ddr3_odt = <0x03>; lpddr3_odt_dis_freq = <0x29a>; phy_lpddr3_odt_dis_freq = <0x29a>; lpddr3_drv = <0x28>; lpddr3_odt = <0xf0>; phy_lpddr3_ca_drv = <0x16>; phy_lpddr3_ck_drv = <0x13>; phy_lpddr3_dq_drv = <0x16>; phy_lpddr3_odt = <0x02>; lpddr4_odt_dis_freq = <0x320>; phy_lpddr4_odt_dis_freq = <0x320>; lpddr4_drv = <0x3c>; lpddr4_dq_odt = <0x28>; lpddr4_ca_odt = <0x28>; phy_lpddr4_ca_drv = <0x14>; phy_lpddr4_ck_cs_drv = <0x06>; phy_lpddr4_dq_drv = <0x06>; phy_lpddr4_odt = <0x10>; ddr4_odt_dis_freq = <0x29a>; phy_ddr4_odt_dis_freq = <0x29a>; ddr4_drv = <0x22>; ddr4_odt = <0xf0>; phy_ddr4_ca_drv = <0x16>; phy_ddr4_ck_drv = <0x13>; phy_ddr4_dq_drv = <0x16>; phy_ddr4_odt = <0x02>; ddr3a1_ddr4a9_de-skew = <0x02>; ddr3a0_ddr4a10_de-skew = <0x03>; ddr3a3_ddr4a6_de-skew = <0x03>; ddr3a2_ddr4a4_de-skew = <0x02>; ddr3a5_ddr4a8_de-skew = <0x03>; ddr3a4_ddr4a5_de-skew = <0x02>; ddr3a7_ddr4a11_de-skew = <0x03>; ddr3a6_ddr4a7_de-skew = <0x02>; ddr3a9_ddr4a0_de-skew = <0x02>; ddr3a8_ddr4a13_de-skew = <0x01>; ddr3a11_ddr4a3_de-skew = <0x02>; ddr3a10_ddr4cs0_de-skew = <0x02>; ddr3a13_ddr4a2_de-skew = <0x01>; ddr3a12_ddr4ba1_de-skew = <0x02>; ddr3a15_ddr4odt0_de-skew = <0x03>; ddr3a14_ddr4a1_de-skew = <0x02>; ddr3ba1_ddr4a15_de-skew = <0x02>; ddr3ba0_ddr4bg0_de-skew = <0x04>; ddr3ras_ddr4cke_de-skew = <0x04>; ddr3ba2_ddr4ba0_de-skew = <0x03>; ddr3we_ddr4bg1_de-skew = <0x02>; ddr3cas_ddr4a12_de-skew = <0x02>; ddr3ckn_ddr4ckn_de-skew = <0x0b>; ddr3ckp_ddr4ckp_de-skew = <0x0b>; ddr3cke_ddr4a16_de-skew = <0x02>; ddr3odt0_ddr4a14_de-skew = <0x04>; ddr3cs0_ddr4act_de-skew = <0x04>; ddr3reset_ddr4reset_de-skew = <0x07>; ddr3cs1_ddr4cs1_de-skew = <0x07>; ddr3odt1_ddr4odt1_de-skew = <0x07>; cs0_dm0_rx_de-skew = <0x0c>; cs0_dm0_tx_de-skew = <0x0a>; cs0_dq0_rx_de-skew = <0x0c>; cs0_dq0_tx_de-skew = <0x0a>; cs0_dq1_rx_de-skew = <0x0c>; cs0_dq1_tx_de-skew = <0x0a>; cs0_dq2_rx_de-skew = <0x0c>; cs0_dq2_tx_de-skew = <0x0a>; cs0_dq3_rx_de-skew = <0x0c>; cs0_dq3_tx_de-skew = <0x0a>; cs0_dq4_rx_de-skew = <0x0c>; cs0_dq4_tx_de-skew = <0x0a>; cs0_dq5_rx_de-skew = <0x0c>; cs0_dq5_tx_de-skew = <0x0a>; cs0_dq6_rx_de-skew = <0x0c>; cs0_dq6_tx_de-skew = <0x0a>; cs0_dq7_rx_de-skew = <0x0c>; cs0_dq7_tx_de-skew = <0x0a>; cs0_dqs0_rx_de-skew = <0x0a>; cs0_dqs0p_tx_de-skew = <0x0c>; cs0_dqs0n_tx_de-skew = <0x0c>; cs0_dm1_rx_de-skew = <0x0a>; cs0_dm1_tx_de-skew = <0x08>; cs0_dq8_rx_de-skew = <0x0a>; cs0_dq8_tx_de-skew = <0x08>; cs0_dq9_rx_de-skew = <0x0a>; cs0_dq9_tx_de-skew = <0x08>; cs0_dq10_rx_de-skew = <0x0a>; cs0_dq10_tx_de-skew = <0x08>; cs0_dq11_rx_de-skew = <0x0a>; cs0_dq11_tx_de-skew = <0x08>; cs0_dq12_rx_de-skew = <0x0a>; cs0_dq12_tx_de-skew = <0x08>; cs0_dq13_rx_de-skew = <0x0a>; cs0_dq13_tx_de-skew = <0x08>; cs0_dq14_rx_de-skew = <0x0a>; cs0_dq14_tx_de-skew = <0x08>; cs0_dq15_rx_de-skew = <0x0a>; cs0_dq15_tx_de-skew = <0x08>; cs0_dqs1_rx_de-skew = <0x09>; cs0_dqs1p_tx_de-skew = <0x0a>; cs0_dqs1n_tx_de-skew = <0x0a>; cs0_dm2_rx_de-skew = <0x0a>; cs0_dm2_tx_de-skew = <0x09>; cs0_dq16_rx_de-skew = <0x0a>; cs0_dq16_tx_de-skew = <0x09>; cs0_dq17_rx_de-skew = <0x0a>; cs0_dq17_tx_de-skew = <0x09>; cs0_dq18_rx_de-skew = <0x0a>; cs0_dq18_tx_de-skew = <0x09>; cs0_dq19_rx_de-skew = <0x0a>; cs0_dq19_tx_de-skew = <0x09>; cs0_dq20_rx_de-skew = <0x0a>; cs0_dq20_tx_de-skew = <0x09>; cs0_dq21_rx_de-skew = <0x0a>; cs0_dq21_tx_de-skew = <0x09>; cs0_dq22_rx_de-skew = <0x0a>; cs0_dq22_tx_de-skew = <0x09>; cs0_dq23_rx_de-skew = <0x0a>; cs0_dq23_tx_de-skew = <0x09>; cs0_dqs2_rx_de-skew = <0x09>; cs0_dqs2p_tx_de-skew = <0x0b>; cs0_dqs2n_tx_de-skew = <0x0b>; cs0_dm3_rx_de-skew = <0x07>; cs0_dm3_tx_de-skew = <0x07>; cs0_dq24_rx_de-skew = <0x07>; cs0_dq24_tx_de-skew = <0x07>; cs0_dq25_rx_de-skew = <0x07>; cs0_dq25_tx_de-skew = <0x07>; cs0_dq26_rx_de-skew = <0x07>; cs0_dq26_tx_de-skew = <0x07>; cs0_dq27_rx_de-skew = <0x07>; cs0_dq27_tx_de-skew = <0x07>; cs0_dq28_rx_de-skew = <0x07>; cs0_dq28_tx_de-skew = <0x07>; cs0_dq29_rx_de-skew = <0x07>; cs0_dq29_tx_de-skew = <0x07>; cs0_dq30_rx_de-skew = <0x07>; cs0_dq30_tx_de-skew = <0x07>; cs0_dq31_rx_de-skew = <0x07>; cs0_dq31_tx_de-skew = <0x07>; cs0_dqs3_rx_de-skew = <0x07>; cs0_dqs3p_tx_de-skew = <0x0a>; cs0_dqs3n_tx_de-skew = <0x0a>; cs1_dm0_rx_de-skew = <0x07>; cs1_dm0_tx_de-skew = <0x08>; cs1_dq0_rx_de-skew = <0x07>; cs1_dq0_tx_de-skew = <0x08>; cs1_dq1_rx_de-skew = <0x07>; cs1_dq1_tx_de-skew = <0x08>; cs1_dq2_rx_de-skew = <0x07>; cs1_dq2_tx_de-skew = <0x08>; cs1_dq3_rx_de-skew = <0x07>; cs1_dq3_tx_de-skew = <0x08>; cs1_dq4_rx_de-skew = <0x07>; cs1_dq4_tx_de-skew = <0x08>; cs1_dq5_rx_de-skew = <0x07>; cs1_dq5_tx_de-skew = <0x08>; cs1_dq6_rx_de-skew = <0x07>; cs1_dq6_tx_de-skew = <0x08>; cs1_dq7_rx_de-skew = <0x07>; cs1_dq7_tx_de-skew = <0x08>; cs1_dqs0_rx_de-skew = <0x06>; cs1_dqs0p_tx_de-skew = <0x09>; cs1_dqs0n_tx_de-skew = <0x09>; cs1_dm1_rx_de-skew = <0x07>; cs1_dm1_tx_de-skew = <0x07>; cs1_dq8_rx_de-skew = <0x07>; cs1_dq8_tx_de-skew = <0x08>; cs1_dq9_rx_de-skew = <0x07>; cs1_dq9_tx_de-skew = <0x07>; cs1_dq10_rx_de-skew = <0x07>; cs1_dq10_tx_de-skew = <0x08>; cs1_dq11_rx_de-skew = <0x07>; cs1_dq11_tx_de-skew = <0x07>; cs1_dq12_rx_de-skew = <0x07>; cs1_dq12_tx_de-skew = <0x08>; cs1_dq13_rx_de-skew = <0x07>; cs1_dq13_tx_de-skew = <0x07>; cs1_dq14_rx_de-skew = <0x07>; cs1_dq14_tx_de-skew = <0x08>; cs1_dq15_rx_de-skew = <0x07>; cs1_dq15_tx_de-skew = <0x07>; cs1_dqs1_rx_de-skew = <0x07>; cs1_dqs1p_tx_de-skew = <0x09>; cs1_dqs1n_tx_de-skew = <0x09>; cs1_dm2_rx_de-skew = <0x07>; cs1_dm2_tx_de-skew = <0x08>; cs1_dq16_rx_de-skew = <0x07>; cs1_dq16_tx_de-skew = <0x08>; cs1_dq17_rx_de-skew = <0x07>; cs1_dq17_tx_de-skew = <0x08>; cs1_dq18_rx_de-skew = <0x07>; cs1_dq18_tx_de-skew = <0x08>; cs1_dq19_rx_de-skew = <0x07>; cs1_dq19_tx_de-skew = <0x08>; cs1_dq20_rx_de-skew = <0x07>; cs1_dq20_tx_de-skew = <0x08>; cs1_dq21_rx_de-skew = <0x07>; cs1_dq21_tx_de-skew = <0x08>; cs1_dq22_rx_de-skew = <0x07>; cs1_dq22_tx_de-skew = <0x08>; cs1_dq23_rx_de-skew = <0x07>; cs1_dq23_tx_de-skew = <0x08>; cs1_dqs2_rx_de-skew = <0x06>; cs1_dqs2p_tx_de-skew = <0x09>; cs1_dqs2n_tx_de-skew = <0x09>; cs1_dm3_rx_de-skew = <0x07>; cs1_dm3_tx_de-skew = <0x07>; cs1_dq24_rx_de-skew = <0x07>; cs1_dq24_tx_de-skew = <0x08>; cs1_dq25_rx_de-skew = <0x07>; cs1_dq25_tx_de-skew = <0x07>; cs1_dq26_rx_de-skew = <0x07>; cs1_dq26_tx_de-skew = <0x07>; cs1_dq27_rx_de-skew = <0x07>; cs1_dq27_tx_de-skew = <0x07>; cs1_dq28_rx_de-skew = <0x07>; cs1_dq28_tx_de-skew = <0x07>; cs1_dq29_rx_de-skew = <0x07>; cs1_dq29_tx_de-skew = <0x07>; cs1_dq30_rx_de-skew = <0x07>; cs1_dq30_tx_de-skew = <0x07>; cs1_dq31_rx_de-skew = <0x07>; cs1_dq31_tx_de-skew = <0x07>; cs1_dqs3_rx_de-skew = <0x07>; cs1_dqs3p_tx_de-skew = <0x09>; cs1_dqs3n_tx_de-skew = <0x09>; phandle = <0x81>; }; aliases { ethernet0 = "/ethernet@ff540000"; ethernet1 = "/ethernet@ff550000"; i2c0 = "/i2c@ff150000"; i2c1 = "/i2c@ff160000"; i2c2 = "/i2c@ff170000"; i2c3 = "/i2c@ff180000"; serial0 = "/serial@ff110000"; serial1 = "/serial@ff120000"; serial2 = "/serial@ff130000"; }; cpus { #address-cells = <0x02>; #size-cells = <0x00>; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x00 0x00>; enable-method = "psci"; clocks = <0x02 0x06>; #cooling-cells = <0x02>; dynamic-power-coefficient = <0x78>; operating-points-v2 = <0x03>; cpu-supply = <0x04>; phandle = <0x06>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x00 0x01>; enable-method = "psci"; operating-points-v2 = <0x03>; phandle = <0x07>; }; cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x00 0x02>; enable-method = "psci"; operating-points-v2 = <0x03>; phandle = <0x08>; }; cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x00 0x03>; enable-method = "psci"; operating-points-v2 = <0x03>; phandle = <0x09>; }; }; cpu0-opp-table { compatible = "operating-points-v2"; opp-shared; rockchip,leakage-voltage-sel = <0x01 0x0a 0x00 0x0b 0xfe 0x01>; nvmem-cells = <0x05>; nvmem-cell-names = "cpu_leakage"; phandle = <0x03>; opp-408000000 { opp-hz = <0x00 0x18519600>; opp-microvolt = <0xe7ef0 0xe7ef0 0x149970>; opp-microvolt-L0 = <0xe7ef0 0xe7ef0 0x149970>; opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0x149970>; clock-latency-ns = <0x9c40>; opp-suspend; }; opp-600000000 { opp-hz = <0x00 0x23c34600>; opp-microvolt = <0xe7ef0 0xe7ef0 0x149970>; opp-microvolt-L0 = <0xe7ef0 0xe7ef0 0x149970>; opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0x149970>; clock-latency-ns = <0x9c40>; }; opp-816000000 { opp-hz = <0x00 0x30a32c00>; opp-microvolt = <0x100590 0x100590 0x149970>; opp-microvolt-L0 = <0x100590 0x100590 0x149970>; opp-microvolt-L1 = <0xf4240 0xf4240 0x149970>; clock-latency-ns = <0x9c40>; }; opp-1008000000 { opp-hz = <0x00 0x3c14dc00>; opp-microvolt = <0x118c30 0x118c30 0x149970>; opp-microvolt-L0 = <0x118c30 0x118c30 0x149970>; opp-microvolt-L1 = <0x10c8e0 0x10c8e0 0x149970>; clock-latency-ns = <0x9c40>; }; opp-1200000000 { opp-hz = <0x00 0x47868c00>; opp-microvolt = <0x137478 0x137478 0x149970>; opp-microvolt-L0 = <0x137478 0x137478 0x149970>; opp-microvolt-L1 = <0x12b128 0x12b128 0x149970>; clock-latency-ns = <0x9c40>; }; opp-1296000000 { opp-hz = <0x00 0x4d3f6400>; opp-microvolt = <0x149970 0x149970 0x149970>; opp-microvolt-L0 = <0x149970 0x149970 0x149970>; opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>; clock-latency-ns = <0x9c40>; }; }; arm-pmu { compatible = "arm,cortex-a53-pmu"; interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>; interrupt-affinity = <0x06 0x07 0x08 0x09>; }; cpuinfo { compatible = "rockchip,cpuinfo"; nvmem-cells = <0x0a 0x0b>; nvmem-cell-names = "id\0cpu-version"; }; firmware { optee { compatible = "linaro,optee-tz"; method = "smc"; }; android { compatible = "android,firmware"; boot_devices = "ff520000.dwmmc"; vbmeta { compatible = "android,vbmeta"; parts = "vbmeta,boot,system,vendor,dtbo"; }; fstab { compatible = "android,fstab"; vendor { compatible = "android,vendor"; dev = "/dev/block/by-name/vendor"; type = "ext4"; mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; fsmgr_flags = "wait,avb"; }; }; }; }; psci { compatible = "arm,psci-1.0"; method = "smc"; }; rockchip-suspend { compatible = "rockchip,pm-rk3328"; status = "okay"; rockchip,sleep-mode-config = <0x00>; rockchip,virtual-poweroff = <0x01>; phandle = <0x9d>; }; timer { compatible = "arm,armv8-timer"; interrupts = <0x01 0x0d 0xf08 0x01 0x0e 0xf08 0x01 0x0b 0xf08 0x01 0x0a 0xf08>; }; xin24m { compatible = "fixed-clock"; #clock-cells = <0x00>; clock-frequency = <0x16e3600>; clock-output-names = "xin24m"; phandle = <0x64>; }; i2s@ff000000 { compatible = "rockchip,rk3328-i2s\0rockchip,rk3066-i2s"; reg = <0x00 0xff000000 0x00 0x1000>; interrupts = <0x00 0x1a 0x04>; clocks = <0x02 0x29 0x02 0x137>; clock-names = "i2s_clk\0i2s_hclk"; dmas = <0x0c 0x0b 0x0c 0x0c>; dma-names = "tx\0rx"; status = "okay"; #sound-dai-cells = <0x00>; rockchip,bclk-fs = <0x80>; phandle = <0x92>; }; i2s@ff010000 { compatible = "rockchip,rk3328-i2s\0rockchip,rk3066-i2s"; reg = <0x00 0xff010000 0x00 0x1000>; interrupts = <0x00 0x1b 0x04>; clocks = <0x02 0x2a 0x02 0x138>; clock-names = "i2s_clk\0i2s_hclk"; dmas = <0x0c 0x0e 0x0c 0x0f>; dma-names = "tx\0rx"; status = "okay"; #sound-dai-cells = <0x00>; phandle = <0x90>; }; i2s@ff020000 { compatible = "rockchip,rk3328-i2s\0rockchip,rk3066-i2s"; reg = <0x00 0xff020000 0x00 0x1000>; interrupts = <0x00 0x1c 0x04>; clocks = <0x02 0x2b 0x02 0x139>; clock-names = "i2s_clk\0i2s_hclk"; dmas = <0x0c 0x00 0x0c 0x01>; dma-names = "tx\0rx"; pinctrl-names = "default\0sleep"; pinctrl-0 = <0x0d 0x0e 0x0f 0x10 0x11 0x12>; pinctrl-1 = <0x13>; status = "disabled"; phandle = <0x9e>; }; spdif@ff030000 { compatible = "rockchip,rk3328-spdif"; reg = <0x00 0xff030000 0x00 0x1000>; interrupts = <0x00 0x1d 0x04>; clocks = <0x02 0x2e 0x02 0x13a>; clock-names = "mclk\0hclk"; dmas = <0x0c 0x0a>; dma-names = "tx"; pinctrl-names = "default"; pinctrl-0 = <0x14>; status = "okay"; #sound-dai-cells = <0x00>; phandle = <0x94>; }; pdm@ff040000 { compatible = "rockchip,pdm"; reg = <0x00 0xff040000 0x00 0x1000>; clocks = <0x02 0x3d 0x02 0x152>; clock-names = "pdm_clk\0pdm_hclk"; dmas = <0x0c 0x10>; dma-names = "rx"; pinctrl-names = "default\0sleep"; pinctrl-0 = <0x15 0x16 0x17 0x18 0x19 0x1a>; pinctrl-1 = <0x1b>; status = "disabled"; phandle = <0x9f>; }; tsp@ff050000 { compatible = "rockchip,rk3328-tsp"; reg = <0x00 0xff050000 0x00 0x10000>; rockchip,grf = <0x1c>; interrupts = <0x00 0x48 0x04>; interrupt-names = "irq_tsp"; clocks = <0x02 0x5c 0x02 0x98 0x02 0x135>; clock-names = "clk_tsp\0aclk_tsp\0hclk_tsp"; pinctrl-names = "default"; pinctrl-0 = <0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28>; status = "disabled"; phandle = <0xa0>; }; syscon@ff100000 { compatible = "rockchip,rk3328-grf\0syscon\0simple-mfd"; reg = <0x00 0xff100000 0x00 0x1000>; #address-cells = <0x01>; #size-cells = <0x01>; phandle = <0x1c>; io-domains { compatible = "rockchip,rk3328-io-voltage-domain"; status = "okay"; vccio1-supply = <0x29>; vccio2-supply = <0x2a>; vccio3-supply = <0x29>; vccio4-supply = <0x2b>; vccio5-supply = <0x29>; vccio6-supply = <0x29>; pmuio-supply = <0x29>; phandle = <0xa1>; }; power-controller { compatible = "rockchip,rk3328-power-controller"; #power-domain-cells = <0x01>; #address-cells = <0x01>; #size-cells = <0x00>; status = "okay"; phandle = <0x4e>; pd_hevc@6 { reg = <0x06>; }; pd_video@5 { reg = <0x05>; clocks = <0x02 0x8b 0x02 0x142 0x02 0x41 0x02 0x42>; pm_qos = <0x2c 0x2d>; }; pd_vpu@8 { reg = <0x08>; clocks = <0x02 0x8f 0x02 0x146>; pm_qos = <0x2e>; }; }; reboot-mode { compatible = "syscon-reboot-mode"; offset = <0x5c8>; mode-bootloader = <0x5242c301>; mode-charge = <0x5242c30b>; mode-fastboot = <0x5242c309>; mode-loader = <0x5242c301>; mode-normal = <0x5242c300>; mode-recovery = <0x5242c303>; mode-ums = <0x5242c30c>; }; }; thermal-zones { soc-thermal { polling-delay-passive = <0x14>; polling-delay = <0x3e8>; sustainable-power = <0x3e8>; thermal-sensors = <0x2f 0x00>; phandle = <0xa2>; trips { trip-point-0 { temperature = <0x15f90>; hysteresis = <0x7d0>; type = "passive"; phandle = <0xa3>; }; trip-point-1 { temperature = <0x19a28>; hysteresis = <0x7d0>; type = "passive"; phandle = <0x30>; }; soc-crit { temperature = <0x1adb0>; hysteresis = <0x7d0>; type = "critical"; phandle = <0xa4>; }; }; cooling-maps { map0 { trip = <0x30>; cooling-device = <0x06 0xffffffff 0xffffffff>; contribution = <0x1000>; }; map1 { trip = <0x30>; cooling-device = <0x31 0xffffffff 0xffffffff>; contribution = <0x1000>; }; map2 { trip = <0x30>; cooling-device = <0x32 0xffffffff 0xffffffff>; contribution = <0x400>; }; map3 { trip = <0x30>; cooling-device = <0x33 0xffffffff 0xffffffff>; contribution = <0x400>; }; }; }; }; tsadc@ff250000 { compatible = "rockchip,rk3328-tsadc"; reg = <0x00 0xff250000 0x00 0x100>; interrupts = <0x00 0x3a 0x04>; rockchip,grf = <0x1c>; clocks = <0x02 0x24 0x02 0xd5>; clock-names = "tsadc\0apb_pclk"; assigned-clocks = <0x02 0x24>; assigned-clock-rates = <0xc350>; resets = <0x02 0x42>; reset-names = "tsadc-apb"; pinctrl-names = "init\0default\0sleep"; pinctrl-0 = <0x34>; pinctrl-1 = <0x35>; pinctrl-2 = <0x34>; #thermal-sensor-cells = <0x01>; rockchip,hw-tshut-temp = <0x1d4c0>; status = "okay"; phandle = <0x2f>; }; serial@ff110000 { compatible = "rockchip,rk3328-uart\0snps,dw-apb-uart"; reg = <0x00 0xff110000 0x00 0x100>; interrupts = <0x00 0x37 0x04>; clocks = <0x02 0x26 0x02 0xd2>; clock-names = "baudclk\0apb_pclk"; reg-shift = <0x02>; reg-io-width = <0x04>; dmas = <0x0c 0x02 0x0c 0x03>; pinctrl-names = "default"; pinctrl-0 = <0x36 0x37>; status = "okay"; phandle = <0xa5>; }; serial@ff120000 { compatible = "rockchip,rk3328-uart\0snps,dw-apb-uart"; reg = <0x00 0xff120000 0x00 0x100>; interrupts = <0x00 0x38 0x04>; clocks = <0x02 0x27 0x02 0xd3>; clock-names = "baudclk\0apb_pclk"; reg-shift = <0x02>; reg-io-width = <0x04>; dmas = <0x0c 0x04 0x0c 0x05>; pinctrl-names = "default"; pinctrl-0 = <0x38 0x39 0x3a>; status = "disabled"; phandle = <0xa6>; }; serial@ff130000 { compatible = "rockchip,rk3328-uart\0snps,dw-apb-uart"; reg = <0x00 0xff130000 0x00 0x100>; interrupts = <0x00 0x39 0x04>; clocks = <0x02 0x28 0x02 0xd4>; clock-names = "baudclk\0apb_pclk"; reg-shift = <0x02>; reg-io-width = <0x04>; dmas = <0x0c 0x06 0x0c 0x07>; pinctrl-names = "default"; pinctrl-0 = <0x3b>; status = "disabled"; phandle = <0xa7>; }; power-management@ff140000 { compatible = "rockchip,rk3328-pmu\0syscon\0simple-mfd"; reg = <0x00 0xff140000 0x00 0x1000>; phandle = <0xa8>; }; i2c@ff150000 { compatible = "rockchip,rk3328-i2c\0rockchip,rk3399-i2c"; reg = <0x00 0xff150000 0x00 0x1000>; interrupts = <0x00 0x24 0x04>; #address-cells = <0x01>; #size-cells = <0x00>; clocks = <0x02 0x37 0x02 0xcd>; clock-names = "i2c\0pclk"; pinctrl-names = "default"; pinctrl-0 = <0x3c>; status = "disabled"; phandle = <0xa9>; }; i2c@ff160000 { compatible = "rockchip,rk3328-i2c\0rockchip,rk3399-i2c"; reg = <0x00 0xff160000 0x00 0x1000>; interrupts = <0x00 0x25 0x04>; #address-cells = <0x01>; #size-cells = <0x00>; clocks = <0x02 0x38 0x02 0xce>; clock-names = "i2c\0pclk"; pinctrl-names = "default"; pinctrl-0 = <0x3d>; status = "okay"; phandle = <0xaa>; rk805@18 { compatible = "rockchip,rk805"; status = "okay"; reg = <0x18>; interrupt-parent = <0x3e>; interrupts = <0x06 0x08>; pinctrl-names = "default"; pinctrl-0 = <0x3f>; wakeup-source; gpio-controller; #gpio-cells = <0x02>; #clock-cells = <0x01>; clock-output-names = "rk805-clkout1\0rk805-clkout2"; phandle = <0x9a>; rtc { status = "okay"; }; pwrkey { status = "disabled"; }; gpio { status = "okay"; }; regulators { compatible = "rk805-regulator"; status = "okay"; #address-cells = <0x01>; #size-cells = <0x00>; DCDC_REG1 { regulator-compatible = "RK805_DCDC1"; regulator-name = "vdd_logic"; regulator-min-microvolt = <0xadf34>; regulator-max-microvolt = <0x162010>; regulator-initial-mode = <0x01>; regulator-ramp-delay = <0x30d4>; regulator-boot-on; regulator-always-on; phandle = <0x4b>; regulator-state-mem { regulator-mode = <0x02>; regulator-on-in-suspend; regulator-suspend-microvolt = <0xf4240>; }; }; DCDC_REG2 { regulator-compatible = "RK805_DCDC2"; regulator-name = "vdd_arm"; regulator-init-microvolt = <0x12b128>; regulator-min-microvolt = <0xadf34>; regulator-max-microvolt = <0x162010>; regulator-initial-mode = <0x01>; regulator-ramp-delay = <0x30d4>; regulator-boot-on; regulator-always-on; phandle = <0x04>; regulator-state-mem { regulator-mode = <0x02>; regulator-on-in-suspend; regulator-suspend-microvolt = <0xe7ef0>; }; }; DCDC_REG3 { regulator-compatible = "RK805_DCDC3"; regulator-name = "vcc_ddr"; regulator-initial-mode = <0x01>; regulator-boot-on; regulator-always-on; phandle = <0xab>; regulator-state-mem { regulator-mode = <0x02>; regulator-on-in-suspend; }; }; DCDC_REG4 { regulator-compatible = "RK805_DCDC4"; regulator-name = "vcc_io"; regulator-min-microvolt = <0x325aa0>; regulator-max-microvolt = <0x325aa0>; regulator-initial-mode = <0x01>; regulator-boot-on; regulator-always-on; phandle = <0x29>; regulator-state-mem { regulator-mode = <0x02>; regulator-on-in-suspend; regulator-suspend-microvolt = <0x325aa0>; }; }; LDO_REG1 { regulator-compatible = "RK805_LDO1"; regulator-name = "vdd_18"; regulator-min-microvolt = <0x1b7740>; regulator-max-microvolt = <0x1b7740>; regulator-boot-on; regulator-always-on; phandle = <0x2b>; regulator-state-mem { regulator-on-in-suspend; regulator-suspend-microvolt = <0x1b7740>; }; }; LDO_REG2 { regulator-compatible = "RK805_LDO2"; regulator-name = "vcc_18emmc"; regulator-min-microvolt = <0x1b7740>; regulator-max-microvolt = <0x1b7740>; regulator-boot-on; regulator-always-on; phandle = <0x2a>; regulator-state-mem { regulator-on-in-suspend; regulator-suspend-microvolt = <0x1b7740>; }; }; LDO_REG3 { regulator-compatible = "RK805_LDO3"; regulator-name = "vdd_11"; regulator-min-microvolt = <0x10c8e0>; regulator-max-microvolt = <0x10c8e0>; regulator-boot-on; regulator-always-on; phandle = <0xac>; regulator-state-mem { regulator-on-in-suspend; regulator-suspend-microvolt = <0x10c8e0>; }; }; }; }; }; i2c@ff170000 { compatible = "rockchip,rk3328-i2c\0rockchip,rk3399-i2c"; reg = <0x00 0xff170000 0x00 0x1000>; interrupts = <0x00 0x26 0x04>; #address-cells = <0x01>; #size-cells = <0x00>; clocks = <0x02 0x39 0x02 0xcf>; clock-names = "i2c\0pclk"; pinctrl-names = "default"; pinctrl-0 = <0x40>; status = "disabled"; phandle = <0xad>; }; i2c@ff180000 { compatible = "rockchip,rk3328-i2c\0rockchip,rk3399-i2c"; reg = <0x00 0xff180000 0x00 0x1000>; interrupts = <0x00 0x27 0x04>; #address-cells = <0x01>; #size-cells = <0x00>; clocks = <0x02 0x3a 0x02 0xd0>; clock-names = "i2c\0pclk"; pinctrl-names = "default"; pinctrl-0 = <0x41>; status = "disabled"; phandle = <0xae>; }; spi@ff190000 { compatible = "rockchip,rk3328-spi\0rockchip,rk3066-spi"; reg = <0x00 0xff190000 0x00 0x1000>; interrupts = <0x00 0x31 0x04>; #address-cells = <0x01>; #size-cells = <0x00>; clocks = <0x02 0x20 0x02 0xd1>; clock-names = "spiclk\0apb_pclk"; dmas = <0x0c 0x08 0x0c 0x09>; dma-names = "tx\0rx"; pinctrl-names = "default"; pinctrl-0 = <0x42 0x43 0x44 0x45>; status = "disabled"; phandle = <0xaf>; }; watchdog@ff1a0000 { compatible = "snps,dw-wdt"; reg = <0x00 0xff1a0000 0x00 0x100>; interrupts = <0x00 0x28 0x04>; status = "disabled"; phandle = <0xb0>; }; pwm@ff1b0000 { compatible = "rockchip,rk3328-pwm"; reg = <0x00 0xff1b0000 0x00 0x10>; #pwm-cells = <0x03>; pinctrl-names = "active"; pinctrl-0 = <0x46>; clocks = <0x02 0x3c 0x02 0xd6>; clock-names = "pwm\0pclk"; status = "disabled"; phandle = <0xb1>; }; pwm@ff1b0010 { compatible = "rockchip,rk3328-pwm"; reg = <0x00 0xff1b0010 0x00 0x10>; #pwm-cells = <0x03>; pinctrl-names = "active"; pinctrl-0 = <0x47>; clocks = <0x02 0x3c 0x02 0xd6>; clock-names = "pwm\0pclk"; status = "disabled"; phandle = <0xb2>; }; pwm@ff1b0020 { compatible = "rockchip,rk3328-pwm"; reg = <0x00 0xff1b0020 0x00 0x10>; #pwm-cells = <0x03>; pinctrl-names = "active"; pinctrl-0 = <0x48>; clocks = <0x02 0x3c 0x02 0xd6>; clock-names = "pwm\0pclk"; status = "disabled"; phandle = <0xb3>; }; pwm@ff1b0030 { compatible = "rockchip,remotectl-pwm"; reg = <0x00 0xff1b0030 0x00 0x10>; interrupts = <0x00 0x32 0x04>; #pwm-cells = <0x03>; pinctrl-names = "default"; pinctrl-0 = <0x49>; clocks = <0x02 0x3c 0x02 0xd6>; clock-names = "pwm\0pclk"; status = "okay"; remote_pwm_id = <0x03>; handle_cpu_id = <0x01>; remote_support_psci = <0x01>; phandle = <0xb4>; ir_key1 { rockchip,usercode = <0x4040>; rockchip,key_table = <0xf2 0xe8 0xba 0x9e 0xf4 0x67 0xf1 0x6c 0xef 0x69 0xee 0x6a 0xbd 0x66 0xea 0x73 0xe3 0x72 0xe2 0xd9 0xb2 0x74 0x4d 0x74 0xbc 0x71 0xec 0x8b 0xbf 0x190 0xe0 0x191 0xe1 0x192 0xe9 0xb7 0xe6 0xf8 0xe8 0xb9 0xe7 0xba 0xf0 0x184 0xbe 0x175>; }; ir_key3 { rockchip,usercode = <0x1dcc>; rockchip,key_table = <0xee 0xe8 0xf0 0x9e 0xf8 0x67 0xbb 0x6c 0xef 0x69 0xed 0x6a 0xfc 0x66 0xf1 0x73 0xfd 0x72 0xb7 0xd9 0xff 0x74 0xf3 0x71 0xbf 0x8b 0xf9 0x191 0xf5 0x192 0xb3 0x184 0xbe 0x02 0xba 0x03 0xb2 0x04 0xbd 0x05 0xf9 0x06 0xb1 0x07 0xfc 0x08 0xf8 0x09 0xb0 0x0a 0xb6 0x0b 0xb5 0x0e>; }; ir_key4 { rockchip,usercode = <0xfe01>; rockchip,key_table = <0xec 0xe8 0xe6 0x9e 0xe9 0x67 0xe5 0x6c 0xae 0x69 0xaf 0x6a 0xee 0x66 0xe7 0x73 0xef 0x72 0xbf 0x74 0xbe 0x71 0xb3 0x8b 0xff 0x184 0xb1 0x02 0xf2 0x03 0xf3 0x04 0xb5 0x05 0xf6 0x06 0xf7 0x07 0xb9 0x08 0xfa 0x09 0xfb 0x0a 0xfe 0x0b 0xbd 0x0e 0xbc 0xb7 0xf0 0xb8>; }; ir_key5 { rockchip,usercode = <0x7f80>; rockchip,key_table = <0xec 0xe8 0xd8 0x9e 0xc7 0x67 0xbf 0x6c 0xc8 0x69 0xc6 0x6a 0x8c 0x66 0x78 0x73 0x76 0x72 0x7e 0x74 0xed 0x74 0x7c 0x8b 0xb7 0x184>; }; ir_key6 { rockchip,usercode = <0xff00>; rockchip,key_table = <0xe5 0x66 0xaf 0x9e 0xb1 0x8b 0xfd 0xe8 0xbc 0x67 0xf5 0x6c 0xf9 0x69 0xf1 0x6a 0xa7 0x72 0xe4 0x73 0xbc 0x71 0xa8 0x74 0xb2 0x184 0xb0 0xb7 0xa4 0xb8 0xa8 0xb9 0xab 0xba 0xb3 0x7b 0xf0 0x7a 0xef 0x02 0xee 0x03 0xed 0x04 0xec 0x05 0xeb 0x74 0xea 0x07 0xe8 0x08 0xe7 0x09 0xe6 0x0a 0xe2 0x0b 0xf0 0x39 0xe1 0x0e>; }; ir_key7 { rockchip,usercode = <0x807f>; rockchip,key_table = <0x7e 0x74>; }; ir_key8 { rockchip,usercode = <0xfd02>; rockchip,key_table = <0xf2 0xe8 0xec 0x9e 0xf6 0x67 0xee 0x6c 0xf5 0x69 0xf1 0x6a 0xef 0x66 0xf8 0x73 0xf9 0x72 0xf7 0x74 0xf4 0x71 0xf3 0x8b 0xbf 0x184 0xeb 0x02 0xea 0x03 0xe9 0x04 0xe7 0x05 0xe6 0x06 0xe5 0x07 0xe3 0x08 0xe2 0x09 0xe1 0x0a 0xbe 0x0b 0xbd 0x0e 0xe4 0x43 0xd4 0x44 0xf0 0x3f 0xfb 0x7a 0xfa 0x7b 0xff 0xb7 0xfe 0xb8 0xfd 0xb9 0xfc 0xba>; }; }; amba { compatible = "simple-bus"; #address-cells = <0x02>; #size-cells = <0x02>; ranges; dmac@ff1f0000 { compatible = "arm,pl330\0arm,primecell"; reg = <0x00 0xff1f0000 0x00 0x4000>; interrupts = <0x00 0x00 0x04 0x00 0x01 0x04>; clocks = <0x02 0x86>; clock-names = "apb_pclk"; #dma-cells = <0x01>; peripherals-req-type-burst; phandle = <0x0c>; }; }; efuse@ff260000 { compatible = "rockchip,rk3328-efuse"; reg = <0x00 0xff260000 0x00 0x50>; #address-cells = <0x01>; #size-cells = <0x01>; clocks = <0x02 0x3e>; clock-names = "pclk_efuse"; rockchip,efuse-size = <0x20>; phandle = <0xb5>; id@7 { reg = <0x07 0x10>; phandle = <0x0a>; }; cpu-leakage@17 { reg = <0x17 0x01>; phandle = <0x05>; }; logic-leakage@19 { reg = <0x19 0x01>; phandle = <0x4c>; }; cpu-version@1a { reg = <0x1a 0x01>; bits = <0x03 0x03>; phandle = <0x0b>; }; }; saradc@ff280000 { compatible = "rockchip,rk3328-saradc\0rockchip,rk3399-saradc"; reg = <0x00 0xff280000 0x00 0x100>; interrupts = <0x00 0x50 0x04>; #io-channel-cells = <0x01>; clocks = <0x02 0x25 0x02 0xea>; clock-names = "saradc\0apb_pclk"; resets = <0x02 0x56>; reset-names = "saradc-apb"; status = "okay"; vref-supply = <0x2b>; phandle = <0xb6>; }; gpu@ff300000 { compatible = "arm,mali-450"; reg = <0x00 0xff300000 0x00 0x40000 0x00 0xff300000 0x00 0x40000>; interrupts = <0x00 0x5a 0x04 0x00 0x57 0x04 0x00 0x5d 0x04 0x00 0x58 0x04 0x00 0x59 0x04 0x00 0x5b 0x04 0x00 0x5c 0x04>; interrupt-names = "Mali_GP_IRQ\0Mali_GP_MMU_IRQ\0IRQPP\0Mali_PP0_IRQ\0Mali_PP0_MMU_IRQ\0Mali_PP1_IRQ\0Mali_PP1_MMU_IRQ"; clocks = <0x02 0x87>; clock-names = "clk_mali"; #cooling-cells = <0x02>; operating-points-v2 = <0x4a>; status = "okay"; mali-supply = <0x4b>; phandle = <0x31>; power_model { compatible = "arm,mali-simple-power-model"; voltage = <0x384>; frequency = <0x1f4>; static-power = <0x12c>; dynamic-power = <0x18c>; ts = <0x7d00 0x125c 0xffffffb0 0x02>; thermal-zone = "soc-thermal"; phandle = <0xb7>; }; }; gpu-opp-table { compatible = "operating-points-v2"; rockchip,leakage-voltage-sel = <0x01 0x0a 0x00 0x0b 0xfe 0x01>; nvmem-cells = <0x4c>; nvmem-cell-names = "gpu_leakage"; phandle = <0x4a>; opp-200000000 { opp-hz = <0x00 0xbebc200>; opp-microvolt = <0xe7ef0>; opp-microvolt-L0 = <0xe7ef0>; opp-microvolt-L1 = <0xe7ef0>; }; opp-300000000 { opp-hz = <0x00 0x11e1a300>; opp-microvolt = <0xee098>; opp-microvolt-L0 = <0xee098>; opp-microvolt-L1 = <0xe7ef0>; }; opp-400000000 { opp-hz = <0x00 0x17d78400>; opp-microvolt = <0x100590>; opp-microvolt-L0 = <0x100590>; opp-microvolt-L1 = <0xfa3e8>; }; opp-500000000 { opp-hz = <0x00 0x1dcd6500>; opp-microvolt = <0x118c30>; opp-microvolt-L0 = <0x118c30>; opp-microvolt-L1 = <0x10c8e0>; }; }; vpu_service@ff350000 { compatible = "vpu,sub"; iommu_enabled = <0x01>; iommus = <0x4d>; allocator = <0x01>; reg = <0x00 0xff350000 0x00 0x800>; interrupts = <0x00 0x09 0x04>; interrupt-names = "irq_dec"; dev_mode = <0x00>; power-domains = <0x4e 0x08>; phandle = <0x4f>; }; iommu@ff350800 { compatible = "rockchip,iommu"; reg = <0x00 0xff350800 0x00 0x40>; interrupts = <0x00 0x0b 0x04>; interrupt-names = "vpu_mmu"; clock-names = "aclk\0hclk"; clocks = <0x02 0x8f 0x02 0x146>; power-domains = <0x4e 0x08>; #iommu-cells = <0x00>; phandle = <0x4d>; }; avsd@ff351000 { compatible = "vpu,sub"; iommu_enabled = <0x01>; iommus = <0x4d>; allocator = <0x01>; reg = <0x00 0xff351000 0x00 0x200>; interrupts = <0x00 0x09 0x04>; interrupt-names = "irq_dec"; power-domains = <0x4e 0x08>; dev_mode = <0x00>; phandle = <0x50>; }; vpu_combo { compatible = "rockchip,rk3328-vpu-combo\0rockchip,vpu_combo"; rockchip,grf = <0x1c>; subcnt = <0x02>; rockchip,sub = <0x4f 0x50>; clocks = <0x02 0x8f 0x02 0x146>; clock-names = "aclk_vcodec\0hclk_vcodec"; resets = <0x02 0xa0 0x02 0xa2>; reset-names = "video_a\0video_h"; mode_bit = <0x00>; mode_ctrl = <0x00>; power-domains = <0x4e 0x08>; status = "okay"; phandle = <0xb8>; }; rkvdec@ff36000 { compatible = "rockchip,rk3328-rkvdec\0rockchip,rkvdec"; reg = <0x00 0xff360000 0x00 0x400>; interrupts = <0x00 0x07 0x04>; interrupt-names = "irq_dec"; clocks = <0x02 0x8b 0x02 0x142 0x02 0x41 0x02 0x42>; clock-names = "aclk_vcodec\0hclk_vcodec\0clk_cabac\0clk_core"; resets = <0x02 0xa4 0x02 0xa6 0x02 0xa5 0x02 0xa7 0x02 0xa9 0x02 0xa8>; reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_cabac\0video_core"; rockchip,grf = <0x1c>; iommus = <0x51>; allocator = <0x01>; power-domains = <0x4e 0x05>; operating-points-v2 = <0x52>; #cooling-cells = <0x02>; devfreq = <0x33>; status = "okay"; vcodec-supply = <0x4b>; phandle = <0x32>; vcodec_power_model { compatible = "vcodec_power_model"; dynamic-power-coefficient = <0x78>; static-power-coefficient = <0xc8>; ts = <0x7d00 0x125c 0xffffffb0 0x02>; thermal-zone = "soc-thermal"; phandle = <0xb9>; }; }; rkvdec-opp-table { compatible = "operating-points-v2"; rockchip,leakage-voltage-sel = <0x01 0x0a 0x00 0x0b 0xfe 0x01>; nvmem-cells = <0x4c>; nvmem-cell-names = "rkvdec_leakage"; phandle = <0x52>; opp-100000000 { opp-hz = <0x00 0x5f5e100>; opp-microvolt = <0xee098>; opp-microvolt-L0 = <0xee098>; opp-microvolt-L1 = <0xe7ef0>; }; opp-200000000 { opp-hz = <0x00 0xbebc200>; opp-microvolt = <0xee098>; opp-microvolt-L0 = <0xee098>; opp-microvolt-L1 = <0xe7ef0>; }; opp-500000000 { opp-hz = <0x00 0x1dcd6500>; opp-microvolt = <0x106738>; opp-microvolt-L0 = <0x106738>; opp-microvolt-L1 = <0x100590>; }; }; iommu@ff360480 { compatible = "rockchip,iommu"; reg = <0x00 0xff360480 0x00 0x40 0x00 0xff3604c0 0x00 0x40>; interrupts = <0x00 0x4a 0x04>; interrupt-names = "rkvdec_mmu"; clocks = <0x02 0x8b 0x02 0x142>; clock-names = "aclk_vcodec\0hclk_vcodec"; power-domains = <0x4e 0x05>; #iommu-cells = <0x00>; phandle = <0x51>; }; h265e@ff330000 { compatible = "rockchip,h265e"; rockchip,grf = <0x1c>; iommu_enabled = <0x01>; iommus = <0x53>; reg = <0x00 0xff330000 0x00 0x200>; interrupts = <0x00 0x5f 0x04>; clocks = <0x02 0x93 0x02 0xdd 0x02 0x44 0x02 0x43 0x02 0x8c 0x02 0x82>; clock-names = "aclk_h265\0pclk_h265\0clk_core\0clk_dsp\0aclk_venc\0aclk_axi2sram"; rockchip,srv = <0x54>; mode_bit = <0x0b>; mode_ctrl = <0x40c>; allocator = <0x01>; power-domains = <0x4e 0x06>; status = "okay"; phandle = <0xba>; }; iommu@ff330200 { compatible = "rockchip,iommu"; reg = <0x00 0xff330200 0x00 0x100>; interrupts = <0x00 0x60 0x04>; interrupt-names = "h265e_mmu"; clocks = <0x02 0x93 0x02 0xdd>; clock-names = "aclk\0hclk"; power-domains = <0x4e 0x06>; #iommu-cells = <0x00>; phandle = <0x53>; }; vepu@ff340000 { compatible = "rockchip,rk3328-vepu\0rockchip,vepu"; rockchip,grf = <0x1c>; iommu_enabled = <0x01>; iommus = <0x55>; reg = <0x00 0xff340000 0x00 0x400>; interrupts = <0x00 0x61 0x04>; clocks = <0x02 0x94 0x02 0x14a 0x02 0x44>; clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; resets = <0x02 0xb7 0x02 0xb6>; reset-names = "video_h\0video_a"; rockchip,srv = <0x54>; mode_bit = <0x0b>; mode_ctrl = <0x40c>; allocator = <0x01>; power-domains = <0x4e 0x06>; status = "okay"; phandle = <0xbb>; }; iommu@ff340800 { compatible = "rockchip,iommu"; reg = <0x00 0xff340800 0x00 0x40>; interrupts = <0x00 0x62 0x04>; interrupt-names = "vepu_mmu"; clocks = <0x02 0x94 0x02 0x14a>; clock-names = "aclk\0hclk"; power-domains = <0x4e 0x06>; #iommu-cells = <0x00>; phandle = <0x55>; }; venc_srv { compatible = "rockchip,mpp_service"; phandle = <0x54>; }; vop@ff370000 { compatible = "rockchip,rk3328-vop"; reg = <0x00 0xff370000 0x00 0x3efc>; interrupts = <0x00 0x20 0x04>; clocks = <0x02 0x91 0x02 0x78 0x02 0x13b>; clock-names = "aclk_vop\0dclk_vop\0hclk_vop"; assigned-clocks = <0x02 0x78>; assigned-clock-parents = <0x02 0x7a>; resets = <0x02 0x85 0x02 0x86 0x02 0x87>; reset-names = "axi\0ahb\0dclk"; iommus = <0x56>; status = "okay"; phandle = <0xbc>; port { #address-cells = <0x01>; #size-cells = <0x00>; phandle = <0x61>; endpoint@0 { reg = <0x00>; remote-endpoint = <0x57>; phandle = <0x5f>; }; endpoint@1 { reg = <0x01>; remote-endpoint = <0x58>; phandle = <0x60>; }; }; }; iommu@ff373f00 { compatible = "rockchip,iommu"; reg = <0x00 0xff373f00 0x00 0x100>; interrupts = <0x00 0x20 0x04>; interrupt-names = "vop_mmu"; clocks = <0x02 0x91 0x02 0x13b>; clock-names = "aclk\0hclk"; #iommu-cells = <0x00>; status = "okay"; phandle = <0x56>; }; rga@ff3900000 { compatible = "rockchip,rga2"; dev_mode = <0x01>; reg = <0x00 0xff390000 0x00 0x1000>; interrupts = <0x00 0x21 0x04>; clocks = <0x02 0x9a 0x02 0x154 0x02 0x45>; clock-names = "aclk_rga\0hclk_rga\0clk_rga"; dma-coherent; status = "okay"; phandle = <0xbd>; }; iep@ff3a0000 { compatible = "rockchip,iep"; iommu_enabled = <0x01>; iommus = <0x59>; reg = <0x00 0xff3a0000 0x00 0x800>; interrupts = <0x00 0x1f 0x04>; clocks = <0x02 0x9b 0x02 0x153>; clock-names = "aclk_iep\0hclk_iep"; power-domains = <0x4e 0x05>; allocator = <0x01>; version = <0x02>; status = "okay"; phandle = <0xbe>; }; iommu@ff3a0800 { compatible = "rockchip,iommu"; reg = <0x00 0xff3a0800 0x00 0x40>; interrupts = <0x00 0x1f 0x04>; interrupt-names = "iep_mmu"; clocks = <0x02 0x9b 0x02 0x153>; clock-names = "aclk\0hclk"; power-domains = <0x4e 0x05>; #iommu-cells = <0x00>; status = "okay"; phandle = <0x59>; }; hdmi@ff3c0000 { compatible = "rockchip,rk3328-dw-hdmi"; reg = <0x00 0xff3c0000 0x00 0x20000>; reg-io-width = <0x04>; interrupts = <0x00 0x23 0x04 0x00 0x47 0x04>; clocks = <0x02 0xe7 0x02 0x46 0x02 0x1e 0x02 0x147>; clock-names = "iahb\0isfr\0cec\0hclk_vio"; phys = <0x5a>; phy-names = "hdmi_phy"; pinctrl-names = "default\0gpio"; pinctrl-0 = <0x5b 0x5c 0x5d>; pinctrl-1 = <0x5e>; resets = <0x02 0x8f 0x02 0x51>; reset-names = "hdmi\0hdmiphy"; rockchip,grf = <0x1c>; status = "okay"; #sound-dai-cells = <0x00>; ddc-i2c-scl-high-time-ns = <0x2599>; ddc-i2c-scl-low-time-ns = <0x2710>; phandle = <0x93>; ports { port { #address-cells = <0x01>; #size-cells = <0x00>; phandle = <0xbf>; endpoint@0 { reg = <0x00>; remote-endpoint = <0x5f>; phandle = <0x57>; }; }; }; }; tve@ff373e00 { compatible = "rockchip,rk3328-tve"; reg = <0x00 0xff373e00 0x00 0x100 0x00 0xff420000 0x00 0x10000>; rockchip,saturation = <0x376749>; rockchip,brightcontrast = <0xa305>; rockchip,adjtiming = <0xb6c00880>; rockchip,lumafilter0 = <0x1ff0000>; rockchip,lumafilter1 = <0xf40200fe>; rockchip,lumafilter2 = <0xf332d70c>; rockchip,daclevel = <0x22>; rockchip,dac1level = <0x07>; status = "okay"; phandle = <0xc0>; ports { port { #address-cells = <0x01>; #size-cells = <0x00>; phandle = <0xc1>; endpoint@0 { reg = <0x00>; remote-endpoint = <0x60>; phandle = <0x58>; }; }; }; }; display-subsystem { compatible = "rockchip,display-subsystem"; ports = <0x61>; status = "okay"; logo-memory-region = <0x62>; secure-memory-region = <0x63>; phandle = <0xc2>; route { route-hdmi { status = "okay"; logo,uboot = "logo.bmp"; logo,kernel = "logo_kernel.bmp"; logo,mode = "fullscreen"; charge_logo,mode = "fullscreen"; connect = <0x5f>; phandle = <0xc3>; }; route-tve { status = "okay"; logo,uboot = "logo.bmp"; logo,kernel = "logo_kernel.bmp"; logo,mode = "fullscreen"; charge_logo,mode = "fullscreen"; connect = <0x60>; phandle = <0xc4>; }; }; }; codec@ff410000 { compatible = "rockchip,rk3328-codec"; reg = <0x00 0xff410000 0x00 0x1000>; rockchip,grf = <0x1c>; clocks = <0x02 0xeb 0x02 0x2a>; clock-names = "pclk\0mclk"; status = "okay"; #sound-dai-cells = <0x00>; phandle = <0x91>; }; hdmiphy@ff430000 { compatible = "rockchip,rk3328-hdmi-phy"; reg = <0x00 0xff430000 0x00 0x10000>; interrupts = <0x00 0x53 0x04>; #phy-cells = <0x00>; clocks = <0x02 0xe4 0x64>; clock-names = "sysclk\0refclk"; #clock-cells = <0x00>; clock-output-names = "hdmi_phy"; status = "okay"; rockchip,phy-table = <0x9d5b340 0x07 0x0a 0x0a 0x0a 0x00 0x00 0x08 0x08 0x08 0x00 0xac 0xcc 0xcc 0xcc 0x1443fd00 0x0b 0x0d 0x0d 0x0d 0x07 0x15 0x08 0x08 0x08 0x3f 0xac 0xcc 0xcd 0xdd 0x2367b880 0x10 0x1a 0x1a 0x1a 0x07 0x15 0x08 0x08 0x08 0x00 0xac 0xcc 0xcc 0xcc>; phandle = <0x5a>; }; clock-controller@ff440000 { compatible = "rockchip,rk3328-cru\0rockchip,cru\0syscon"; reg = <0x00 0xff440000 0x00 0x1000>; rockchip,grf = <0x1c>; #clock-cells = <0x01>; #reset-cells = <0x01>; assigned-clocks = <0x02 0x78 0x02 0x3d 0x02 0x1e 0x02 0x26 0x02 0x27 0x02 0x28 0x02 0x88 0x02 0x89 0x02 0x85 0x02 0x8a 0x02 0x8c 0x02 0x8d 0x02 0x41 0x02 0x42 0x02 0x44 0x02 0x43 0x02 0x22 0x02 0x5c 0x02 0x35 0x02 0x06 0x02 0x04 0x02 0x03 0x02 0x88 0x02 0x148 0x02 0xd8 0x02 0x89 0x02 0x134 0x02 0xe6 0x02 0x8e 0x02 0x145 0x02 0x85 0x02 0x45 0x02 0x83 0x02 0x8a 0x02 0x8c 0x02 0x8d 0x02 0x41 0x02 0x42 0x02 0x44 0x02 0x43 0x02 0x3e 0x02 0xe5 0x02 0x92 0x02 0xdc 0x02 0x1e 0x02 0x61>; assigned-clock-parents = <0x02 0x7a 0x02 0x01 0x02 0x04 0x64 0x64 0x64>; assigned-clock-rates = <0x00 0x3a98000 0x00 0x16e3600 0x16e3600 0x16e3600 0xe4e1c0 0xe4e1c0 0x5f5e100 0x5f5e100 0x2faf080 0x5f5e100 0x5f5e100 0x5f5e100 0x2faf080 0x2faf080 0x2faf080 0x2faf080 0x16e3600 0x23c34600 0x1d4c0000 0x47868c00 0x8f0d180 0x47868c0 0x47868c0 0x8f0d180 0x47868c0 0x47868c0 0x11e1a300 0x5f5e100 0x11e1a300 0xbebc200 0x17d78400 0x1dcd6500 0xbebc200 0x11e1a300 0x11e1a300 0xee6b280 0xbebc200 0x5f5e100 0x16e3600 0x5f5e100 0x8f0d180 0x2faf080 0x8000 0x8000>; phandle = <0x02>; }; syscon@ff450000 { compatible = "rockchip,rk3328-usb2phy-grf\0syscon\0simple-mfd"; reg = <0x00 0xff450000 0x00 0x10000>; #address-cells = <0x01>; #size-cells = <0x01>; phandle = <0xc5>; usb2-phy@100 { compatible = "rockchip,rk3328-usb2phy"; reg = <0x100 0x10>; clocks = <0x64>; clock-names = "phyclk"; #clock-cells = <0x00>; assigned-clocks = <0x02 0x7b>; assigned-clock-parents = <0x65>; clock-output-names = "usb480m_phy"; status = "okay"; phandle = <0x65>; host-port { #phy-cells = <0x00>; interrupts = <0x00 0x3e 0x04>; interrupt-names = "linestate"; status = "okay"; phandle = <0x78>; }; otg-port { #phy-cells = <0x00>; interrupts = <0x00 0x3b 0x04 0x00 0x3c 0x04 0x00 0x3d 0x04>; interrupt-names = "otg-bvalid\0otg-id\0linestate"; status = "okay"; vbus-supply = <0x66>; phandle = <0x77>; }; }; }; syscon@ff460000 { compatible = "rockchip,usb3phy-grf\0syscon"; reg = <0x00 0xff460000 0x00 0x1000>; phandle = <0x67>; }; usb3-phy@ff470000 { compatible = "rockchip,rk3328-u3phy"; reg = <0x00 0xff470000 0x00 0x00>; rockchip,u3phygrf = <0x67>; rockchip,grf = <0x1c>; interrupts = <0x00 0x4d 0x04>; interrupt-names = "linestate"; clocks = <0x02 0xe0 0x02 0xe1>; clock-names = "u3phy-otg\0u3phy-pipe"; resets = <0x02 0x7d 0x02 0x7e 0x02 0x7f 0x02 0x7c 0x02 0x9e 0x02 0x9f>; reset-names = "u3phy-u2-por\0u3phy-u3-por\0u3phy-pipe-mac\0u3phy-utmi-mac\0u3phy-utmi-apb\0u3phy-pipe-apb"; #address-cells = <0x02>; #size-cells = <0x02>; ranges; status = "okay"; vbus-supply = <0x68>; phandle = <0xc6>; utmi@ff470000 { reg = <0x00 0xff470000 0x00 0x8000>; #phy-cells = <0x00>; status = "okay"; phandle = <0x7d>; }; pipe@ff478000 { reg = <0x00 0xff478000 0x00 0x8000>; #phy-cells = <0x00>; status = "okay"; phandle = <0x7e>; }; }; dwmmc@ff500000 { compatible = "rockchip,rk3328-dw-mshc\0rockchip,rk3288-dw-mshc"; reg = <0x00 0xff500000 0x00 0x4000>; clock-freq-min-max = <0x61a80 0x8f0d180>; clocks = <0x02 0x13d 0x02 0x21 0x02 0x4a 0x02 0x4e>; clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; fifo-depth = <0x100>; interrupts = <0x00 0x0c 0x04>; status = "okay"; bus-width = <0x04>; cap-mmc-highspeed; cap-sd-highspeed; disable-wp; max-frequency = <0x8f0d180>; num-slots = <0x01>; pinctrl-names = "default"; pinctrl-0 = <0x69 0x6a 0x6b 0x6c>; supports-sd; vmmc-supply = <0x6d>; phandle = <0xc7>; }; dwmmc@ff510000 { compatible = "rockchip,rk3328-dw-mshc\0rockchip,rk3288-dw-mshc"; reg = <0x00 0xff510000 0x00 0x4000>; clock-freq-min-max = <0x61a80 0x8f0d180>; clocks = <0x02 0x13e 0x02 0x22 0x02 0x4b 0x02 0x4f>; clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; fifo-depth = <0x100>; interrupts = <0x00 0x0d 0x04>; status = "disabled"; phandle = <0xc8>; }; dwmmc@ff520000 { compatible = "rockchip,rk3328-dw-mshc\0rockchip,rk3288-dw-mshc"; reg = <0x00 0xff520000 0x00 0x4000>; clock-freq-min-max = <0x61a80 0x8f0d180>; clocks = <0x02 0x13f 0x02 0x23 0x02 0x4c 0x02 0x50>; clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; fifo-depth = <0x100>; interrupts = <0x00 0x0e 0x04>; status = "okay"; bus-width = <0x08>; cap-mmc-highspeed; mmc-hs200-1_8v; supports-emmc; disable-wp; non-removable; num-slots = <0x01>; pinctrl-names = "default"; pinctrl-0 = <0x6e 0x6f 0x70>; phandle = <0xc9>; }; ethernet@ff540000 { compatible = "rockchip,rk3328-gmac"; reg = <0x00 0xff540000 0x00 0x10000>; rockchip,grf = <0x1c>; interrupts = <0x00 0x18 0x04>; interrupt-names = "macirq"; clocks = <0x02 0x64 0x02 0x57 0x02 0x58 0x02 0x5a 0x02 0x59 0x02 0x96 0x02 0xdf>; clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac"; resets = <0x02 0x63>; reset-names = "stmmaceth"; status = "disabled"; phy-supply = <0x71>; phy-mode = "rgmii"; clock_in_out = "input"; snps,reset-gpio = <0x72 0x12 0x01>; snps,reset-active-low; snps,reset-delays-us = <0x00 0x2710 0xc350>; assigned-clocks = <0x02 0x64 0x02 0x66>; assigned-clock-parents = <0x73 0x73>; pinctrl-names = "default"; pinctrl-0 = <0x74>; tx_delay = <0x26>; rx_delay = <0x11>; phandle = <0xca>; }; ethernet@ff550000 { compatible = "rockchip,rk3328-gmac"; reg = <0x00 0xff550000 0x00 0x10000>; rockchip,grf = <0x1c>; interrupts = <0x00 0x15 0x04>; interrupt-names = "macirq"; clocks = <0x02 0x54 0x02 0x53 0x02 0x53 0x02 0x55 0x02 0x95 0x02 0xde 0x02 0x56>; clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0aclk_mac\0pclk_mac\0clk_macphy"; resets = <0x02 0x62 0x02 0x64>; reset-names = "stmmaceth\0mac-phy"; phy-mode = "rmii"; phy-is-integrated; pinctrl-names = "default"; pinctrl-0 = <0x75 0x76>; status = "okay"; phy-supply = <0x71>; clock_in_out = "output"; assigned-clocks = <0x02 0x65>; assigned-clock-rate = <0x2faf080>; assigned-clock-parents = <0x02 0x54>; phandle = <0xcb>; }; usb@ff580000 { compatible = "rockchip,rk3328-usb\0rockchip,rk3066-usb\0snps,dwc2"; reg = <0x00 0xff580000 0x00 0x40000>; interrupts = <0x00 0x17 0x04>; clocks = <0x02 0x14d 0x02 0x14c>; clock-names = "otg\0otg_pmu"; dr_mode = "host"; g-np-tx-fifo-size = <0x10>; g-rx-fifo-size = <0x118>; g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>; g-use-dma; phys = <0x77>; phy-names = "usb2-phy"; status = "okay"; phandle = <0xcc>; }; usb@ff5c0000 { compatible = "generic-ehci"; reg = <0x00 0xff5c0000 0x00 0x10000>; interrupts = <0x00 0x10 0x04>; clocks = <0x02 0x14e 0x02 0x14f 0x65>; clock-names = "usbhost\0arbiter\0utmi"; phys = <0x78>; phy-names = "usb"; status = "okay"; phandle = <0xcd>; }; usb@ff5d0000 { compatible = "generic-ohci"; reg = <0x00 0xff5d0000 0x00 0x10000>; interrupts = <0x00 0x11 0x04>; clocks = <0x02 0x14e 0x02 0x14f 0x65>; clock-names = "usbhost\0arbiter\0utmi"; phys = <0x78>; phy-names = "usb"; status = "okay"; phandle = <0xce>; }; dwmmc@ff5f0000 { compatible = "rockchip,rk3328-dw-mshc\0rockchip,rk3288-dw-mshc"; reg = <0x00 0xff5f0000 0x00 0x4000>; clock-freq-min-max = <0x61a80 0x8f0d180>; clocks = <0x02 0x140 0x02 0x1f 0x02 0x4d 0x02 0x51>; clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; fifo-depth = <0x100>; interrupts = <0x00 0x04 0x04>; status = "okay"; bus-width = <0x04>; cap-sd-highspeed; cap-sdio-irq; disable-wp; keep-power-in-suspend; max-frequency = <0x23c3460>; mmc-pwrseq = <0x79>; non-removable; num-slots = <0x01>; pinctrl-names = "default"; pinctrl-0 = <0x7a 0x7b 0x7c>; supports-sdio; sd-uhs-sdr104; phandle = <0xcf>; }; usb@ff600000 { compatible = "rockchip,rk3328-dwc3"; clocks = <0x02 0x60 0x02 0x61 0x02 0x84>; clock-names = "ref_clk\0suspend_clk\0bus_clk"; #address-cells = <0x02>; #size-cells = <0x02>; ranges; status = "okay"; phandle = <0xd0>; dwc3@ff600000 { compatible = "snps,dwc3"; reg = <0x00 0xff600000 0x00 0x100000>; interrupts = <0x00 0x43 0x04>; dr_mode = "host"; phys = <0x7d 0x7e>; phy-names = "usb2-phy\0usb3-phy"; phy_type = "utmi_wide"; snps,dis_enblslpm_quirk; snps,dis-u2-freeclk-exists-quirk; snps,dis_u2_susphy_quirk; snps,dis-u3-autosuspend-quirk; snps,dis_u3_susphy_quirk; snps,dis-del-phy-power-chg-quirk; snps,tx-ipgap-linecheck-dis-quirk; status = "okay"; phandle = <0xd1>; }; }; qos@ff750000 { compatible = "syscon"; reg = <0x00 0xff750000 0x00 0x20>; phandle = <0x2c>; }; qos@ff750080 { compatible = "syscon"; reg = <0x00 0xff750080 0x00 0x20>; phandle = <0x2d>; }; qos@ff778000 { compatible = "syscon"; reg = <0x00 0xff778000 0x00 0x20>; phandle = <0x2e>; }; dfi@ff790000 { reg = <0x00 0xff790000 0x00 0x400>; compatible = "rockchip,rk3328-dfi"; rockchip,grf = <0x1c>; status = "okay"; phandle = <0x7f>; }; dmc { compatible = "rockchip,rk3328-dmc"; devfreq-events = <0x7f>; clocks = <0x02 0x40>; clock-names = "dmc_clk"; operating-points-v2 = <0x80>; ddr_timing = <0x81>; upthreshold = <0x28>; downdifferential = <0x14>; system-status-freq = <0x01 0xbfe50 0x08 0xbfe50 0x02 0xbfe50 0x20 0xbfe50 0x10 0xbfe50 0x10000 0xbfe50 0x2000 0xbfe50 0x1000 0xbfe50>; auto-min-freq = <0xbfe50>; auto-freq-en = <0x00>; #cooling-cells = <0x02>; status = "okay"; center-supply = <0x4b>; phandle = <0x33>; ddr_power_model { compatible = "ddr_power_model"; dynamic-power-coefficient = <0x78>; static-power-coefficient = <0xc8>; ts = <0x7d00 0x125c 0xffffffb0 0x02>; thermal-zone = "soc-thermal"; phandle = <0xd2>; }; }; dmc-opp-table { compatible = "operating-points-v2"; rockchip,leakage-voltage-sel = <0x01 0x0a 0x00 0x0b 0xfe 0x01>; nvmem-cells = <0x4c>; nvmem-cell-names = "ddr_leakage"; phandle = <0x80>; opp-400000000 { opp-hz = <0x00 0x17d78400>; opp-microvolt = <0xfa3e8>; opp-microvolt-L0 = <0xfa3e8>; opp-microvolt-L1 = <0xfa3e8>; status = "disabled"; }; opp-600000000 { opp-hz = <0x00 0x23c34600>; opp-microvolt = <0x106738>; opp-microvolt-L0 = <0x106738>; opp-microvolt-L1 = <0x106738>; status = "disabled"; }; opp-786000000 { opp-hz = <0x00 0x2ed96880>; opp-microvolt = <0x11edd8>; opp-microvolt-L0 = <0x11edd8>; opp-microvolt-L1 = <0x11edd8>; }; opp-800000000 { opp-hz = <0x00 0x2faf0800>; opp-microvolt = <0x11edd8>; opp-microvolt-L0 = <0x11edd8>; opp-microvolt-L1 = <0x118c30>; status = "disabled"; }; opp-850000000 { opp-hz = <0x00 0x32a9f880>; opp-microvolt = <0x106738>; opp-microvolt-L0 = <0x106738>; opp-microvolt-L1 = <0x100590>; status = "disabled"; }; opp-933000000 { opp-hz = <0x00 0x379c7340>; opp-microvolt = <0x10c8e0>; opp-microvolt-L0 = <0x10c8e0>; opp-microvolt-L1 = <0x106738>; status = "disabled"; }; opp-1066000000 { opp-hz = <0x00 0x3f89de80>; opp-microvolt = <0x11edd8>; opp-microvolt-L0 = <0x11edd8>; opp-microvolt-L1 = <0x118c30>; status = "disabled"; }; }; interrupt-controller@ff811000 { compatible = "arm,gic-400"; #interrupt-cells = <0x03>; #address-cells = <0x00>; interrupt-controller; reg = <0x00 0xff811000 0x00 0x1000 0x00 0xff812000 0x00 0x2000 0x00 0xff814000 0x00 0x2000 0x00 0xff816000 0x00 0x2000>; interrupts = <0x01 0x09 0xf04>; phandle = <0x01>; }; pinctrl { compatible = "rockchip,rk3328-pinctrl"; rockchip,grf = <0x1c>; #address-cells = <0x02>; #size-cells = <0x02>; ranges; phandle = <0xd3>; gpio0@ff210000 { compatible = "rockchip,gpio-bank"; reg = <0x00 0xff210000 0x00 0x100>; interrupts = <0x00 0x33 0x04>; clocks = <0x02 0xc8>; gpio-controller; #gpio-cells = <0x02>; interrupt-controller; #interrupt-cells = <0x02>; phandle = <0x96>; }; gpio1@ff220000 { compatible = "rockchip,gpio-bank"; reg = <0x00 0xff220000 0x00 0x100>; interrupts = <0x00 0x34 0x04>; clocks = <0x02 0xc9>; gpio-controller; #gpio-cells = <0x02>; interrupt-controller; #interrupt-cells = <0x02>; phandle = <0x72>; }; gpio2@ff230000 { compatible = "rockchip,gpio-bank"; reg = <0x00 0xff230000 0x00 0x100>; interrupts = <0x00 0x35 0x04>; clocks = <0x02 0xca>; gpio-controller; #gpio-cells = <0x02>; interrupt-controller; #interrupt-cells = <0x02>; phandle = <0x3e>; }; gpio3@ff240000 { compatible = "rockchip,gpio-bank"; reg = <0x00 0xff240000 0x00 0x100>; interrupts = <0x00 0x36 0x04>; clocks = <0x02 0xcb>; gpio-controller; #gpio-cells = <0x02>; interrupt-controller; #interrupt-cells = <0x02>; phandle = <0x8f>; }; pcfg-pull-up { bias-pull-up; phandle = <0x83>; }; pcfg-pull-down { bias-pull-down; phandle = <0x8c>; }; pcfg-pull-none { bias-disable; phandle = <0x82>; }; pcfg-pull-none-2ma { bias-disable; drive-strength = <0x02>; phandle = <0x8b>; }; pcfg-pull-up-2ma { bias-pull-up; drive-strength = <0x02>; phandle = <0xd4>; }; pcfg-pull-up-4ma { bias-pull-up; drive-strength = <0x04>; phandle = <0x85>; }; pcfg-pull-none-4ma { bias-disable; drive-strength = <0x04>; phandle = <0x86>; }; pcfg-pull-down-4ma { bias-pull-down; drive-strength = <0x04>; phandle = <0xd5>; }; pcfg-pull-none-8ma { bias-disable; drive-strength = <0x08>; phandle = <0x87>; }; pcfg-pull-up-8ma { bias-pull-up; drive-strength = <0x08>; phandle = <0x88>; }; pcfg-pull-none-12ma { bias-disable; drive-strength = <0x0c>; phandle = <0x89>; }; pcfg-pull-up-12ma { bias-pull-up; drive-strength = <0x0c>; phandle = <0x8a>; }; pcfg-output-high { output-high; phandle = <0xd6>; }; pcfg-output-low { output-low; phandle = <0xd7>; }; pcfg-input-high { bias-pull-up; input-enable; phandle = <0x84>; }; pcfg-input { input-enable; phandle = <0xd8>; }; i2c0 { i2c0-xfer { rockchip,pins = <0x02 0x18 0x01 0x82 0x02 0x19 0x01 0x82>; phandle = <0x3c>; }; }; i2c1 { i2c1-xfer { rockchip,pins = <0x02 0x04 0x02 0x82 0x02 0x05 0x02 0x82>; phandle = <0x3d>; }; }; i2c2 { i2c2-xfer { rockchip,pins = <0x02 0x0d 0x01 0x82 0x02 0x0e 0x01 0x82>; phandle = <0x40>; }; }; i2c3 { i2c3-xfer { rockchip,pins = <0x00 0x05 0x02 0x82 0x00 0x06 0x02 0x82>; phandle = <0x41>; }; i2c3-gpio { rockchip,pins = <0x00 0x05 0x00 0x82 0x00 0x06 0x00 0x82>; phandle = <0x5e>; }; }; tsp { tsp-d0 { rockchip,pins = <0x03 0x04 0x01 0x82>; phandle = <0x1d>; }; tsp-d1 { rockchip,pins = <0x03 0x05 0x01 0x82>; phandle = <0x1e>; }; tsp-d2 { rockchip,pins = <0x03 0x06 0x01 0x82>; phandle = <0x1f>; }; tsp-d3 { rockchip,pins = <0x03 0x07 0x01 0x82>; phandle = <0x20>; }; tsp-d4 { rockchip,pins = <0x03 0x08 0x01 0x82>; phandle = <0x21>; }; tsp-d5 { rockchip,pins = <0x02 0x10 0x03 0x82>; phandle = <0x22>; }; tsp-d6 { rockchip,pins = <0x02 0x11 0x03 0x82>; phandle = <0x23>; }; tsp-d7 { rockchip,pins = <0x02 0x12 0x03 0x82>; phandle = <0x24>; }; tsp-sync { rockchip,pins = <0x02 0x0f 0x03 0x82>; phandle = <0x25>; }; tsp-clk { rockchip,pins = <0x03 0x02 0x01 0x82>; phandle = <0x26>; }; tsp-fail { rockchip,pins = <0x03 0x01 0x01 0x82>; phandle = <0x27>; }; tsp-valid { rockchip,pins = <0x03 0x00 0x01 0x82>; phandle = <0x28>; }; }; hdmi_i2c { hdmii2c-xfer { rockchip,pins = <0x00 0x05 0x01 0x82 0x00 0x06 0x01 0x82>; phandle = <0x5c>; }; }; tsadc { otp-gpio { rockchip,pins = <0x02 0x0d 0x00 0x82>; phandle = <0x34>; }; otp-out { rockchip,pins = <0x02 0x0d 0x01 0x82>; phandle = <0x35>; }; }; uart0 { uart0-xfer { rockchip,pins = <0x01 0x09 0x01 0x83 0x01 0x08 0x01 0x82>; phandle = <0x36>; }; uart0-cts { rockchip,pins = <0x01 0x0b 0x01 0x82>; phandle = <0x37>; }; uart0-rts { rockchip,pins = <0x01 0x0a 0x01 0x82>; phandle = <0x9b>; }; uart0-rts-gpio { rockchip,pins = <0x01 0x0a 0x00 0x82>; phandle = <0xd9>; }; }; uart1 { uart1-xfer { rockchip,pins = <0x03 0x04 0x04 0x83 0x03 0x06 0x04 0x82>; phandle = <0x38>; }; uart1-cts { rockchip,pins = <0x03 0x07 0x04 0x82>; phandle = <0x39>; }; uart1-rts { rockchip,pins = <0x03 0x05 0x04 0x82>; phandle = <0x3a>; }; uart1-rts-gpio { rockchip,pins = <0x03 0x05 0x00 0x82>; phandle = <0xda>; }; }; uart2-0 { uart2m0-xfer { rockchip,pins = <0x01 0x00 0x02 0x83 0x01 0x01 0x02 0x82>; phandle = <0xdb>; }; }; uart2-1 { uart2m1-xfer { rockchip,pins = <0x02 0x00 0x01 0x83 0x02 0x01 0x01 0x82>; phandle = <0x3b>; }; }; spi0-0 { spi0m0-clk { rockchip,pins = <0x02 0x08 0x01 0x83>; phandle = <0xdc>; }; spi0m0-cs0 { rockchip,pins = <0x02 0x0b 0x01 0x83>; phandle = <0xdd>; }; spi0m0-tx { rockchip,pins = <0x02 0x09 0x01 0x83>; phandle = <0xde>; }; spi0m0-rx { rockchip,pins = <0x02 0x0a 0x01 0x83>; phandle = <0xdf>; }; spi0m0-cs1 { rockchip,pins = <0x02 0x0c 0x01 0x83>; phandle = <0xe0>; }; }; spi0-1 { spi0m1-clk { rockchip,pins = <0x03 0x17 0x02 0x83>; phandle = <0xe1>; }; spi0m1-cs0 { rockchip,pins = <0x03 0x1a 0x02 0x83>; phandle = <0xe2>; }; spi0m1-tx { rockchip,pins = <0x03 0x19 0x02 0x83>; phandle = <0xe3>; }; spi0m1-rx { rockchip,pins = <0x03 0x18 0x02 0x83>; phandle = <0xe4>; }; spi0m1-cs1 { rockchip,pins = <0x03 0x1b 0x02 0x83>; phandle = <0xe5>; }; }; spi0-2 { spi0m2-clk { rockchip,pins = <0x03 0x00 0x04 0x83>; phandle = <0x42>; }; spi0m2-cs0 { rockchip,pins = <0x03 0x08 0x03 0x83>; phandle = <0x45>; }; spi0m2-tx { rockchip,pins = <0x03 0x01 0x04 0x83>; phandle = <0x43>; }; spi0m2-rx { rockchip,pins = <0x03 0x02 0x04 0x83>; phandle = <0x44>; }; }; pdm-0 { pdmm0-clk { rockchip,pins = <0x02 0x12 0x02 0x82>; phandle = <0x15>; }; pdmm0-fsync { rockchip,pins = <0x02 0x17 0x02 0x82>; phandle = <0x16>; }; pdmm0-sdi0 { rockchip,pins = <0x02 0x13 0x02 0x82>; phandle = <0x17>; }; pdmm0-sdi1 { rockchip,pins = <0x02 0x14 0x02 0x82>; phandle = <0x18>; }; pdmm0-sdi2 { rockchip,pins = <0x02 0x15 0x02 0x82>; phandle = <0x19>; }; pdmm0-sdi3 { rockchip,pins = <0x02 0x16 0x02 0x82>; phandle = <0x1a>; }; pdmm0-sleep { rockchip,pins = <0x02 0x12 0x00 0x84 0x02 0x13 0x00 0x84 0x02 0x14 0x00 0x84 0x02 0x15 0x00 0x84 0x02 0x16 0x00 0x84 0x02 0x17 0x00 0x84>; phandle = <0x1b>; }; }; i2s1 { i2s1-mclk { rockchip,pins = <0x02 0x0f 0x01 0x82>; phandle = <0xe6>; }; i2s1-sclk { rockchip,pins = <0x02 0x12 0x01 0x82>; phandle = <0xe7>; }; i2s1-lrckrx { rockchip,pins = <0x02 0x10 0x01 0x82>; phandle = <0xe8>; }; i2s1-lrcktx { rockchip,pins = <0x02 0x11 0x01 0x82>; phandle = <0xe9>; }; i2s1-sdi { rockchip,pins = <0x02 0x13 0x01 0x82>; phandle = <0xea>; }; i2s1-sdo { rockchip,pins = <0x02 0x17 0x01 0x82>; phandle = <0xeb>; }; i2s1-sdio1 { rockchip,pins = <0x02 0x14 0x01 0x82>; phandle = <0xec>; }; i2s1-sdio2 { rockchip,pins = <0x02 0x15 0x01 0x82>; phandle = <0xed>; }; i2s1-sdio3 { rockchip,pins = <0x02 0x16 0x01 0x82>; phandle = <0xee>; }; i2s1-sleep { rockchip,pins = <0x02 0x0f 0x00 0x84 0x02 0x10 0x00 0x84 0x02 0x11 0x00 0x84 0x02 0x12 0x00 0x84 0x02 0x13 0x00 0x84 0x02 0x14 0x00 0x84 0x02 0x15 0x00 0x84 0x02 0x16 0x00 0x84 0x02 0x17 0x00 0x84>; phandle = <0xef>; }; }; i2s2-0 { i2s2m0-mclk { rockchip,pins = <0x01 0x15 0x01 0x82>; phandle = <0x0d>; }; i2s2m0-sclk { rockchip,pins = <0x01 0x16 0x01 0x82>; phandle = <0x0e>; }; i2s2m0-lrckrx { rockchip,pins = <0x01 0x1a 0x01 0x82>; phandle = <0x10>; }; i2s2m0-lrcktx { rockchip,pins = <0x01 0x17 0x01 0x82>; phandle = <0x0f>; }; i2s2m0-sdi { rockchip,pins = <0x01 0x18 0x01 0x82>; phandle = <0x12>; }; i2s2m0-sdo { rockchip,pins = <0x01 0x19 0x01 0x82>; phandle = <0x11>; }; i2s2m0-sleep { rockchip,pins = <0x01 0x15 0x00 0x84 0x01 0x16 0x00 0x84 0x01 0x1a 0x00 0x84 0x01 0x17 0x00 0x84 0x01 0x18 0x00 0x84 0x01 0x19 0x00 0x84>; phandle = <0x13>; }; }; i2s2-1 { i2s2m1-mclk { rockchip,pins = <0x01 0x15 0x01 0x82>; phandle = <0xf0>; }; i2s2m1-sclk { rockchip,pins = <0x03 0x00 0x06 0x82>; phandle = <0xf1>; }; i2sm1-lrckrx { rockchip,pins = <0x03 0x08 0x06 0x82>; phandle = <0xf2>; }; i2s2m1-lrcktx { rockchip,pins = <0x03 0x08 0x04 0x82>; phandle = <0xf3>; }; i2s2m1-sdi { rockchip,pins = <0x03 0x02 0x06 0x82>; phandle = <0xf4>; }; i2s2m1-sdo { rockchip,pins = <0x03 0x01 0x06 0x82>; phandle = <0xf5>; }; i2s2m1-sleep { rockchip,pins = <0x01 0x15 0x00 0x84 0x03 0x00 0x00 0x84 0x03 0x08 0x00 0x84 0x03 0x02 0x00 0x84 0x03 0x01 0x00 0x84>; phandle = <0xf6>; }; }; spdif-0 { spdifm0-tx { rockchip,pins = <0x00 0x1b 0x01 0x82>; phandle = <0xf7>; }; }; spdif-1 { spdifm1-tx { rockchip,pins = <0x02 0x11 0x02 0x82>; phandle = <0x14>; }; }; spdif-2 { spdifm2-tx { rockchip,pins = <0x00 0x02 0x02 0x82>; phandle = <0xf8>; }; }; sdmmc0-0 { sdmmc0m0-pwren { rockchip,pins = <0x02 0x07 0x01 0x85>; phandle = <0xf9>; }; sdmmc0m0-gpio { rockchip,pins = <0x02 0x07 0x00 0x85>; phandle = <0xfa>; }; }; sdmmc0-1 { sdmmc0m1-pwren { rockchip,pins = <0x00 0x1e 0x03 0x85>; phandle = <0xfb>; }; sdmmc0m1-gpio { rockchip,pins = <0x00 0x1e 0x00 0x85>; phandle = <0x99>; }; }; sdmmc0 { sdmmc0-clk { rockchip,pins = <0x01 0x06 0x01 0x86>; phandle = <0x69>; }; sdmmc0-cmd { rockchip,pins = <0x01 0x04 0x01 0x85>; phandle = <0x6a>; }; sdmmc0-dectn { rockchip,pins = <0x01 0x05 0x01 0x85>; phandle = <0x6b>; }; sdmmc0-wrprt { rockchip,pins = <0x01 0x07 0x01 0x85>; phandle = <0xfc>; }; sdmmc0-bus1 { rockchip,pins = <0x01 0x00 0x01 0x85>; phandle = <0xfd>; }; sdmmc0-bus4 { rockchip,pins = <0x01 0x00 0x01 0x85 0x01 0x01 0x01 0x85 0x01 0x02 0x01 0x85 0x01 0x03 0x01 0x85>; phandle = <0x6c>; }; sdmmc0-gpio { rockchip,pins = <0x01 0x06 0x00 0x85 0x01 0x04 0x00 0x85 0x01 0x05 0x00 0x85 0x01 0x07 0x00 0x85 0x01 0x03 0x00 0x85 0x01 0x02 0x00 0x85 0x01 0x01 0x00 0x85 0x01 0x00 0x00 0x85>; phandle = <0xfe>; }; }; sdmmc0ext { sdmmc0ext-clk { rockchip,pins = <0x03 0x02 0x03 0x86>; phandle = <0x7c>; }; sdmmc0ext-cmd { rockchip,pins = <0x03 0x00 0x03 0x85>; phandle = <0x7b>; }; sdmmc0ext-wrprt { rockchip,pins = <0x03 0x03 0x03 0x85>; phandle = <0xff>; }; sdmmc0ext-dectn { rockchip,pins = <0x03 0x01 0x03 0x85>; phandle = <0x100>; }; sdmmc0ext-bus1 { rockchip,pins = <0x03 0x04 0x03 0x85>; phandle = <0x101>; }; sdmmc0ext-bus4 { rockchip,pins = <0x03 0x04 0x03 0x85 0x03 0x05 0x03 0x85 0x03 0x06 0x03 0x85 0x03 0x07 0x03 0x85>; phandle = <0x7a>; }; sdmmc0ext-gpio { rockchip,pins = <0x03 0x00 0x00 0x85 0x03 0x01 0x00 0x85 0x03 0x02 0x00 0x85 0x03 0x03 0x00 0x85 0x03 0x04 0x00 0x85 0x03 0x05 0x00 0x85 0x03 0x06 0x00 0x85 0x03 0x07 0x00 0x85>; phandle = <0x102>; }; }; sdmmc1 { sdmmc1-clk { rockchip,pins = <0x01 0x0c 0x01 0x87>; phandle = <0x103>; }; sdmmc1-cmd { rockchip,pins = <0x01 0x0d 0x01 0x88>; phandle = <0x104>; }; sdmmc1-pwren { rockchip,pins = <0x01 0x12 0x01 0x88>; phandle = <0x105>; }; sdmmc1-wrprt { rockchip,pins = <0x01 0x14 0x01 0x88>; phandle = <0x106>; }; sdmmc1-dectn { rockchip,pins = <0x01 0x13 0x01 0x88>; phandle = <0x107>; }; sdmmc1-bus1 { rockchip,pins = <0x01 0x0e 0x01 0x88>; phandle = <0x108>; }; sdmmc1-bus4 { rockchip,pins = <0x01 0x0e 0x01 0x88 0x01 0x0f 0x01 0x88 0x01 0x10 0x01 0x88 0x01 0x11 0x01 0x88>; phandle = <0x109>; }; sdmmc1-gpio { rockchip,pins = <0x01 0x0c 0x00 0x85 0x01 0x0d 0x00 0x85 0x01 0x0e 0x00 0x85 0x01 0x0f 0x00 0x85 0x01 0x10 0x00 0x85 0x01 0x11 0x00 0x85 0x01 0x12 0x00 0x85 0x01 0x13 0x00 0x85 0x01 0x14 0x00 0x85>; phandle = <0x10a>; }; }; emmc { emmc-clk { rockchip,pins = <0x03 0x15 0x02 0x89>; phandle = <0x6e>; }; emmc-cmd { rockchip,pins = <0x03 0x13 0x02 0x8a>; phandle = <0x6f>; }; emmc-pwren { rockchip,pins = <0x03 0x16 0x02 0x82>; phandle = <0x10b>; }; emmc-rstnout { rockchip,pins = <0x03 0x14 0x02 0x82>; phandle = <0x10c>; }; emmc-bus1 { rockchip,pins = <0x00 0x07 0x02 0x8a>; phandle = <0x10d>; }; emmc-bus4 { rockchip,pins = <0x00 0x07 0x02 0x8a 0x02 0x1c 0x02 0x8a 0x02 0x1d 0x02 0x8a 0x02 0x1e 0x02 0x8a>; phandle = <0x10e>; }; emmc-bus8 { rockchip,pins = <0x00 0x07 0x02 0x8a 0x02 0x1c 0x02 0x8a 0x02 0x1d 0x02 0x8a 0x02 0x1e 0x02 0x8a 0x02 0x1f 0x02 0x8a 0x03 0x10 0x02 0x8a 0x03 0x11 0x02 0x8a 0x03 0x12 0x02 0x8a>; phandle = <0x70>; }; }; pwm0 { pwm0-pin { rockchip,pins = <0x02 0x04 0x01 0x82>; phandle = <0x46>; }; pwm0-pin-pull-up { rockchip,pins = <0x02 0x04 0x01 0x83>; phandle = <0x10f>; }; }; pwm1 { pwm1-pin { rockchip,pins = <0x02 0x05 0x01 0x82>; phandle = <0x47>; }; pwm1-pin-pull-up { rockchip,pins = <0x02 0x05 0x01 0x83>; phandle = <0x110>; }; }; pwm2 { pwm2-pin { rockchip,pins = <0x02 0x06 0x01 0x82>; phandle = <0x48>; }; }; pwmir { pwmir-pin { rockchip,pins = <0x02 0x02 0x01 0x82>; phandle = <0x49>; }; }; gmac-1 { rgmiim1-pins { rockchip,pins = <0x01 0x0c 0x02 0x89 0x01 0x0d 0x02 0x8b 0x01 0x13 0x02 0x8b 0x01 0x19 0x02 0x89 0x01 0x15 0x02 0x8b 0x01 0x16 0x02 0x8b 0x01 0x17 0x02 0x8b 0x01 0x0a 0x02 0x8b 0x01 0x0b 0x02 0x8b 0x01 0x08 0x02 0x89 0x01 0x09 0x02 0x89 0x01 0x0e 0x02 0x8b 0x01 0x0f 0x02 0x8b 0x01 0x10 0x02 0x89 0x01 0x11 0x02 0x89 0x00 0x08 0x01 0x82 0x00 0x0c 0x01 0x82 0x00 0x18 0x01 0x82 0x00 0x10 0x01 0x82 0x00 0x11 0x01 0x82 0x00 0x17 0x01 0x82 0x00 0x16 0x01 0x82>; phandle = <0x74>; }; rmiim1-pins { rockchip,pins = <0x01 0x13 0x02 0x8b 0x01 0x19 0x02 0x89 0x01 0x15 0x02 0x8b 0x01 0x18 0x02 0x8b 0x01 0x16 0x02 0x8b 0x01 0x17 0x02 0x8b 0x01 0x0a 0x02 0x8b 0x01 0x0b 0x02 0x8b 0x01 0x08 0x02 0x89 0x01 0x09 0x02 0x89 0x00 0x0b 0x01 0x82 0x00 0x0c 0x01 0x82 0x00 0x18 0x01 0x82 0x00 0x13 0x01 0x82 0x00 0x10 0x01 0x82 0x00 0x11 0x01 0x82>; phandle = <0x111>; }; }; gmac2phy { fephyled-speed100 { rockchip,pins = <0x00 0x1f 0x01 0x82>; phandle = <0x112>; }; fephyled-speed10 { rockchip,pins = <0x00 0x1e 0x01 0x82>; phandle = <0x113>; }; fephyled-duplex { rockchip,pins = <0x00 0x1e 0x02 0x82>; phandle = <0x114>; }; fephyled-rxm0 { rockchip,pins = <0x00 0x1d 0x01 0x82>; phandle = <0x115>; }; fephyled-txm0 { rockchip,pins = <0x00 0x1d 0x02 0x82>; phandle = <0x116>; }; fephyled-linkm0 { rockchip,pins = <0x00 0x1c 0x01 0x82>; phandle = <0x117>; }; fephyled-rxm1 { rockchip,pins = <0x02 0x19 0x02 0x82>; phandle = <0x75>; }; fephyled-txm1 { rockchip,pins = <0x02 0x19 0x03 0x82>; phandle = <0x118>; }; fephyled-linkm1 { rockchip,pins = <0x02 0x18 0x02 0x82>; phandle = <0x76>; }; }; tsadc_pin { tsadc-int { rockchip,pins = <0x02 0x0d 0x02 0x82>; phandle = <0x119>; }; tsadc-gpio { rockchip,pins = <0x02 0x0d 0x00 0x82>; phandle = <0x11a>; }; }; hdmi_pin { hdmi-cec { rockchip,pins = <0x00 0x03 0x01 0x82>; phandle = <0x5b>; }; hdmi-hpd { rockchip,pins = <0x00 0x04 0x01 0x8c>; phandle = <0x5d>; }; }; cif-0 { dvp-d2d9-m0 { rockchip,pins = <0x03 0x04 0x02 0x82 0x03 0x05 0x02 0x82 0x03 0x06 0x02 0x82 0x03 0x07 0x02 0x82 0x03 0x08 0x02 0x82 0x03 0x09 0x02 0x82 0x03 0x0a 0x02 0x82 0x03 0x0b 0x02 0x82 0x03 0x01 0x02 0x82 0x03 0x00 0x02 0x82 0x03 0x03 0x02 0x82 0x03 0x02 0x02 0x82>; phandle = <0x11b>; }; }; cif-1 { dvp-d2d9-m1 { rockchip,pins = <0x03 0x04 0x02 0x82 0x03 0x05 0x02 0x82 0x03 0x06 0x02 0x82 0x03 0x07 0x02 0x82 0x03 0x08 0x02 0x82 0x02 0x10 0x04 0x82 0x02 0x11 0x04 0x82 0x02 0x12 0x04 0x82 0x03 0x01 0x02 0x82 0x03 0x00 0x02 0x82 0x02 0x0f 0x04 0x82 0x03 0x02 0x02 0x82>; phandle = <0x11c>; }; }; pmic { pmic-int-l { rockchip,pins = <0x02 0x06 0x00 0x83>; phandle = <0x3f>; }; }; sdio-pwrseq { wifi-enable-h { rockchip,pins = <0x01 0x12 0x00 0x82>; phandle = <0x8e>; }; }; usb { host-vbus-drv { rockchip,pins = <0x00 0x00 0x00 0x82>; phandle = <0x97>; }; otg-vbus-drv { rockchip,pins = <0x00 0x1b 0x00 0x82>; phandle = <0x98>; }; }; wireless-bluetooth { uart0-gpios { rockchip,pins = <0x01 0x0a 0x00 0x82>; phandle = <0x9c>; }; }; }; chosen { bootargs = "earlycon=uart8250,mmio32,0xff130000 swiotlb=1 kpti=0"; }; fiq-debugger { compatible = "rockchip,fiq-debugger"; rockchip,serial-id = <0x02>; rockchip,signal-irq = <0x9f>; rockchip,wake-irq = <0x00>; rockchip,irq-mode-enable = <0x00>; rockchip,baudrate = <0x16e360>; interrupts = <0x00 0x7f 0x08>; status = "okay"; }; reserved-memory { #address-cells = <0x02>; #size-cells = <0x02>; ranges; drm-logo@00000000 { compatible = "rockchip,drm-logo"; reg = <0x00 0x00 0x00 0x00>; phandle = <0x62>; }; secure-memory@20000000 { compatible = "rockchip,secure-memory"; reg = <0x00 0x20000000 0x00 0x00>; phandle = <0x63>; }; ramoops@68000000 { reg = <0x00 0x110000 0x00 0xf0000>; phandle = <0x8d>; }; linux,cma { compatible = "shared-dma-pool"; reusable; size = <0x00 0x2000000>; linux,cma-default; }; }; ramoops { compatible = "ramoops"; record-size = <0x00 0x20000>; console-size = <0x00 0x80000>; ftrace-size = <0x00 0x00>; pmsg-size = <0x00 0x50000>; memory-region = <0x8d>; }; sk-keypad { compatible = "rockchip,key"; power-key { gpios = <0x3e 0x15 0x01>; linux,code = <0x74>; label = "power"; gpio-key,wakeup; }; }; external-gmac-clock { compatible = "fixed-clock"; clock-frequency = <0x7735940>; clock-output-names = "gmac_clkin"; #clock-cells = <0x00>; phandle = <0x73>; }; sdio-pwrseq { compatible = "mmc-pwrseq-simple"; pinctrl-names = "default"; pinctrl-0 = <0x8e>; reset-gpios = <0x8f 0x08 0x01>; phandle = <0x79>; }; sound { compatible = "simple-audio-card"; simple-audio-card,format = "i2s"; simple-audio-card,mclk-fs = <0x100>; simple-audio-card,name = "rockchip-rk3328"; simple-audio-card,cpu { sound-dai = <0x90>; }; simple-audio-card,codec { sound-dai = <0x91>; }; }; hdmi-sound { compatible = "simple-audio-card"; simple-audio-card,format = "i2s"; simple-audio-card,mclk-fs = <0x80>; simple-audio-card,name = "rockchip-hdmi"; simple-audio-card,cpu { sound-dai = <0x92>; }; simple-audio-card,codec { sound-dai = <0x93>; }; }; spdif-sound { compatible = "simple-audio-card"; simple-audio-card,name = "rockchip-spdif"; simple-audio-card,cpu { sound-dai = <0x94>; }; simple-audio-card,codec { sound-dai = <0x95>; }; }; spdif-out { compatible = "linux,spdif-dit"; #sound-dai-cells = <0x00>; phandle = <0x95>; }; host-vbus-regulator { compatible = "regulator-fixed"; gpio = <0x96 0x00 0x00>; pinctrl-names = "default"; pinctrl-0 = <0x97>; regulator-name = "vcc_host_vbus"; regulator-min-microvolt = <0x4c4b40>; regulator-max-microvolt = <0x4c4b40>; enable-active-high; phandle = <0x68>; }; otg-vbus-regulator { compatible = "regulator-fixed"; gpio = <0x96 0x1b 0x00>; pinctrl-names = "default"; pinctrl-0 = <0x98>; regulator-name = "vcc_otg_vbus"; regulator-min-microvolt = <0x4c4b40>; regulator-max-microvolt = <0x4c4b40>; enable-active-high; phandle = <0x66>; }; vcc-phy-regulator { compatible = "regulator-fixed"; regulator-name = "vcc_phy"; regulator-always-on; regulator-boot-on; phandle = <0x71>; }; sdmmc-regulator { compatible = "regulator-fixed"; gpio = <0x96 0x1e 0x01>; pinctrl-names = "default"; pinctrl-0 = <0x99>; regulator-name = "vcc_sd"; regulator-min-microvolt = <0x325aa0>; regulator-max-microvolt = <0x325aa0>; vin-supply = <0x29>; phandle = <0x6d>; }; xin32k { compatible = "fixed-clock"; clock-frequency = <0x8000>; clock-output-names = "xin32k"; #clock-cells = <0x00>; phandle = <0x11d>; }; wireless-bluetooth { compatible = "bluetooth-platdata"; clocks = <0x9a 0x01>; clock-names = "ext_clock"; uart_rts_gpios = <0x72 0x0a 0x01>; pinctrl-names = "default\0rts_gpio"; pinctrl-0 = <0x9b>; pinctrl-1 = <0x9c>; BT,reset_gpio = <0x72 0x15 0x00>; BT,wake_gpio = <0x72 0x17 0x00>; BT,wake_host_irq = <0x72 0x1a 0x00>; status = "okay"; }; wireless-wlan { compatible = "wlan-platdata"; rockchip,grf = <0x1c>; wifi_chip_type = [00]; sdio_vref = <0xce4>; #WIFI,poweren_gpio = <0x8f 0x08 0x00>; WIFI,host_wake_irq = <0x8f 0x01 0x00>; status = "okay"; }; leds { compatible = "gpio-leds"; power-green { gpios = <0x9a 0x00 0x00>; linux,default-trigger = "none"; default-state = "on"; mode = <0x23>; }; }; __symbols__ { ddr_timing = "/ddr_timing"; cpu0 = "/cpus/cpu@0"; cpu1 = "/cpus/cpu@1"; cpu2 = "/cpus/cpu@2"; cpu3 = "/cpus/cpu@3"; cpu0_opp_table = "/cpu0-opp-table"; rockchip_suspend = "/rockchip-suspend"; xin24m = "/xin24m"; i2s0 = "/i2s@ff000000"; i2s1 = "/i2s@ff010000"; i2s2 = "/i2s@ff020000"; spdif = "/spdif@ff030000"; pdm = "/pdm@ff040000"; tsp = "/tsp@ff050000"; grf = "/syscon@ff100000"; io_domains = "/syscon@ff100000/io-domains"; power = "/syscon@ff100000/power-controller"; soc_thermal = "/thermal-zones/soc-thermal"; threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; target = "/thermal-zones/soc-thermal/trips/trip-point-1"; soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; tsadc = "/tsadc@ff250000"; uart0 = "/serial@ff110000"; uart1 = "/serial@ff120000"; uart2 = "/serial@ff130000"; pmu = "/power-management@ff140000"; i2c0 = "/i2c@ff150000"; i2c1 = "/i2c@ff160000"; rk805 = "/i2c@ff160000/rk805@18"; vdd_logic = "/i2c@ff160000/rk805@18/regulators/DCDC_REG1"; vdd_arm = "/i2c@ff160000/rk805@18/regulators/DCDC_REG2"; vcc_ddr = "/i2c@ff160000/rk805@18/regulators/DCDC_REG3"; vcc_io = "/i2c@ff160000/rk805@18/regulators/DCDC_REG4"; vdd_18 = "/i2c@ff160000/rk805@18/regulators/LDO_REG1"; vcc_18emmc = "/i2c@ff160000/rk805@18/regulators/LDO_REG2"; vdd_11 = "/i2c@ff160000/rk805@18/regulators/LDO_REG3"; i2c2 = "/i2c@ff170000"; i2c3 = "/i2c@ff180000"; spi0 = "/spi@ff190000"; wdt = "/watchdog@ff1a0000"; pwm0 = "/pwm@ff1b0000"; pwm1 = "/pwm@ff1b0010"; pwm2 = "/pwm@ff1b0020"; pwm3 = "/pwm@ff1b0030"; dmac = "/amba/dmac@ff1f0000"; efuse = "/efuse@ff260000"; efuse_id = "/efuse@ff260000/id@7"; cpu_leakage = "/efuse@ff260000/cpu-leakage@17"; logic_leakage = "/efuse@ff260000/logic-leakage@19"; efuse_cpu_version = "/efuse@ff260000/cpu-version@1a"; saradc = "/saradc@ff280000"; gpu = "/gpu@ff300000"; gpu_power_model = "/gpu@ff300000/power_model"; gpu_opp_table = "/gpu-opp-table"; vdpu = "/vpu_service@ff350000"; vpu_mmu = "/iommu@ff350800"; avsd = "/avsd@ff351000"; vpu_service = "/vpu_combo"; rkvdec = "/rkvdec@ff36000"; vcodec_power_model = "/rkvdec@ff36000/vcodec_power_model"; rkvdec_opp_table = "/rkvdec-opp-table"; rkvdec_mmu = "/iommu@ff360480"; h265e = "/h265e@ff330000"; h265e_mmu = "/iommu@ff330200"; vepu = "/vepu@ff340000"; vepu_mmu = "/iommu@ff340800"; venc_srv = "/venc_srv"; vop = "/vop@ff370000"; vop_out = "/vop@ff370000/port"; vop_out_hdmi = "/vop@ff370000/port/endpoint@0"; vop_out_tve = "/vop@ff370000/port/endpoint@1"; vop_mmu = "/iommu@ff373f00"; rga = "/rga@ff3900000"; iep = "/iep@ff3a0000"; iep_mmu = "/iommu@ff3a0800"; hdmi = "/hdmi@ff3c0000"; hdmi_in = "/hdmi@ff3c0000/ports/port"; hdmi_in_vop = "/hdmi@ff3c0000/ports/port/endpoint@0"; tve = "/tve@ff373e00"; tve_in = "/tve@ff373e00/ports/port"; tve_in_vop = "/tve@ff373e00/ports/port/endpoint@0"; display_subsystem = "/display-subsystem"; route_hdmi = "/display-subsystem/route/route-hdmi"; route_tve = "/display-subsystem/route/route-tve"; codec = "/codec@ff410000"; hdmiphy = "/hdmiphy@ff430000"; cru = "/clock-controller@ff440000"; usb2phy_grf = "/syscon@ff450000"; u2phy = "/syscon@ff450000/usb2-phy@100"; u2phy_host = "/syscon@ff450000/usb2-phy@100/host-port"; u2phy_otg = "/syscon@ff450000/usb2-phy@100/otg-port"; usb3phy_grf = "/syscon@ff460000"; u3phy = "/usb3-phy@ff470000"; u3phy_utmi = "/usb3-phy@ff470000/utmi@ff470000"; u3phy_pipe = "/usb3-phy@ff470000/pipe@ff478000"; sdmmc = "/dwmmc@ff500000"; sdio = "/dwmmc@ff510000"; emmc = "/dwmmc@ff520000"; gmac2io = "/ethernet@ff540000"; gmac2phy = "/ethernet@ff550000"; usb20_otg = "/usb@ff580000"; usb_host0_ehci = "/usb@ff5c0000"; usb_host0_ohci = "/usb@ff5d0000"; sdmmc_ext = "/dwmmc@ff5f0000"; usbdrd3 = "/usb@ff600000"; usbdrd_dwc3 = "/usb@ff600000/dwc3@ff600000"; qos_rkvdec_r = "/qos@ff750000"; qos_rkvdec_w = "/qos@ff750080"; qos_vpu = "/qos@ff778000"; dfi = "/dfi@ff790000"; dmc = "/dmc"; ddr_power_model = "/dmc/ddr_power_model"; dmc_opp_table = "/dmc-opp-table"; gic = "/interrupt-controller@ff811000"; pinctrl = "/pinctrl"; gpio0 = "/pinctrl/gpio0@ff210000"; gpio1 = "/pinctrl/gpio1@ff220000"; gpio2 = "/pinctrl/gpio2@ff230000"; gpio3 = "/pinctrl/gpio3@ff240000"; pcfg_pull_up = "/pinctrl/pcfg-pull-up"; pcfg_pull_down = "/pinctrl/pcfg-pull-down"; pcfg_pull_none = "/pinctrl/pcfg-pull-none"; pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma"; pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma"; pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma"; pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma"; pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma"; pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma"; pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma"; pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma"; pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma"; pcfg_output_high = "/pinctrl/pcfg-output-high"; pcfg_output_low = "/pinctrl/pcfg-output-low"; pcfg_input_high = "/pinctrl/pcfg-input-high"; pcfg_input = "/pinctrl/pcfg-input"; i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer"; i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer"; i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer"; i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer"; i2c3_gpio = "/pinctrl/i2c3/i2c3-gpio"; tsp_d0 = "/pinctrl/tsp/tsp-d0"; tsp_d1 = "/pinctrl/tsp/tsp-d1"; tsp_d2 = "/pinctrl/tsp/tsp-d2"; tsp_d3 = "/pinctrl/tsp/tsp-d3"; tsp_d4 = "/pinctrl/tsp/tsp-d4"; tsp_d5 = "/pinctrl/tsp/tsp-d5"; tsp_d6 = "/pinctrl/tsp/tsp-d6"; tsp_d7 = "/pinctrl/tsp/tsp-d7"; tsp_sync = "/pinctrl/tsp/tsp-sync"; tsp_clk = "/pinctrl/tsp/tsp-clk"; tsp_fail = "/pinctrl/tsp/tsp-fail"; tsp_valid = "/pinctrl/tsp/tsp-valid"; hdmii2c_xfer = "/pinctrl/hdmi_i2c/hdmii2c-xfer"; otp_gpio = "/pinctrl/tsadc/otp-gpio"; otp_out = "/pinctrl/tsadc/otp-out"; uart0_xfer = "/pinctrl/uart0/uart0-xfer"; uart0_cts = "/pinctrl/uart0/uart0-cts"; uart0_rts = "/pinctrl/uart0/uart0-rts"; uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio"; uart1_xfer = "/pinctrl/uart1/uart1-xfer"; uart1_cts = "/pinctrl/uart1/uart1-cts"; uart1_rts = "/pinctrl/uart1/uart1-rts"; uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio"; uart2m0_xfer = "/pinctrl/uart2-0/uart2m0-xfer"; uart2m1_xfer = "/pinctrl/uart2-1/uart2m1-xfer"; spi0m0_clk = "/pinctrl/spi0-0/spi0m0-clk"; spi0m0_cs0 = "/pinctrl/spi0-0/spi0m0-cs0"; spi0m0_tx = "/pinctrl/spi0-0/spi0m0-tx"; spi0m0_rx = "/pinctrl/spi0-0/spi0m0-rx"; spi0m0_cs1 = "/pinctrl/spi0-0/spi0m0-cs1"; spi0m1_clk = "/pinctrl/spi0-1/spi0m1-clk"; spi0m1_cs0 = "/pinctrl/spi0-1/spi0m1-cs0"; spi0m1_tx = "/pinctrl/spi0-1/spi0m1-tx"; spi0m1_rx = "/pinctrl/spi0-1/spi0m1-rx"; spi0m1_cs1 = "/pinctrl/spi0-1/spi0m1-cs1"; spi0m2_clk = "/pinctrl/spi0-2/spi0m2-clk"; spi0m2_cs0 = "/pinctrl/spi0-2/spi0m2-cs0"; spi0m2_tx = "/pinctrl/spi0-2/spi0m2-tx"; spi0m2_rx = "/pinctrl/spi0-2/spi0m2-rx"; pdmm0_clk = "/pinctrl/pdm-0/pdmm0-clk"; pdmm0_fsync = "/pinctrl/pdm-0/pdmm0-fsync"; pdmm0_sdi0 = "/pinctrl/pdm-0/pdmm0-sdi0"; pdmm0_sdi1 = "/pinctrl/pdm-0/pdmm0-sdi1"; pdmm0_sdi2 = "/pinctrl/pdm-0/pdmm0-sdi2"; pdmm0_sdi3 = "/pinctrl/pdm-0/pdmm0-sdi3"; pdmm0_sleep = "/pinctrl/pdm-0/pdmm0-sleep"; i2s1_mclk = "/pinctrl/i2s1/i2s1-mclk"; i2s1_sclk = "/pinctrl/i2s1/i2s1-sclk"; i2s1_lrckrx = "/pinctrl/i2s1/i2s1-lrckrx"; i2s1_lrcktx = "/pinctrl/i2s1/i2s1-lrcktx"; i2s1_sdi = "/pinctrl/i2s1/i2s1-sdi"; i2s1_sdo = "/pinctrl/i2s1/i2s1-sdo"; i2s1_sdio1 = "/pinctrl/i2s1/i2s1-sdio1"; i2s1_sdio2 = "/pinctrl/i2s1/i2s1-sdio2"; i2s1_sdio3 = "/pinctrl/i2s1/i2s1-sdio3"; i2s1_sleep = "/pinctrl/i2s1/i2s1-sleep"; i2s2m0_mclk = "/pinctrl/i2s2-0/i2s2m0-mclk"; i2s2m0_sclk = "/pinctrl/i2s2-0/i2s2m0-sclk"; i2s2m0_lrckrx = "/pinctrl/i2s2-0/i2s2m0-lrckrx"; i2s2m0_lrcktx = "/pinctrl/i2s2-0/i2s2m0-lrcktx"; i2s2m0_sdi = "/pinctrl/i2s2-0/i2s2m0-sdi"; i2s2m0_sdo = "/pinctrl/i2s2-0/i2s2m0-sdo"; i2s2m0_sleep = "/pinctrl/i2s2-0/i2s2m0-sleep"; i2s2m1_mclk = "/pinctrl/i2s2-1/i2s2m1-mclk"; i2s2m1_sclk = "/pinctrl/i2s2-1/i2s2m1-sclk"; i2s2m1_lrckrx = "/pinctrl/i2s2-1/i2sm1-lrckrx"; i2s2m1_lrcktx = "/pinctrl/i2s2-1/i2s2m1-lrcktx"; i2s2m1_sdi = "/pinctrl/i2s2-1/i2s2m1-sdi"; i2s2m1_sdo = "/pinctrl/i2s2-1/i2s2m1-sdo"; i2s2m1_sleep = "/pinctrl/i2s2-1/i2s2m1-sleep"; spdifm0_tx = "/pinctrl/spdif-0/spdifm0-tx"; spdifm1_tx = "/pinctrl/spdif-1/spdifm1-tx"; spdifm2_tx = "/pinctrl/spdif-2/spdifm2-tx"; sdmmc0m0_pwren = "/pinctrl/sdmmc0-0/sdmmc0m0-pwren"; sdmmc0m0_gpio = "/pinctrl/sdmmc0-0/sdmmc0m0-gpio"; sdmmc0m1_pwren = "/pinctrl/sdmmc0-1/sdmmc0m1-pwren"; sdmmc0m1_gpio = "/pinctrl/sdmmc0-1/sdmmc0m1-gpio"; sdmmc0_clk = "/pinctrl/sdmmc0/sdmmc0-clk"; sdmmc0_cmd = "/pinctrl/sdmmc0/sdmmc0-cmd"; sdmmc0_dectn = "/pinctrl/sdmmc0/sdmmc0-dectn"; sdmmc0_wrprt = "/pinctrl/sdmmc0/sdmmc0-wrprt"; sdmmc0_bus1 = "/pinctrl/sdmmc0/sdmmc0-bus1"; sdmmc0_bus4 = "/pinctrl/sdmmc0/sdmmc0-bus4"; sdmmc0_gpio = "/pinctrl/sdmmc0/sdmmc0-gpio"; sdmmc0ext_clk = "/pinctrl/sdmmc0ext/sdmmc0ext-clk"; sdmmc0ext_cmd = "/pinctrl/sdmmc0ext/sdmmc0ext-cmd"; sdmmc0ext_wrprt = "/pinctrl/sdmmc0ext/sdmmc0ext-wrprt"; sdmmc0ext_dectn = "/pinctrl/sdmmc0ext/sdmmc0ext-dectn"; sdmmc0ext_bus1 = "/pinctrl/sdmmc0ext/sdmmc0ext-bus1"; sdmmc0ext_bus4 = "/pinctrl/sdmmc0ext/sdmmc0ext-bus4"; sdmmc0ext_gpio = "/pinctrl/sdmmc0ext/sdmmc0ext-gpio"; sdmmc1_clk = "/pinctrl/sdmmc1/sdmmc1-clk"; sdmmc1_cmd = "/pinctrl/sdmmc1/sdmmc1-cmd"; sdmmc1_pwren = "/pinctrl/sdmmc1/sdmmc1-pwren"; sdmmc1_wrprt = "/pinctrl/sdmmc1/sdmmc1-wrprt"; sdmmc1_dectn = "/pinctrl/sdmmc1/sdmmc1-dectn"; sdmmc1_bus1 = "/pinctrl/sdmmc1/sdmmc1-bus1"; sdmmc1_bus4 = "/pinctrl/sdmmc1/sdmmc1-bus4"; sdmmc1_gpio = "/pinctrl/sdmmc1/sdmmc1-gpio"; emmc_clk = "/pinctrl/emmc/emmc-clk"; emmc_cmd = "/pinctrl/emmc/emmc-cmd"; emmc_pwren = "/pinctrl/emmc/emmc-pwren"; emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; emmc_bus1 = "/pinctrl/emmc/emmc-bus1"; emmc_bus4 = "/pinctrl/emmc/emmc-bus4"; emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; pwm0_pin = "/pinctrl/pwm0/pwm0-pin"; pwm0_pin_pull_up = "/pinctrl/pwm0/pwm0-pin-pull-up"; pwm1_pin = "/pinctrl/pwm1/pwm1-pin"; pwm1_pin_pull_up = "/pinctrl/pwm1/pwm1-pin-pull-up"; pwm2_pin = "/pinctrl/pwm2/pwm2-pin"; pwmir_pin = "/pinctrl/pwmir/pwmir-pin"; rgmiim1_pins = "/pinctrl/gmac-1/rgmiim1-pins"; rmiim1_pins = "/pinctrl/gmac-1/rmiim1-pins"; fephyled_speed100 = "/pinctrl/gmac2phy/fephyled-speed100"; fephyled_speed10 = "/pinctrl/gmac2phy/fephyled-speed10"; fephyled_duplex = "/pinctrl/gmac2phy/fephyled-duplex"; fephyled_rxm0 = "/pinctrl/gmac2phy/fephyled-rxm0"; fephyled_txm0 = "/pinctrl/gmac2phy/fephyled-txm0"; fephyled_linkm0 = "/pinctrl/gmac2phy/fephyled-linkm0"; fephyled_rxm1 = "/pinctrl/gmac2phy/fephyled-rxm1"; fephyled_txm1 = "/pinctrl/gmac2phy/fephyled-txm1"; fephyled_linkm1 = "/pinctrl/gmac2phy/fephyled-linkm1"; tsadc_int = "/pinctrl/tsadc_pin/tsadc-int"; tsadc_gpio = "/pinctrl/tsadc_pin/tsadc-gpio"; hdmi_cec = "/pinctrl/hdmi_pin/hdmi-cec"; hdmi_hpd = "/pinctrl/hdmi_pin/hdmi-hpd"; dvp_d2d9_m0 = "/pinctrl/cif-0/dvp-d2d9-m0"; dvp_d2d9_m1 = "/pinctrl/cif-1/dvp-d2d9-m1"; pmic_int_l = "/pinctrl/pmic/pmic-int-l"; wifi_enable_h = "/pinctrl/sdio-pwrseq/wifi-enable-h"; host_vbus_drv = "/pinctrl/usb/host-vbus-drv"; otg_vbus_drv = "/pinctrl/usb/otg-vbus-drv"; uart0_gpios = "/pinctrl/wireless-bluetooth/uart0-gpios"; drm_logo = "/reserved-memory/drm-logo@00000000"; secure_memory = "/reserved-memory/secure-memory@20000000"; ramoops_mem = "/reserved-memory/ramoops@68000000"; gmac_clkin = "/external-gmac-clock"; sdio_pwrseq = "/sdio-pwrseq"; spdif_out = "/spdif-out"; vcc_host_vbus = "/host-vbus-regulator"; vcc_otg_vbus = "/otg-vbus-regulator"; vcc_phy = "/vcc-phy-regulator"; vcc_sd = "/sdmmc-regulator"; xin32k = "/xin32k"; }; }; 1 Quote
Ben N Voutour Posted August 16, 2021 Posted August 16, 2021 19 hours ago, jock said: @RetroFan90 Thanks for the photos, firmwares and all the details! The HK1 Max (aka YX_RK3328 board) is already very well supported since it is the board I got here and it is the main developing asset I got. The H96 Max looks quite ordinary box, I took a look to the dtb and it seems pretty standard to me, should work fine out of the box. Do you have issues with some peripherals with the H96 Max? i don't have an h96 max , only HK1 Max but some versions of h96 max firmware work fairly normal some versions have wifi 2.4 + 5 GHz with BT 4 but some versions of h96 max firmware have issues with bluetooth in the sense that when you try to pair anything to it , it connects for a split second and then turns off bt and is reproducible on my HK1 Max but might be different... like for example the m96 and x88 and some other clones seem to have issues getting the 7 segment 4 digit LED Display to show up after booting on HK1MAX. some 3328 native firmwares seem to cause the 3318 some trouble by softbricking the loader (which is unbrickable at the hardware level (why i picked RockChip as my main box in the first place.) if all else fails you short the two copper dots with a pair of angled tweezers and plug the usb into the 2.0 port as the 3.0 port won't work afaik in my testing so far... i'll send links to the android 11 firmware along with 9 & 10 soon... 1 Quote
Ben N Voutour Posted August 16, 2021 Posted August 16, 2021 8 minutes ago, RetroFan90 said: i don't have an h96 max , only HK1 Max but some versions of h96 max firmware work fairly normal some versions have wifi 2.4 + 5 GHz with BT 4 but some versions of h96 max firmware have issues with bluetooth in the sense that when you try to pair anything to it , it connects for a split second and then turns off bt and is reproducible on my HK1 Max but might be different... like for example the m96 and x88 and some other clones seem to have issues getting the 7 segment 4 digit LED Display to show up after booting on HK1MAX. some 3328 native firmwares seem to cause the 3318 some trouble by softbricking the loader (which is unbrickable at the hardware level (why i picked RockChip as my main box in the first place.) if all else fails you short the two copper dots with a pair of angled tweezers and plug the usb into the 2.0 port as the 3.0 port won't work afaik in my testing so far... i'll send links to the android 11 firmware along with 9 & 10 soon... here are the firmwares i found... H96 Max V11 RK3318 https://drive.google.com/file/d/1322cCZQ7z1r-1mLmtsC7IJzQskaI7hyg/ HK1 MAX (2021-05-05) RK3318 (Wifi + BT Has Weird Issues) https://drive.google.com/file/d/1tfgoKVl9jI0LzmX3YP-KOuOAYXr9Kor-/view?usp=sharing HK1 COOL (2021-05-22) RK3318 https://drive.google.com/file/d/1WVEDJw2Ci30wxwTiS71IxKVR2HjCtpku/view?usp=sharing HK1 MINI+ (2021-05-22) RK3318 https://drive.google.com/file/d/1OV2RRG4rj9740-cmGjb5Rn_lKyr52BTu/view?usp=sharing HK1 SUPER (2021-05-22) RK3318 https://drive.google.com/file/d/1j7DgYSIps9plO7AXZUl-Bfx9DeEEBe3T/view?usp=sharing HK1 RBOX R1 (2021-05-05) RK3318 https://drive.google.com/file/d/1gBZidviZkX4j9K3nvOZCMdBJeeX-OpQ2/view?usp=sharing HK1 RBOX R1 MINI (2021-05-05) RK3318 (HS2734C) https://drive.google.com/file/d/1LeGgWRIWpRdFsjP1tyeIbCGphARZ8l3-/view?usp=sharing M96 (2021-05-24) RK3328 (Partially Works On RK3318 CPU) https://drive.google.com/file/d/1CgfaCJ4NXxirrxWWF6yLJk69oT3gWT-a/edit X88 Pro (2021-04-10) RK3318 (Issues match M96 Firmware "No LED Clock and WiFi and BT is broken) https://drive.google.com/file/d/1OgOzUMzlq17iy2OhosB3-7uvrTK2zO8B/ H96 Max (2021-05-21) RK3318 https://drive.google.com/file/d/1WmqskiXxoMOC3-_Vd8Bg_v3c0vGT_Jse/view?usp=sharing Various Tools For Rockchip Found In The Wild https://drive.google.com/drive/folders/1kcrYd1-Oum8aU4OyU0OSVOe3q2tIzHVE?usp=sharing Sorry For The BrickWall Of Text Hope This Helps... RetroFan90 0 Quote
jock Posted August 16, 2021 Author Posted August 16, 2021 20 hours ago, Jason Duhamell said: I have a MX10 Pro TV box I have been trying to get working with the dreaded SV6051 wifi. The board silkscreen is labeled as MXQ-RK3328-D4_A VER: 1.2. The board itself is 4GB ram and 64GB eMMC and everything is working other than the wifi. So far I am only having luck with RK3318 mainline and the rk3328 legacy Station M1 builds. The board will not boot with the legacy rk3318 build. The other issue I have noticed is when I use rk3318-config to enable the alternate SDIO bus, it will hang on reboot. I have decompiled the DTS from the Android backup I made using the Multitool (Multitool is a lifesaver, thank you.). Reveal hidden contents /dts-v1/; / { compatible = "rockchip,rk3328-evb-avb\0rockchip,rk3328"; interrupt-parent = <0x01>; #address-cells = <0x02>; #size-cells = <0x02>; model = "Rockchip RK3328 EVB avb"; ddr_timing { compatible = "rockchip,ddr-timing"; ddr3_speed_bin = <0x15>; ddr4_speed_bin = <0x0c>; pd_idle = <0x00>; sr_idle = <0x00>; sr_mc_gate_idle = <0x00>; srpd_lite_idle = <0x00>; standby_idle = <0x00>; auto_pd_dis_freq = <0x42a>; auto_sr_dis_freq = <0x320>; ddr3_dll_dis_freq = <0x12c>; ddr4_dll_dis_freq = <0x271>; phy_dll_dis_freq = <0x190>; ddr3_odt_dis_freq = <0x64>; phy_ddr3_odt_dis_freq = <0x64>; ddr3_drv = <0x28>; ddr3_odt = <0x78>; phy_ddr3_ca_drv = <0x1b>; phy_ddr3_ck_drv = <0x15>; phy_ddr3_dq_drv = <0x15>; phy_ddr3_odt = <0x03>; lpddr3_odt_dis_freq = <0x29a>; phy_lpddr3_odt_dis_freq = <0x29a>; lpddr3_drv = <0x28>; lpddr3_odt = <0xf0>; phy_lpddr3_ca_drv = <0x16>; phy_lpddr3_ck_drv = <0x13>; phy_lpddr3_dq_drv = <0x16>; phy_lpddr3_odt = <0x02>; lpddr4_odt_dis_freq = <0x320>; phy_lpddr4_odt_dis_freq = <0x320>; lpddr4_drv = <0x3c>; lpddr4_dq_odt = <0x28>; lpddr4_ca_odt = <0x28>; phy_lpddr4_ca_drv = <0x14>; phy_lpddr4_ck_cs_drv = <0x06>; phy_lpddr4_dq_drv = <0x06>; phy_lpddr4_odt = <0x10>; ddr4_odt_dis_freq = <0x29a>; phy_ddr4_odt_dis_freq = <0x29a>; ddr4_drv = <0x22>; ddr4_odt = <0xf0>; phy_ddr4_ca_drv = <0x16>; phy_ddr4_ck_drv = <0x13>; phy_ddr4_dq_drv = <0x16>; phy_ddr4_odt = <0x02>; ddr3a1_ddr4a9_de-skew = <0x02>; ddr3a0_ddr4a10_de-skew = <0x03>; ddr3a3_ddr4a6_de-skew = <0x03>; ddr3a2_ddr4a4_de-skew = <0x02>; ddr3a5_ddr4a8_de-skew = <0x03>; ddr3a4_ddr4a5_de-skew = <0x02>; ddr3a7_ddr4a11_de-skew = <0x03>; ddr3a6_ddr4a7_de-skew = <0x02>; ddr3a9_ddr4a0_de-skew = <0x02>; ddr3a8_ddr4a13_de-skew = <0x01>; ddr3a11_ddr4a3_de-skew = <0x02>; ddr3a10_ddr4cs0_de-skew = <0x02>; ddr3a13_ddr4a2_de-skew = <0x01>; ddr3a12_ddr4ba1_de-skew = <0x02>; ddr3a15_ddr4odt0_de-skew = <0x03>; ddr3a14_ddr4a1_de-skew = <0x02>; ddr3ba1_ddr4a15_de-skew = <0x02>; ddr3ba0_ddr4bg0_de-skew = <0x04>; ddr3ras_ddr4cke_de-skew = <0x04>; ddr3ba2_ddr4ba0_de-skew = <0x03>; ddr3we_ddr4bg1_de-skew = <0x02>; ddr3cas_ddr4a12_de-skew = <0x02>; ddr3ckn_ddr4ckn_de-skew = <0x0b>; ddr3ckp_ddr4ckp_de-skew = <0x0b>; ddr3cke_ddr4a16_de-skew = <0x02>; ddr3odt0_ddr4a14_de-skew = <0x04>; ddr3cs0_ddr4act_de-skew = <0x04>; ddr3reset_ddr4reset_de-skew = <0x07>; ddr3cs1_ddr4cs1_de-skew = <0x07>; ddr3odt1_ddr4odt1_de-skew = <0x07>; cs0_dm0_rx_de-skew = <0x0c>; cs0_dm0_tx_de-skew = <0x0a>; cs0_dq0_rx_de-skew = <0x0c>; cs0_dq0_tx_de-skew = <0x0a>; cs0_dq1_rx_de-skew = <0x0c>; cs0_dq1_tx_de-skew = <0x0a>; cs0_dq2_rx_de-skew = <0x0c>; cs0_dq2_tx_de-skew = <0x0a>; cs0_dq3_rx_de-skew = <0x0c>; cs0_dq3_tx_de-skew = <0x0a>; cs0_dq4_rx_de-skew = <0x0c>; cs0_dq4_tx_de-skew = <0x0a>; cs0_dq5_rx_de-skew = <0x0c>; cs0_dq5_tx_de-skew = <0x0a>; cs0_dq6_rx_de-skew = <0x0c>; cs0_dq6_tx_de-skew = <0x0a>; cs0_dq7_rx_de-skew = <0x0c>; cs0_dq7_tx_de-skew = <0x0a>; cs0_dqs0_rx_de-skew = <0x0a>; cs0_dqs0p_tx_de-skew = <0x0c>; cs0_dqs0n_tx_de-skew = <0x0c>; cs0_dm1_rx_de-skew = <0x0a>; cs0_dm1_tx_de-skew = <0x08>; cs0_dq8_rx_de-skew = <0x0a>; cs0_dq8_tx_de-skew = <0x08>; cs0_dq9_rx_de-skew = <0x0a>; cs0_dq9_tx_de-skew = <0x08>; cs0_dq10_rx_de-skew = <0x0a>; cs0_dq10_tx_de-skew = <0x08>; cs0_dq11_rx_de-skew = <0x0a>; cs0_dq11_tx_de-skew = <0x08>; cs0_dq12_rx_de-skew = <0x0a>; cs0_dq12_tx_de-skew = <0x08>; cs0_dq13_rx_de-skew = <0x0a>; cs0_dq13_tx_de-skew = <0x08>; cs0_dq14_rx_de-skew = <0x0a>; cs0_dq14_tx_de-skew = <0x08>; cs0_dq15_rx_de-skew = <0x0a>; cs0_dq15_tx_de-skew = <0x08>; cs0_dqs1_rx_de-skew = <0x09>; cs0_dqs1p_tx_de-skew = <0x0a>; cs0_dqs1n_tx_de-skew = <0x0a>; cs0_dm2_rx_de-skew = <0x0a>; cs0_dm2_tx_de-skew = <0x09>; cs0_dq16_rx_de-skew = <0x0a>; cs0_dq16_tx_de-skew = <0x09>; cs0_dq17_rx_de-skew = <0x0a>; cs0_dq17_tx_de-skew = <0x09>; cs0_dq18_rx_de-skew = <0x0a>; cs0_dq18_tx_de-skew = <0x09>; cs0_dq19_rx_de-skew = <0x0a>; cs0_dq19_tx_de-skew = <0x09>; cs0_dq20_rx_de-skew = <0x0a>; cs0_dq20_tx_de-skew = <0x09>; cs0_dq21_rx_de-skew = <0x0a>; cs0_dq21_tx_de-skew = <0x09>; cs0_dq22_rx_de-skew = <0x0a>; cs0_dq22_tx_de-skew = <0x09>; cs0_dq23_rx_de-skew = <0x0a>; cs0_dq23_tx_de-skew = <0x09>; cs0_dqs2_rx_de-skew = <0x09>; cs0_dqs2p_tx_de-skew = <0x0b>; cs0_dqs2n_tx_de-skew = <0x0b>; cs0_dm3_rx_de-skew = <0x07>; cs0_dm3_tx_de-skew = <0x07>; cs0_dq24_rx_de-skew = <0x07>; cs0_dq24_tx_de-skew = <0x07>; cs0_dq25_rx_de-skew = <0x07>; cs0_dq25_tx_de-skew = <0x07>; cs0_dq26_rx_de-skew = <0x07>; cs0_dq26_tx_de-skew = <0x07>; cs0_dq27_rx_de-skew = <0x07>; cs0_dq27_tx_de-skew = <0x07>; cs0_dq28_rx_de-skew = <0x07>; cs0_dq28_tx_de-skew = <0x07>; cs0_dq29_rx_de-skew = <0x07>; cs0_dq29_tx_de-skew = <0x07>; cs0_dq30_rx_de-skew = <0x07>; cs0_dq30_tx_de-skew = <0x07>; cs0_dq31_rx_de-skew = <0x07>; cs0_dq31_tx_de-skew = <0x07>; cs0_dqs3_rx_de-skew = <0x07>; cs0_dqs3p_tx_de-skew = <0x0a>; cs0_dqs3n_tx_de-skew = <0x0a>; cs1_dm0_rx_de-skew = <0x07>; cs1_dm0_tx_de-skew = <0x08>; cs1_dq0_rx_de-skew = <0x07>; cs1_dq0_tx_de-skew = <0x08>; cs1_dq1_rx_de-skew = <0x07>; cs1_dq1_tx_de-skew = <0x08>; cs1_dq2_rx_de-skew = <0x07>; cs1_dq2_tx_de-skew = <0x08>; cs1_dq3_rx_de-skew = <0x07>; cs1_dq3_tx_de-skew = <0x08>; cs1_dq4_rx_de-skew = <0x07>; cs1_dq4_tx_de-skew = <0x08>; cs1_dq5_rx_de-skew = <0x07>; cs1_dq5_tx_de-skew = <0x08>; cs1_dq6_rx_de-skew = <0x07>; cs1_dq6_tx_de-skew = <0x08>; cs1_dq7_rx_de-skew = <0x07>; cs1_dq7_tx_de-skew = <0x08>; cs1_dqs0_rx_de-skew = <0x06>; cs1_dqs0p_tx_de-skew = <0x09>; cs1_dqs0n_tx_de-skew = <0x09>; cs1_dm1_rx_de-skew = <0x07>; cs1_dm1_tx_de-skew = <0x07>; cs1_dq8_rx_de-skew = <0x07>; cs1_dq8_tx_de-skew = <0x08>; cs1_dq9_rx_de-skew = <0x07>; cs1_dq9_tx_de-skew = <0x07>; cs1_dq10_rx_de-skew = <0x07>; cs1_dq10_tx_de-skew = <0x08>; cs1_dq11_rx_de-skew = <0x07>; cs1_dq11_tx_de-skew = <0x07>; cs1_dq12_rx_de-skew = <0x07>; cs1_dq12_tx_de-skew = <0x08>; cs1_dq13_rx_de-skew = <0x07>; cs1_dq13_tx_de-skew = <0x07>; cs1_dq14_rx_de-skew = <0x07>; cs1_dq14_tx_de-skew = <0x08>; cs1_dq15_rx_de-skew = <0x07>; cs1_dq15_tx_de-skew = <0x07>; cs1_dqs1_rx_de-skew = <0x07>; cs1_dqs1p_tx_de-skew = <0x09>; cs1_dqs1n_tx_de-skew = <0x09>; cs1_dm2_rx_de-skew = <0x07>; cs1_dm2_tx_de-skew = <0x08>; cs1_dq16_rx_de-skew = <0x07>; cs1_dq16_tx_de-skew = <0x08>; cs1_dq17_rx_de-skew = <0x07>; cs1_dq17_tx_de-skew = <0x08>; cs1_dq18_rx_de-skew = <0x07>; cs1_dq18_tx_de-skew = <0x08>; cs1_dq19_rx_de-skew = <0x07>; cs1_dq19_tx_de-skew = <0x08>; cs1_dq20_rx_de-skew = <0x07>; cs1_dq20_tx_de-skew = <0x08>; cs1_dq21_rx_de-skew = <0x07>; cs1_dq21_tx_de-skew = <0x08>; cs1_dq22_rx_de-skew = <0x07>; cs1_dq22_tx_de-skew = <0x08>; cs1_dq23_rx_de-skew = <0x07>; cs1_dq23_tx_de-skew = <0x08>; cs1_dqs2_rx_de-skew = <0x06>; cs1_dqs2p_tx_de-skew = <0x09>; cs1_dqs2n_tx_de-skew = <0x09>; cs1_dm3_rx_de-skew = <0x07>; cs1_dm3_tx_de-skew = <0x07>; cs1_dq24_rx_de-skew = <0x07>; cs1_dq24_tx_de-skew = <0x08>; cs1_dq25_rx_de-skew = <0x07>; cs1_dq25_tx_de-skew = <0x07>; cs1_dq26_rx_de-skew = <0x07>; cs1_dq26_tx_de-skew = <0x07>; cs1_dq27_rx_de-skew = <0x07>; cs1_dq27_tx_de-skew = <0x07>; cs1_dq28_rx_de-skew = <0x07>; cs1_dq28_tx_de-skew = <0x07>; cs1_dq29_rx_de-skew = <0x07>; cs1_dq29_tx_de-skew = <0x07>; cs1_dq30_rx_de-skew = <0x07>; cs1_dq30_tx_de-skew = <0x07>; cs1_dq31_rx_de-skew = <0x07>; cs1_dq31_tx_de-skew = <0x07>; cs1_dqs3_rx_de-skew = <0x07>; cs1_dqs3p_tx_de-skew = <0x09>; cs1_dqs3n_tx_de-skew = <0x09>; phandle = <0x81>; }; aliases { ethernet0 = "/ethernet@ff540000"; ethernet1 = "/ethernet@ff550000"; i2c0 = "/i2c@ff150000"; i2c1 = "/i2c@ff160000"; i2c2 = "/i2c@ff170000"; i2c3 = "/i2c@ff180000"; serial0 = "/serial@ff110000"; serial1 = "/serial@ff120000"; serial2 = "/serial@ff130000"; }; cpus { #address-cells = <0x02>; #size-cells = <0x00>; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x00 0x00>; enable-method = "psci"; clocks = <0x02 0x06>; #cooling-cells = <0x02>; dynamic-power-coefficient = <0x78>; operating-points-v2 = <0x03>; cpu-supply = <0x04>; phandle = <0x06>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x00 0x01>; enable-method = "psci"; operating-points-v2 = <0x03>; phandle = <0x07>; }; cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x00 0x02>; enable-method = "psci"; operating-points-v2 = <0x03>; phandle = <0x08>; }; cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x00 0x03>; enable-method = "psci"; operating-points-v2 = <0x03>; phandle = <0x09>; }; }; cpu0-opp-table { compatible = "operating-points-v2"; opp-shared; rockchip,leakage-voltage-sel = <0x01 0x0a 0x00 0x0b 0xfe 0x01>; nvmem-cells = <0x05>; nvmem-cell-names = "cpu_leakage"; phandle = <0x03>; opp-408000000 { opp-hz = <0x00 0x18519600>; opp-microvolt = <0xe7ef0 0xe7ef0 0x149970>; opp-microvolt-L0 = <0xe7ef0 0xe7ef0 0x149970>; opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0x149970>; clock-latency-ns = <0x9c40>; opp-suspend; }; opp-600000000 { opp-hz = <0x00 0x23c34600>; opp-microvolt = <0xe7ef0 0xe7ef0 0x149970>; opp-microvolt-L0 = <0xe7ef0 0xe7ef0 0x149970>; opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0x149970>; clock-latency-ns = <0x9c40>; }; opp-816000000 { opp-hz = <0x00 0x30a32c00>; opp-microvolt = <0x100590 0x100590 0x149970>; opp-microvolt-L0 = <0x100590 0x100590 0x149970>; opp-microvolt-L1 = <0xf4240 0xf4240 0x149970>; clock-latency-ns = <0x9c40>; }; opp-1008000000 { opp-hz = <0x00 0x3c14dc00>; opp-microvolt = <0x118c30 0x118c30 0x149970>; opp-microvolt-L0 = <0x118c30 0x118c30 0x149970>; opp-microvolt-L1 = <0x10c8e0 0x10c8e0 0x149970>; clock-latency-ns = <0x9c40>; }; opp-1200000000 { opp-hz = <0x00 0x47868c00>; opp-microvolt = <0x137478 0x137478 0x149970>; opp-microvolt-L0 = <0x137478 0x137478 0x149970>; opp-microvolt-L1 = <0x12b128 0x12b128 0x149970>; clock-latency-ns = <0x9c40>; }; opp-1296000000 { opp-hz = <0x00 0x4d3f6400>; opp-microvolt = <0x149970 0x149970 0x149970>; opp-microvolt-L0 = <0x149970 0x149970 0x149970>; opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>; clock-latency-ns = <0x9c40>; }; }; arm-pmu { compatible = "arm,cortex-a53-pmu"; interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>; interrupt-affinity = <0x06 0x07 0x08 0x09>; }; cpuinfo { compatible = "rockchip,cpuinfo"; nvmem-cells = <0x0a 0x0b>; nvmem-cell-names = "id\0cpu-version"; }; firmware { optee { compatible = "linaro,optee-tz"; method = "smc"; }; android { compatible = "android,firmware"; boot_devices = "ff520000.dwmmc"; vbmeta { compatible = "android,vbmeta"; parts = "vbmeta,boot,system,vendor,dtbo"; }; fstab { compatible = "android,fstab"; vendor { compatible = "android,vendor"; dev = "/dev/block/by-name/vendor"; type = "ext4"; mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; fsmgr_flags = "wait,avb"; }; }; }; }; psci { compatible = "arm,psci-1.0"; method = "smc"; }; rockchip-suspend { compatible = "rockchip,pm-rk3328"; status = "okay"; rockchip,sleep-mode-config = <0x00>; rockchip,virtual-poweroff = <0x01>; phandle = <0x9d>; }; timer { compatible = "arm,armv8-timer"; interrupts = <0x01 0x0d 0xf08 0x01 0x0e 0xf08 0x01 0x0b 0xf08 0x01 0x0a 0xf08>; }; xin24m { compatible = "fixed-clock"; #clock-cells = <0x00>; clock-frequency = <0x16e3600>; clock-output-names = "xin24m"; phandle = <0x64>; }; i2s@ff000000 { compatible = "rockchip,rk3328-i2s\0rockchip,rk3066-i2s"; reg = <0x00 0xff000000 0x00 0x1000>; interrupts = <0x00 0x1a 0x04>; clocks = <0x02 0x29 0x02 0x137>; clock-names = "i2s_clk\0i2s_hclk"; dmas = <0x0c 0x0b 0x0c 0x0c>; dma-names = "tx\0rx"; status = "okay"; #sound-dai-cells = <0x00>; rockchip,bclk-fs = <0x80>; phandle = <0x92>; }; i2s@ff010000 { compatible = "rockchip,rk3328-i2s\0rockchip,rk3066-i2s"; reg = <0x00 0xff010000 0x00 0x1000>; interrupts = <0x00 0x1b 0x04>; clocks = <0x02 0x2a 0x02 0x138>; clock-names = "i2s_clk\0i2s_hclk"; dmas = <0x0c 0x0e 0x0c 0x0f>; dma-names = "tx\0rx"; status = "okay"; #sound-dai-cells = <0x00>; phandle = <0x90>; }; i2s@ff020000 { compatible = "rockchip,rk3328-i2s\0rockchip,rk3066-i2s"; reg = <0x00 0xff020000 0x00 0x1000>; interrupts = <0x00 0x1c 0x04>; clocks = <0x02 0x2b 0x02 0x139>; clock-names = "i2s_clk\0i2s_hclk"; dmas = <0x0c 0x00 0x0c 0x01>; dma-names = "tx\0rx"; pinctrl-names = "default\0sleep"; pinctrl-0 = <0x0d 0x0e 0x0f 0x10 0x11 0x12>; pinctrl-1 = <0x13>; status = "disabled"; phandle = <0x9e>; }; spdif@ff030000 { compatible = "rockchip,rk3328-spdif"; reg = <0x00 0xff030000 0x00 0x1000>; interrupts = <0x00 0x1d 0x04>; clocks = <0x02 0x2e 0x02 0x13a>; clock-names = "mclk\0hclk"; dmas = <0x0c 0x0a>; dma-names = "tx"; pinctrl-names = "default"; pinctrl-0 = <0x14>; status = "okay"; #sound-dai-cells = <0x00>; phandle = <0x94>; }; pdm@ff040000 { compatible = "rockchip,pdm"; reg = <0x00 0xff040000 0x00 0x1000>; clocks = <0x02 0x3d 0x02 0x152>; clock-names = "pdm_clk\0pdm_hclk"; dmas = <0x0c 0x10>; dma-names = "rx"; pinctrl-names = "default\0sleep"; pinctrl-0 = <0x15 0x16 0x17 0x18 0x19 0x1a>; pinctrl-1 = <0x1b>; status = "disabled"; phandle = <0x9f>; }; tsp@ff050000 { compatible = "rockchip,rk3328-tsp"; reg = <0x00 0xff050000 0x00 0x10000>; rockchip,grf = <0x1c>; interrupts = <0x00 0x48 0x04>; interrupt-names = "irq_tsp"; clocks = <0x02 0x5c 0x02 0x98 0x02 0x135>; clock-names = "clk_tsp\0aclk_tsp\0hclk_tsp"; pinctrl-names = "default"; pinctrl-0 = <0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28>; status = "disabled"; phandle = <0xa0>; }; syscon@ff100000 { compatible = "rockchip,rk3328-grf\0syscon\0simple-mfd"; reg = <0x00 0xff100000 0x00 0x1000>; #address-cells = <0x01>; #size-cells = <0x01>; phandle = <0x1c>; io-domains { compatible = "rockchip,rk3328-io-voltage-domain"; status = "okay"; vccio1-supply = <0x29>; vccio2-supply = <0x2a>; vccio3-supply = <0x29>; vccio4-supply = <0x2b>; vccio5-supply = <0x29>; vccio6-supply = <0x29>; pmuio-supply = <0x29>; phandle = <0xa1>; }; power-controller { compatible = "rockchip,rk3328-power-controller"; #power-domain-cells = <0x01>; #address-cells = <0x01>; #size-cells = <0x00>; status = "okay"; phandle = <0x4e>; pd_hevc@6 { reg = <0x06>; }; pd_video@5 { reg = <0x05>; clocks = <0x02 0x8b 0x02 0x142 0x02 0x41 0x02 0x42>; pm_qos = <0x2c 0x2d>; }; pd_vpu@8 { reg = <0x08>; clocks = <0x02 0x8f 0x02 0x146>; pm_qos = <0x2e>; }; }; reboot-mode { compatible = "syscon-reboot-mode"; offset = <0x5c8>; mode-bootloader = <0x5242c301>; mode-charge = <0x5242c30b>; mode-fastboot = <0x5242c309>; mode-loader = <0x5242c301>; mode-normal = <0x5242c300>; mode-recovery = <0x5242c303>; mode-ums = <0x5242c30c>; }; }; thermal-zones { soc-thermal { polling-delay-passive = <0x14>; polling-delay = <0x3e8>; sustainable-power = <0x3e8>; thermal-sensors = <0x2f 0x00>; phandle = <0xa2>; trips { trip-point-0 { temperature = <0x15f90>; hysteresis = <0x7d0>; type = "passive"; phandle = <0xa3>; }; trip-point-1 { temperature = <0x19a28>; hysteresis = <0x7d0>; type = "passive"; phandle = <0x30>; }; soc-crit { temperature = <0x1adb0>; hysteresis = <0x7d0>; type = "critical"; phandle = <0xa4>; }; }; cooling-maps { map0 { trip = <0x30>; cooling-device = <0x06 0xffffffff 0xffffffff>; contribution = <0x1000>; }; map1 { trip = <0x30>; cooling-device = <0x31 0xffffffff 0xffffffff>; contribution = <0x1000>; }; map2 { trip = <0x30>; cooling-device = <0x32 0xffffffff 0xffffffff>; contribution = <0x400>; }; map3 { trip = <0x30>; cooling-device = <0x33 0xffffffff 0xffffffff>; contribution = <0x400>; }; }; }; }; tsadc@ff250000 { compatible = "rockchip,rk3328-tsadc"; reg = <0x00 0xff250000 0x00 0x100>; interrupts = <0x00 0x3a 0x04>; rockchip,grf = <0x1c>; clocks = <0x02 0x24 0x02 0xd5>; clock-names = "tsadc\0apb_pclk"; assigned-clocks = <0x02 0x24>; assigned-clock-rates = <0xc350>; resets = <0x02 0x42>; reset-names = "tsadc-apb"; pinctrl-names = "init\0default\0sleep"; pinctrl-0 = <0x34>; pinctrl-1 = <0x35>; pinctrl-2 = <0x34>; #thermal-sensor-cells = <0x01>; rockchip,hw-tshut-temp = <0x1d4c0>; status = "okay"; phandle = <0x2f>; }; serial@ff110000 { compatible = "rockchip,rk3328-uart\0snps,dw-apb-uart"; reg = <0x00 0xff110000 0x00 0x100>; interrupts = <0x00 0x37 0x04>; clocks = <0x02 0x26 0x02 0xd2>; clock-names = "baudclk\0apb_pclk"; reg-shift = <0x02>; reg-io-width = <0x04>; dmas = <0x0c 0x02 0x0c 0x03>; pinctrl-names = "default"; pinctrl-0 = <0x36 0x37>; status = "okay"; phandle = <0xa5>; }; serial@ff120000 { compatible = "rockchip,rk3328-uart\0snps,dw-apb-uart"; reg = <0x00 0xff120000 0x00 0x100>; interrupts = <0x00 0x38 0x04>; clocks = <0x02 0x27 0x02 0xd3>; clock-names = "baudclk\0apb_pclk"; reg-shift = <0x02>; reg-io-width = <0x04>; dmas = <0x0c 0x04 0x0c 0x05>; pinctrl-names = "default"; pinctrl-0 = <0x38 0x39 0x3a>; status = "disabled"; phandle = <0xa6>; }; serial@ff130000 { compatible = "rockchip,rk3328-uart\0snps,dw-apb-uart"; reg = <0x00 0xff130000 0x00 0x100>; interrupts = <0x00 0x39 0x04>; clocks = <0x02 0x28 0x02 0xd4>; clock-names = "baudclk\0apb_pclk"; reg-shift = <0x02>; reg-io-width = <0x04>; dmas = <0x0c 0x06 0x0c 0x07>; pinctrl-names = "default"; pinctrl-0 = <0x3b>; status = "disabled"; phandle = <0xa7>; }; power-management@ff140000 { compatible = "rockchip,rk3328-pmu\0syscon\0simple-mfd"; reg = <0x00 0xff140000 0x00 0x1000>; phandle = <0xa8>; }; i2c@ff150000 { compatible = "rockchip,rk3328-i2c\0rockchip,rk3399-i2c"; reg = <0x00 0xff150000 0x00 0x1000>; interrupts = <0x00 0x24 0x04>; #address-cells = <0x01>; #size-cells = <0x00>; clocks = <0x02 0x37 0x02 0xcd>; clock-names = "i2c\0pclk"; pinctrl-names = "default"; pinctrl-0 = <0x3c>; status = "disabled"; phandle = <0xa9>; }; i2c@ff160000 { compatible = "rockchip,rk3328-i2c\0rockchip,rk3399-i2c"; reg = <0x00 0xff160000 0x00 0x1000>; interrupts = <0x00 0x25 0x04>; #address-cells = <0x01>; #size-cells = <0x00>; clocks = <0x02 0x38 0x02 0xce>; clock-names = "i2c\0pclk"; pinctrl-names = "default"; pinctrl-0 = <0x3d>; status = "okay"; phandle = <0xaa>; rk805@18 { compatible = "rockchip,rk805"; status = "okay"; reg = <0x18>; interrupt-parent = <0x3e>; interrupts = <0x06 0x08>; pinctrl-names = "default"; pinctrl-0 = <0x3f>; wakeup-source; gpio-controller; #gpio-cells = <0x02>; #clock-cells = <0x01>; clock-output-names = "rk805-clkout1\0rk805-clkout2"; phandle = <0x9a>; rtc { status = "okay"; }; pwrkey { status = "disabled"; }; gpio { status = "okay"; }; regulators { compatible = "rk805-regulator"; status = "okay"; #address-cells = <0x01>; #size-cells = <0x00>; DCDC_REG1 { regulator-compatible = "RK805_DCDC1"; regulator-name = "vdd_logic"; regulator-min-microvolt = <0xadf34>; regulator-max-microvolt = <0x162010>; regulator-initial-mode = <0x01>; regulator-ramp-delay = <0x30d4>; regulator-boot-on; regulator-always-on; phandle = <0x4b>; regulator-state-mem { regulator-mode = <0x02>; regulator-on-in-suspend; regulator-suspend-microvolt = <0xf4240>; }; }; DCDC_REG2 { regulator-compatible = "RK805_DCDC2"; regulator-name = "vdd_arm"; regulator-init-microvolt = <0x12b128>; regulator-min-microvolt = <0xadf34>; regulator-max-microvolt = <0x162010>; regulator-initial-mode = <0x01>; regulator-ramp-delay = <0x30d4>; regulator-boot-on; regulator-always-on; phandle = <0x04>; regulator-state-mem { regulator-mode = <0x02>; regulator-on-in-suspend; regulator-suspend-microvolt = <0xe7ef0>; }; }; DCDC_REG3 { regulator-compatible = "RK805_DCDC3"; regulator-name = "vcc_ddr"; regulator-initial-mode = <0x01>; regulator-boot-on; regulator-always-on; phandle = <0xab>; regulator-state-mem { regulator-mode = <0x02>; regulator-on-in-suspend; }; }; DCDC_REG4 { regulator-compatible = "RK805_DCDC4"; regulator-name = "vcc_io"; regulator-min-microvolt = <0x325aa0>; regulator-max-microvolt = <0x325aa0>; regulator-initial-mode = <0x01>; regulator-boot-on; regulator-always-on; phandle = <0x29>; regulator-state-mem { regulator-mode = <0x02>; regulator-on-in-suspend; regulator-suspend-microvolt = <0x325aa0>; }; }; LDO_REG1 { regulator-compatible = "RK805_LDO1"; regulator-name = "vdd_18"; regulator-min-microvolt = <0x1b7740>; regulator-max-microvolt = <0x1b7740>; regulator-boot-on; regulator-always-on; phandle = <0x2b>; regulator-state-mem { regulator-on-in-suspend; regulator-suspend-microvolt = <0x1b7740>; }; }; LDO_REG2 { regulator-compatible = "RK805_LDO2"; regulator-name = "vcc_18emmc"; regulator-min-microvolt = <0x1b7740>; regulator-max-microvolt = <0x1b7740>; regulator-boot-on; regulator-always-on; phandle = <0x2a>; regulator-state-mem { regulator-on-in-suspend; regulator-suspend-microvolt = <0x1b7740>; }; }; LDO_REG3 { regulator-compatible = "RK805_LDO3"; regulator-name = "vdd_11"; regulator-min-microvolt = <0x10c8e0>; regulator-max-microvolt = <0x10c8e0>; regulator-boot-on; regulator-always-on; phandle = <0xac>; regulator-state-mem { regulator-on-in-suspend; regulator-suspend-microvolt = <0x10c8e0>; }; }; }; }; }; i2c@ff170000 { compatible = "rockchip,rk3328-i2c\0rockchip,rk3399-i2c"; reg = <0x00 0xff170000 0x00 0x1000>; interrupts = <0x00 0x26 0x04>; #address-cells = <0x01>; #size-cells = <0x00>; clocks = <0x02 0x39 0x02 0xcf>; clock-names = "i2c\0pclk"; pinctrl-names = "default"; pinctrl-0 = <0x40>; status = "disabled"; phandle = <0xad>; }; i2c@ff180000 { compatible = "rockchip,rk3328-i2c\0rockchip,rk3399-i2c"; reg = <0x00 0xff180000 0x00 0x1000>; interrupts = <0x00 0x27 0x04>; #address-cells = <0x01>; #size-cells = <0x00>; clocks = <0x02 0x3a 0x02 0xd0>; clock-names = "i2c\0pclk"; pinctrl-names = "default"; pinctrl-0 = <0x41>; status = "disabled"; phandle = <0xae>; }; spi@ff190000 { compatible = "rockchip,rk3328-spi\0rockchip,rk3066-spi"; reg = <0x00 0xff190000 0x00 0x1000>; interrupts = <0x00 0x31 0x04>; #address-cells = <0x01>; #size-cells = <0x00>; clocks = <0x02 0x20 0x02 0xd1>; clock-names = "spiclk\0apb_pclk"; dmas = <0x0c 0x08 0x0c 0x09>; dma-names = "tx\0rx"; pinctrl-names = "default"; pinctrl-0 = <0x42 0x43 0x44 0x45>; status = "disabled"; phandle = <0xaf>; }; watchdog@ff1a0000 { compatible = "snps,dw-wdt"; reg = <0x00 0xff1a0000 0x00 0x100>; interrupts = <0x00 0x28 0x04>; status = "disabled"; phandle = <0xb0>; }; pwm@ff1b0000 { compatible = "rockchip,rk3328-pwm"; reg = <0x00 0xff1b0000 0x00 0x10>; #pwm-cells = <0x03>; pinctrl-names = "active"; pinctrl-0 = <0x46>; clocks = <0x02 0x3c 0x02 0xd6>; clock-names = "pwm\0pclk"; status = "disabled"; phandle = <0xb1>; }; pwm@ff1b0010 { compatible = "rockchip,rk3328-pwm"; reg = <0x00 0xff1b0010 0x00 0x10>; #pwm-cells = <0x03>; pinctrl-names = "active"; pinctrl-0 = <0x47>; clocks = <0x02 0x3c 0x02 0xd6>; clock-names = "pwm\0pclk"; status = "disabled"; phandle = <0xb2>; }; pwm@ff1b0020 { compatible = "rockchip,rk3328-pwm"; reg = <0x00 0xff1b0020 0x00 0x10>; #pwm-cells = <0x03>; pinctrl-names = "active"; pinctrl-0 = <0x48>; clocks = <0x02 0x3c 0x02 0xd6>; clock-names = "pwm\0pclk"; status = "disabled"; phandle = <0xb3>; }; pwm@ff1b0030 { compatible = "rockchip,remotectl-pwm"; reg = <0x00 0xff1b0030 0x00 0x10>; interrupts = <0x00 0x32 0x04>; #pwm-cells = <0x03>; pinctrl-names = "default"; pinctrl-0 = <0x49>; clocks = <0x02 0x3c 0x02 0xd6>; clock-names = "pwm\0pclk"; status = "okay"; remote_pwm_id = <0x03>; handle_cpu_id = <0x01>; remote_support_psci = <0x01>; phandle = <0xb4>; ir_key1 { rockchip,usercode = <0x4040>; rockchip,key_table = <0xf2 0xe8 0xba 0x9e 0xf4 0x67 0xf1 0x6c 0xef 0x69 0xee 0x6a 0xbd 0x66 0xea 0x73 0xe3 0x72 0xe2 0xd9 0xb2 0x74 0x4d 0x74 0xbc 0x71 0xec 0x8b 0xbf 0x190 0xe0 0x191 0xe1 0x192 0xe9 0xb7 0xe6 0xf8 0xe8 0xb9 0xe7 0xba 0xf0 0x184 0xbe 0x175>; }; ir_key3 { rockchip,usercode = <0x1dcc>; rockchip,key_table = <0xee 0xe8 0xf0 0x9e 0xf8 0x67 0xbb 0x6c 0xef 0x69 0xed 0x6a 0xfc 0x66 0xf1 0x73 0xfd 0x72 0xb7 0xd9 0xff 0x74 0xf3 0x71 0xbf 0x8b 0xf9 0x191 0xf5 0x192 0xb3 0x184 0xbe 0x02 0xba 0x03 0xb2 0x04 0xbd 0x05 0xf9 0x06 0xb1 0x07 0xfc 0x08 0xf8 0x09 0xb0 0x0a 0xb6 0x0b 0xb5 0x0e>; }; ir_key4 { rockchip,usercode = <0xfe01>; rockchip,key_table = <0xec 0xe8 0xe6 0x9e 0xe9 0x67 0xe5 0x6c 0xae 0x69 0xaf 0x6a 0xee 0x66 0xe7 0x73 0xef 0x72 0xbf 0x74 0xbe 0x71 0xb3 0x8b 0xff 0x184 0xb1 0x02 0xf2 0x03 0xf3 0x04 0xb5 0x05 0xf6 0x06 0xf7 0x07 0xb9 0x08 0xfa 0x09 0xfb 0x0a 0xfe 0x0b 0xbd 0x0e 0xbc 0xb7 0xf0 0xb8>; }; ir_key5 { rockchip,usercode = <0x7f80>; rockchip,key_table = <0xec 0xe8 0xd8 0x9e 0xc7 0x67 0xbf 0x6c 0xc8 0x69 0xc6 0x6a 0x8c 0x66 0x78 0x73 0x76 0x72 0x7e 0x74 0xed 0x74 0x7c 0x8b 0xb7 0x184>; }; ir_key6 { rockchip,usercode = <0xff00>; rockchip,key_table = <0xe5 0x66 0xaf 0x9e 0xb1 0x8b 0xfd 0xe8 0xbc 0x67 0xf5 0x6c 0xf9 0x69 0xf1 0x6a 0xa7 0x72 0xe4 0x73 0xbc 0x71 0xa8 0x74 0xb2 0x184 0xb0 0xb7 0xa4 0xb8 0xa8 0xb9 0xab 0xba 0xb3 0x7b 0xf0 0x7a 0xef 0x02 0xee 0x03 0xed 0x04 0xec 0x05 0xeb 0x74 0xea 0x07 0xe8 0x08 0xe7 0x09 0xe6 0x0a 0xe2 0x0b 0xf0 0x39 0xe1 0x0e>; }; ir_key7 { rockchip,usercode = <0x807f>; rockchip,key_table = <0x7e 0x74>; }; ir_key8 { rockchip,usercode = <0xfd02>; rockchip,key_table = <0xf2 0xe8 0xec 0x9e 0xf6 0x67 0xee 0x6c 0xf5 0x69 0xf1 0x6a 0xef 0x66 0xf8 0x73 0xf9 0x72 0xf7 0x74 0xf4 0x71 0xf3 0x8b 0xbf 0x184 0xeb 0x02 0xea 0x03 0xe9 0x04 0xe7 0x05 0xe6 0x06 0xe5 0x07 0xe3 0x08 0xe2 0x09 0xe1 0x0a 0xbe 0x0b 0xbd 0x0e 0xe4 0x43 0xd4 0x44 0xf0 0x3f 0xfb 0x7a 0xfa 0x7b 0xff 0xb7 0xfe 0xb8 0xfd 0xb9 0xfc 0xba>; }; }; amba { compatible = "simple-bus"; #address-cells = <0x02>; #size-cells = <0x02>; ranges; dmac@ff1f0000 { compatible = "arm,pl330\0arm,primecell"; reg = <0x00 0xff1f0000 0x00 0x4000>; interrupts = <0x00 0x00 0x04 0x00 0x01 0x04>; clocks = <0x02 0x86>; clock-names = "apb_pclk"; #dma-cells = <0x01>; peripherals-req-type-burst; phandle = <0x0c>; }; }; efuse@ff260000 { compatible = "rockchip,rk3328-efuse"; reg = <0x00 0xff260000 0x00 0x50>; #address-cells = <0x01>; #size-cells = <0x01>; clocks = <0x02 0x3e>; clock-names = "pclk_efuse"; rockchip,efuse-size = <0x20>; phandle = <0xb5>; id@7 { reg = <0x07 0x10>; phandle = <0x0a>; }; cpu-leakage@17 { reg = <0x17 0x01>; phandle = <0x05>; }; logic-leakage@19 { reg = <0x19 0x01>; phandle = <0x4c>; }; cpu-version@1a { reg = <0x1a 0x01>; bits = <0x03 0x03>; phandle = <0x0b>; }; }; saradc@ff280000 { compatible = "rockchip,rk3328-saradc\0rockchip,rk3399-saradc"; reg = <0x00 0xff280000 0x00 0x100>; interrupts = <0x00 0x50 0x04>; #io-channel-cells = <0x01>; clocks = <0x02 0x25 0x02 0xea>; clock-names = "saradc\0apb_pclk"; resets = <0x02 0x56>; reset-names = "saradc-apb"; status = "okay"; vref-supply = <0x2b>; phandle = <0xb6>; }; gpu@ff300000 { compatible = "arm,mali-450"; reg = <0x00 0xff300000 0x00 0x40000 0x00 0xff300000 0x00 0x40000>; interrupts = <0x00 0x5a 0x04 0x00 0x57 0x04 0x00 0x5d 0x04 0x00 0x58 0x04 0x00 0x59 0x04 0x00 0x5b 0x04 0x00 0x5c 0x04>; interrupt-names = "Mali_GP_IRQ\0Mali_GP_MMU_IRQ\0IRQPP\0Mali_PP0_IRQ\0Mali_PP0_MMU_IRQ\0Mali_PP1_IRQ\0Mali_PP1_MMU_IRQ"; clocks = <0x02 0x87>; clock-names = "clk_mali"; #cooling-cells = <0x02>; operating-points-v2 = <0x4a>; status = "okay"; mali-supply = <0x4b>; phandle = <0x31>; power_model { compatible = "arm,mali-simple-power-model"; voltage = <0x384>; frequency = <0x1f4>; static-power = <0x12c>; dynamic-power = <0x18c>; ts = <0x7d00 0x125c 0xffffffb0 0x02>; thermal-zone = "soc-thermal"; phandle = <0xb7>; }; }; gpu-opp-table { compatible = "operating-points-v2"; rockchip,leakage-voltage-sel = <0x01 0x0a 0x00 0x0b 0xfe 0x01>; nvmem-cells = <0x4c>; nvmem-cell-names = "gpu_leakage"; phandle = <0x4a>; opp-200000000 { opp-hz = <0x00 0xbebc200>; opp-microvolt = <0xe7ef0>; opp-microvolt-L0 = <0xe7ef0>; opp-microvolt-L1 = <0xe7ef0>; }; opp-300000000 { opp-hz = <0x00 0x11e1a300>; opp-microvolt = <0xee098>; opp-microvolt-L0 = <0xee098>; opp-microvolt-L1 = <0xe7ef0>; }; opp-400000000 { opp-hz = <0x00 0x17d78400>; opp-microvolt = <0x100590>; opp-microvolt-L0 = <0x100590>; opp-microvolt-L1 = <0xfa3e8>; }; opp-500000000 { opp-hz = <0x00 0x1dcd6500>; opp-microvolt = <0x118c30>; opp-microvolt-L0 = <0x118c30>; opp-microvolt-L1 = <0x10c8e0>; }; }; vpu_service@ff350000 { compatible = "vpu,sub"; iommu_enabled = <0x01>; iommus = <0x4d>; allocator = <0x01>; reg = <0x00 0xff350000 0x00 0x800>; interrupts = <0x00 0x09 0x04>; interrupt-names = "irq_dec"; dev_mode = <0x00>; power-domains = <0x4e 0x08>; phandle = <0x4f>; }; iommu@ff350800 { compatible = "rockchip,iommu"; reg = <0x00 0xff350800 0x00 0x40>; interrupts = <0x00 0x0b 0x04>; interrupt-names = "vpu_mmu"; clock-names = "aclk\0hclk"; clocks = <0x02 0x8f 0x02 0x146>; power-domains = <0x4e 0x08>; #iommu-cells = <0x00>; phandle = <0x4d>; }; avsd@ff351000 { compatible = "vpu,sub"; iommu_enabled = <0x01>; iommus = <0x4d>; allocator = <0x01>; reg = <0x00 0xff351000 0x00 0x200>; interrupts = <0x00 0x09 0x04>; interrupt-names = "irq_dec"; power-domains = <0x4e 0x08>; dev_mode = <0x00>; phandle = <0x50>; }; vpu_combo { compatible = "rockchip,rk3328-vpu-combo\0rockchip,vpu_combo"; rockchip,grf = <0x1c>; subcnt = <0x02>; rockchip,sub = <0x4f 0x50>; clocks = <0x02 0x8f 0x02 0x146>; clock-names = "aclk_vcodec\0hclk_vcodec"; resets = <0x02 0xa0 0x02 0xa2>; reset-names = "video_a\0video_h"; mode_bit = <0x00>; mode_ctrl = <0x00>; power-domains = <0x4e 0x08>; status = "okay"; phandle = <0xb8>; }; rkvdec@ff36000 { compatible = "rockchip,rk3328-rkvdec\0rockchip,rkvdec"; reg = <0x00 0xff360000 0x00 0x400>; interrupts = <0x00 0x07 0x04>; interrupt-names = "irq_dec"; clocks = <0x02 0x8b 0x02 0x142 0x02 0x41 0x02 0x42>; clock-names = "aclk_vcodec\0hclk_vcodec\0clk_cabac\0clk_core"; resets = <0x02 0xa4 0x02 0xa6 0x02 0xa5 0x02 0xa7 0x02 0xa9 0x02 0xa8>; reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_cabac\0video_core"; rockchip,grf = <0x1c>; iommus = <0x51>; allocator = <0x01>; power-domains = <0x4e 0x05>; operating-points-v2 = <0x52>; #cooling-cells = <0x02>; devfreq = <0x33>; status = "okay"; vcodec-supply = <0x4b>; phandle = <0x32>; vcodec_power_model { compatible = "vcodec_power_model"; dynamic-power-coefficient = <0x78>; static-power-coefficient = <0xc8>; ts = <0x7d00 0x125c 0xffffffb0 0x02>; thermal-zone = "soc-thermal"; phandle = <0xb9>; }; }; rkvdec-opp-table { compatible = "operating-points-v2"; rockchip,leakage-voltage-sel = <0x01 0x0a 0x00 0x0b 0xfe 0x01>; nvmem-cells = <0x4c>; nvmem-cell-names = "rkvdec_leakage"; phandle = <0x52>; opp-100000000 { opp-hz = <0x00 0x5f5e100>; opp-microvolt = <0xee098>; opp-microvolt-L0 = <0xee098>; opp-microvolt-L1 = <0xe7ef0>; }; opp-200000000 { opp-hz = <0x00 0xbebc200>; opp-microvolt = <0xee098>; opp-microvolt-L0 = <0xee098>; opp-microvolt-L1 = <0xe7ef0>; }; opp-500000000 { opp-hz = <0x00 0x1dcd6500>; opp-microvolt = <0x106738>; opp-microvolt-L0 = <0x106738>; opp-microvolt-L1 = <0x100590>; }; }; iommu@ff360480 { compatible = "rockchip,iommu"; reg = <0x00 0xff360480 0x00 0x40 0x00 0xff3604c0 0x00 0x40>; interrupts = <0x00 0x4a 0x04>; interrupt-names = "rkvdec_mmu"; clocks = <0x02 0x8b 0x02 0x142>; clock-names = "aclk_vcodec\0hclk_vcodec"; power-domains = <0x4e 0x05>; #iommu-cells = <0x00>; phandle = <0x51>; }; h265e@ff330000 { compatible = "rockchip,h265e"; rockchip,grf = <0x1c>; iommu_enabled = <0x01>; iommus = <0x53>; reg = <0x00 0xff330000 0x00 0x200>; interrupts = <0x00 0x5f 0x04>; clocks = <0x02 0x93 0x02 0xdd 0x02 0x44 0x02 0x43 0x02 0x8c 0x02 0x82>; clock-names = "aclk_h265\0pclk_h265\0clk_core\0clk_dsp\0aclk_venc\0aclk_axi2sram"; rockchip,srv = <0x54>; mode_bit = <0x0b>; mode_ctrl = <0x40c>; allocator = <0x01>; power-domains = <0x4e 0x06>; status = "okay"; phandle = <0xba>; }; iommu@ff330200 { compatible = "rockchip,iommu"; reg = <0x00 0xff330200 0x00 0x100>; interrupts = <0x00 0x60 0x04>; interrupt-names = "h265e_mmu"; clocks = <0x02 0x93 0x02 0xdd>; clock-names = "aclk\0hclk"; power-domains = <0x4e 0x06>; #iommu-cells = <0x00>; phandle = <0x53>; }; vepu@ff340000 { compatible = "rockchip,rk3328-vepu\0rockchip,vepu"; rockchip,grf = <0x1c>; iommu_enabled = <0x01>; iommus = <0x55>; reg = <0x00 0xff340000 0x00 0x400>; interrupts = <0x00 0x61 0x04>; clocks = <0x02 0x94 0x02 0x14a 0x02 0x44>; clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; resets = <0x02 0xb7 0x02 0xb6>; reset-names = "video_h\0video_a"; rockchip,srv = <0x54>; mode_bit = <0x0b>; mode_ctrl = <0x40c>; allocator = <0x01>; power-domains = <0x4e 0x06>; status = "okay"; phandle = <0xbb>; }; iommu@ff340800 { compatible = "rockchip,iommu"; reg = <0x00 0xff340800 0x00 0x40>; interrupts = <0x00 0x62 0x04>; interrupt-names = "vepu_mmu"; clocks = <0x02 0x94 0x02 0x14a>; clock-names = "aclk\0hclk"; power-domains = <0x4e 0x06>; #iommu-cells = <0x00>; phandle = <0x55>; }; venc_srv { compatible = "rockchip,mpp_service"; phandle = <0x54>; }; vop@ff370000 { compatible = "rockchip,rk3328-vop"; reg = <0x00 0xff370000 0x00 0x3efc>; interrupts = <0x00 0x20 0x04>; clocks = <0x02 0x91 0x02 0x78 0x02 0x13b>; clock-names = "aclk_vop\0dclk_vop\0hclk_vop"; assigned-clocks = <0x02 0x78>; assigned-clock-parents = <0x02 0x7a>; resets = <0x02 0x85 0x02 0x86 0x02 0x87>; reset-names = "axi\0ahb\0dclk"; iommus = <0x56>; status = "okay"; phandle = <0xbc>; port { #address-cells = <0x01>; #size-cells = <0x00>; phandle = <0x61>; endpoint@0 { reg = <0x00>; remote-endpoint = <0x57>; phandle = <0x5f>; }; endpoint@1 { reg = <0x01>; remote-endpoint = <0x58>; phandle = <0x60>; }; }; }; iommu@ff373f00 { compatible = "rockchip,iommu"; reg = <0x00 0xff373f00 0x00 0x100>; interrupts = <0x00 0x20 0x04>; interrupt-names = "vop_mmu"; clocks = <0x02 0x91 0x02 0x13b>; clock-names = "aclk\0hclk"; #iommu-cells = <0x00>; status = "okay"; phandle = <0x56>; }; rga@ff3900000 { compatible = "rockchip,rga2"; dev_mode = <0x01>; reg = <0x00 0xff390000 0x00 0x1000>; interrupts = <0x00 0x21 0x04>; clocks = <0x02 0x9a 0x02 0x154 0x02 0x45>; clock-names = "aclk_rga\0hclk_rga\0clk_rga"; dma-coherent; status = "okay"; phandle = <0xbd>; }; iep@ff3a0000 { compatible = "rockchip,iep"; iommu_enabled = <0x01>; iommus = <0x59>; reg = <0x00 0xff3a0000 0x00 0x800>; interrupts = <0x00 0x1f 0x04>; clocks = <0x02 0x9b 0x02 0x153>; clock-names = "aclk_iep\0hclk_iep"; power-domains = <0x4e 0x05>; allocator = <0x01>; version = <0x02>; status = "okay"; phandle = <0xbe>; }; iommu@ff3a0800 { compatible = "rockchip,iommu"; reg = <0x00 0xff3a0800 0x00 0x40>; interrupts = <0x00 0x1f 0x04>; interrupt-names = "iep_mmu"; clocks = <0x02 0x9b 0x02 0x153>; clock-names = "aclk\0hclk"; power-domains = <0x4e 0x05>; #iommu-cells = <0x00>; status = "okay"; phandle = <0x59>; }; hdmi@ff3c0000 { compatible = "rockchip,rk3328-dw-hdmi"; reg = <0x00 0xff3c0000 0x00 0x20000>; reg-io-width = <0x04>; interrupts = <0x00 0x23 0x04 0x00 0x47 0x04>; clocks = <0x02 0xe7 0x02 0x46 0x02 0x1e 0x02 0x147>; clock-names = "iahb\0isfr\0cec\0hclk_vio"; phys = <0x5a>; phy-names = "hdmi_phy"; pinctrl-names = "default\0gpio"; pinctrl-0 = <0x5b 0x5c 0x5d>; pinctrl-1 = <0x5e>; resets = <0x02 0x8f 0x02 0x51>; reset-names = "hdmi\0hdmiphy"; rockchip,grf = <0x1c>; status = "okay"; #sound-dai-cells = <0x00>; ddc-i2c-scl-high-time-ns = <0x2599>; ddc-i2c-scl-low-time-ns = <0x2710>; phandle = <0x93>; ports { port { #address-cells = <0x01>; #size-cells = <0x00>; phandle = <0xbf>; endpoint@0 { reg = <0x00>; remote-endpoint = <0x5f>; phandle = <0x57>; }; }; }; }; tve@ff373e00 { compatible = "rockchip,rk3328-tve"; reg = <0x00 0xff373e00 0x00 0x100 0x00 0xff420000 0x00 0x10000>; rockchip,saturation = <0x376749>; rockchip,brightcontrast = <0xa305>; rockchip,adjtiming = <0xb6c00880>; rockchip,lumafilter0 = <0x1ff0000>; rockchip,lumafilter1 = <0xf40200fe>; rockchip,lumafilter2 = <0xf332d70c>; rockchip,daclevel = <0x22>; rockchip,dac1level = <0x07>; status = "okay"; phandle = <0xc0>; ports { port { #address-cells = <0x01>; #size-cells = <0x00>; phandle = <0xc1>; endpoint@0 { reg = <0x00>; remote-endpoint = <0x60>; phandle = <0x58>; }; }; }; }; display-subsystem { compatible = "rockchip,display-subsystem"; ports = <0x61>; status = "okay"; logo-memory-region = <0x62>; secure-memory-region = <0x63>; phandle = <0xc2>; route { route-hdmi { status = "okay"; logo,uboot = "logo.bmp"; logo,kernel = "logo_kernel.bmp"; logo,mode = "fullscreen"; charge_logo,mode = "fullscreen"; connect = <0x5f>; phandle = <0xc3>; }; route-tve { status = "okay"; logo,uboot = "logo.bmp"; logo,kernel = "logo_kernel.bmp"; logo,mode = "fullscreen"; charge_logo,mode = "fullscreen"; connect = <0x60>; phandle = <0xc4>; }; }; }; codec@ff410000 { compatible = "rockchip,rk3328-codec"; reg = <0x00 0xff410000 0x00 0x1000>; rockchip,grf = <0x1c>; clocks = <0x02 0xeb 0x02 0x2a>; clock-names = "pclk\0mclk"; status = "okay"; #sound-dai-cells = <0x00>; phandle = <0x91>; }; hdmiphy@ff430000 { compatible = "rockchip,rk3328-hdmi-phy"; reg = <0x00 0xff430000 0x00 0x10000>; interrupts = <0x00 0x53 0x04>; #phy-cells = <0x00>; clocks = <0x02 0xe4 0x64>; clock-names = "sysclk\0refclk"; #clock-cells = <0x00>; clock-output-names = "hdmi_phy"; status = "okay"; rockchip,phy-table = <0x9d5b340 0x07 0x0a 0x0a 0x0a 0x00 0x00 0x08 0x08 0x08 0x00 0xac 0xcc 0xcc 0xcc 0x1443fd00 0x0b 0x0d 0x0d 0x0d 0x07 0x15 0x08 0x08 0x08 0x3f 0xac 0xcc 0xcd 0xdd 0x2367b880 0x10 0x1a 0x1a 0x1a 0x07 0x15 0x08 0x08 0x08 0x00 0xac 0xcc 0xcc 0xcc>; phandle = <0x5a>; }; clock-controller@ff440000 { compatible = "rockchip,rk3328-cru\0rockchip,cru\0syscon"; reg = <0x00 0xff440000 0x00 0x1000>; rockchip,grf = <0x1c>; #clock-cells = <0x01>; #reset-cells = <0x01>; assigned-clocks = <0x02 0x78 0x02 0x3d 0x02 0x1e 0x02 0x26 0x02 0x27 0x02 0x28 0x02 0x88 0x02 0x89 0x02 0x85 0x02 0x8a 0x02 0x8c 0x02 0x8d 0x02 0x41 0x02 0x42 0x02 0x44 0x02 0x43 0x02 0x22 0x02 0x5c 0x02 0x35 0x02 0x06 0x02 0x04 0x02 0x03 0x02 0x88 0x02 0x148 0x02 0xd8 0x02 0x89 0x02 0x134 0x02 0xe6 0x02 0x8e 0x02 0x145 0x02 0x85 0x02 0x45 0x02 0x83 0x02 0x8a 0x02 0x8c 0x02 0x8d 0x02 0x41 0x02 0x42 0x02 0x44 0x02 0x43 0x02 0x3e 0x02 0xe5 0x02 0x92 0x02 0xdc 0x02 0x1e 0x02 0x61>; assigned-clock-parents = <0x02 0x7a 0x02 0x01 0x02 0x04 0x64 0x64 0x64>; assigned-clock-rates = <0x00 0x3a98000 0x00 0x16e3600 0x16e3600 0x16e3600 0xe4e1c0 0xe4e1c0 0x5f5e100 0x5f5e100 0x2faf080 0x5f5e100 0x5f5e100 0x5f5e100 0x2faf080 0x2faf080 0x2faf080 0x2faf080 0x16e3600 0x23c34600 0x1d4c0000 0x47868c00 0x8f0d180 0x47868c0 0x47868c0 0x8f0d180 0x47868c0 0x47868c0 0x11e1a300 0x5f5e100 0x11e1a300 0xbebc200 0x17d78400 0x1dcd6500 0xbebc200 0x11e1a300 0x11e1a300 0xee6b280 0xbebc200 0x5f5e100 0x16e3600 0x5f5e100 0x8f0d180 0x2faf080 0x8000 0x8000>; phandle = <0x02>; }; syscon@ff450000 { compatible = "rockchip,rk3328-usb2phy-grf\0syscon\0simple-mfd"; reg = <0x00 0xff450000 0x00 0x10000>; #address-cells = <0x01>; #size-cells = <0x01>; phandle = <0xc5>; usb2-phy@100 { compatible = "rockchip,rk3328-usb2phy"; reg = <0x100 0x10>; clocks = <0x64>; clock-names = "phyclk"; #clock-cells = <0x00>; assigned-clocks = <0x02 0x7b>; assigned-clock-parents = <0x65>; clock-output-names = "usb480m_phy"; status = "okay"; phandle = <0x65>; host-port { #phy-cells = <0x00>; interrupts = <0x00 0x3e 0x04>; interrupt-names = "linestate"; status = "okay"; phandle = <0x78>; }; otg-port { #phy-cells = <0x00>; interrupts = <0x00 0x3b 0x04 0x00 0x3c 0x04 0x00 0x3d 0x04>; interrupt-names = "otg-bvalid\0otg-id\0linestate"; status = "okay"; vbus-supply = <0x66>; phandle = <0x77>; }; }; }; syscon@ff460000 { compatible = "rockchip,usb3phy-grf\0syscon"; reg = <0x00 0xff460000 0x00 0x1000>; phandle = <0x67>; }; usb3-phy@ff470000 { compatible = "rockchip,rk3328-u3phy"; reg = <0x00 0xff470000 0x00 0x00>; rockchip,u3phygrf = <0x67>; rockchip,grf = <0x1c>; interrupts = <0x00 0x4d 0x04>; interrupt-names = "linestate"; clocks = <0x02 0xe0 0x02 0xe1>; clock-names = "u3phy-otg\0u3phy-pipe"; resets = <0x02 0x7d 0x02 0x7e 0x02 0x7f 0x02 0x7c 0x02 0x9e 0x02 0x9f>; reset-names = "u3phy-u2-por\0u3phy-u3-por\0u3phy-pipe-mac\0u3phy-utmi-mac\0u3phy-utmi-apb\0u3phy-pipe-apb"; #address-cells = <0x02>; #size-cells = <0x02>; ranges; status = "okay"; vbus-supply = <0x68>; phandle = <0xc6>; utmi@ff470000 { reg = <0x00 0xff470000 0x00 0x8000>; #phy-cells = <0x00>; status = "okay"; phandle = <0x7d>; }; pipe@ff478000 { reg = <0x00 0xff478000 0x00 0x8000>; #phy-cells = <0x00>; status = "okay"; phandle = <0x7e>; }; }; dwmmc@ff500000 { compatible = "rockchip,rk3328-dw-mshc\0rockchip,rk3288-dw-mshc"; reg = <0x00 0xff500000 0x00 0x4000>; clock-freq-min-max = <0x61a80 0x8f0d180>; clocks = <0x02 0x13d 0x02 0x21 0x02 0x4a 0x02 0x4e>; clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; fifo-depth = <0x100>; interrupts = <0x00 0x0c 0x04>; status = "okay"; bus-width = <0x04>; cap-mmc-highspeed; cap-sd-highspeed; disable-wp; max-frequency = <0x8f0d180>; num-slots = <0x01>; pinctrl-names = "default"; pinctrl-0 = <0x69 0x6a 0x6b 0x6c>; supports-sd; vmmc-supply = <0x6d>; phandle = <0xc7>; }; dwmmc@ff510000 { compatible = "rockchip,rk3328-dw-mshc\0rockchip,rk3288-dw-mshc"; reg = <0x00 0xff510000 0x00 0x4000>; clock-freq-min-max = <0x61a80 0x8f0d180>; clocks = <0x02 0x13e 0x02 0x22 0x02 0x4b 0x02 0x4f>; clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; fifo-depth = <0x100>; interrupts = <0x00 0x0d 0x04>; status = "disabled"; phandle = <0xc8>; }; dwmmc@ff520000 { compatible = "rockchip,rk3328-dw-mshc\0rockchip,rk3288-dw-mshc"; reg = <0x00 0xff520000 0x00 0x4000>; clock-freq-min-max = <0x61a80 0x8f0d180>; clocks = <0x02 0x13f 0x02 0x23 0x02 0x4c 0x02 0x50>; clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; fifo-depth = <0x100>; interrupts = <0x00 0x0e 0x04>; status = "okay"; bus-width = <0x08>; cap-mmc-highspeed; mmc-hs200-1_8v; supports-emmc; disable-wp; non-removable; num-slots = <0x01>; pinctrl-names = "default"; pinctrl-0 = <0x6e 0x6f 0x70>; phandle = <0xc9>; }; ethernet@ff540000 { compatible = "rockchip,rk3328-gmac"; reg = <0x00 0xff540000 0x00 0x10000>; rockchip,grf = <0x1c>; interrupts = <0x00 0x18 0x04>; interrupt-names = "macirq"; clocks = <0x02 0x64 0x02 0x57 0x02 0x58 0x02 0x5a 0x02 0x59 0x02 0x96 0x02 0xdf>; clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac"; resets = <0x02 0x63>; reset-names = "stmmaceth"; status = "disabled"; phy-supply = <0x71>; phy-mode = "rgmii"; clock_in_out = "input"; snps,reset-gpio = <0x72 0x12 0x01>; snps,reset-active-low; snps,reset-delays-us = <0x00 0x2710 0xc350>; assigned-clocks = <0x02 0x64 0x02 0x66>; assigned-clock-parents = <0x73 0x73>; pinctrl-names = "default"; pinctrl-0 = <0x74>; tx_delay = <0x26>; rx_delay = <0x11>; phandle = <0xca>; }; ethernet@ff550000 { compatible = "rockchip,rk3328-gmac"; reg = <0x00 0xff550000 0x00 0x10000>; rockchip,grf = <0x1c>; interrupts = <0x00 0x15 0x04>; interrupt-names = "macirq"; clocks = <0x02 0x54 0x02 0x53 0x02 0x53 0x02 0x55 0x02 0x95 0x02 0xde 0x02 0x56>; clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0aclk_mac\0pclk_mac\0clk_macphy"; resets = <0x02 0x62 0x02 0x64>; reset-names = "stmmaceth\0mac-phy"; phy-mode = "rmii"; phy-is-integrated; pinctrl-names = "default"; pinctrl-0 = <0x75 0x76>; status = "okay"; phy-supply = <0x71>; clock_in_out = "output"; assigned-clocks = <0x02 0x65>; assigned-clock-rate = <0x2faf080>; assigned-clock-parents = <0x02 0x54>; phandle = <0xcb>; }; usb@ff580000 { compatible = "rockchip,rk3328-usb\0rockchip,rk3066-usb\0snps,dwc2"; reg = <0x00 0xff580000 0x00 0x40000>; interrupts = <0x00 0x17 0x04>; clocks = <0x02 0x14d 0x02 0x14c>; clock-names = "otg\0otg_pmu"; dr_mode = "host"; g-np-tx-fifo-size = <0x10>; g-rx-fifo-size = <0x118>; g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>; g-use-dma; phys = <0x77>; phy-names = "usb2-phy"; status = "okay"; phandle = <0xcc>; }; usb@ff5c0000 { compatible = "generic-ehci"; reg = <0x00 0xff5c0000 0x00 0x10000>; interrupts = <0x00 0x10 0x04>; clocks = <0x02 0x14e 0x02 0x14f 0x65>; clock-names = "usbhost\0arbiter\0utmi"; phys = <0x78>; phy-names = "usb"; status = "okay"; phandle = <0xcd>; }; usb@ff5d0000 { compatible = "generic-ohci"; reg = <0x00 0xff5d0000 0x00 0x10000>; interrupts = <0x00 0x11 0x04>; clocks = <0x02 0x14e 0x02 0x14f 0x65>; clock-names = "usbhost\0arbiter\0utmi"; phys = <0x78>; phy-names = "usb"; status = "okay"; phandle = <0xce>; }; dwmmc@ff5f0000 { compatible = "rockchip,rk3328-dw-mshc\0rockchip,rk3288-dw-mshc"; reg = <0x00 0xff5f0000 0x00 0x4000>; clock-freq-min-max = <0x61a80 0x8f0d180>; clocks = <0x02 0x140 0x02 0x1f 0x02 0x4d 0x02 0x51>; clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; fifo-depth = <0x100>; interrupts = <0x00 0x04 0x04>; status = "okay"; bus-width = <0x04>; cap-sd-highspeed; cap-sdio-irq; disable-wp; keep-power-in-suspend; max-frequency = <0x23c3460>; mmc-pwrseq = <0x79>; non-removable; num-slots = <0x01>; pinctrl-names = "default"; pinctrl-0 = <0x7a 0x7b 0x7c>; supports-sdio; sd-uhs-sdr104; phandle = <0xcf>; }; usb@ff600000 { compatible = "rockchip,rk3328-dwc3"; clocks = <0x02 0x60 0x02 0x61 0x02 0x84>; clock-names = "ref_clk\0suspend_clk\0bus_clk"; #address-cells = <0x02>; #size-cells = <0x02>; ranges; status = "okay"; phandle = <0xd0>; dwc3@ff600000 { compatible = "snps,dwc3"; reg = <0x00 0xff600000 0x00 0x100000>; interrupts = <0x00 0x43 0x04>; dr_mode = "host"; phys = <0x7d 0x7e>; phy-names = "usb2-phy\0usb3-phy"; phy_type = "utmi_wide"; snps,dis_enblslpm_quirk; snps,dis-u2-freeclk-exists-quirk; snps,dis_u2_susphy_quirk; snps,dis-u3-autosuspend-quirk; snps,dis_u3_susphy_quirk; snps,dis-del-phy-power-chg-quirk; snps,tx-ipgap-linecheck-dis-quirk; status = "okay"; phandle = <0xd1>; }; }; qos@ff750000 { compatible = "syscon"; reg = <0x00 0xff750000 0x00 0x20>; phandle = <0x2c>; }; qos@ff750080 { compatible = "syscon"; reg = <0x00 0xff750080 0x00 0x20>; phandle = <0x2d>; }; qos@ff778000 { compatible = "syscon"; reg = <0x00 0xff778000 0x00 0x20>; phandle = <0x2e>; }; dfi@ff790000 { reg = <0x00 0xff790000 0x00 0x400>; compatible = "rockchip,rk3328-dfi"; rockchip,grf = <0x1c>; status = "okay"; phandle = <0x7f>; }; dmc { compatible = "rockchip,rk3328-dmc"; devfreq-events = <0x7f>; clocks = <0x02 0x40>; clock-names = "dmc_clk"; operating-points-v2 = <0x80>; ddr_timing = <0x81>; upthreshold = <0x28>; downdifferential = <0x14>; system-status-freq = <0x01 0xbfe50 0x08 0xbfe50 0x02 0xbfe50 0x20 0xbfe50 0x10 0xbfe50 0x10000 0xbfe50 0x2000 0xbfe50 0x1000 0xbfe50>; auto-min-freq = <0xbfe50>; auto-freq-en = <0x00>; #cooling-cells = <0x02>; status = "okay"; center-supply = <0x4b>; phandle = <0x33>; ddr_power_model { compatible = "ddr_power_model"; dynamic-power-coefficient = <0x78>; static-power-coefficient = <0xc8>; ts = <0x7d00 0x125c 0xffffffb0 0x02>; thermal-zone = "soc-thermal"; phandle = <0xd2>; }; }; dmc-opp-table { compatible = "operating-points-v2"; rockchip,leakage-voltage-sel = <0x01 0x0a 0x00 0x0b 0xfe 0x01>; nvmem-cells = <0x4c>; nvmem-cell-names = "ddr_leakage"; phandle = <0x80>; opp-400000000 { opp-hz = <0x00 0x17d78400>; opp-microvolt = <0xfa3e8>; opp-microvolt-L0 = <0xfa3e8>; opp-microvolt-L1 = <0xfa3e8>; status = "disabled"; }; opp-600000000 { opp-hz = <0x00 0x23c34600>; opp-microvolt = <0x106738>; opp-microvolt-L0 = <0x106738>; opp-microvolt-L1 = <0x106738>; status = "disabled"; }; opp-786000000 { opp-hz = <0x00 0x2ed96880>; opp-microvolt = <0x11edd8>; opp-microvolt-L0 = <0x11edd8>; opp-microvolt-L1 = <0x11edd8>; }; opp-800000000 { opp-hz = <0x00 0x2faf0800>; opp-microvolt = <0x11edd8>; opp-microvolt-L0 = <0x11edd8>; opp-microvolt-L1 = <0x118c30>; status = "disabled"; }; opp-850000000 { opp-hz = <0x00 0x32a9f880>; opp-microvolt = <0x106738>; opp-microvolt-L0 = <0x106738>; opp-microvolt-L1 = <0x100590>; status = "disabled"; }; opp-933000000 { opp-hz = <0x00 0x379c7340>; opp-microvolt = <0x10c8e0>; opp-microvolt-L0 = <0x10c8e0>; opp-microvolt-L1 = <0x106738>; status = "disabled"; }; opp-1066000000 { opp-hz = <0x00 0x3f89de80>; opp-microvolt = <0x11edd8>; opp-microvolt-L0 = <0x11edd8>; opp-microvolt-L1 = <0x118c30>; status = "disabled"; }; }; interrupt-controller@ff811000 { compatible = "arm,gic-400"; #interrupt-cells = <0x03>; #address-cells = <0x00>; interrupt-controller; reg = <0x00 0xff811000 0x00 0x1000 0x00 0xff812000 0x00 0x2000 0x00 0xff814000 0x00 0x2000 0x00 0xff816000 0x00 0x2000>; interrupts = <0x01 0x09 0xf04>; phandle = <0x01>; }; pinctrl { compatible = "rockchip,rk3328-pinctrl"; rockchip,grf = <0x1c>; #address-cells = <0x02>; #size-cells = <0x02>; ranges; phandle = <0xd3>; gpio0@ff210000 { compatible = "rockchip,gpio-bank"; reg = <0x00 0xff210000 0x00 0x100>; interrupts = <0x00 0x33 0x04>; clocks = <0x02 0xc8>; gpio-controller; #gpio-cells = <0x02>; interrupt-controller; #interrupt-cells = <0x02>; phandle = <0x96>; }; gpio1@ff220000 { compatible = "rockchip,gpio-bank"; reg = <0x00 0xff220000 0x00 0x100>; interrupts = <0x00 0x34 0x04>; clocks = <0x02 0xc9>; gpio-controller; #gpio-cells = <0x02>; interrupt-controller; #interrupt-cells = <0x02>; phandle = <0x72>; }; gpio2@ff230000 { compatible = "rockchip,gpio-bank"; reg = <0x00 0xff230000 0x00 0x100>; interrupts = <0x00 0x35 0x04>; clocks = <0x02 0xca>; gpio-controller; #gpio-cells = <0x02>; interrupt-controller; #interrupt-cells = <0x02>; phandle = <0x3e>; }; gpio3@ff240000 { compatible = "rockchip,gpio-bank"; reg = <0x00 0xff240000 0x00 0x100>; interrupts = <0x00 0x36 0x04>; clocks = <0x02 0xcb>; gpio-controller; #gpio-cells = <0x02>; interrupt-controller; #interrupt-cells = <0x02>; phandle = <0x8f>; }; pcfg-pull-up { bias-pull-up; phandle = <0x83>; }; pcfg-pull-down { bias-pull-down; phandle = <0x8c>; }; pcfg-pull-none { bias-disable; phandle = <0x82>; }; pcfg-pull-none-2ma { bias-disable; drive-strength = <0x02>; phandle = <0x8b>; }; pcfg-pull-up-2ma { bias-pull-up; drive-strength = <0x02>; phandle = <0xd4>; }; pcfg-pull-up-4ma { bias-pull-up; drive-strength = <0x04>; phandle = <0x85>; }; pcfg-pull-none-4ma { bias-disable; drive-strength = <0x04>; phandle = <0x86>; }; pcfg-pull-down-4ma { bias-pull-down; drive-strength = <0x04>; phandle = <0xd5>; }; pcfg-pull-none-8ma { bias-disable; drive-strength = <0x08>; phandle = <0x87>; }; pcfg-pull-up-8ma { bias-pull-up; drive-strength = <0x08>; phandle = <0x88>; }; pcfg-pull-none-12ma { bias-disable; drive-strength = <0x0c>; phandle = <0x89>; }; pcfg-pull-up-12ma { bias-pull-up; drive-strength = <0x0c>; phandle = <0x8a>; }; pcfg-output-high { output-high; phandle = <0xd6>; }; pcfg-output-low { output-low; phandle = <0xd7>; }; pcfg-input-high { bias-pull-up; input-enable; phandle = <0x84>; }; pcfg-input { input-enable; phandle = <0xd8>; }; i2c0 { i2c0-xfer { rockchip,pins = <0x02 0x18 0x01 0x82 0x02 0x19 0x01 0x82>; phandle = <0x3c>; }; }; i2c1 { i2c1-xfer { rockchip,pins = <0x02 0x04 0x02 0x82 0x02 0x05 0x02 0x82>; phandle = <0x3d>; }; }; i2c2 { i2c2-xfer { rockchip,pins = <0x02 0x0d 0x01 0x82 0x02 0x0e 0x01 0x82>; phandle = <0x40>; }; }; i2c3 { i2c3-xfer { rockchip,pins = <0x00 0x05 0x02 0x82 0x00 0x06 0x02 0x82>; phandle = <0x41>; }; i2c3-gpio { rockchip,pins = <0x00 0x05 0x00 0x82 0x00 0x06 0x00 0x82>; phandle = <0x5e>; }; }; tsp { tsp-d0 { rockchip,pins = <0x03 0x04 0x01 0x82>; phandle = <0x1d>; }; tsp-d1 { rockchip,pins = <0x03 0x05 0x01 0x82>; phandle = <0x1e>; }; tsp-d2 { rockchip,pins = <0x03 0x06 0x01 0x82>; phandle = <0x1f>; }; tsp-d3 { rockchip,pins = <0x03 0x07 0x01 0x82>; phandle = <0x20>; }; tsp-d4 { rockchip,pins = <0x03 0x08 0x01 0x82>; phandle = <0x21>; }; tsp-d5 { rockchip,pins = <0x02 0x10 0x03 0x82>; phandle = <0x22>; }; tsp-d6 { rockchip,pins = <0x02 0x11 0x03 0x82>; phandle = <0x23>; }; tsp-d7 { rockchip,pins = <0x02 0x12 0x03 0x82>; phandle = <0x24>; }; tsp-sync { rockchip,pins = <0x02 0x0f 0x03 0x82>; phandle = <0x25>; }; tsp-clk { rockchip,pins = <0x03 0x02 0x01 0x82>; phandle = <0x26>; }; tsp-fail { rockchip,pins = <0x03 0x01 0x01 0x82>; phandle = <0x27>; }; tsp-valid { rockchip,pins = <0x03 0x00 0x01 0x82>; phandle = <0x28>; }; }; hdmi_i2c { hdmii2c-xfer { rockchip,pins = <0x00 0x05 0x01 0x82 0x00 0x06 0x01 0x82>; phandle = <0x5c>; }; }; tsadc { otp-gpio { rockchip,pins = <0x02 0x0d 0x00 0x82>; phandle = <0x34>; }; otp-out { rockchip,pins = <0x02 0x0d 0x01 0x82>; phandle = <0x35>; }; }; uart0 { uart0-xfer { rockchip,pins = <0x01 0x09 0x01 0x83 0x01 0x08 0x01 0x82>; phandle = <0x36>; }; uart0-cts { rockchip,pins = <0x01 0x0b 0x01 0x82>; phandle = <0x37>; }; uart0-rts { rockchip,pins = <0x01 0x0a 0x01 0x82>; phandle = <0x9b>; }; uart0-rts-gpio { rockchip,pins = <0x01 0x0a 0x00 0x82>; phandle = <0xd9>; }; }; uart1 { uart1-xfer { rockchip,pins = <0x03 0x04 0x04 0x83 0x03 0x06 0x04 0x82>; phandle = <0x38>; }; uart1-cts { rockchip,pins = <0x03 0x07 0x04 0x82>; phandle = <0x39>; }; uart1-rts { rockchip,pins = <0x03 0x05 0x04 0x82>; phandle = <0x3a>; }; uart1-rts-gpio { rockchip,pins = <0x03 0x05 0x00 0x82>; phandle = <0xda>; }; }; uart2-0 { uart2m0-xfer { rockchip,pins = <0x01 0x00 0x02 0x83 0x01 0x01 0x02 0x82>; phandle = <0xdb>; }; }; uart2-1 { uart2m1-xfer { rockchip,pins = <0x02 0x00 0x01 0x83 0x02 0x01 0x01 0x82>; phandle = <0x3b>; }; }; spi0-0 { spi0m0-clk { rockchip,pins = <0x02 0x08 0x01 0x83>; phandle = <0xdc>; }; spi0m0-cs0 { rockchip,pins = <0x02 0x0b 0x01 0x83>; phandle = <0xdd>; }; spi0m0-tx { rockchip,pins = <0x02 0x09 0x01 0x83>; phandle = <0xde>; }; spi0m0-rx { rockchip,pins = <0x02 0x0a 0x01 0x83>; phandle = <0xdf>; }; spi0m0-cs1 { rockchip,pins = <0x02 0x0c 0x01 0x83>; phandle = <0xe0>; }; }; spi0-1 { spi0m1-clk { rockchip,pins = <0x03 0x17 0x02 0x83>; phandle = <0xe1>; }; spi0m1-cs0 { rockchip,pins = <0x03 0x1a 0x02 0x83>; phandle = <0xe2>; }; spi0m1-tx { rockchip,pins = <0x03 0x19 0x02 0x83>; phandle = <0xe3>; }; spi0m1-rx { rockchip,pins = <0x03 0x18 0x02 0x83>; phandle = <0xe4>; }; spi0m1-cs1 { rockchip,pins = <0x03 0x1b 0x02 0x83>; phandle = <0xe5>; }; }; spi0-2 { spi0m2-clk { rockchip,pins = <0x03 0x00 0x04 0x83>; phandle = <0x42>; }; spi0m2-cs0 { rockchip,pins = <0x03 0x08 0x03 0x83>; phandle = <0x45>; }; spi0m2-tx { rockchip,pins = <0x03 0x01 0x04 0x83>; phandle = <0x43>; }; spi0m2-rx { rockchip,pins = <0x03 0x02 0x04 0x83>; phandle = <0x44>; }; }; pdm-0 { pdmm0-clk { rockchip,pins = <0x02 0x12 0x02 0x82>; phandle = <0x15>; }; pdmm0-fsync { rockchip,pins = <0x02 0x17 0x02 0x82>; phandle = <0x16>; }; pdmm0-sdi0 { rockchip,pins = <0x02 0x13 0x02 0x82>; phandle = <0x17>; }; pdmm0-sdi1 { rockchip,pins = <0x02 0x14 0x02 0x82>; phandle = <0x18>; }; pdmm0-sdi2 { rockchip,pins = <0x02 0x15 0x02 0x82>; phandle = <0x19>; }; pdmm0-sdi3 { rockchip,pins = <0x02 0x16 0x02 0x82>; phandle = <0x1a>; }; pdmm0-sleep { rockchip,pins = <0x02 0x12 0x00 0x84 0x02 0x13 0x00 0x84 0x02 0x14 0x00 0x84 0x02 0x15 0x00 0x84 0x02 0x16 0x00 0x84 0x02 0x17 0x00 0x84>; phandle = <0x1b>; }; }; i2s1 { i2s1-mclk { rockchip,pins = <0x02 0x0f 0x01 0x82>; phandle = <0xe6>; }; i2s1-sclk { rockchip,pins = <0x02 0x12 0x01 0x82>; phandle = <0xe7>; }; i2s1-lrckrx { rockchip,pins = <0x02 0x10 0x01 0x82>; phandle = <0xe8>; }; i2s1-lrcktx { rockchip,pins = <0x02 0x11 0x01 0x82>; phandle = <0xe9>; }; i2s1-sdi { rockchip,pins = <0x02 0x13 0x01 0x82>; phandle = <0xea>; }; i2s1-sdo { rockchip,pins = <0x02 0x17 0x01 0x82>; phandle = <0xeb>; }; i2s1-sdio1 { rockchip,pins = <0x02 0x14 0x01 0x82>; phandle = <0xec>; }; i2s1-sdio2 { rockchip,pins = <0x02 0x15 0x01 0x82>; phandle = <0xed>; }; i2s1-sdio3 { rockchip,pins = <0x02 0x16 0x01 0x82>; phandle = <0xee>; }; i2s1-sleep { rockchip,pins = <0x02 0x0f 0x00 0x84 0x02 0x10 0x00 0x84 0x02 0x11 0x00 0x84 0x02 0x12 0x00 0x84 0x02 0x13 0x00 0x84 0x02 0x14 0x00 0x84 0x02 0x15 0x00 0x84 0x02 0x16 0x00 0x84 0x02 0x17 0x00 0x84>; phandle = <0xef>; }; }; i2s2-0 { i2s2m0-mclk { rockchip,pins = <0x01 0x15 0x01 0x82>; phandle = <0x0d>; }; i2s2m0-sclk { rockchip,pins = <0x01 0x16 0x01 0x82>; phandle = <0x0e>; }; i2s2m0-lrckrx { rockchip,pins = <0x01 0x1a 0x01 0x82>; phandle = <0x10>; }; i2s2m0-lrcktx { rockchip,pins = <0x01 0x17 0x01 0x82>; phandle = <0x0f>; }; i2s2m0-sdi { rockchip,pins = <0x01 0x18 0x01 0x82>; phandle = <0x12>; }; i2s2m0-sdo { rockchip,pins = <0x01 0x19 0x01 0x82>; phandle = <0x11>; }; i2s2m0-sleep { rockchip,pins = <0x01 0x15 0x00 0x84 0x01 0x16 0x00 0x84 0x01 0x1a 0x00 0x84 0x01 0x17 0x00 0x84 0x01 0x18 0x00 0x84 0x01 0x19 0x00 0x84>; phandle = <0x13>; }; }; i2s2-1 { i2s2m1-mclk { rockchip,pins = <0x01 0x15 0x01 0x82>; phandle = <0xf0>; }; i2s2m1-sclk { rockchip,pins = <0x03 0x00 0x06 0x82>; phandle = <0xf1>; }; i2sm1-lrckrx { rockchip,pins = <0x03 0x08 0x06 0x82>; phandle = <0xf2>; }; i2s2m1-lrcktx { rockchip,pins = <0x03 0x08 0x04 0x82>; phandle = <0xf3>; }; i2s2m1-sdi { rockchip,pins = <0x03 0x02 0x06 0x82>; phandle = <0xf4>; }; i2s2m1-sdo { rockchip,pins = <0x03 0x01 0x06 0x82>; phandle = <0xf5>; }; i2s2m1-sleep { rockchip,pins = <0x01 0x15 0x00 0x84 0x03 0x00 0x00 0x84 0x03 0x08 0x00 0x84 0x03 0x02 0x00 0x84 0x03 0x01 0x00 0x84>; phandle = <0xf6>; }; }; spdif-0 { spdifm0-tx { rockchip,pins = <0x00 0x1b 0x01 0x82>; phandle = <0xf7>; }; }; spdif-1 { spdifm1-tx { rockchip,pins = <0x02 0x11 0x02 0x82>; phandle = <0x14>; }; }; spdif-2 { spdifm2-tx { rockchip,pins = <0x00 0x02 0x02 0x82>; phandle = <0xf8>; }; }; sdmmc0-0 { sdmmc0m0-pwren { rockchip,pins = <0x02 0x07 0x01 0x85>; phandle = <0xf9>; }; sdmmc0m0-gpio { rockchip,pins = <0x02 0x07 0x00 0x85>; phandle = <0xfa>; }; }; sdmmc0-1 { sdmmc0m1-pwren { rockchip,pins = <0x00 0x1e 0x03 0x85>; phandle = <0xfb>; }; sdmmc0m1-gpio { rockchip,pins = <0x00 0x1e 0x00 0x85>; phandle = <0x99>; }; }; sdmmc0 { sdmmc0-clk { rockchip,pins = <0x01 0x06 0x01 0x86>; phandle = <0x69>; }; sdmmc0-cmd { rockchip,pins = <0x01 0x04 0x01 0x85>; phandle = <0x6a>; }; sdmmc0-dectn { rockchip,pins = <0x01 0x05 0x01 0x85>; phandle = <0x6b>; }; sdmmc0-wrprt { rockchip,pins = <0x01 0x07 0x01 0x85>; phandle = <0xfc>; }; sdmmc0-bus1 { rockchip,pins = <0x01 0x00 0x01 0x85>; phandle = <0xfd>; }; sdmmc0-bus4 { rockchip,pins = <0x01 0x00 0x01 0x85 0x01 0x01 0x01 0x85 0x01 0x02 0x01 0x85 0x01 0x03 0x01 0x85>; phandle = <0x6c>; }; sdmmc0-gpio { rockchip,pins = <0x01 0x06 0x00 0x85 0x01 0x04 0x00 0x85 0x01 0x05 0x00 0x85 0x01 0x07 0x00 0x85 0x01 0x03 0x00 0x85 0x01 0x02 0x00 0x85 0x01 0x01 0x00 0x85 0x01 0x00 0x00 0x85>; phandle = <0xfe>; }; }; sdmmc0ext { sdmmc0ext-clk { rockchip,pins = <0x03 0x02 0x03 0x86>; phandle = <0x7c>; }; sdmmc0ext-cmd { rockchip,pins = <0x03 0x00 0x03 0x85>; phandle = <0x7b>; }; sdmmc0ext-wrprt { rockchip,pins = <0x03 0x03 0x03 0x85>; phandle = <0xff>; }; sdmmc0ext-dectn { rockchip,pins = <0x03 0x01 0x03 0x85>; phandle = <0x100>; }; sdmmc0ext-bus1 { rockchip,pins = <0x03 0x04 0x03 0x85>; phandle = <0x101>; }; sdmmc0ext-bus4 { rockchip,pins = <0x03 0x04 0x03 0x85 0x03 0x05 0x03 0x85 0x03 0x06 0x03 0x85 0x03 0x07 0x03 0x85>; phandle = <0x7a>; }; sdmmc0ext-gpio { rockchip,pins = <0x03 0x00 0x00 0x85 0x03 0x01 0x00 0x85 0x03 0x02 0x00 0x85 0x03 0x03 0x00 0x85 0x03 0x04 0x00 0x85 0x03 0x05 0x00 0x85 0x03 0x06 0x00 0x85 0x03 0x07 0x00 0x85>; phandle = <0x102>; }; }; sdmmc1 { sdmmc1-clk { rockchip,pins = <0x01 0x0c 0x01 0x87>; phandle = <0x103>; }; sdmmc1-cmd { rockchip,pins = <0x01 0x0d 0x01 0x88>; phandle = <0x104>; }; sdmmc1-pwren { rockchip,pins = <0x01 0x12 0x01 0x88>; phandle = <0x105>; }; sdmmc1-wrprt { rockchip,pins = <0x01 0x14 0x01 0x88>; phandle = <0x106>; }; sdmmc1-dectn { rockchip,pins = <0x01 0x13 0x01 0x88>; phandle = <0x107>; }; sdmmc1-bus1 { rockchip,pins = <0x01 0x0e 0x01 0x88>; phandle = <0x108>; }; sdmmc1-bus4 { rockchip,pins = <0x01 0x0e 0x01 0x88 0x01 0x0f 0x01 0x88 0x01 0x10 0x01 0x88 0x01 0x11 0x01 0x88>; phandle = <0x109>; }; sdmmc1-gpio { rockchip,pins = <0x01 0x0c 0x00 0x85 0x01 0x0d 0x00 0x85 0x01 0x0e 0x00 0x85 0x01 0x0f 0x00 0x85 0x01 0x10 0x00 0x85 0x01 0x11 0x00 0x85 0x01 0x12 0x00 0x85 0x01 0x13 0x00 0x85 0x01 0x14 0x00 0x85>; phandle = <0x10a>; }; }; emmc { emmc-clk { rockchip,pins = <0x03 0x15 0x02 0x89>; phandle = <0x6e>; }; emmc-cmd { rockchip,pins = <0x03 0x13 0x02 0x8a>; phandle = <0x6f>; }; emmc-pwren { rockchip,pins = <0x03 0x16 0x02 0x82>; phandle = <0x10b>; }; emmc-rstnout { rockchip,pins = <0x03 0x14 0x02 0x82>; phandle = <0x10c>; }; emmc-bus1 { rockchip,pins = <0x00 0x07 0x02 0x8a>; phandle = <0x10d>; }; emmc-bus4 { rockchip,pins = <0x00 0x07 0x02 0x8a 0x02 0x1c 0x02 0x8a 0x02 0x1d 0x02 0x8a 0x02 0x1e 0x02 0x8a>; phandle = <0x10e>; }; emmc-bus8 { rockchip,pins = <0x00 0x07 0x02 0x8a 0x02 0x1c 0x02 0x8a 0x02 0x1d 0x02 0x8a 0x02 0x1e 0x02 0x8a 0x02 0x1f 0x02 0x8a 0x03 0x10 0x02 0x8a 0x03 0x11 0x02 0x8a 0x03 0x12 0x02 0x8a>; phandle = <0x70>; }; }; pwm0 { pwm0-pin { rockchip,pins = <0x02 0x04 0x01 0x82>; phandle = <0x46>; }; pwm0-pin-pull-up { rockchip,pins = <0x02 0x04 0x01 0x83>; phandle = <0x10f>; }; }; pwm1 { pwm1-pin { rockchip,pins = <0x02 0x05 0x01 0x82>; phandle = <0x47>; }; pwm1-pin-pull-up { rockchip,pins = <0x02 0x05 0x01 0x83>; phandle = <0x110>; }; }; pwm2 { pwm2-pin { rockchip,pins = <0x02 0x06 0x01 0x82>; phandle = <0x48>; }; }; pwmir { pwmir-pin { rockchip,pins = <0x02 0x02 0x01 0x82>; phandle = <0x49>; }; }; gmac-1 { rgmiim1-pins { rockchip,pins = <0x01 0x0c 0x02 0x89 0x01 0x0d 0x02 0x8b 0x01 0x13 0x02 0x8b 0x01 0x19 0x02 0x89 0x01 0x15 0x02 0x8b 0x01 0x16 0x02 0x8b 0x01 0x17 0x02 0x8b 0x01 0x0a 0x02 0x8b 0x01 0x0b 0x02 0x8b 0x01 0x08 0x02 0x89 0x01 0x09 0x02 0x89 0x01 0x0e 0x02 0x8b 0x01 0x0f 0x02 0x8b 0x01 0x10 0x02 0x89 0x01 0x11 0x02 0x89 0x00 0x08 0x01 0x82 0x00 0x0c 0x01 0x82 0x00 0x18 0x01 0x82 0x00 0x10 0x01 0x82 0x00 0x11 0x01 0x82 0x00 0x17 0x01 0x82 0x00 0x16 0x01 0x82>; phandle = <0x74>; }; rmiim1-pins { rockchip,pins = <0x01 0x13 0x02 0x8b 0x01 0x19 0x02 0x89 0x01 0x15 0x02 0x8b 0x01 0x18 0x02 0x8b 0x01 0x16 0x02 0x8b 0x01 0x17 0x02 0x8b 0x01 0x0a 0x02 0x8b 0x01 0x0b 0x02 0x8b 0x01 0x08 0x02 0x89 0x01 0x09 0x02 0x89 0x00 0x0b 0x01 0x82 0x00 0x0c 0x01 0x82 0x00 0x18 0x01 0x82 0x00 0x13 0x01 0x82 0x00 0x10 0x01 0x82 0x00 0x11 0x01 0x82>; phandle = <0x111>; }; }; gmac2phy { fephyled-speed100 { rockchip,pins = <0x00 0x1f 0x01 0x82>; phandle = <0x112>; }; fephyled-speed10 { rockchip,pins = <0x00 0x1e 0x01 0x82>; phandle = <0x113>; }; fephyled-duplex { rockchip,pins = <0x00 0x1e 0x02 0x82>; phandle = <0x114>; }; fephyled-rxm0 { rockchip,pins = <0x00 0x1d 0x01 0x82>; phandle = <0x115>; }; fephyled-txm0 { rockchip,pins = <0x00 0x1d 0x02 0x82>; phandle = <0x116>; }; fephyled-linkm0 { rockchip,pins = <0x00 0x1c 0x01 0x82>; phandle = <0x117>; }; fephyled-rxm1 { rockchip,pins = <0x02 0x19 0x02 0x82>; phandle = <0x75>; }; fephyled-txm1 { rockchip,pins = <0x02 0x19 0x03 0x82>; phandle = <0x118>; }; fephyled-linkm1 { rockchip,pins = <0x02 0x18 0x02 0x82>; phandle = <0x76>; }; }; tsadc_pin { tsadc-int { rockchip,pins = <0x02 0x0d 0x02 0x82>; phandle = <0x119>; }; tsadc-gpio { rockchip,pins = <0x02 0x0d 0x00 0x82>; phandle = <0x11a>; }; }; hdmi_pin { hdmi-cec { rockchip,pins = <0x00 0x03 0x01 0x82>; phandle = <0x5b>; }; hdmi-hpd { rockchip,pins = <0x00 0x04 0x01 0x8c>; phandle = <0x5d>; }; }; cif-0 { dvp-d2d9-m0 { rockchip,pins = <0x03 0x04 0x02 0x82 0x03 0x05 0x02 0x82 0x03 0x06 0x02 0x82 0x03 0x07 0x02 0x82 0x03 0x08 0x02 0x82 0x03 0x09 0x02 0x82 0x03 0x0a 0x02 0x82 0x03 0x0b 0x02 0x82 0x03 0x01 0x02 0x82 0x03 0x00 0x02 0x82 0x03 0x03 0x02 0x82 0x03 0x02 0x02 0x82>; phandle = <0x11b>; }; }; cif-1 { dvp-d2d9-m1 { rockchip,pins = <0x03 0x04 0x02 0x82 0x03 0x05 0x02 0x82 0x03 0x06 0x02 0x82 0x03 0x07 0x02 0x82 0x03 0x08 0x02 0x82 0x02 0x10 0x04 0x82 0x02 0x11 0x04 0x82 0x02 0x12 0x04 0x82 0x03 0x01 0x02 0x82 0x03 0x00 0x02 0x82 0x02 0x0f 0x04 0x82 0x03 0x02 0x02 0x82>; phandle = <0x11c>; }; }; pmic { pmic-int-l { rockchip,pins = <0x02 0x06 0x00 0x83>; phandle = <0x3f>; }; }; sdio-pwrseq { wifi-enable-h { rockchip,pins = <0x01 0x12 0x00 0x82>; phandle = <0x8e>; }; }; usb { host-vbus-drv { rockchip,pins = <0x00 0x00 0x00 0x82>; phandle = <0x97>; }; otg-vbus-drv { rockchip,pins = <0x00 0x1b 0x00 0x82>; phandle = <0x98>; }; }; wireless-bluetooth { uart0-gpios { rockchip,pins = <0x01 0x0a 0x00 0x82>; phandle = <0x9c>; }; }; }; chosen { bootargs = "earlycon=uart8250,mmio32,0xff130000 swiotlb=1 kpti=0"; }; fiq-debugger { compatible = "rockchip,fiq-debugger"; rockchip,serial-id = <0x02>; rockchip,signal-irq = <0x9f>; rockchip,wake-irq = <0x00>; rockchip,irq-mode-enable = <0x00>; rockchip,baudrate = <0x16e360>; interrupts = <0x00 0x7f 0x08>; status = "okay"; }; reserved-memory { #address-cells = <0x02>; #size-cells = <0x02>; ranges; drm-logo@00000000 { compatible = "rockchip,drm-logo"; reg = <0x00 0x00 0x00 0x00>; phandle = <0x62>; }; secure-memory@20000000 { compatible = "rockchip,secure-memory"; reg = <0x00 0x20000000 0x00 0x00>; phandle = <0x63>; }; ramoops@68000000 { reg = <0x00 0x110000 0x00 0xf0000>; phandle = <0x8d>; }; linux,cma { compatible = "shared-dma-pool"; reusable; size = <0x00 0x2000000>; linux,cma-default; }; }; ramoops { compatible = "ramoops"; record-size = <0x00 0x20000>; console-size = <0x00 0x80000>; ftrace-size = <0x00 0x00>; pmsg-size = <0x00 0x50000>; memory-region = <0x8d>; }; sk-keypad { compatible = "rockchip,key"; power-key { gpios = <0x3e 0x15 0x01>; linux,code = <0x74>; label = "power"; gpio-key,wakeup; }; }; external-gmac-clock { compatible = "fixed-clock"; clock-frequency = <0x7735940>; clock-output-names = "gmac_clkin"; #clock-cells = <0x00>; phandle = <0x73>; }; sdio-pwrseq { compatible = "mmc-pwrseq-simple"; pinctrl-names = "default"; pinctrl-0 = <0x8e>; reset-gpios = <0x8f 0x08 0x01>; phandle = <0x79>; }; sound { compatible = "simple-audio-card"; simple-audio-card,format = "i2s"; simple-audio-card,mclk-fs = <0x100>; simple-audio-card,name = "rockchip-rk3328"; simple-audio-card,cpu { sound-dai = <0x90>; }; simple-audio-card,codec { sound-dai = <0x91>; }; }; hdmi-sound { compatible = "simple-audio-card"; simple-audio-card,format = "i2s"; simple-audio-card,mclk-fs = <0x80>; simple-audio-card,name = "rockchip-hdmi"; simple-audio-card,cpu { sound-dai = <0x92>; }; simple-audio-card,codec { sound-dai = <0x93>; }; }; spdif-sound { compatible = "simple-audio-card"; simple-audio-card,name = "rockchip-spdif"; simple-audio-card,cpu { sound-dai = <0x94>; }; simple-audio-card,codec { sound-dai = <0x95>; }; }; spdif-out { compatible = "linux,spdif-dit"; #sound-dai-cells = <0x00>; phandle = <0x95>; }; host-vbus-regulator { compatible = "regulator-fixed"; gpio = <0x96 0x00 0x00>; pinctrl-names = "default"; pinctrl-0 = <0x97>; regulator-name = "vcc_host_vbus"; regulator-min-microvolt = <0x4c4b40>; regulator-max-microvolt = <0x4c4b40>; enable-active-high; phandle = <0x68>; }; otg-vbus-regulator { compatible = "regulator-fixed"; gpio = <0x96 0x1b 0x00>; pinctrl-names = "default"; pinctrl-0 = <0x98>; regulator-name = "vcc_otg_vbus"; regulator-min-microvolt = <0x4c4b40>; regulator-max-microvolt = <0x4c4b40>; enable-active-high; phandle = <0x66>; }; vcc-phy-regulator { compatible = "regulator-fixed"; regulator-name = "vcc_phy"; regulator-always-on; regulator-boot-on; phandle = <0x71>; }; sdmmc-regulator { compatible = "regulator-fixed"; gpio = <0x96 0x1e 0x01>; pinctrl-names = "default"; pinctrl-0 = <0x99>; regulator-name = "vcc_sd"; regulator-min-microvolt = <0x325aa0>; regulator-max-microvolt = <0x325aa0>; vin-supply = <0x29>; phandle = <0x6d>; }; xin32k { compatible = "fixed-clock"; clock-frequency = <0x8000>; clock-output-names = "xin32k"; #clock-cells = <0x00>; phandle = <0x11d>; }; wireless-bluetooth { compatible = "bluetooth-platdata"; clocks = <0x9a 0x01>; clock-names = "ext_clock"; uart_rts_gpios = <0x72 0x0a 0x01>; pinctrl-names = "default\0rts_gpio"; pinctrl-0 = <0x9b>; pinctrl-1 = <0x9c>; BT,reset_gpio = <0x72 0x15 0x00>; BT,wake_gpio = <0x72 0x17 0x00>; BT,wake_host_irq = <0x72 0x1a 0x00>; status = "okay"; }; wireless-wlan { compatible = "wlan-platdata"; rockchip,grf = <0x1c>; wifi_chip_type = [00]; sdio_vref = <0xce4>; #WIFI,poweren_gpio = <0x8f 0x08 0x00>; WIFI,host_wake_irq = <0x8f 0x01 0x00>; status = "okay"; }; leds { compatible = "gpio-leds"; power-green { gpios = <0x9a 0x00 0x00>; linux,default-trigger = "none"; default-state = "on"; mode = <0x23>; }; }; __symbols__ { ddr_timing = "/ddr_timing"; cpu0 = "/cpus/cpu@0"; cpu1 = "/cpus/cpu@1"; cpu2 = "/cpus/cpu@2"; cpu3 = "/cpus/cpu@3"; cpu0_opp_table = "/cpu0-opp-table"; rockchip_suspend = "/rockchip-suspend"; xin24m = "/xin24m"; i2s0 = "/i2s@ff000000"; i2s1 = "/i2s@ff010000"; i2s2 = "/i2s@ff020000"; spdif = "/spdif@ff030000"; pdm = "/pdm@ff040000"; tsp = "/tsp@ff050000"; grf = "/syscon@ff100000"; io_domains = "/syscon@ff100000/io-domains"; power = "/syscon@ff100000/power-controller"; soc_thermal = "/thermal-zones/soc-thermal"; threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; target = "/thermal-zones/soc-thermal/trips/trip-point-1"; soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; tsadc = "/tsadc@ff250000"; uart0 = "/serial@ff110000"; uart1 = "/serial@ff120000"; uart2 = "/serial@ff130000"; pmu = "/power-management@ff140000"; i2c0 = "/i2c@ff150000"; i2c1 = "/i2c@ff160000"; rk805 = "/i2c@ff160000/rk805@18"; vdd_logic = "/i2c@ff160000/rk805@18/regulators/DCDC_REG1"; vdd_arm = "/i2c@ff160000/rk805@18/regulators/DCDC_REG2"; vcc_ddr = "/i2c@ff160000/rk805@18/regulators/DCDC_REG3"; vcc_io = "/i2c@ff160000/rk805@18/regulators/DCDC_REG4"; vdd_18 = "/i2c@ff160000/rk805@18/regulators/LDO_REG1"; vcc_18emmc = "/i2c@ff160000/rk805@18/regulators/LDO_REG2"; vdd_11 = "/i2c@ff160000/rk805@18/regulators/LDO_REG3"; i2c2 = "/i2c@ff170000"; i2c3 = "/i2c@ff180000"; spi0 = "/spi@ff190000"; wdt = "/watchdog@ff1a0000"; pwm0 = "/pwm@ff1b0000"; pwm1 = "/pwm@ff1b0010"; pwm2 = "/pwm@ff1b0020"; pwm3 = "/pwm@ff1b0030"; dmac = "/amba/dmac@ff1f0000"; efuse = "/efuse@ff260000"; efuse_id = "/efuse@ff260000/id@7"; cpu_leakage = "/efuse@ff260000/cpu-leakage@17"; logic_leakage = "/efuse@ff260000/logic-leakage@19"; efuse_cpu_version = "/efuse@ff260000/cpu-version@1a"; saradc = "/saradc@ff280000"; gpu = "/gpu@ff300000"; gpu_power_model = "/gpu@ff300000/power_model"; gpu_opp_table = "/gpu-opp-table"; vdpu = "/vpu_service@ff350000"; vpu_mmu = "/iommu@ff350800"; avsd = "/avsd@ff351000"; vpu_service = "/vpu_combo"; rkvdec = "/rkvdec@ff36000"; vcodec_power_model = "/rkvdec@ff36000/vcodec_power_model"; rkvdec_opp_table = "/rkvdec-opp-table"; rkvdec_mmu = "/iommu@ff360480"; h265e = "/h265e@ff330000"; h265e_mmu = "/iommu@ff330200"; vepu = "/vepu@ff340000"; vepu_mmu = "/iommu@ff340800"; venc_srv = "/venc_srv"; vop = "/vop@ff370000"; vop_out = "/vop@ff370000/port"; vop_out_hdmi = "/vop@ff370000/port/endpoint@0"; vop_out_tve = "/vop@ff370000/port/endpoint@1"; vop_mmu = "/iommu@ff373f00"; rga = "/rga@ff3900000"; iep = "/iep@ff3a0000"; iep_mmu = "/iommu@ff3a0800"; hdmi = "/hdmi@ff3c0000"; hdmi_in = "/hdmi@ff3c0000/ports/port"; hdmi_in_vop = "/hdmi@ff3c0000/ports/port/endpoint@0"; tve = "/tve@ff373e00"; tve_in = "/tve@ff373e00/ports/port"; tve_in_vop = "/tve@ff373e00/ports/port/endpoint@0"; display_subsystem = "/display-subsystem"; route_hdmi = "/display-subsystem/route/route-hdmi"; route_tve = "/display-subsystem/route/route-tve"; codec = "/codec@ff410000"; hdmiphy = "/hdmiphy@ff430000"; cru = "/clock-controller@ff440000"; usb2phy_grf = "/syscon@ff450000"; u2phy = "/syscon@ff450000/usb2-phy@100"; u2phy_host = "/syscon@ff450000/usb2-phy@100/host-port"; u2phy_otg = "/syscon@ff450000/usb2-phy@100/otg-port"; usb3phy_grf = "/syscon@ff460000"; u3phy = "/usb3-phy@ff470000"; u3phy_utmi = "/usb3-phy@ff470000/utmi@ff470000"; u3phy_pipe = "/usb3-phy@ff470000/pipe@ff478000"; sdmmc = "/dwmmc@ff500000"; sdio = "/dwmmc@ff510000"; emmc = "/dwmmc@ff520000"; gmac2io = "/ethernet@ff540000"; gmac2phy = "/ethernet@ff550000"; usb20_otg = "/usb@ff580000"; usb_host0_ehci = "/usb@ff5c0000"; usb_host0_ohci = "/usb@ff5d0000"; sdmmc_ext = "/dwmmc@ff5f0000"; usbdrd3 = "/usb@ff600000"; usbdrd_dwc3 = "/usb@ff600000/dwc3@ff600000"; qos_rkvdec_r = "/qos@ff750000"; qos_rkvdec_w = "/qos@ff750080"; qos_vpu = "/qos@ff778000"; dfi = "/dfi@ff790000"; dmc = "/dmc"; ddr_power_model = "/dmc/ddr_power_model"; dmc_opp_table = "/dmc-opp-table"; gic = "/interrupt-controller@ff811000"; pinctrl = "/pinctrl"; gpio0 = "/pinctrl/gpio0@ff210000"; gpio1 = "/pinctrl/gpio1@ff220000"; gpio2 = "/pinctrl/gpio2@ff230000"; gpio3 = "/pinctrl/gpio3@ff240000"; pcfg_pull_up = "/pinctrl/pcfg-pull-up"; pcfg_pull_down = "/pinctrl/pcfg-pull-down"; pcfg_pull_none = "/pinctrl/pcfg-pull-none"; pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma"; pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma"; pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma"; pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma"; pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma"; pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma"; pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma"; pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma"; pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma"; pcfg_output_high = "/pinctrl/pcfg-output-high"; pcfg_output_low = "/pinctrl/pcfg-output-low"; pcfg_input_high = "/pinctrl/pcfg-input-high"; pcfg_input = "/pinctrl/pcfg-input"; i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer"; i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer"; i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer"; i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer"; i2c3_gpio = "/pinctrl/i2c3/i2c3-gpio"; tsp_d0 = "/pinctrl/tsp/tsp-d0"; tsp_d1 = "/pinctrl/tsp/tsp-d1"; tsp_d2 = "/pinctrl/tsp/tsp-d2"; tsp_d3 = "/pinctrl/tsp/tsp-d3"; tsp_d4 = "/pinctrl/tsp/tsp-d4"; tsp_d5 = "/pinctrl/tsp/tsp-d5"; tsp_d6 = "/pinctrl/tsp/tsp-d6"; tsp_d7 = "/pinctrl/tsp/tsp-d7"; tsp_sync = "/pinctrl/tsp/tsp-sync"; tsp_clk = "/pinctrl/tsp/tsp-clk"; tsp_fail = "/pinctrl/tsp/tsp-fail"; tsp_valid = "/pinctrl/tsp/tsp-valid"; hdmii2c_xfer = "/pinctrl/hdmi_i2c/hdmii2c-xfer"; otp_gpio = "/pinctrl/tsadc/otp-gpio"; otp_out = "/pinctrl/tsadc/otp-out"; uart0_xfer = "/pinctrl/uart0/uart0-xfer"; uart0_cts = "/pinctrl/uart0/uart0-cts"; uart0_rts = "/pinctrl/uart0/uart0-rts"; uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio"; uart1_xfer = "/pinctrl/uart1/uart1-xfer"; uart1_cts = "/pinctrl/uart1/uart1-cts"; uart1_rts = "/pinctrl/uart1/uart1-rts"; uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio"; uart2m0_xfer = "/pinctrl/uart2-0/uart2m0-xfer"; uart2m1_xfer = "/pinctrl/uart2-1/uart2m1-xfer"; spi0m0_clk = "/pinctrl/spi0-0/spi0m0-clk"; spi0m0_cs0 = "/pinctrl/spi0-0/spi0m0-cs0"; spi0m0_tx = "/pinctrl/spi0-0/spi0m0-tx"; spi0m0_rx = "/pinctrl/spi0-0/spi0m0-rx"; spi0m0_cs1 = "/pinctrl/spi0-0/spi0m0-cs1"; spi0m1_clk = "/pinctrl/spi0-1/spi0m1-clk"; spi0m1_cs0 = "/pinctrl/spi0-1/spi0m1-cs0"; spi0m1_tx = "/pinctrl/spi0-1/spi0m1-tx"; spi0m1_rx = "/pinctrl/spi0-1/spi0m1-rx"; spi0m1_cs1 = "/pinctrl/spi0-1/spi0m1-cs1"; spi0m2_clk = "/pinctrl/spi0-2/spi0m2-clk"; spi0m2_cs0 = "/pinctrl/spi0-2/spi0m2-cs0"; spi0m2_tx = "/pinctrl/spi0-2/spi0m2-tx"; spi0m2_rx = "/pinctrl/spi0-2/spi0m2-rx"; pdmm0_clk = "/pinctrl/pdm-0/pdmm0-clk"; pdmm0_fsync = "/pinctrl/pdm-0/pdmm0-fsync"; pdmm0_sdi0 = "/pinctrl/pdm-0/pdmm0-sdi0"; pdmm0_sdi1 = "/pinctrl/pdm-0/pdmm0-sdi1"; pdmm0_sdi2 = "/pinctrl/pdm-0/pdmm0-sdi2"; pdmm0_sdi3 = "/pinctrl/pdm-0/pdmm0-sdi3"; pdmm0_sleep = "/pinctrl/pdm-0/pdmm0-sleep"; i2s1_mclk = "/pinctrl/i2s1/i2s1-mclk"; i2s1_sclk = "/pinctrl/i2s1/i2s1-sclk"; i2s1_lrckrx = "/pinctrl/i2s1/i2s1-lrckrx"; i2s1_lrcktx = "/pinctrl/i2s1/i2s1-lrcktx"; i2s1_sdi = "/pinctrl/i2s1/i2s1-sdi"; i2s1_sdo = "/pinctrl/i2s1/i2s1-sdo"; i2s1_sdio1 = "/pinctrl/i2s1/i2s1-sdio1"; i2s1_sdio2 = "/pinctrl/i2s1/i2s1-sdio2"; i2s1_sdio3 = "/pinctrl/i2s1/i2s1-sdio3"; i2s1_sleep = "/pinctrl/i2s1/i2s1-sleep"; i2s2m0_mclk = "/pinctrl/i2s2-0/i2s2m0-mclk"; i2s2m0_sclk = "/pinctrl/i2s2-0/i2s2m0-sclk"; i2s2m0_lrckrx = "/pinctrl/i2s2-0/i2s2m0-lrckrx"; i2s2m0_lrcktx = "/pinctrl/i2s2-0/i2s2m0-lrcktx"; i2s2m0_sdi = "/pinctrl/i2s2-0/i2s2m0-sdi"; i2s2m0_sdo = "/pinctrl/i2s2-0/i2s2m0-sdo"; i2s2m0_sleep = "/pinctrl/i2s2-0/i2s2m0-sleep"; i2s2m1_mclk = "/pinctrl/i2s2-1/i2s2m1-mclk"; i2s2m1_sclk = "/pinctrl/i2s2-1/i2s2m1-sclk"; i2s2m1_lrckrx = "/pinctrl/i2s2-1/i2sm1-lrckrx"; i2s2m1_lrcktx = "/pinctrl/i2s2-1/i2s2m1-lrcktx"; i2s2m1_sdi = "/pinctrl/i2s2-1/i2s2m1-sdi"; i2s2m1_sdo = "/pinctrl/i2s2-1/i2s2m1-sdo"; i2s2m1_sleep = "/pinctrl/i2s2-1/i2s2m1-sleep"; spdifm0_tx = "/pinctrl/spdif-0/spdifm0-tx"; spdifm1_tx = "/pinctrl/spdif-1/spdifm1-tx"; spdifm2_tx = "/pinctrl/spdif-2/spdifm2-tx"; sdmmc0m0_pwren = "/pinctrl/sdmmc0-0/sdmmc0m0-pwren"; sdmmc0m0_gpio = "/pinctrl/sdmmc0-0/sdmmc0m0-gpio"; sdmmc0m1_pwren = "/pinctrl/sdmmc0-1/sdmmc0m1-pwren"; sdmmc0m1_gpio = "/pinctrl/sdmmc0-1/sdmmc0m1-gpio"; sdmmc0_clk = "/pinctrl/sdmmc0/sdmmc0-clk"; sdmmc0_cmd = "/pinctrl/sdmmc0/sdmmc0-cmd"; sdmmc0_dectn = "/pinctrl/sdmmc0/sdmmc0-dectn"; sdmmc0_wrprt = "/pinctrl/sdmmc0/sdmmc0-wrprt"; sdmmc0_bus1 = "/pinctrl/sdmmc0/sdmmc0-bus1"; sdmmc0_bus4 = "/pinctrl/sdmmc0/sdmmc0-bus4"; sdmmc0_gpio = "/pinctrl/sdmmc0/sdmmc0-gpio"; sdmmc0ext_clk = "/pinctrl/sdmmc0ext/sdmmc0ext-clk"; sdmmc0ext_cmd = "/pinctrl/sdmmc0ext/sdmmc0ext-cmd"; sdmmc0ext_wrprt = "/pinctrl/sdmmc0ext/sdmmc0ext-wrprt"; sdmmc0ext_dectn = "/pinctrl/sdmmc0ext/sdmmc0ext-dectn"; sdmmc0ext_bus1 = "/pinctrl/sdmmc0ext/sdmmc0ext-bus1"; sdmmc0ext_bus4 = "/pinctrl/sdmmc0ext/sdmmc0ext-bus4"; sdmmc0ext_gpio = "/pinctrl/sdmmc0ext/sdmmc0ext-gpio"; sdmmc1_clk = "/pinctrl/sdmmc1/sdmmc1-clk"; sdmmc1_cmd = "/pinctrl/sdmmc1/sdmmc1-cmd"; sdmmc1_pwren = "/pinctrl/sdmmc1/sdmmc1-pwren"; sdmmc1_wrprt = "/pinctrl/sdmmc1/sdmmc1-wrprt"; sdmmc1_dectn = "/pinctrl/sdmmc1/sdmmc1-dectn"; sdmmc1_bus1 = "/pinctrl/sdmmc1/sdmmc1-bus1"; sdmmc1_bus4 = "/pinctrl/sdmmc1/sdmmc1-bus4"; sdmmc1_gpio = "/pinctrl/sdmmc1/sdmmc1-gpio"; emmc_clk = "/pinctrl/emmc/emmc-clk"; emmc_cmd = "/pinctrl/emmc/emmc-cmd"; emmc_pwren = "/pinctrl/emmc/emmc-pwren"; emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; emmc_bus1 = "/pinctrl/emmc/emmc-bus1"; emmc_bus4 = "/pinctrl/emmc/emmc-bus4"; emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; pwm0_pin = "/pinctrl/pwm0/pwm0-pin"; pwm0_pin_pull_up = "/pinctrl/pwm0/pwm0-pin-pull-up"; pwm1_pin = "/pinctrl/pwm1/pwm1-pin"; pwm1_pin_pull_up = "/pinctrl/pwm1/pwm1-pin-pull-up"; pwm2_pin = "/pinctrl/pwm2/pwm2-pin"; pwmir_pin = "/pinctrl/pwmir/pwmir-pin"; rgmiim1_pins = "/pinctrl/gmac-1/rgmiim1-pins"; rmiim1_pins = "/pinctrl/gmac-1/rmiim1-pins"; fephyled_speed100 = "/pinctrl/gmac2phy/fephyled-speed100"; fephyled_speed10 = "/pinctrl/gmac2phy/fephyled-speed10"; fephyled_duplex = "/pinctrl/gmac2phy/fephyled-duplex"; fephyled_rxm0 = "/pinctrl/gmac2phy/fephyled-rxm0"; fephyled_txm0 = "/pinctrl/gmac2phy/fephyled-txm0"; fephyled_linkm0 = "/pinctrl/gmac2phy/fephyled-linkm0"; fephyled_rxm1 = "/pinctrl/gmac2phy/fephyled-rxm1"; fephyled_txm1 = "/pinctrl/gmac2phy/fephyled-txm1"; fephyled_linkm1 = "/pinctrl/gmac2phy/fephyled-linkm1"; tsadc_int = "/pinctrl/tsadc_pin/tsadc-int"; tsadc_gpio = "/pinctrl/tsadc_pin/tsadc-gpio"; hdmi_cec = "/pinctrl/hdmi_pin/hdmi-cec"; hdmi_hpd = "/pinctrl/hdmi_pin/hdmi-hpd"; dvp_d2d9_m0 = "/pinctrl/cif-0/dvp-d2d9-m0"; dvp_d2d9_m1 = "/pinctrl/cif-1/dvp-d2d9-m1"; pmic_int_l = "/pinctrl/pmic/pmic-int-l"; wifi_enable_h = "/pinctrl/sdio-pwrseq/wifi-enable-h"; host_vbus_drv = "/pinctrl/usb/host-vbus-drv"; otg_vbus_drv = "/pinctrl/usb/otg-vbus-drv"; uart0_gpios = "/pinctrl/wireless-bluetooth/uart0-gpios"; drm_logo = "/reserved-memory/drm-logo@00000000"; secure_memory = "/reserved-memory/secure-memory@20000000"; ramoops_mem = "/reserved-memory/ramoops@68000000"; gmac_clkin = "/external-gmac-clock"; sdio_pwrseq = "/sdio-pwrseq"; spdif_out = "/spdif-out"; vcc_host_vbus = "/host-vbus-regulator"; vcc_otg_vbus = "/otg-vbus-regulator"; vcc_phy = "/vcc-phy-regulator"; vcc_sd = "/sdmmc-regulator"; xin32k = "/xin32k"; }; }; From the dts you posted, the wifi chip is attached to the "alternate" sdio bus. From the dts also there is no evidence that your wifi chip is sv6051p, that is anyway not supported in mainline kernel. To understand why your box is hanging on reboot if you select the alternate sdio bus there is the need for a detailed log from the serial. edit: photos of the board and chips are welcome and interesting 1 Quote
jock Posted August 16, 2021 Author Posted August 16, 2021 1 hour ago, RetroFan90 said: i don't have an h96 max , only HK1 Max but some versions of h96 max firmware work fairly normal some versions have wifi 2.4 + 5 GHz with BT 4 but some versions of h96 max firmware have issues with bluetooth in the sense that when you try to pair anything to it , it connects for a split second and then turns off bt and is reproducible on my HK1 Max but might be different... like for example the m96 and x88 and some other clones seem to have issues getting the 7 segment 4 digit LED Display to show up after booting on HK1MAX. some 3328 native firmwares seem to cause the 3318 some trouble by softbricking the loader (which is unbrickable at the hardware level (why i picked RockChip as my main box in the first place.) if all else fails you short the two copper dots with a pair of angled tweezers and plug the usb into the 2.0 port as the 3.0 port won't work afaik in my testing so far... i'll send links to the android 11 firmware along with 9 & 10 soon... Well, installing the wrong firmware on the wrong box is usually the best recipe to brick the box, as you experienced by yourself. Just in case someone else reads and wants to do that, it is something that I absolutely DO NOT recommend to do unless you exactly know what are you doing. It's not your case, I see you're fine because you got the eMMC clk pin to put the board in maskrom mode, but not all rk3318/rk3328 have accessible eMMC clock pin. Anyway thanks for the large list of rk3318 firmwares, it will be interesting to scavenge for firmwares and blobs 1 Quote
Jason Duhamell Posted August 17, 2021 Posted August 17, 2021 8 hours ago, jock said: From the dts you posted, the wifi chip is attached to the "alternate" sdio bus. From the dts also there is no evidence that your wifi chip is sv6051p, that is anyway not supported in mainline kernel. To understand why your box is hanging on reboot if you select the alternate sdio bus there is the need for a detailed log from the serial. edit: photos of the board and chips are welcome and interesting I read the part number off of the wi-fi chip. I am working on making my own DTB for the board, but I need to reinstall Ubuntu to compile my own Armbian. I will upload some photos of the board in a bit, but the board does not have a UART port from what I can see so far, taking a proper log of the bootup will be difficult, but I will try and take a screenshot with my phone. 1 Quote
Jason Duhamell Posted August 17, 2021 Posted August 17, 2021 I have attached some photos of the MX10 Pro. I also made a backup of the original android firmware if there is any interest in me uploading it. 2 Quote
Jason Duhamell Posted August 17, 2021 Posted August 17, 2021 (edited) I am inching my way to a working DTB. Here is a copy of a dmesg log from the Station M1 Legacy build. Spoiler [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.213-station (root@hirsute) (gcc version 8.3.0 (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) ) #4 SMP Fri May 7 09:50:36 UTC 2021 [ 0.000000] Boot CPU: AArch64 Processor [410fd034] [ 0.000000] earlycon: Early serial console at MMIO32 0xff130000 (options '') [ 0.000000] bootconsole [uart0] enabled [ 0.000000] On node 0 totalpages: 1043968 [ 0.000000] DMA zone: 16312 pages used for memmap [ 0.000000] DMA zone: 0 pages reserved [ 0.000000] DMA zone: 1043968 pages, LIFO batch:31 [ 0.000000] psci: probing for conduit method from DT. [ 0.000000] psci: PSCIv1.0 detected in firmware. [ 0.000000] psci: Using standard PSCI v0.2 function IDs [ 0.000000] psci: MIGRATE_INFO_TYPE not supported. [ 0.000000] psci: SMC Calling Convention v1.0 [ 0.000000] PERCPU: Embedded 20 pages/cpu @ffffffc0fef25000 s42216 r8192 d31512 u81920 [ 0.000000] pcpu-alloc: s42216 r8192 d31512 u81920 alloc=20*4096 [ 0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 [ 0.000000] Detected VIPT I-cache on CPU0 [ 0.000000] CPU features: enabling workaround for ARM erratum 845719 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 1027656 [ 0.000000] Kernel command line: root=UUID=e2e30abc-4302-491a-b8ac-7b18103ec0f1 console=uart8250,mmio32,0xff130000 console=tty0 rootflags=data=writeback rw no_console_suspend consoleblank=0 fsck.fix=yes fsck.repair=yes net.ifnames=0 bootsplash.bootfile=bootsplash.armbian [ 0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes) [ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes) [ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes) [ 0.000000] software IO TLB: mapped [mem 0xf5e00000-0xf9e00000] (64MB) [ 0.000000] Memory: 4006456K/4175872K available (12478K kernel code, 1612K rwdata, 6808K rodata, 1216K init, 1967K bss, 169416K reserved, 0K cma-reserved) [ 0.000000] Virtual kernel memory layout: modules : 0xffffff8000000000 - 0xffffff8008000000 ( 128 MB) vmalloc : 0xffffff8008000000 - 0xffffffbdbfff0000 ( 246 GB) .init : 0xffffff8009360000 - 0xffffff8009490000 ( 1216 KB) .text : 0xffffff8008080000 - 0xffffff8008cb0000 ( 12480 KB) .rodata : 0xffffff8008cb0000 - 0xffffff8009360000 ( 6848 KB) .data : 0xffffff8009490000 - 0xffffff8009623008 ( 1613 KB) vmemmap : 0xffffffbdc0000000 - 0xffffffbfc0000000 ( 8 GB maximum) 0xffffffbdc0008000 - 0xffffffbdc3fc0000 ( 63 MB actual) fixed : 0xffffffbffe7fb000 - 0xffffffbffec00000 ( 4116 KB) PCI I/O : 0xffffffbffee00000 - 0xffffffbfffe00000 ( 16 MB) memory : 0xffffffc000200000 - 0xffffffc0ff000000 ( 4078 MB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 [ 0.000000] Hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 64. [ 0.000000] RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=4. [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=64, nr_cpu_ids=4 [ 0.000000] NR_IRQS:64 nr_irqs:64 0 [ 0.000000] GIC: Using split EOI/Deactivate mode [ 0.000000] rockchip_mmc_get_phase: invalid clk rate [ 0.000000] rockchip_mmc_get_phase: invalid clk rate [ 0.000000] rockchip_mmc_get_phase: invalid clk rate [ 0.000000] rockchip_mmc_get_phase: invalid clk rate [ 0.000000] rockchip_mmc_get_phase: invalid clk rate [ 0.000000] rockchip_mmc_get_phase: invalid clk rate [ 0.000000] rockchip_mmc_get_phase: invalid clk rate [ 0.000000] rockchip_mmc_get_phase: invalid clk rate [ 0.000000] Architected cp15 timer(s) running at 24.00MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x588fe9dc0, max_idle_ns: 440795202592 ns [ 0.000008] sched_clock: 56 bits at 24MHz, resolution 41ns, wraps every 4398046511097ns [ 0.002061] Console: colour dummy device 80x25 [ 0.002476] console [tty0] enabled [ 0.002805] bootconsole [uart0] disabled [ 0.003200] Calibrating delay loop (skipped), value calculated using timer frequency.. 48.00 BogoMIPS (lpj=96000) [ 0.003245] pid_max: default: 32768 minimum: 301 [ 0.003424] Security Framework initialized [ 0.003453] Yama: becoming mindful. [ 0.003495] AppArmor: AppArmor disabled by boot time parameter [ 0.003587] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes) [ 0.003621] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes) [ 0.004694] Initializing cgroup subsys io [ 0.004734] Initializing cgroup subsys memory [ 0.004789] Initializing cgroup subsys devices [ 0.004821] Initializing cgroup subsys freezer [ 0.004850] Initializing cgroup subsys net_cls [ 0.004884] Initializing cgroup subsys perf_event [ 0.004919] Initializing cgroup subsys net_prio [ 0.004954] Initializing cgroup subsys hugetlb [ 0.004981] Initializing cgroup subsys pids [ 0.005051] ftrace: allocating 46905 entries in 184 pages [ 0.147149] sched-energy: CPU device node has no sched-energy-costs [ 0.147198] Invalid sched_group_energy for CPU0 [ 0.147221] CPU0: update cpu_capacity 1024 [ 0.147313] ASID allocator initialised with 32768 entries [ 0.150698] Detected VIPT I-cache on CPU1 [ 0.150769] Invalid sched_group_energy for CPU1 [ 0.150776] CPU1: update cpu_capacity 1024 [ 0.150781] CPU1: Booted secondary processor [410fd034] [ 0.151599] Detected VIPT I-cache on CPU2 [ 0.151653] Invalid sched_group_energy for CPU2 [ 0.151659] CPU2: update cpu_capacity 1024 [ 0.151666] CPU2: Booted secondary processor [410fd034] [ 0.152431] Detected VIPT I-cache on CPU3 [ 0.152479] Invalid sched_group_energy for CPU3 [ 0.152486] CPU3: update cpu_capacity 1024 [ 0.152491] CPU3: Booted secondary processor [410fd034] [ 0.152606] Brought up 4 CPUs [ 0.153098] SMP: Total of 4 processors activated. [ 0.153148] CPU features: detected feature: 32-bit EL0 Support [ 0.153199] CPU: All CPU(s) started at EL2 [ 0.153279] alternatives: patching kernel code [ 0.153591] Invalid sched_group_energy for CPU3 [ 0.153645] Invalid sched_group_energy for Cluster3 [ 0.153688] Invalid sched_group_energy for CPU2 [ 0.153730] Invalid sched_group_energy for Cluster2 [ 0.153771] Invalid sched_group_energy for CPU1 [ 0.153813] Invalid sched_group_energy for Cluster1 [ 0.153857] Invalid sched_group_energy for CPU0 [ 0.153899] Invalid sched_group_energy for Cluster0 [ 0.154904] devtmpfs: initialized [ 0.183011] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns [ 0.183131] futex hash table entries: 1024 (order: 4, 65536 bytes) [ 0.183835] xor: measuring software checksum speed [ 0.223059] 8regs : 1079.000 MB/sec [ 0.263151] 8regs_prefetch: 968.000 MB/sec [ 0.303239] 32regs : 1403.000 MB/sec [ 0.343327] 32regs_prefetch: 1222.000 MB/sec [ 0.343375] xor: using function: 32regs (1403.000 MB/sec) [ 0.343454] pinctrl core: initialized pinctrl subsystem [ 0.343929] regulator-dummy: no parameters [ 0.346964] Failed to find legacy iommu devices [ 0.347923] NET: Registered protocol family 16 [ 0.359480] cpuidle: using governor ladder [ 0.367110] cpuidle: using governor menu [ 0.367189] Registered FIQ tty driver [ 0.367957] vdso: 2 pages (1 code @ ffffff8008cb6000, 1 data @ ffffff8009494000) [ 0.368071] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers. [ 0.369390] DMA: preallocated 2048 KiB pool for atomic allocations [ 0.388424] gpiochip_add_data: registered GPIOs 0 to 31 on device: gpio0 [ 0.388594] gpiochip_add_data: registered GPIOs 32 to 63 on device: gpio1 [ 0.388753] gpiochip_add_data: registered GPIOs 64 to 95 on device: gpio2 [ 0.388919] gpiochip_add_data: registered GPIOs 96 to 127 on device: gpio3 [ 0.399889] genirq: Setting trigger mode 8 for irq 177 failed (gic_set_type+0x0/0x64) [ 0.460915] console [ttyFIQ0] enabled [ 0.461786] Registered fiq debugger ttyFIQ0 [ 0.560240] raid6: int64x1 gen() 204 MB/s [ 0.628294] raid6: int64x1 xor() 191 MB/s [ 0.696518] raid6: int64x2 gen() 326 MB/s [ 0.764600] raid6: int64x2 xor() 250 MB/s [ 0.832812] raid6: int64x4 gen() 446 MB/s [ 0.900995] raid6: int64x4 xor() 331 MB/s [ 0.969207] raid6: int64x8 gen() 369 MB/s [ 1.037314] raid6: int64x8 xor() 304 MB/s [ 1.105532] raid6: neonx1 gen() 365 MB/s [ 1.173699] raid6: neonx1 xor() 368 MB/s [ 1.241905] raid6: neonx2 gen() 551 MB/s [ 1.310060] raid6: neonx2 xor() 449 MB/s [ 1.378227] raid6: neonx4 gen() 744 MB/s [ 1.446452] raid6: neonx4 xor() 551 MB/s [ 1.514638] raid6: neonx8 gen() 746 MB/s [ 1.582788] raid6: neonx8 xor() 575 MB/s [ 1.583209] raid6: using algorithm neonx8 gen() 746 MB/s [ 1.583715] raid6: .... xor() 575 MB/s, rmw enabled [ 1.584184] raid6: using intx1 recovery algorithm [ 1.585216] mpp venc_srv: mpp_probe enter [ 1.585649] mpp venc_srv: init success [ 1.587435] of_get_named_gpiod_flags: parsed 'gpio' property of node '/host-vbus-regulator[0]' - status (0) [ 1.587524] vcc_host_vbus: 5000 mV [ 1.587898] reg-fixed-voltage host-vbus-regulator: vcc_host_vbus supplying 5000000uV [ 1.588216] of_get_named_gpiod_flags: parsed 'gpio' property of node '/otg-vbus-regulator[0]' - status (0) [ 1.588287] vcc_otg_vbus: 5000 mV [ 1.588662] reg-fixed-voltage otg-vbus-regulator: vcc_otg_vbus supplying 5000000uV [ 1.588755] of_get_named_gpiod_flags: can't parse 'gpio' property of node '/vcc-phy-regulator[0]' [ 1.588792] vcc_phy: no parameters [ 1.589093] reg-fixed-voltage vcc-phy-regulator: vcc_phy supplying 0uV [ 1.589331] of_get_named_gpiod_flags: parsed 'gpio' property of node '/sdmmc-regulator[0]' - status (0) [ 1.589405] reg-fixed-voltage sdmmc-regulator: Looking up vin-supply from device tree [ 1.589433] vcc_sd: unable to resolve supply [ 1.589449] vcc_sd: 3300 mV [ 1.589700] reg-fixed-voltage sdmmc-regulator: Looking up vin-supply from device tree [ 1.589727] vcc_sd: regulator get failed, ret=-517 [ 1.590213] reg-fixed-voltage sdmmc-regulator: Looking up vin-supply from device tree [ 1.590235] vcc_sd: unable to resolve supply [ 1.590253] reg-fixed-voltage sdmmc-regulator: vcc_sd supplying 3300000uV [ 1.591232] iommu: Adding device ff350000.vpu_service to group 0 [ 1.591916] iommu: Adding device ff351000.avsd to group 1 [ 1.592520] iommu: Adding device ff360000.rkvdec to group 2 [ 1.593136] iommu: Adding device ff330000.h265e to group 3 [ 1.593750] iommu: Adding device ff340000.vepu to group 4 [ 1.594365] iommu: Adding device ff370000.vop to group 5 [ 1.595626] rk_iommu ff350800.iommu: can't get sclk [ 1.596644] rk_iommu ff360480.iommu: can't get sclk [ 1.597439] rk_iommu ff330200.iommu: can't get sclk [ 1.598225] rk_iommu ff340800.iommu: can't get sclk [ 1.598956] rk_iommu ff373f00.iommu: can't get sclk [ 1.600216] SCSI subsystem initialized [ 1.600910] libata version 3.00 loaded. [ 1.601324] usbcore: registered new interface driver usbfs [ 1.601948] usbcore: registered new interface driver hub [ 1.602601] usbcore: registered new device driver usb [ 1.603336] media: Linux media interface: v0.10 [ 1.603843] Linux video capture interface: v2.00 [ 1.604561] pps_core: LinuxPPS API ver. 1 registered [ 1.605044] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it> [ 1.605941] PTP clock support registered [ 1.608904] Advanced Linux Sound Architecture Driver Initialized. [ 1.610620] Bluetooth: Core ver 2.21 [ 1.611039] NET: Registered protocol family 31 [ 1.611524] Bluetooth: HCI device and connection manager initialized [ 1.612132] Bluetooth: HCI socket layer initialized [ 1.612611] Bluetooth: L2CAP socket layer initialized [ 1.613127] Bluetooth: SCO socket layer initialized [ 1.614406] NetLabel: Initializing [ 1.614755] NetLabel: domain hash size = 128 [ 1.615178] NetLabel: protocols = UNLABELED CIPSOv4 [ 1.615790] NetLabel: unlabeled traffic allowed by default [ 1.616902] rockchip-cpuinfo cpuinfo: Serial : 7425f594690310f2 [ 1.618750] clocksource: Switched to clocksource arch_sys_counter [ 1.765565] NET: Registered protocol family 2 [ 1.766976] TCP established hash table entries: 32768 (order: 6, 262144 bytes) [ 1.768110] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes) [ 1.770160] TCP: Hash tables configured (established 32768 bind 32768) [ 1.771048] UDP hash table entries: 2048 (order: 5, 196608 bytes) [ 1.771899] UDP-Lite hash table entries: 2048 (order: 5, 196608 bytes) [ 1.773147] NET: Registered protocol family 1 [ 1.774185] RPC: Registered named UNIX socket transport module. [ 1.774828] RPC: Registered udp transport module. [ 1.775289] RPC: Registered tcp transport module. [ 1.775747] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 1.776661] PCI: CLS 0 bytes, default 64 [ 1.777455] Trying to unpack rootfs image as initramfs... [ 2.362401] Freeing initrd memory: 6644K [ 2.364068] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available [ 2.366935] kvm [1]: 8-bit VMID [ 2.367259] kvm [1]: Hyp mode initialized successfully [ 2.368312] kvm [1]: interrupt-controller@ff814000 IRQ44 [ 2.369232] kvm [1]: timer IRQ3 [ 2.374513] audit: initializing netlink subsys (disabled) [ 2.375182] audit: type=2000 audit(2.292:1): initialized [ 2.376427] Initialise system trusted keyring [ 2.377596] HugeTLB registered 2 MB page size, pre-allocated 0 pages [ 2.395401] VFS: Disk quotas dquot_6.6.0 [ 2.396123] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes) [ 2.400332] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 2.403615] NFS: Registering the id_resolver key type [ 2.404160] Key type id_resolver registered [ 2.404574] Key type id_legacy registered [ 2.404984] Installing knfsd (copyright (C) 1996 okir@monad.swb.de). [ 2.407018] fuse init (API version 7.23) [ 2.409016] JFS: nTxBlock = 8192, nTxLock = 65536 [ 2.418898] SGI XFS with ACLs, security attributes, realtime, no debug enabled [ 2.424624] Key type big_key registered [ 2.425183] TEE Core Framework initialization (ver 1:0.1) [ 2.425884] TEE armv7 Driver initialization [ 2.426946] tz_tee_probe: name="armv7sec", id=0, pdev_name="armv7sec.0" [ 2.427578] TEE core: Alloc the misc device "opteearmtz00" (id=0) [ 2.428537] TEE Core: Register the misc device "opteearmtz00" (id=0,minor=62) [ 2.435672] NET: Registered protocol family 38 [ 2.436179] Key type asymmetric registered [ 2.436595] Asymmetric key parser 'x509' registered [ 2.437490] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 244) [ 2.438454] io scheduler noop registered [ 2.438900] io scheduler deadline registered (default) [ 2.439485] io scheduler cfq registered [ 2.441511] phy phy-ff450000.syscon:usb2-phy@100.0: Looking up phy-supply from device tree [ 2.441534] phy phy-ff450000.syscon:usb2-phy@100.0: Looking up phy-supply property in node /syscon@ff450000/usb2-phy@100/host-port failed [ 2.442108] phy phy-ff450000.syscon:usb2-phy@100.1: Looking up phy-supply from device tree [ 2.442132] phy phy-ff450000.syscon:usb2-phy@100.1: Looking up phy-supply property in node /syscon@ff450000/usb2-phy@100/otg-port failed [ 2.442577] phy phy-ff450000.syscon:usb2-phy@100.1: Looking up vbus-supply from device tree [ 2.444779] rockchip-u3phy ff470000.usb3-phy: Looking up vbus-supply from device tree [ 2.445490] phy phy-ff470000.usb3-phy.2: Looking up phy-supply from device tree [ 2.445513] phy phy-ff470000.usb3-phy.2: Looking up phy-supply property in node /usb3-phy@ff470000/utmi@ff470000 failed [ 2.446014] phy phy-ff470000.usb3-phy.3: Looking up phy-supply from device tree [ 2.446035] phy phy-ff470000.usb3-phy.3: Looking up phy-supply property in node /usb3-phy@ff470000/pipe@ff478000 failed [ 2.447838] rockchip-u3phy ff470000.usb3-phy: Rockchip u3phy initialized successfully [ 2.449517] phy phy-ff430000.hdmiphy.4: Looking up phy-supply from device tree [ 2.449539] phy phy-ff430000.hdmiphy.4: Looking up phy-supply property in node /hdmiphy@ff430000 failed [ 2.453706] Module initialized. [ 2.454413] rk-vcodec vpu_combo: Looking up vcodec-supply from device tree [ 2.454435] rk-vcodec vpu_combo: Looking up vcodec-supply property in node /vpu_combo failed [ 2.454464] rk-vcodec vpu_combo: no regulator for vcodec [ 2.455332] rk-vcodec vpu_combo: failed on clk_get clk_cabac [ 2.455900] rk-vcodec vpu_combo: failed on clk_get clk_core [ 2.456532] platform ff350000.vpu_service: probe device [ 2.457476] platform ff350000.vpu_service: drm allocator with mmu enabled [ 2.459249] platform ff351000.avsd: probe device [ 2.460203] platform ff351000.avsd: drm allocator with mmu enabled [ 2.463064] rk-vcodec vpu_combo: could not find power_model node [ 2.463668] rk-vcodec vpu_combo: init success [ 2.464472] rk-vcodec ff360000.rkvdec: Looking up vcodec-supply from device tree [ 2.464494] rk-vcodec ff360000.rkvdec: Looking up vcodec-supply property in node /rkvdec@ff36000 failed [ 2.464526] rk-vcodec ff360000.rkvdec: no regulator for vcodec [ 2.465151] rk-vcodec ff360000.rkvdec: parent devfreq is disabled [ 2.466365] rk-vcodec ff360000.rkvdec: probe device [ 2.467507] rk-vcodec ff360000.rkvdec: drm allocator with mmu enabled [ 2.469124] rk-vcodec ff360000.rkvdec: init success [ 2.470705] probe device ff330000.h265e [ 2.471604] mpp_dev ff330000.h265e: try to get iommu dev ffffffc0f5059810 [ 2.472791] mpp_dev ff330000.h265e: resource ready, register device [ 2.473952] probe device ff340000.vepu [ 2.474796] mpp_dev ff340000.vepu: try to get iommu dev ffffffc0f505a010 [ 2.475884] mpp_dev ff340000.vepu: resource ready, register device [ 2.480471] dma-pl330 ff1f0000.dmac: Loaded driver for PL330 DMAC-241330 [ 2.481133] dma-pl330 ff1f0000.dmac: DBUFF-128x8bytes Num_Chans-8 Num_Peri-20 Num_Events-16 [ 2.484172] Serial: 8250/16550 driver, 5 ports, IRQ sharing disabled [ 2.486547] [drm] Initialized drm 1.1.0 20060810 [ 2.492277] [drm] Rockchip DRM driver version: v1.0.1 [ 2.493073] rockchip-drm display-subsystem: devfreq is not set [ 2.494464] rockchip-drm display-subsystem: bound ff370000.vop (ops 0xffffff8008d88bd0) [ 2.495784] i2c i2c-4: of_i2c: modalias failure on /hdmi@ff3c0000/ports [ 2.496427] dwhdmi-rockchip ff3c0000.hdmi: registered DesignWare HDMI I2C bus driver [ 2.497319] dwhdmi-rockchip ff3c0000.hdmi: Detected HDMI TX controller v2.11a with HDCP (inno_dw_hdmi_phy2) [ 2.499725] rockchip-drm display-subsystem: bound ff3c0000.hdmi (ops 0xffffff8008d7d500) [ 2.500526] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 2.501156] [drm] No driver support for vblank timestamp query. [ 2.501839] rockchip-drm display-subsystem: failed to parse display resources [ 3.131755] rockchip-vop ff370000.vop: [drm:vop_crtc_enable] Update mode to 4096x2160p24, type: 11 [ 3.473457] Console: switching to colour frame buffer device 512x135 [ 3.767299] rockchip-drm display-subsystem: fb0: frame buffer device [ 3.781583] usbcore: registered new interface driver udl [ 3.786243] Registered IR keymap rc-cec [ 3.787216] rc rc0: RC for dw_hdmi as /devices/platform/ff3c0000.hdmi/rc/rc0 [ 3.789010] input: RC for dw_hdmi as /devices/platform/ff3c0000.hdmi/rc/rc0/input0 [ 3.790953] Unable to detect cache hierarchy for CPU 0 [ 3.793780] brd: module loaded [ 3.809056] loop: module loaded [ 3.810229] lkdtm: No crash points registered, enable through debugfs [ 3.817141] rk_gmac-dwmac ff550000.ethernet: Looking up phy-supply from device tree [ 3.817373] rk_gmac-dwmac ff550000.ethernet: clock input or output? (output). [ 3.818390] rk_gmac-dwmac ff550000.ethernet: Can not read property: tx_delay. [ 3.819465] rk_gmac-dwmac ff550000.ethernet: set tx_delay to 0x30 [ 3.820291] rk_gmac-dwmac ff550000.ethernet: Can not read property: rx_delay. [ 3.821275] rk_gmac-dwmac ff550000.ethernet: set rx_delay to 0x10 [ 3.822188] rk_gmac-dwmac ff550000.ethernet: integrated PHY? (yes). [ 3.823371] rk_gmac-dwmac ff550000.ethernet: cannot get clock clk_mac_refout [ 3.824357] rk_gmac-dwmac ff550000.ethernet: cannot get clock clk_mac_speed [ 3.830446] rk_gmac-dwmac ff550000.ethernet: init for RMII [ 3.867003] stmmac - user ID: 0x10, Synopsys ID: 0x35 [ 3.867713] Ring mode enabled [ 3.868153] DMA HW capability register supported [ 3.868778] Normal descriptors [ 3.869279] RX Checksum Offload Engine supported (type 2) [ 3.870030] TX Checksum insertion supported [ 3.870616] Wake-Up On Lan supported [ 3.871291] Enable RX Mitigation via HW Watchdog Timer [ 3.872269] of_get_named_gpiod_flags: can't parse 'snps,reset-gpio' property of node '/ethernet@ff550000[0]' [ 4.409575] libphy: stmmac: probed [ 4.410112] eth%d: PHY ID 1234d400 at 0 IRQ POLL (stmmac-1:00) active [ 4.411058] eth%d: PHY ID 00000000 at 1 IRQ POLL (stmmac-1:01) [ 4.411872] eth%d: PHY ID 00000000 at 2 IRQ POLL (stmmac-1:02) [ 4.412676] eth%d: PHY ID 00000000 at 3 IRQ POLL (stmmac-1:03) [ 4.413486] eth%d: PHY ID 00000000 at 4 IRQ POLL (stmmac-1:04) [ 4.414305] eth%d: PHY ID 00000000 at 5 IRQ POLL (stmmac-1:05) [ 4.415148] eth%d: PHY ID 00000000 at 6 IRQ POLL (stmmac-1:06) [ 4.415942] eth%d: PHY ID 00000000 at 7 IRQ POLL (stmmac-1:07) [ 4.416750] eth%d: PHY ID 00000000 at 8 IRQ POLL (stmmac-1:08) [ 4.417557] eth%d: PHY ID 00000000 at 9 IRQ POLL (stmmac-1:09) [ 4.418354] eth%d: PHY ID 00000000 at 10 IRQ POLL (stmmac-1:0a) [ 4.419182] eth%d: PHY ID 00000000 at 11 IRQ POLL (stmmac-1:0b) [ 4.419993] eth%d: PHY ID 00000000 at 12 IRQ POLL (stmmac-1:0c) [ 4.420812] eth%d: PHY ID 00000000 at 13 IRQ POLL (stmmac-1:0d) [ 4.421627] eth%d: PHY ID 00000000 at 14 IRQ POLL (stmmac-1:0e) [ 4.422445] eth%d: PHY ID 00000000 at 15 IRQ POLL (stmmac-1:0f) [ 4.423279] eth%d: PHY ID 00000000 at 16 IRQ POLL (stmmac-1:10) [ 4.424093] eth%d: PHY ID 00000000 at 17 IRQ POLL (stmmac-1:11) [ 4.424909] eth%d: PHY ID 00000000 at 18 IRQ POLL (stmmac-1:12) [ 4.425716] eth%d: PHY ID 00000000 at 19 IRQ POLL (stmmac-1:13) [ 4.426480] eth%d: PHY ID 00000000 at 20 IRQ POLL (stmmac-1:14) [ 4.427258] eth%d: PHY ID 00000000 at 21 IRQ POLL (stmmac-1:15) [ 4.428023] eth%d: PHY ID 00000000 at 22 IRQ POLL (stmmac-1:16) [ 4.428849] eth%d: PHY ID 00000000 at 23 IRQ POLL (stmmac-1:17) [ 4.429664] eth%d: PHY ID 00000000 at 24 IRQ POLL (stmmac-1:18) [ 4.430475] eth%d: PHY ID 00000000 at 25 IRQ POLL (stmmac-1:19) [ 4.431328] eth%d: PHY ID 00000000 at 26 IRQ POLL (stmmac-1:1a) [ 4.432143] eth%d: PHY ID 00000000 at 27 IRQ POLL (stmmac-1:1b) [ 4.432957] eth%d: PHY ID 00000000 at 28 IRQ POLL (stmmac-1:1c) [ 4.433769] eth%d: PHY ID 00000000 at 29 IRQ POLL (stmmac-1:1d) [ 4.434582] eth%d: PHY ID 00000000 at 30 IRQ POLL (stmmac-1:1e) [ 4.435409] eth%d: PHY ID 00000000 at 31 IRQ POLL (stmmac-1:1f) [ 4.438819] Rockchip WiFi SYS interface (V1.00) ... [ 4.439782] usbcore: registered new interface driver cdc_ether [ 4.440676] usbcore: registered new interface driver rndis_host [ 4.444687] phy phy-ff470000.usb3-phy.2: u3phy u2 power on [ 4.445555] phy phy-ff470000.usb3-phy.3: u3phy u3 power on [ 4.448268] dwc2 ff580000.usb: Looking up vusb_d-supply from device tree [ 4.448303] dwc2 ff580000.usb: Looking up vusb_d-supply property in node /usb@ff580000 failed [ 4.448332] ff580000.usb supply vusb_d not found, using dummy regulator [ 4.449364] dwc2 ff580000.usb: Looking up vusb_a-supply from device tree [ 4.449382] dwc2 ff580000.usb: Looking up vusb_a-supply property in node /usb@ff580000 failed [ 4.449399] ff580000.usb supply vusb_a not found, using dummy regulator [ 4.646843] dwc2 ff580000.usb: EPs: 10, dedicated fifos, 972 entries in SPRAM [ 4.648841] dwc2 ff580000.usb: DWC OTG Controller [ 4.649573] dwc2 ff580000.usb: new USB bus registered, assigned bus number 1 [ 4.650629] dwc2 ff580000.usb: irq 41, io mem 0xff580000 [ 4.651762] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 [ 4.652699] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 4.653688] usb usb1: Product: DWC OTG Controller [ 4.654339] usb usb1: Manufacturer: Linux 4.4.213-station dwc2_hsotg [ 4.655258] usb usb1: SerialNumber: ff580000.usb [ 4.657227] hub 1-0:1.0: USB hub found [ 4.657808] hub 1-0:1.0: 1 port detected [ 5.298899] phy phy-ff450000.syscon:usb2-phy@100.1: charger = USB_FLOATING_CHARGER [ 5.301114] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver [ 5.301984] ehci-pci: EHCI PCI platform driver [ 5.302726] ehci-platform: EHCI generic platform driver [ 5.306603] ehci-platform ff5c0000.usb: EHCI Host Controller [ 5.307948] ehci-platform ff5c0000.usb: new USB bus registered, assigned bus number 2 [ 5.309266] ehci-platform ff5c0000.usb: irq 42, io mem 0xff5c0000 [ 5.318833] ehci-platform ff5c0000.usb: USB 2.0 started, EHCI 1.00 [ 5.320041] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002 [ 5.320995] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 5.321999] usb usb2: Product: EHCI Host Controller [ 5.322672] usb usb2: Manufacturer: Linux 4.4.213-station ehci_hcd [ 5.323561] usb usb2: SerialNumber: ff5c0000.usb [ 5.325467] hub 2-0:1.0: USB hub found [ 5.326062] hub 2-0:1.0: 1 port detected [ 5.327786] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver [ 5.328715] ohci-platform: OHCI generic platform driver [ 5.330298] ohci-platform ff5d0000.usb: Generic Platform OHCI controller [ 5.331837] ohci-platform ff5d0000.usb: new USB bus registered, assigned bus number 3 [ 5.333172] ohci-platform ff5d0000.usb: irq 43, io mem 0xff5d0000 [ 5.391126] usb usb3: New USB device found, idVendor=1d6b, idProduct=0001 [ 5.392051] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 5.393060] usb usb3: Product: Generic Platform OHCI controller [ 5.393883] usb usb3: Manufacturer: Linux 4.4.213-station ohci_hcd [ 5.394774] usb usb3: SerialNumber: ff5d0000.usb [ 5.396689] hub 3-0:1.0: USB hub found [ 5.397280] hub 3-0:1.0: 1 port detected [ 5.400059] xhci-hcd xhci-hcd.10.auto: xHCI Host Controller [ 5.401376] xhci-hcd xhci-hcd.10.auto: new USB bus registered, assigned bus number 4 [ 5.402857] xhci-hcd xhci-hcd.10.auto: hcc params 0x0220fe64 hci version 0x110 quirks 0x00210010 [ 5.404152] xhci-hcd xhci-hcd.10.auto: irq 183, io mem 0xff600000 [ 5.405476] usb usb4: New USB device found, idVendor=1d6b, idProduct=0002 [ 5.431859] usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 5.458294] usb usb4: Product: xHCI Host Controller [ 5.484080] usb usb4: Manufacturer: Linux 4.4.213-station xhci-hcd [ 5.510182] usb usb4: SerialNumber: xhci-hcd.10.auto [ 5.537438] hub 4-0:1.0: USB hub found [ 5.563502] hub 4-0:1.0: 1 port detected [ 5.591044] xhci-hcd xhci-hcd.10.auto: xHCI Host Controller [ 5.617436] xhci-hcd xhci-hcd.10.auto: new USB bus registered, assigned bus number 5 [ 5.643081] usb 2-1: new high-speed USB device number 2 using ehci-platform [ 5.671214] usb usb5: We don't know the algorithms for LPM for this host, disabling LPM. [ 5.697933] usb usb5: New USB device found, idVendor=1d6b, idProduct=0003 [ 5.724049] usb usb5: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 5.750492] usb usb5: Product: xHCI Host Controller [ 5.776601] usb usb5: Manufacturer: Linux 4.4.213-station xhci-hcd [ 5.802725] usb usb5: SerialNumber: xhci-hcd.10.auto [ 5.830562] hub 5-0:1.0: USB hub found [ 5.856818] usb 2-1: New USB device found, idVendor=05e3, idProduct=0608 [ 5.856865] hub 5-0:1.0: 1 port detected [ 5.858166] usbcore: registered new interface driver usb-storage [ 5.858414] usbcore: registered new interface driver usbserial [ 5.858486] usbcore: registered new interface driver usbserial_generic [ 5.858534] usbserial: USB Serial support registered for generic [ 5.861065] usbcore: registered new interface driver iforce [ 5.861231] usbcore: registered new interface driver xpad [ 5.862077] usbcore: registered new interface driver usbtouchscreen [ 5.862931] .. rk pwm remotectl v1.1 init [ 5.864002] input: ff1b0030.pwm as /devices/platform/ff1b0030.pwm/input/input1 [ 5.867004] i2c /dev entries driver [ 5.871157] rk808 1-0018: Pmic Chip id: 0x8050 [ 5.872323] rk808 1-0018: source: on=0x40, off=0x00 [ 5.879639] rk808 1-0018: Looking up vcc1-supply from device tree [ 5.879662] rk808 1-0018: Looking up vcc1-supply property in node /i2c@ff160000/rk805@18 failed [ 5.882326] vdd_logic: 712 <--> 1450 mV at 1100 mV [ 5.882856] rk808 1-0018: Looking up vcc1-supply from device tree [ 5.882871] rk808 1-0018: Looking up vcc1-supply property in node /i2c@ff160000/rk805@18 failed [ 5.883063] reg-fixed-voltage sdmmc-regulator: Looking up vin-supply from device tree [ 5.883134] vcc_sd: unable to resolve supply [ 5.883142] rk808 1-0018: Looking up vcc1-supply from device tree [ 5.883157] rk808 1-0018: Looking up vcc1-supply property in node /i2c@ff160000/rk805@18 failed [ 5.883191] rk808 1-0018: Looking up vcc2-supply from device tree [ 5.883203] rk808 1-0018: Looking up vcc2-supply property in node /i2c@ff160000/rk805@18 failed [ 5.885294] vdd_arm: 712 <--> 1450 mV at 1100 mV [ 5.885627] rk808 1-0018: Looking up vcc2-supply from device tree [ 5.885640] rk808 1-0018: Looking up vcc2-supply property in node /i2c@ff160000/rk805@18 failed [ 5.885734] reg-fixed-voltage sdmmc-regulator: Looking up vin-supply from device tree [ 5.885772] vcc_sd: unable to resolve supply [ 5.885781] rk808 1-0018: Looking up vcc1-supply from device tree [ 5.885791] rk808 1-0018: Looking up vcc1-supply property in node /i2c@ff160000/rk805@18 failed [ 5.885806] rk808 1-0018: Looking up vcc2-supply from device tree [ 5.885816] rk808 1-0018: Looking up vcc2-supply property in node /i2c@ff160000/rk805@18 failed [ 5.885844] rk808 1-0018: Looking up vcc3-supply from device tree [ 5.885855] rk808 1-0018: Looking up vcc3-supply property in node /i2c@ff160000/rk805@18 failed [ 5.887148] vcc_ddr: no parameters [ 5.887555] rk808 1-0018: Looking up vcc3-supply from device tree [ 5.887569] rk808 1-0018: Looking up vcc3-supply property in node /i2c@ff160000/rk805@18 failed [ 5.887679] reg-fixed-voltage sdmmc-regulator: Looking up vin-supply from device tree [ 5.887716] vcc_sd: unable to resolve supply [ 5.887724] rk808 1-0018: Looking up vcc1-supply from device tree [ 5.887735] rk808 1-0018: Looking up vcc1-supply property in node /i2c@ff160000/rk805@18 failed [ 5.887753] rk808 1-0018: Looking up vcc2-supply from device tree [ 5.887764] rk808 1-0018: Looking up vcc2-supply property in node /i2c@ff160000/rk805@18 failed [ 5.887778] rk808 1-0018: Looking up vcc3-supply from device tree [ 5.887789] rk808 1-0018: Looking up vcc3-supply property in node /i2c@ff160000/rk805@18 failed [ 5.887816] rk808 1-0018: Looking up vcc4-supply from device tree [ 5.887827] rk808 1-0018: Looking up vcc4-supply property in node /i2c@ff160000/rk805@18 failed [ 5.889095] vcc_io: 3300 mV [ 5.889496] rk808 1-0018: Looking up vcc4-supply from device tree [ 5.889512] rk808 1-0018: Looking up vcc4-supply property in node /i2c@ff160000/rk805@18 failed [ 5.889686] reg-fixed-voltage sdmmc-regulator: Looking up vin-supply from device tree [ 5.889728] rk808 1-0018: Looking up vcc4-supply from device tree [ 5.889739] rk808 1-0018: Looking up vcc4-supply property in node /i2c@ff160000/rk805@18 failed [ 5.889752] vcc_sd: supplied by vcc_io [ 5.889826] rk808 1-0018: Looking up vcc1-supply from device tree [ 5.889838] rk808 1-0018: Looking up vcc1-supply property in node /i2c@ff160000/rk805@18 failed [ 5.889854] rk808 1-0018: Looking up vcc2-supply from device tree [ 5.889865] rk808 1-0018: Looking up vcc2-supply property in node /i2c@ff160000/rk805@18 failed [ 5.889880] rk808 1-0018: Looking up vcc3-supply from device tree [ 5.889891] rk808 1-0018: Looking up vcc3-supply property in node /i2c@ff160000/rk805@18 failed [ 5.889906] rk808 1-0018: Looking up vcc4-supply from device tree [ 5.889918] rk808 1-0018: Looking up vcc4-supply property in node /i2c@ff160000/rk805@18 failed [ 5.889946] rk808 1-0018: Looking up vcc5-supply from device tree [ 5.889956] rk808 1-0018: Looking up vcc5-supply property in node /i2c@ff160000/rk805@18 failed [ 5.891857] vdd_18: 1800 mV [ 5.892250] rk808 1-0018: Looking up vcc5-supply from device tree [ 5.892268] rk808 1-0018: Looking up vcc5-supply property in node /i2c@ff160000/rk805@18 failed [ 5.892941] rk808 1-0018: Looking up vcc1-supply from device tree [ 5.892955] rk808 1-0018: Looking up vcc1-supply property in node /i2c@ff160000/rk805@18 failed [ 5.892973] rk808 1-0018: Looking up vcc2-supply from device tree [ 5.892985] rk808 1-0018: Looking up vcc2-supply property in node /i2c@ff160000/rk805@18 failed [ 5.893000] rk808 1-0018: Looking up vcc3-supply from device tree [ 5.893011] rk808 1-0018: Looking up vcc3-supply property in node /i2c@ff160000/rk805@18 failed [ 5.893026] rk808 1-0018: Looking up vcc4-supply from device tree [ 5.893038] rk808 1-0018: Looking up vcc4-supply property in node /i2c@ff160000/rk805@18 failed [ 5.893054] rk808 1-0018: Looking up vcc5-supply from device tree [ 5.893064] rk808 1-0018: Looking up vcc5-supply property in node /i2c@ff160000/rk805@18 failed [ 5.893101] rk808 1-0018: Looking up vcc5-supply from device tree [ 5.893111] rk808 1-0018: Looking up vcc5-supply property in node /i2c@ff160000/rk805@18 failed [ 5.895001] vcc_18emmc: 1800 mV [ 5.895416] rk808 1-0018: Looking up vcc5-supply from device tree [ 5.895428] rk808 1-0018: Looking up vcc5-supply property in node /i2c@ff160000/rk805@18 failed [ 5.896056] rk808 1-0018: Looking up vcc1-supply from device tree [ 5.896068] rk808 1-0018: Looking up vcc1-supply property in node /i2c@ff160000/rk805@18 failed [ 5.896086] rk808 1-0018: Looking up vcc2-supply from device tree [ 5.896097] rk808 1-0018: Looking up vcc2-supply property in node /i2c@ff160000/rk805@18 failed [ 5.896113] rk808 1-0018: Looking up vcc3-supply from device tree [ 5.896124] rk808 1-0018: Looking up vcc3-supply property in node /i2c@ff160000/rk805@18 failed [ 5.896146] rk808 1-0018: Looking up vcc4-supply from device tree [ 5.896159] rk808 1-0018: Looking up vcc4-supply property in node /i2c@ff160000/rk805@18 failed [ 5.896175] rk808 1-0018: Looking up vcc5-supply from device tree [ 5.896186] rk808 1-0018: Looking up vcc5-supply property in node /i2c@ff160000/rk805@18 failed [ 5.896202] rk808 1-0018: Looking up vcc5-supply from device tree [ 5.896212] rk808 1-0018: Looking up vcc5-supply property in node /i2c@ff160000/rk805@18 failed [ 5.896242] rk808 1-0018: Looking up vcc6-supply from device tree [ 5.896253] rk808 1-0018: Looking up vcc6-supply property in node /i2c@ff160000/rk805@18 failed [ 5.896751] vdd_11: Bringing 1000000uV into 1100000-1100000uV [ 5.897586] vdd_11: ramp_delay not set [ 5.898937] vdd_11: 1100 mV [ 5.899338] rk808 1-0018: Looking up vcc6-supply from device tree [ 5.899351] rk808 1-0018: Looking up vcc6-supply property in node /i2c@ff160000/rk805@18 failed [ 5.900013] rk808 1-0018: Looking up vcc1-supply from device tree [ 5.900029] rk808 1-0018: Looking up vcc1-supply property in node /i2c@ff160000/rk805@18 failed [ 5.900046] rk808 1-0018: Looking up vcc2-supply from device tree [ 5.900057] rk808 1-0018: Looking up vcc2-supply property in node /i2c@ff160000/rk805@18 failed [ 5.900074] rk808 1-0018: Looking up vcc3-supply from device tree [ 5.900085] rk808 1-0018: Looking up vcc3-supply property in node /i2c@ff160000/rk805@18 failed [ 5.900101] rk808 1-0018: Looking up vcc4-supply from device tree [ 5.900113] rk808 1-0018: Looking up vcc4-supply property in node /i2c@ff160000/rk805@18 failed [ 5.900129] rk808 1-0018: Looking up vcc5-supply from device tree [ 5.900140] rk808 1-0018: Looking up vcc5-supply property in node /i2c@ff160000/rk805@18 failed [ 5.900157] rk808 1-0018: Looking up vcc5-supply from device tree [ 5.900168] rk808 1-0018: Looking up vcc5-supply property in node /i2c@ff160000/rk805@18 failed [ 5.900185] rk808 1-0018: Looking up vcc6-supply from device tree [ 5.900196] rk808 1-0018: Looking up vcc6-supply property in node /i2c@ff160000/rk805@18 failed [ 5.900215] rk808 1-0018: register rk8050 regulators [ 5.900585] gpiochip_find_base: found new base at 510 [ 5.900795] gpiochip_add_data: registered GPIOs 510 to 511 on device: rk8xx-gpio [ 5.900805] rk8xx-gpio rk8xx-gpio: register rk8050 gpio successful [ 5.901251] rk8xx-pwrkey rk8xx-pwrkey: device is disabled [ 5.901281] rk8xx-pwrkey: probe of rk8xx-pwrkey failed with error -22 [ 5.901604] rk808-rtc rk808-rtc: device is disabled [ 5.901618] rk808-rtc: probe of rk808-rtc failed with error -22 [ 5.901741] rk3x-i2c ff160000.i2c: Initialized RK3xxx I2C bus at ffffff800c266000 [ 5.904490] IR NEC protocol handler initialized [ 5.904504] IR RC5(x/sz) protocol handler initialized [ 5.904516] IR RC6 protocol handler initialized [ 5.904526] IR JVC protocol handler initialized [ 5.904537] IR Sony protocol handler initialized [ 5.904550] IR SANYO protocol handler initialized [ 5.904565] IR Sharp protocol handler initialized [ 5.904577] IR MCE Keyboard/mouse protocol handler initialized [ 5.904587] IR XMP protocol handler initialized [ 5.906436] usbcore: registered new interface driver uvcvideo [ 5.906444] USB Video Class driver (1.1.1) [ 5.907300] rockchip-iodomain ff100000.syscon:io-domains: Looking up vccio1-supply from device tree [ 5.907388] rk808 1-0018: Looking up vcc4-supply from device tree [ 5.907407] rk808 1-0018: Looking up vcc4-supply property in node /i2c@ff160000/rk805@18 failed [ 5.907574] rockchip-iodomain ff100000.syscon:io-domains: Looking up vccio2-supply from device tree [ 5.907612] rk808 1-0018: Looking up vcc5-supply from device tree [ 5.907623] rk808 1-0018: Looking up vcc5-supply property in node /i2c@ff160000/rk805@18 failed [ 5.908370] rockchip-iodomain ff100000.syscon:io-domains: Looking up vccio3-supply from device tree [ 5.908408] rk808 1-0018: Looking up vcc4-supply from device tree [ 5.908419] rk808 1-0018: Looking up vcc4-supply property in node /i2c@ff160000/rk805@18 failed [ 5.908613] rockchip-iodomain ff100000.syscon:io-domains: Looking up vccio4-supply from device tree [ 5.908644] rk808 1-0018: Looking up vcc5-supply from device tree [ 5.908657] rk808 1-0018: Looking up vcc5-supply property in node /i2c@ff160000/rk805@18 failed [ 5.909258] rockchip-iodomain ff100000.syscon:io-domains: Looking up vccio5-supply from device tree [ 5.909284] rk808 1-0018: Looking up vcc4-supply from device tree [ 5.909295] rk808 1-0018: Looking up vcc4-supply property in node /i2c@ff160000/rk805@18 failed [ 5.909383] rockchip-iodomain ff100000.syscon:io-domains: Looking up vccio6-supply from device tree [ 5.909410] rk808 1-0018: Looking up vcc4-supply from device tree [ 5.909420] rk808 1-0018: Looking up vcc4-supply property in node /i2c@ff160000/rk805@18 failed [ 5.909588] rockchip-iodomain ff100000.syscon:io-domains: Looking up pmuio-supply from device tree [ 5.909617] rk808 1-0018: Looking up vcc4-supply from device tree [ 5.909629] rk808 1-0018: Looking up vcc4-supply property in node /i2c@ff160000/rk805@18 failed [ 5.913529] rockchip-thermal ff250000.tsadc: Missing tshut mode property, using default (cru) [ 5.913549] rockchip-thermal ff250000.tsadc: Missing tshut-polarity property, using default (low) [ 5.914131] rockchip-thermal ff250000.tsadc: tsadc is probed successfully! [ 5.916596] device-mapper: ioctl: 4.34.0-ioctl (2015-10-28) initialised: dm-devel@redhat.com [ 5.916621] Bluetooth: Virtual HCI driver ver 1.5 [ 5.916873] Bluetooth: HCI UART driver ver 2.3 [ 5.916881] Bluetooth: HCI UART protocol H4 registered [ 5.916888] Bluetooth: HCI UART protocol BCSP registered [ 5.916893] Bluetooth: HCI UART protocol LL registered [ 5.916897] Bluetooth: HCI UART protocol ATH3K registered [ 5.916902] Bluetooth: HCI UART protocol Three-wire (H5) registered [ 5.917220] Bluetooth: HCI UART protocol Intel registered [ 5.917401] Bluetooth: HCI UART protocol BCM registered [ 5.917412] Bluetooth: HCI UART protocol QCA registered [ 5.917588] usbcore: registered new interface driver bfusb [ 5.917732] usbcore: registered new interface driver btusb [ 5.918251] cpu cpu0: leakage=12 [ 5.918273] cpu cpu0: leakage-volt-sel=1 [ 5.918354] cpu cpu0: Looking up cpu-supply from device tree [ 5.918398] rk808 1-0018: Looking up vcc2-supply from device tree [ 5.918416] rk808 1-0018: Looking up vcc2-supply property in node /i2c@ff160000/rk805@18 failed [ 5.918629] cpu cpu0: Failed to get pvtm [ 5.919654] cpu cpu0: Looking up cpu-supply from device tree [ 5.919687] rk808 1-0018: Looking up vcc2-supply from device tree [ 5.919701] rk808 1-0018: Looking up vcc2-supply property in node /i2c@ff160000/rk805@18 failed [ 5.919965] cpu cpu0: Looking up cpu-supply from device tree [ 5.919986] rk808 1-0018: Looking up vcc2-supply from device tree [ 5.919999] rk808 1-0018: Looking up vcc2-supply property in node /i2c@ff160000/rk805@18 failed [ 5.922864] sdhci: Secure Digital Host Controller Interface driver [ 5.922874] sdhci: Copyright(c) Pierre Ossman [ 5.922887] Synopsys Designware Multimedia Card Interface Driver [ 5.924949] dwmmc_rockchip ff500000.dwmmc: IDMAC supports 32-bit address mode. [ 5.925014] dwmmc_rockchip ff500000.dwmmc: Using internal DMA controller. [ 5.925039] dwmmc_rockchip ff500000.dwmmc: Version ID is 270a [ 5.925151] dwmmc_rockchip ff500000.dwmmc: DW MMC controller at irq 37,32 bit host data width,256 deep fifo [ 5.925207] dwmmc_rockchip ff500000.dwmmc: Looking up vmmc-supply from device tree [ 5.925464] dwmmc_rockchip ff500000.dwmmc: Looking up vqmmc-supply from device tree [ 5.925476] dwmmc_rockchip ff500000.dwmmc: Looking up vqmmc-supply property in node /dwmmc@ff500000 failed [ 5.925518] dwmmc_rockchip ff500000.dwmmc: No vqmmc regulator found [ 5.925558] dwmmc_rockchip ff500000.dwmmc: GPIO lookup for consumer cd [ 5.925565] dwmmc_rockchip ff500000.dwmmc: using device tree for GPIO lookup [ 5.925583] of_get_named_gpiod_flags: can't parse 'cd-gpios' property of node '/dwmmc@ff500000[0]' [ 5.925593] of_get_named_gpiod_flags: can't parse 'cd-gpio' property of node '/dwmmc@ff500000[0]' [ 5.925601] dwmmc_rockchip ff500000.dwmmc: using lookup tables for GPIO lookup [ 5.925611] dwmmc_rockchip ff500000.dwmmc: lookup for GPIO cd failed [ 5.925622] dwmmc_rockchip ff500000.dwmmc: GPIO lookup for consumer wp [ 5.925631] dwmmc_rockchip ff500000.dwmmc: using device tree for GPIO lookup [ 5.925639] of_get_named_gpiod_flags: can't parse 'wp-gpios' property of node '/dwmmc@ff500000[0]' [ 5.925648] of_get_named_gpiod_flags: can't parse 'wp-gpio' property of node '/dwmmc@ff500000[0]' [ 5.925656] dwmmc_rockchip ff500000.dwmmc: using lookup tables for GPIO lookup [ 5.925664] dwmmc_rockchip ff500000.dwmmc: lookup for GPIO wp failed [ 5.938876] mmc_host mmc0: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0) [ 5.956045] dwmmc_rockchip ff500000.dwmmc: 1 slots initialized [ 5.959335] dwmmc_rockchip ff510000.dwmmc: IDMAC supports 32-bit address mode. [ 5.959398] dwmmc_rockchip ff510000.dwmmc: Using internal DMA controller. [ 5.959417] dwmmc_rockchip ff510000.dwmmc: Version ID is 270a [ 5.960586] dwmmc_rockchip ff510000.dwmmc: DW MMC controller at irq 38,32 bit host data width,256 deep fifo [ 5.960634] dwmmc_rockchip ff510000.dwmmc: Looking up vmmc-supply from device tree [ 5.960642] dwmmc_rockchip ff510000.dwmmc: Looking up vmmc-supply property in node /dwmmc@ff510000 failed [ 5.962768] dwmmc_rockchip ff510000.dwmmc: Looking up vqmmc-supply from device tree [ 5.962775] dwmmc_rockchip ff510000.dwmmc: Looking up vqmmc-supply property in node /dwmmc@ff510000 failed [ 5.962789] dwmmc_rockchip ff510000.dwmmc: No vmmc regulator found [ 5.962798] dwmmc_rockchip ff510000.dwmmc: No vqmmc regulator found [ 5.962819] dwmmc_rockchip ff510000.dwmmc: GPIO lookup for consumer wp [ 5.962824] dwmmc_rockchip ff510000.dwmmc: using device tree for GPIO lookup [ 5.962837] of_get_named_gpiod_flags: can't parse 'wp-gpios' property of node '/dwmmc@ff510000[0]' [ 5.962843] of_get_named_gpiod_flags: can't parse 'wp-gpio' property of node '/dwmmc@ff510000[0]' [ 5.962848] dwmmc_rockchip ff510000.dwmmc: using lookup tables for GPIO lookup [ 5.962859] dwmmc_rockchip ff510000.dwmmc: lookup for GPIO wp failed [ 5.963193] platform sdio-pwrseq: GPIO lookup for consumer reset [ 5.963198] platform sdio-pwrseq: using device tree for GPIO lookup [ 5.963223] of_get_named_gpiod_flags: parsed 'reset-gpios' property of node '/sdio-pwrseq[0]' - status (0) [ 5.963290] dwmmc_rockchip ff510000.dwmmc: allocated mmc-pwrseq [ 5.970915] mmc_host mmc1: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0) [ 5.979471] mmc_host mmc0: Bus speed (slot 0) = 50000000Hz (slot req 50000000Hz, actual 50000000HZ div = 0) [ 5.979563] mmc0: new high speed SDHC card at address 0001 [ 5.980650] mmcblk0: mmc0:0001 GB1QT 29.8 GiB [ 5.982212] mmcblk0: p1 [ 6.002933] dwmmc_rockchip ff510000.dwmmc: 1 slots initialized [ 6.003965] dwmmc_rockchip ff520000.dwmmc: IDMAC supports 32-bit address mode. [ 6.004009] dwmmc_rockchip ff520000.dwmmc: Using internal DMA controller. [ 6.004023] dwmmc_rockchip ff520000.dwmmc: Version ID is 270a [ 6.004114] dwmmc_rockchip ff520000.dwmmc: DW MMC controller at irq 39,32 bit host data width,256 deep fifo [ 6.004170] dwmmc_rockchip ff520000.dwmmc: Looking up vmmc-supply from device tree [ 6.004176] dwmmc_rockchip ff520000.dwmmc: Looking up vmmc-supply property in node /dwmmc@ff520000 failed [ 6.004211] dwmmc_rockchip ff520000.dwmmc: Looking up vqmmc-supply from device tree [ 6.004217] dwmmc_rockchip ff520000.dwmmc: Looking up vqmmc-supply property in node /dwmmc@ff520000 failed [ 6.004230] dwmmc_rockchip ff520000.dwmmc: No vmmc regulator found [ 6.004234] dwmmc_rockchip ff520000.dwmmc: No vqmmc regulator found [ 6.004254] dwmmc_rockchip ff520000.dwmmc: GPIO lookup for consumer wp [ 6.004259] dwmmc_rockchip ff520000.dwmmc: using device tree for GPIO lookup [ 6.004266] of_get_named_gpiod_flags: can't parse 'wp-gpios' property of node '/dwmmc@ff520000[0]' [ 6.004270] of_get_named_gpiod_flags: can't parse 'wp-gpio' property of node '/dwmmc@ff520000[0]' [ 6.004274] dwmmc_rockchip ff520000.dwmmc: using lookup tables for GPIO lookup [ 6.004283] dwmmc_rockchip ff520000.dwmmc: lookup for GPIO wp failed [ 6.009317] dwmmc_rockchip ff510000.dwmmc: card claims to support voltages below defined range [ 6.015522] mmc1: error -84 whilst initialising SDIO card [ 6.030856] mmc_host mmc2: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0) [ 6.042853] mmc_host mmc1: Bus speed (slot 0) = 300000Hz (slot req 300000Hz, actual 300000HZ div = 0) [ 6.055115] dwmmc_rockchip ff520000.dwmmc: 1 slots initialized [ 6.056550] sdhci-pltfm: SDHCI platform and OF driver helper [ 6.059585] /leds/power-green: could not get #gpio-cells for /tsp@ff050000 [ 6.059596] of_get_named_gpiod_flags: can't parse 'gpios' property of node '/leds/power-green[0]' [ 6.059600] of_get_named_gpiod_flags: can't parse 'gpio' property of node '/leds/power-green[0]' [ 6.059624] leds-gpio: probe of leds failed with error -2 [ 6.059913] hidraw: raw HID events driver (C) Jiri Kosina [ 6.068007] usbcore: registered new interface driver usbhid [ 6.068010] usbhid: USB HID core driver [ 6.075130] usbcore: registered new interface driver snd-usb-audio [ 6.076392] dwmmc_rockchip ff510000.dwmmc: card claims to support voltages below defined range [ 6.078359] rk3328-codec ff410000.codec: spk_depop_time use default value. [ 6.084287] mmc1: error -84 whilst initialising SDIO card [ 6.088543] u32 classifier [ 6.088564] Netfilter messages via NETLINK v0.30. [ 6.088663] ip_set: protocol 6 [ 6.088840] Initializing XFRM netlink socket [ 6.089780] NET: Registered protocol family 10 [ 6.091279] bridge: automatic filtering via arp/ip/ip6tables has been deprecated. Update your scripts to load br_netfilter if you need this. [ 6.091337] Bridge firewalling registered [ 6.091576] Bluetooth: RFCOMM TTY layer initialized [ 6.091599] Bluetooth: RFCOMM socket layer initialized [ 6.091655] Bluetooth: RFCOMM ver 1.11 [ 6.091670] Bluetooth: HIDP (Human Interface Emulation) ver 1.2 [ 6.091679] Bluetooth: HIDP socket layer initialized [ 6.091798] 8021q: 802.1Q VLAN Support v1.8 [ 6.091836] [WLAN_RFKILL]: Enter rfkill_wlan_init [ 6.092381] [WLAN_RFKILL]: Enter rfkill_wlan_probe [ 6.092416] [WLAN_RFKILL]: wlan_platdata_parse_dt: wifi_chip_type = ssv6501 [ 6.092419] [WLAN_RFKILL]: wlan_platdata_parse_dt: enable wifi power control. [ 6.092421] [WLAN_RFKILL]: wlan_platdata_parse_dt: wifi power controled by gpio. [ 6.092427] of_get_named_gpiod_flags: can't parse 'WIFI,poweren_gpio' property of node '/wireless-wlan[0]' [ 6.092431] of_get_named_gpiod_flags: can't parse 'WIFI,vbat_gpio' property of node '/wireless-wlan[0]' [ 6.092435] of_get_named_gpiod_flags: can't parse 'WIFI,reset_gpio' property of node '/wireless-wlan[0]' [ 6.092445] /wireless-wlan: could not get #gpio-cells for /i2s@ff000000 [ 6.092449] of_get_named_gpiod_flags: can't parse 'WIFI,host_wake_irq' property of node '/wireless-wlan[0]' [ 6.092458] [WLAN_RFKILL]: wlan_platdata_parse_dt: The ref_wifi_clk not found ! [ 6.092461] [WLAN_RFKILL]: rfkill_wlan_probe: init gpio [ 6.092467] [WLAN_RFKILL]: Exit rfkill_wlan_probe [ 6.092553] [BT_RFKILL]: Enter rfkill_rk_init [ 6.093110] /wireless-bluetooth: could not get #gpio-cells for /pinctrl/emmc/emmc-cmd [ 6.093113] of_get_named_gpiod_flags: can't parse 'uart_rts_gpios' property of node '/wireless-bluetooth[0]' [ 6.093116] [BT_RFKILL]: bluetooth_platdata_parse_dt: uart_rts_gpios is no-in-use. [ 6.093120] of_get_named_gpiod_flags: can't parse 'BT,power_gpio' property of node '/wireless-bluetooth[0]' [ 6.093136] /wireless-bluetooth: could not get #gpio-cells for /pinctrl/emmc/emmc-cmd [ 6.093139] of_get_named_gpiod_flags: can't parse 'BT,reset_gpio' property of node '/wireless-bluetooth[0]' [ 6.093154] /wireless-bluetooth: could not get #gpio-cells for /pinctrl/emmc/emmc-cmd [ 6.093157] of_get_named_gpiod_flags: can't parse 'BT,wake_gpio' property of node '/wireless-bluetooth[0]' [ 6.093173] /wireless-bluetooth: could not get #gpio-cells for /pinctrl/emmc/emmc-cmd [ 6.093176] of_get_named_gpiod_flags: can't parse 'BT,wake_host_irq' property of node '/wireless-bluetooth[0]' [ 6.093185] /wireless-bluetooth: could not get #clock-cells for /tsp@ff050000 [ 6.093188] ERROR: could not get clock /wireless-bluetooth:ext_clock(0) [ 6.093191] [BT_RFKILL]: bluetooth_platdata_parse_dt: clk_get failed!!!. [ 6.093367] [BT_RFKILL]: bt shut off power [ 6.093371] [BT_RFKILL]: bt_default device registered. [ 6.093487] Key type dns_resolver registered [ 6.093510] Error: Driver 'ov4689' is already registered, aborting... [ 6.093518] Error: Driver 'ov7750' is already registered, aborting... [ 6.093526] Error: Driver 'ov13850' is already registered, aborting... [ 6.093535] Error: Driver 'sc031gs' is already registered, aborting... [ 6.095195] Registered cp15_barrier emulation handler [ 6.095233] Registered setend emulation handler [ 6.096436] registered taskstats version 1 [ 6.096456] Loading compiled-in X.509 certificates [ 6.096498] mmc2: MAN_BKOPS_EN bit is not set [ 6.099067] mmc_host mmc1: Bus speed (slot 0) = 200000Hz (slot req 200000Hz, actual 200000HZ div = 0) [ 6.099605] Btrfs loaded, integrity-checker=on [ 6.099786] BTRFS: selftest: Running btrfs free space cache tests [ 6.099841] BTRFS: selftest: Running extent only tests [ 6.099874] BTRFS: selftest: Running bitmap only tests [ 6.099913] BTRFS: selftest: Running bitmap and extent tests [ 6.099955] BTRFS: selftest: Running space stealing from bitmap to extent [ 6.100030] mmc_host mmc2: Bus speed (slot 0) = 150000000Hz (slot req 150000000Hz, actual 150000000HZ div = 0) [ 6.100782] BTRFS: selftest: Free space cache tests finished [ 6.100786] BTRFS: selftest: Running extent buffer operation tests [ 6.100786] BTRFS: selftest: Running btrfs_split_item tests [ 6.100893] BTRFS: selftest: Running find delalloc tests [ 6.167025] mmc_host mmc1: Bus speed (slot 0) = 100000Hz (slot req 100000Hz, actual 100000HZ div = 0) [ 6.393319] BTRFS: selftest: Running btrfs_get_extent tests [ 6.393657] BTRFS: selftest: Running hole first btrfs_get_extent test [ 6.393703] BTRFS: selftest: Running outstanding_extents tests [ 6.393816] BTRFS: selftest: Running qgroup tests [ 6.393819] BTRFS: selftest: Qgroup basic add [ 6.393948] BTRFS: selftest: Qgroup multiple refs test [ 6.536968] dwmmc_rockchip ff520000.dwmmc: Successfully tuned phase to 224 [ 6.537045] mmc2: new HS200 MMC card at address 0001 [ 6.538138] mmcblk2: mmc2:0001 CJNB4R 58.2 GiB [ 6.538484] mmcblk2boot0: mmc2:0001 CJNB4R partition 1 4.00 MiB [ 6.538890] mmcblk2boot1: mmc2:0001 CJNB4R partition 2 4.00 MiB [ 6.539205] mmcblk2rpmb: mmc2:0001 CJNB4R partition 3 4.00 MiB [ 6.540491] mmcblk2: p1 [ 8.374555] usb 2-1: New USB device strings: Mfr=0, Product=1, SerialNumber=0 [ 8.389893] usb 2-1: Product: USB2.0 Hub [ 8.406984] hub 2-1:1.0: USB hub found [ 8.423430] hub 2-1:1.0: 4 ports detected [ 8.501802] Key type encrypted registered [ 8.517984] rga2: Module initialized. [ 8.534264] pvtm list NULL [ 8.550941] of_get_named_gpiod_flags: can't parse 'simple-audio-card,hp-det-gpio' property of node '/sound[0]' [ 8.550956] of_get_named_gpiod_flags: can't parse 'simple-audio-card,mic-det-gpio' property of node '/sound[0]' [ 8.572522] asoc-simple-card sound: rk3328-hifi <-> ff010000.i2s mapping ok [ 8.591471] of_get_named_gpiod_flags: can't parse 'simple-audio-card,hp-det-gpio' property of node '/hdmi-sound[0]' [ 8.591494] of_get_named_gpiod_flags: can't parse 'simple-audio-card,mic-det-gpio' property of node '/hdmi-sound[0]' [ 8.592539] asoc-simple-card hdmi-sound: i2s-hifi <-> ff000000.i2s mapping ok [ 8.611133] of_get_named_gpiod_flags: can't parse 'simple-audio-card,hp-det-gpio' property of node '/spdif-sound[0]' [ 8.611155] of_get_named_gpiod_flags: can't parse 'simple-audio-card,mic-det-gpio' property of node '/spdif-sound[0]' [ 8.612114] asoc-simple-card spdif-sound: dit-hifi <-> ff030000.spdif mapping ok [ 8.630954] hctosys: unable to open rtc device (rtc0) [ 8.646379] of_cfs_init [ 8.662086] of_cfs_init: OK [ 8.694439] Bluetooth: Starting self testing [ 8.736890] Bluetooth: ECDH test passed in 25801 usecs [ 8.796084] Bluetooth: SMP test passed in 78 usecs [ 8.811823] Bluetooth: Finished self testing [ 8.827779] vcc_otg_vbus: disabling [ 8.844964] ALSA device list: [ 8.860854] #0: rockchip,rk3328 [ 8.876636] #1: rockchip,hdmi [ 8.891802] #2: rockchip,spdif [ 8.908760] Freeing unused kernel memory: 1216K [ 15.832822] rockchip-vop ff370000.vop: [drm:vop_crtc_enable] Update mode to 4096x2160p24, type: 11 [ 17.015747] random: nonblocking pool is initialized [ 76.892762] EXT4-fs (mmcblk0p1): mounted filesystem with writeback data mode. Opts: data=writeback [ 77.810719] systemd[1]: System time before build time, advancing clock. [ 77.869746] systemd[1]: Inserted module 'autofs4' [ 77.912430] ip_tables: (C) 2000-2006 Netfilter Core Team [ 77.950554] cgroup: cgroup2: unknown option "nsdelegate" [ 77.999850] systemd[1]: systemd 241 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +SECCOMP +BLKID +ELFUTILS +KMOD -IDN2 +IDN -PCRE2 default-hierarchy=hybrid) [ 78.031985] systemd[1]: Detected architecture arm64. [ 78.122092] systemd[1]: Set hostname to <station-m1>. [ 78.529545] systemd[1]: File /lib/systemd/system/systemd-journald.service:12 configures an IP firewall (IPAddressDeny=any), but the local system does not support BPF/cgroup based firewalling. [ 78.546840] systemd[1]: Proceeding WITHOUT firewalling in effect! (This warning is only shown for the first loaded unit using IP firewalling.) [ 78.935505] systemd[1]: /lib/systemd/system/spice-vdagentd.service:8: PIDFile= references path below legacy directory /var/run/, updating /var/run/spice-vdagentd/spice-vdagentd.pid → /run/spice-vdagentd/spice-vdagentd.pid; please update the unit file accordingly. [ 78.978558] systemd[1]: Set up automount Arbitrary Executable File Formats File System Automount Point. [ 79.015161] systemd[1]: Started Forward Password Requests to Wall Directory Watch. [ 79.053357] systemd[1]: Created slice User and Session Slice. [ 79.091599] systemd[1]: Created slice system-getty.slice. [ 79.127889] systemd[1]: Listening on fsck to fsckd communication Socket. [ 79.164716] systemd[1]: Listening on Syslog Socket. [ 79.201272] systemd[1]: Reached target Remote File Systems. [ 79.239163] systemd[1]: Created slice system-serial\x2dgetty.slice. [ 79.276820] systemd[1]: Listening on Journal Audit Socket. [ 79.314314] systemd[1]: Listening on Journal Socket. [ 79.359852] systemd[1]: Starting Load Kernel Modules... [ 79.412076] systemd[1]: Starting Set the console keyboard layout... [ 79.457227] systemd[1]: Mounting Huge Pages File System... [ 79.505080] systemd[1]: Starting Restore / save the current clock... [ 79.553299] systemd[1]: Mounting POSIX Message Queue File System... [ 79.593558] systemd[1]: Reached target Swap. [ 79.632244] systemd[1]: Listening on initctl Compatibility Named Pipe. [ 79.675637] systemd[1]: Starting Nameserver information manager... [ 79.714504] systemd[1]: Reached target Slices. [ 79.752401] systemd[1]: Condition check resulted in Dispatch Password Requests to Console Directory Watch when bootsplash is active being skipped. [ 79.772265] systemd[1]: Reached target Local Encrypted Volumes. [ 79.811614] systemd[1]: Listening on udev Kernel Socket. [ 79.856335] systemd[1]: Mounting Kernel Debug File System... [ 79.898088] systemd[1]: Condition check resulted in Set Up Additional Binary Formats being skipped. [ 79.918166] systemd[1]: Listening on Journal Socket (/dev/log). [ 79.957274] systemd[1]: Reached target System Time Synchronized. [ 79.996868] systemd[1]: Condition check resulted in File System Check on Root Device being skipped. [ 80.022116] systemd[1]: Starting Remount Root and Kernel File Systems... [ 80.071833] systemd[1]: Starting Create list of required static device nodes for the current kernel... [ 80.081094] EXT4-fs (mmcblk0p1): re-mounted. Opts: commit=600,errors=remount-ro [ 80.135125] systemd[1]: Listening on udev Control Socket. [ 80.181333] systemd[1]: Starting udev Coldplug all Devices... [ 80.232784] systemd[1]: Started Load Kernel Modules. [ 80.278504] systemd[1]: Started Set the console keyboard layout. [ 80.322617] systemd[1]: Mounted Huge Pages File System. [ 80.368257] systemd[1]: Started Restore / save the current clock. [ 80.411182] systemd[1]: Mounted POSIX Message Queue File System. [ 80.458134] systemd[1]: Mounted Kernel Debug File System. [ 80.504095] systemd[1]: Started Remount Root and Kernel File Systems. [ 80.549673] systemd[1]: Started Create list of required static device nodes for the current kernel. [ 80.603389] systemd[1]: Started Nameserver information manager. [ 80.664403] systemd[1]: Starting Create System Users... [ 80.721222] systemd[1]: Starting Load/Save Random Seed... [ 80.787640] systemd[1]: Condition check resulted in Rebuild Hardware Database being skipped. [ 80.817887] systemd[1]: Mounting Kernel Configuration File System... [ 80.872927] systemd[1]: Mounting FUSE Control File System... [ 80.928707] systemd[1]: Starting Apply Kernel Variables... [ 80.986002] systemd[1]: Started udev Coldplug all Devices. [ 81.039023] systemd[1]: Started Create System Users. [ 81.065001] systemd[1]: Started Load/Save Random Seed. [ 81.088421] systemd[1]: Mounted Kernel Configuration File System. [ 81.111893] systemd[1]: Mounted FUSE Control File System. [ 81.136983] systemd[1]: Started Apply Kernel Variables. [ 81.165516] systemd[1]: Starting Create Static Device Nodes in /dev... [ 81.196875] systemd[1]: Starting udev Wait for Complete Device Initialization... [ 81.230111] systemd[1]: Starting Helper to synchronize boot up for ifupdown... [ 81.257333] systemd[1]: Started Create Static Device Nodes in /dev. [ 81.282943] systemd[1]: Started Helper to synchronize boot up for ifupdown. [ 81.312507] systemd[1]: Starting udev Kernel Device Manager... [ 81.336106] systemd[1]: Reached target Local File Systems (Pre). [ 81.367303] systemd[1]: Mounting /tmp... [ 81.397556] systemd[1]: Mounted /tmp. [ 81.422208] systemd[1]: Reached target Local File Systems. [ 81.452669] systemd[1]: Starting Armbian ZRAM config... [ 81.485755] systemd[1]: Starting Set console font and keymap... [ 81.511301] systemd[1]: Condition check resulted in Commit a transient machine-id on disk being skipped. [ 81.519927] systemd[1]: Starting Raise network interfaces... [ 81.557357] systemd[1]: Started udev Kernel Device Manager. [ 81.601149] systemd[1]: Started Set console font and keymap. [ 81.906874] zram: Added device: zram0 [ 81.909433] zram: Added device: zram1 [ 81.911700] zram: Added device: zram2 [ 82.202462] I : [File] : drivers/gpu/arm/mali400/mali/linux/mali_kernel_linux.c; [Line] : 417; [Func] : mali_module_init(); svn_rev_string_from_arm of this mali_ko is '', rk_ko_ver is '5', built at '09:50:31', on 'May 7 2021'. [ 82.203130] mali-utgard ff300000.gpu: mali_platform_device->num_resources = 9 [ 82.203163] mali-utgard ff300000.gpu: resource[0].start = 0x0x00000000ff300000 [ 82.203170] mali-utgard ff300000.gpu: resource[1].start = 0x0x00000000ff300000 [ 82.203180] mali-utgard ff300000.gpu: resource[2].start = 0x0x0000000000000011 [ 82.203188] mali-utgard ff300000.gpu: resource[3].start = 0x0x0000000000000012 [ 82.203195] mali-utgard ff300000.gpu: resource[4].start = 0x0x0000000000000013 [ 82.203205] mali-utgard ff300000.gpu: resource[5].start = 0x0x0000000000000014 [ 82.203218] mali-utgard ff300000.gpu: resource[6].start = 0x0x0000000000000015 [ 82.203225] mali-utgard ff300000.gpu: resource[7].start = 0x0x0000000000000016 [ 82.203235] mali-utgard ff300000.gpu: resource[8].start = 0x0x0000000000000017 [ 82.203244] D : [File] : drivers/gpu/arm/mali400/mali/platform/rk/rk.c; [Line] : 623; [Func] : mali_platform_device_init(); to add platform_specific_data to platform_device_of_mali. [ 82.203334] mali-utgard ff300000.gpu: Looking up mali-supply from device tree [ 82.203432] rk808 1-0018: Looking up vcc1-supply from device tree [ 82.203450] rk808 1-0018: Looking up vcc1-supply property in node /i2c@ff160000/rk805@18 failed [ 82.203798] mali-utgard ff300000.gpu: leakage=10 [ 82.203828] mali-utgard ff300000.gpu: leakage-volt-sel=0 [ 82.203923] mali-utgard ff300000.gpu: Looking up mali-supply from device tree [ 82.203951] rk808 1-0018: Looking up vcc1-supply from device tree [ 82.203966] rk808 1-0018: Looking up vcc1-supply property in node /i2c@ff160000/rk805@18 failed [ 82.204034] vdd_logic: could not add device link ff300000.gpu err -17 [ 82.204062] vdd_logic: Failed to create debugfs directory [ 82.204098] mali-utgard ff300000.gpu: Failed to get pvtm [ 82.245817] Mali: Mali device driver loaded [ 82.303692] devfreq ff300000.gpu: Couldn't update frequency transition information. [ 82.333317] systemd[1]: Found device /dev/ttyFIQ0. [ 82.515497] zram0: detected capacity change from 0 to 2055331840 [ 82.704256] Adding 2007156k swap on /dev/zram0. Priority:5 extents:1 across:2007156k SS [ 82.934357] systemd[1]: Started Raise network interfaces. [ 83.176393] zram1: detected capacity change from 0 to 52428800 [ 83.284942] systemd[1]: Started Armbian ZRAM config. [ 83.733244] systemd[1]: Started udev Wait for Complete Device Initialization. [ 83.770520] systemd[1]: Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. [ 83.794148] systemd[1]: Condition check resulted in Set Up Additional Binary Formats being skipped. [ 83.794289] systemd[1]: Condition check resulted in Dispatch Password Requests to Console Directory Watch when bootsplash is active being skipped. [ 83.800562] systemd[1]: Starting Braille Device Support... [ 83.830445] systemd[1]: Starting Armbian memory supported logging... [ 83.855393] systemd[1]: Condition check resulted in Rebuild Hardware Database being skipped. [ 83.855834] systemd[1]: Condition check resulted in Commit a transient machine-id on disk being skipped. [ 83.864189] systemd[1]: Starting Load/Save RF Kill Switch Status... [ 83.968503] [BT_RFKILL]: bt turn on power [ 83.971168] systemd[1]: Started Load/Save RF Kill Switch Status. [ 83.988465] EXT4-fs (zram1): mounted filesystem without journal. Opts: discard [ 84.070244] systemd[1]: Started Braille Device Support. [ 84.629503] input: BRLTTY 5.6 Linux Screen Driver Keyboard as /devices/virtual/input/input2 [ 87.298169] systemd[1]: Started Armbian memory supported logging. [ 87.327503] systemd[1]: Starting Journal Service... [ 87.795449] systemd[1]: Started Journal Service. [ 87.889208] systemd-journald[630]: Received request to flush runtime journal from PID 1 [ 89.335462] nr_pdflush_threads exported in /proc is scheduled for removal [ 110.244081] Bluetooth: BNEP (Ethernet Emulation) ver 1.3 [ 110.244115] Bluetooth: BNEP filters: protocol multicast [ 110.244167] Bluetooth: BNEP socket layer initialized [ 111.172594] PPP generic driver version 2.4.2 [ 111.190887] NET: Registered protocol family 24 [ 111.344072] NET: Registered protocol family 15 [ 111.506241] tty_port_close_start: tty->count = 1 port count = 2. [ 111.912075] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ 112.801073] NET: Registered protocol family 17 [ 116.478556] [drm:dw_hdmi_rockchip_set_property] *ERROR* failed to set rockchip hdmi connector property [ 116.478615] [drm:dw_hdmi_rockchip_set_property] *ERROR* failed to set rockchip hdmi connector property [ 116.478635] [drm:dw_hdmi_rockchip_set_property] *ERROR* failed to set rockchip hdmi connector property [ 116.478787] [drm:dw_hdmi_rockchip_set_property] *ERROR* failed to set rockchip hdmi connector property [ 116.478821] [drm:dw_hdmi_rockchip_set_property] *ERROR* failed to set rockchip hdmi connector property [ 116.478839] [drm:dw_hdmi_rockchip_set_property] *ERROR* failed to set rockchip hdmi connector property [ 117.205306] rockchip-vop ff370000.vop: [drm:vop_crtc_enable] Update mode to 3840x2160p0, type: 11 [ 145.246392] usb 2-1.3: new low-speed USB device number 3 using ehci-platform [ 145.346420] usb 2-1.3: New USB device found, idVendor=258a, idProduct=0001 [ 145.346458] usb 2-1.3: New USB device strings: Mfr=1, Product=2, SerialNumber=0 [ 145.346484] usb 2-1.3: Product: USB KEYBOARD [ 145.346510] usb 2-1.3: Manufacturer: SINO WEALTH [ 145.357533] input: SINO WEALTH USB KEYBOARD as /devices/platform/ff5c0000.usb/usb2/2-1/2-1.3/2-1.3:1.0/0003:258A:0001.0001/input/input3 [ 145.413043] hid-generic 0003:258A:0001.0001: input,hidraw0: USB HID v1.10 Keyboard [SINO WEALTH USB KEYBOARD] on usb-ff5c0000.usb-1.3/input0 [ 145.426720] input: SINO WEALTH USB KEYBOARD as /devices/platform/ff5c0000.usb/usb2/2-1/2-1.3/2-1.3:1.1/0003:258A:0001.0002/input/input4 [ 145.484408] hid-generic 0003:258A:0001.0002: input,hiddev0,hidraw1: USB HID v1.10 Device [SINO WEALTH USB KEYBOARD] on usb-ff5c0000.usb-1.3/input1 [ 149.886281] usb 2-1.2: new low-speed USB device number 4 using ehci-platform [ 149.982734] usb 2-1.2: New USB device found, idVendor=0461, idProduct=4e2a [ 149.982761] usb 2-1.2: New USB device strings: Mfr=1, Product=2, SerialNumber=0 [ 149.982768] usb 2-1.2: Product: USB Optical Mouse [ 149.982779] usb 2-1.2: Manufacturer: PixArt [ 149.989182] input: PixArt USB Optical Mouse as /devices/platform/ff5c0000.usb/usb2/2-1/2-1.2/2-1.2:1.0/0003:0461:4E2A.0003/input/input5 [ 149.990572] hid-generic 0003:0461:4E2A.0003: input,hidraw2: USB HID v1.11 Mouse [PixArt USB Optical Mouse] on usb-ff5c0000.usb-1.2/input0 [ 161.061239] rockchip-vop ff370000.vop: [drm:vop_crtc_enable] Update mode to 1920x1080p0, type: 11 [ 171.214864] [BT_RFKILL]: bt turn on power [ 174.547262] [BT_RFKILL]: bt turn on power [ 185.434611] [BT_RFKILL]: bt shut off power Edited August 19, 2021 by Werner Spoiler added 1 Quote
Jason Duhamell Posted August 19, 2021 Posted August 19, 2021 Is this what you mean by the "Alternate bus"? It uses sdmmc_ext instead of sdio. dwmmc@ff5f0000 { compatible = "rockchip,rk3328-dw-mshc\0rockchip,rk3288-dw-mshc"; reg = <0x00 0xff5f0000 0x00 0x4000>; clock-freq-min-max = <0x61a80 0x8f0d180>; clocks = <0x02 0x140 0x02 0x1f 0x02 0x4d 0x02 0x51>; clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; fifo-depth = <0x100>; interrupts = <0x00 0x04 0x04>; status = "okay"; bus-width = <0x04>; cap-sd-highspeed; cap-sdio-irq; disable-wp; keep-power-in-suspend; max-frequency = <0x23c3460>; mmc-pwrseq = <0x79>; non-removable; num-slots = <0x01>; pinctrl-names = "default"; pinctrl-0 = <0x7a 0x7b 0x7c>; supports-sdio; sd-uhs-sdr104; phandle = <0xcf>; 1 Quote
SteeMan Posted August 19, 2021 Posted August 19, 2021 @Jason Duhamell Please don't post large files inline. Use the "Spoiler" feature to hide long attachments (the icon that looks like an eyeball). It makes it much easier to read these threads without having to scroll through large files. 1 Quote
Ben N Voutour Posted August 19, 2021 Posted August 19, 2021 (edited) how do get the dts file for my box? do i need to use multitool to dump it first? i want my clock to work in armbian along with working graphics and a decent overclock i know that dmssru on 4pda ru forums made a semi decent attempt to overclock android 9 for h96 max but my wifi and bt would not work properly. and how do i get the metal can off my wifi module? it seems to be soldered on. here is the firmware for the h96 max modded by dmssru on 4pda https://drive.google.com/drive/folders/1W7BkOj1Q16O_wvlLlFh06v_D5Yol9KvE and here is the tools and Firmware , Software & Drivers https://drive.google.com/drive/folders/1vevBj3JySrkcurvnLPqU6aY-5APtXHYI and here some random builds as well https://drive.google.com/file/d/1w1KgbetDIIIU08-jmN3ll_0IF9cR5Lic/view also this... https://drive.google.com/file/d/1l_WECaMMWS0BI0rIY7uiWcw6X_BPu-yZ/view?usp=sharing Hope These help Edited August 19, 2021 by RetroFan90 adding oc firmware for reference (DMSSRU) 2 Quote
jock Posted August 19, 2021 Author Posted August 19, 2021 2 hours ago, RetroFan90 said: i want my clock to work in armbian along with working graphics and a decent overclock In the previous pages I posted some instructions on how to let it work. The driver for various led drivers is available on github and needs to be manually compiled. I did not include it yet because it has some limitations I would like to fix before integrating into. Overclock: bad idea on rk3318, but your mileage may vary 2 hours ago, RetroFan90 said: and how do i get the metal can off my wifi module? it seems to be soldered on. Why do you want to remove the metal can? It is a very bad idea, it shields the wifi from interferences and if you remove it, probably your wifi/bt will have troubles. 2 hours ago, RetroFan90 said: how do get the dts file for my box? do i need to use multitool to dump it first? There are various instructions over the internet, but what are you expecting from the dts? 2 Quote
jock Posted August 19, 2021 Author Posted August 19, 2021 5 hours ago, Jason Duhamell said: Is this what you mean by the "Alternate bus"? It uses sdmmc_ext instead of sdio. Yes, the rk3318/rk3328 has a spare sdmmc controller, sometime it is left unused, sometime it is used for wifi or sdcard. In your case, it seems that it is used for wifi, and it is strange that if you enable the right device tree overlay it freezes your board. 0 Quote
fabiobassa Posted August 19, 2021 Posted August 19, 2021 @RetroFan90 I do agree totally with @jock : overclock 3318 is a terrible idea. We suspect that 3318 is the " poor brother " of 3328 , or in other words , 3318 is a badly assembled/builded 3328 that has some electric electronic characteristic that made impossible to call it 3328 so was downgraded to 3318 I have more than 30 defective 3318 with broken emmc, ddr that go higher than 100 celsius and I wouldn't even try to overclock the few 3318 that are working 1 Quote
Ben N Voutour Posted August 19, 2021 Posted August 19, 2021 4 hours ago, SteeMan said: @Jason Duhamell Please don't post large files inline. Use the "Spoiler" feature to hide long attachments (the icon that looks like an eyeball). It makes it much easier to read these threads without having to scroll through large files. 25 minutes ago, jock said: In the previous pages I posted some instructions on how to let it work. The driver for various led drivers is available on github and needs to be manually compiled. I did not include it yet because it has some limitations I would like to fix before integrating into. Overclock: bad idea on rk3318, but your mileage may vary Why do you want to remove the metal can? It is a very bad idea, it shields the wifi from interferences and if you remove it, probably your wifi/bt will have troubles. There are various instructions over the internet, but what are you expecting from the dts? 20 minutes ago, fabiobassa said: @RetroFan90 I do agree totally with @jock : overclock 3318 is a terrible idea. We suspect that 3318 is the " poor brother " of 3328 , or in other words , 3318 is a badly assembled/builded 3328 that has some electric electronic characteristic that made impossible to call it 3328 so was downgraded to 3318 I have more than 30 defective 3318 with broken emmc, ddr that go higher than 100 celsius and I wouldn't even try to overclock the few 3318 that are working Overclocking seems to work fine in armbian on my particular board. my EMMC hasn't ever crapped out during any of my tests. it is pretty solid. i did notice that the overclock made my box a tiny bit warmer but it never had issues with stability. i'll look into the dts and dtb for my box and a few others. is the mainline 3318 kernel good when it comes to the mali 450 GPU? i want to cook up a custom build that works like emuelec or libreelec and still have the desktop as an alternate option within the OS not sure but Windows On ARM Could BE Possible But Tricky-Dicky and might not be fast enough for anything useful... What Kind Of 3318 Boxes do you have that the EMMC is Pooched? 0 Quote
fabiobassa Posted August 19, 2021 Posted August 19, 2021 @RetroFan90 They are all HK1, the circle one , many but really many have exploded regulators on ddr V+ since the ddr are poorly soldered and/or defective and they have short circuits on the bga balls Here for you a dts from one of the firmware you send (1.4.1_atv_rk_10.img) The tool for extracting dtb's is called RK3xxx_firmware_tools_5.23.1_by_SergioPoverony.zip 3318dts.zip 1 Quote
Ben N Voutour Posted August 20, 2021 Posted August 20, 2021 could you send me a dts file for the ocvr v3a image? 0 Quote
fabiobassa Posted August 20, 2021 Posted August 20, 2021 @RetroFan90 here it comes, but you can also do by yourself looking for the firmware I suggested you 3318-OCVR.nPI.dts.zip 1 Quote
Ben N Voutour Posted August 20, 2021 Posted August 20, 2021 i fixed it can it be reapplied to the ocvr npi image? 1.5GHz and 1066 MHz uncommented. Don't know if this helps in armbian but i'm looking forward to testing it. 3318-OCVR.nPI.dts 0 Quote
Ben N Voutour Posted August 21, 2021 Posted August 21, 2021 On 8/19/2021 at 4:00 AM, fabiobassa said: @RetroFan90 They are all HK1, the circle one , many but really many have exploded regulators on ddr V+ since the ddr are poorly soldered and/or defective and they have short circuits on the bga balls Here for you a dts from one of the firmware you send (1.4.1_atv_rk_10.img) The tool for extracting dtb's is called RK3xxx_firmware_tools_5.23.1_by_SergioPoverony.zip 3318dts.zip 14.28 kB · 1 download a newer version has appeared... http://www.mediafire.com/file/prt20aq5s0tqxbu/RK3xxx_firmware_tools_5.78.35.00.rar/file 0 Quote
Ben N Voutour Posted August 21, 2021 Posted August 21, 2021 (edited) 11 minutes ago, RetroFan90 said: a newer version has appeared... http://www.mediafire.com/file/prt20aq5s0tqxbu/RK3xxx_firmware_tools_5.78.35.00.rar/file https://drive.google.com/file/d/1dENjFNr1VTjxBLOJNyOHvcvTCi0jzkQI/view?usp=sharing ^ RK3xxx_firmware_tools_5.99.07.00 by Sergio Poverony Is there any newer version? Edited August 21, 2021 by RetroFan90 Changed Link due to ToS Error. 0 Quote
Ben N Voutour Posted August 21, 2021 Posted August 21, 2021 13 minutes ago, RetroFan90 said: https://drive.google.com/file/d/1dENjFNr1VTjxBLOJNyOHvcvTCi0jzkQI/view?usp=sharing ^ RK3xxx_firmware_tools_5.99.07.00 by Sergio Poverony Is there any newer version? here is a useful repo https://github.com/kthejoker20 it has the same tool i just uploaded to my G-Drive. and some more... i'll keep looking for other tools and newer versions as well when available. 1 Quote
Jason Duhamell Posted August 21, 2021 Posted August 21, 2021 On 8/19/2021 at 1:25 AM, jock said: Yes, the rk3318/rk3328 has a spare sdmmc controller, sometime it is left unused, sometime it is used for wifi or sdcard. In your case, it seems that it is used for wifi, and it is strange that if you enable the right device tree overlay it freezes your board. I am getting closer with my modifications to the DTS file. I am now able to get it to boot from emmc on the rk3318 legacy image you had posted. The only part I am still playing around with to see if I can get it to work is the wifi. From what I can tell, the wifi chip should be activated, but the wifi is still not working. Any advice would be much obliged. rk3328-evb-test.dts 0 Quote
fabiobassa Posted August 21, 2021 Posted August 21, 2021 @RetroFan90 Quote i fixed it can it be reapplied to the ocvr npi image no, you must convert to dtb again and apply some headers if you use the parameters.txt method to flash images on linux first install device tree compiler to go from dts to dtb again then follow this important github of mr. Justin to obtain again something that the legacy kernel can manage . You need some headers . If you are on legacy use directly the dtb obtained from device tree compiler Which is your case ? Burning with parameters.txt or using the mainline kernel ??? https://github.com/jhswartz/rk3229/blob/master/PARTITION-REPLACEMENT.md p.s. but are the images you are trying to mod ANDROID or are you playing on Armbian now ? 0 Quote
jock Posted August 21, 2021 Author Posted August 21, 2021 35 minutes ago, Jason Duhamell said: I am getting closer with my modifications to the DTS file. I am now able to get it to boot from emmc on the rk3318 legacy image you had posted. The only part I am still playing around with to see if I can get it to work is the wifi. From what I can tell, the wifi chip should be activated, but the wifi is still not working. Any advice would be much obliged. rk3328-evb-test.dts 83.03 kB · 0 downloads it could be interesting to know what did you change to make it work 1 Quote
Jason Duhamell Posted August 21, 2021 Posted August 21, 2021 16 hours ago, jock said: it could be interesting to know what did you change to make it work Spoiler 1001c1001 < rockchip,key_table = <0xf2 0xe8 0xba 0x9e 0xf4 0x67 0xf1 0x6c 0xef 0x69 0xee 0x6a 0xbd 0x66 0xea 0x73 0xe3 0x72 0xe2 0xd9 0xb2 0x74 0x4d 0x74 0xbc 0x71 0xec 0x8b 0xbf 0x190 0xe0 0x191 0xe1 0x192 0xe9 0xb7 0xe6 0xf8 0xe8 0xb9 0xe7 0xba 0xf0 0x184 0xbe 0x175>; --- > rockchip,key_table = <0xf2 0xe8 0xba 0x9e 0xf4 0x67 0xf1 0x6c 0xef 0x69 0xee 0x6a 0xbd 0x66 0xea 0x73 0xe3 0x72 0xe2 0xd9 0xb2 0x74 0xbc 0x71 0xec 0x8b 0xbf 0x190 0xe0 0x191 0xe1 0x192 0xe9 0xb7 0xe6 0xf8 0xe8 0xb9 0xe7 0xba 0xf0 0x184 0xbe 0x175>; 1004,1019c1004 < ir_key3 { < rockchip,usercode = <0x1dcc>; < rockchip,key_table = <0xee 0xe8 0xf0 0x9e 0xf8 0x67 0xbb 0x6c 0xef 0x69 0xed 0x6a 0xfc 0x66 0xf1 0x73 0xfd 0x72 0xb7 0xd9 0xff 0x74 0xf3 0x71 0xbf 0x8b 0xf9 0x191 0xf5 0x192 0xb3 0x184 0xbe 0x02 0xba 0x03 0xb2 0x04 0xbd 0x05 0xf9 0x06 0xb1 0x07 0xfc 0x08 0xf8 0x09 0xb0 0x0a 0xb6 0x0b 0xb5 0x0e>; < }; < < ir_key4 { < rockchip,usercode = <0xfe01>; < rockchip,key_table = <0xec 0xe8 0xe6 0x9e 0xe9 0x67 0xe5 0x6c 0xae 0x69 0xaf 0x6a 0xee 0x66 0xe7 0x73 0xef 0x72 0xbf 0x74 0xbe 0x71 0xb3 0x8b 0xff 0x184 0xb1 0x02 0xf2 0x03 0xf3 0x04 0xb5 0x05 0xf6 0x06 0xf7 0x07 0xb9 0x08 0xfa 0x09 0xfb 0x0a 0xfe 0x0b 0xbd 0x0e 0xbc 0xb7 0xf0 0xb8>; < }; < < ir_key5 { < rockchip,usercode = <0x7f80>; < rockchip,key_table = <0xec 0xe8 0xd8 0x9e 0xc7 0x67 0xbf 0x6c 0xc8 0x69 0xc6 0x6a 0x8c 0x66 0x78 0x73 0x76 0x72 0x7e 0x74 0xed 0x74 0x7c 0x8b 0xb7 0x184>; < }; < < ir_key6 { --- > ir_key2 { 1021,1026c1006 < rockchip,key_table = <0xe5 0x66 0xaf 0x9e 0xb1 0x8b 0xfd 0xe8 0xbc 0x67 0xf5 0x6c 0xf9 0x69 0xf1 0x6a 0xa7 0x72 0xe4 0x73 0xbc 0x71 0xa8 0x74 0xb2 0x184 0xb0 0xb7 0xa4 0xb8 0xa8 0xb9 0xab 0xba 0xb3 0x7b 0xf0 0x7a 0xef 0x02 0xee 0x03 0xed 0x04 0xec 0x05 0xeb 0x74 0xea 0x07 0xe8 0x08 0xe7 0x09 0xe6 0x0a 0xe2 0x0b 0xf0 0x39 0xe1 0x0e>; < }; < < ir_key7 { < rockchip,usercode = <0x807f>; < rockchip,key_table = <0x7e 0x74>; --- > rockchip,key_table = <0x39 0x74 0x73 0x71 0xa4 0xa4 0x75 0x72 0x77 0x73 0x7d 0x8b 0xf9 0x66 0x5f 0x9e 0xb9 0x67 0xe9 0x6c 0xb8 0x69 0xea 0x6a 0xaa 0xe8 0x55 0x02 0x5b 0x03 0xf8 0x04 0x57 0x05 0xed 0x06 0xee 0x07 0x59 0x08 0xf1 0x09 0xf2 0x0a 0xe0 0x0e 0x79 0x0b 0xa4 0x8d>; 1029,1031c1009,1011 < ir_key8 { < rockchip,usercode = <0xfd02>; < rockchip,key_table = <0xf2 0xe8 0xec 0x9e 0xf6 0x67 0xee 0x6c 0xf5 0x69 0xf1 0x6a 0xef 0x66 0xf8 0x73 0xf9 0x72 0xf7 0x74 0xf4 0x71 0xf3 0x8b 0xbf 0x184 0xeb 0x02 0xea 0x03 0xe9 0x04 0xe7 0x05 0xe6 0x06 0xe5 0x07 0xe3 0x08 0xe2 0x09 0xe1 0x0a 0xbe 0x0b 0xbd 0x0e 0xe4 0x43 0xd4 0x44 0xf0 0x3f 0xfb 0x7a 0xfa 0x7b 0xff 0xb7 0xfe 0xb8 0xfd 0xb9 0xfc 0xba>; --- > ir_key3 { > rockchip,usercode = <0x1dcc>; > rockchip,key_table = <0xee 0xe8 0xf0 0x9e 0xf8 0x67 0xbb 0x6c 0xef 0x69 0xed 0x6a 0xfc 0x66 0xf1 0x73 0xfd 0x72 0xb7 0xd9 0xff 0x74 0xf3 0x71 0xbf 0x8b 0xf9 0x191 0xf5 0x192 0xb3 0x184 0xbe 0x02 0xba 0x03 0xb2 0x04 0xbd 0x05 0xf9 0x06 0xb1 0x07 0xfc 0x08 0xf8 0x09 0xb0 0x0a 0xb6 0x0b 0xb5 0x0e>; 1625a1606,1626 > dwmmc@ff520000 { > compatible = "rockchip,rk3328-dw-mshc\0rockchip,rk3288-dw-mshc"; > reg = <0x00 0xff520000 0x00 0x4000>; > max-frequency = <0x8f0d180>; > clocks = <0x02 0x13f 0x02 0x23 0x02 0x4c 0x02 0x50>; > clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; > fifo-depth = <0x100>; > interrupts = <0x00 0x0e 0x04>; > status = "okay"; > bus-width = <0x08>; > cap-mmc-highspeed; > mmc-hs200-1_8v; > supports-emmc; > disable-wp; > non-removable; > num-slots = <0x01>; > pinctrl-names = "default"; > pinctrl-0 = <0x68 0x69 0x6a>; > phandle = <0xc0>; > }; > 1655,1666d1655 < status = "disabled"; < phandle = <0xc2>; < }; < < dwmmc@ff520000 { < compatible = "rockchip,rk3328-dw-mshc\0rockchip,rk3288-dw-mshc"; < reg = <0x00 0xff520000 0x00 0x4000>; < max-frequency = <0x8f0d180>; < clocks = <0x02 0x13f 0x02 0x23 0x02 0x4c 0x02 0x50>; < clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; < fifo-depth = <0x100>; < interrupts = <0x00 0x0e 0x04>; 1668,1671c1657,1659 < bus-width = <0x08>; < cap-mmc-highspeed; < mmc-hs200-1_8v; < supports-emmc; --- > bus-width = <0x04>; > cap-sd-highspeed; > cap-sdio-irq; 1672a1661,1662 > keep-power-in-suspend; > mmc-pwrseq = <0x70>; 1676,1677c1666,1668 < pinctrl-0 = <0x68 0x69 0x6a>; < phandle = <0xc0>; --- > pinctrl-0 = <0x71 0x72 0x73>; > supports-sdio; > phandle = <0xc2>; 1737c1728 < dr_mode = "host"; --- > dr_mode = "otg"; 1780,1793c1771 < status = "okay"; < bus-width = <0x04>; < cap-sd-highspeed; < cap-sdio-irq; < disable-wp; < keep-power-in-suspend; < max-frequency = <0x23c3460>; < mmc-pwrseq = <0x70>; < non-removable; < num-slots = <0x01>; < pinctrl-names = "default"; < pinctrl-0 = <0xfe 0xfa 0xf9>; < supports-sdio; < sd-uhs-sdr104; --- > status = "disabled"; 2922d2899 < /* 2935c2912 < }; */ --- > }; 2949c2926 < reset-gpios = <0xcd 0x08 0x01>; --- > reset-gpios = <0x75 0x12 0x01>; 3057,3060c3034,3036 < wifi_chip_type = "ssv6051"; < sdio_vref = <0xce4>; < #WIFI,poweren_gpio = <0xcd 0x08 0x00>; < WIFI,host_wake_irq = <0xcd 0x01 0x00>; --- > wifi_chip_type = "ap6354"; > sdio_vref = <0x708>; > WIFI,host_wake_irq = <0x75 0x13 0x00>; 3062,3072d3037 < }; < < leds { < compatible = "gpio-leds"; < < power-green { < gpios = <0xa6 0x00 0x00>; < linux,default-trigger = "none"; < default-state = "on"; < mode = <0x23>; < }; Essentially I compared the standard EVB (Evaluation Board) DTS against the DTS I extracted from the original android firmware. I used CSC to make a back-up of the original android firmware onto the SD card, from there I just extracted the boot.img from the back-up. Using " extract-dtb" provided by PabloCastellano, I was able to extract a DTB, and subsequently use DTC to convert it into a readable DTS. Using comparison tools like "Meld", I focused in on the hardware differences. I am very inexperienced and only started working on this project as a means to compare the cost to performance ratio of this TV box compared to something such as a Raspberry pi. Both the Wi-Fi and eMMC are wired to the sdmmc_ext bus instead of the normal SDIO bus. That is why, originally, I was not able to run the rk3318 legacy build off of the internal storage, it was not able to detect the "alternate" bus. If I had to guess, it is how the address to hex code conversion was done. From some porting documents I read, the proper address should be like <&gpio3 pin_the_power_tied_to active_high>, compared to 0xcd being the hex address for gpio3, but I don't know what 0x01 or 0x08 are supposed to be in EVB DTS? Any advice on how to map-out the gpio pins would be appreciated. 0 Quote
Ben N Voutour Posted August 21, 2021 Posted August 21, 2021 1 hour ago, fabiobassa said: @RetroFan90 no, you must convert to dtb again and apply some headers if you use the parameters.txt method to flash images on linux first install device tree compiler to go from dts to dtb again then follow this important github of mr. Justin to obtain again something that the legacy kernel can manage . You need some headers . If you are on legacy use directly the dtb obtained from device tree compiler Which is your case ? Burning with parameters.txt or using the mainline kernel ??? https://github.com/jhswartz/rk3229/blob/master/PARTITION-REPLACEMENT.md p.s. but are the images you are trying to mod ANDROID or are you playing on Armbian now ? i'm trying to test these tweaks with android, soon possibly armbian... 0 Quote
Ben N Voutour Posted August 22, 2021 Posted August 22, 2021 23 hours ago, RetroFan90 said: i'm trying to test these tweaks with android, soon possibly armbian... should i go for the legacy kernel, or mainline? i wanna test my overclocked dts file i'll probably need to convert it to dtb. 0 Quote
Ben N Voutour Posted August 23, 2021 Posted August 23, 2021 i just finished compiling a 2GB multitool from git in debian wsl still having compile issues with armbian in debian wsl where it says that wsl is not supported. 0 Quote
Recommended Posts
Join the conversation
You can post now and register later. If you have an account, sign in now to post with your account.
Note: Your post will require moderator approval before it will be visible.