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jernej

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Everything posted by jernej

  1. OrangePi Win default configuration in U-Boot has only half drivers enabled for ethernet. I fixed that recently with https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi/commit/2936eb2d550a642275113464fc9dcbb03357c049 It will be part of U-Boot v2020.04.
  2. AFAIK H6 USB3 is not supported yet in U-Boot, I have no idea about USB2 though. Also ethernet driver is not yet supported, although patch for boards with external PHY exist.
  3. @balbes150 I don't know much about RK and AML, but on AW most, if not all, SoCs have 3 mmc ports. SD card is always connected on first one, wifi SDIO module on second and eMMC on third. I guess that U-Boot enumerates devices in port order, so that would mean that SD card is always first device. However, another explanation would be that first device is one which you booted from - did you check that?
  4. Yes, you are missing something. Lima doesn't support video decoding. What you need is Cedrus. But using it is another story (currently a mess).
  5. @hexdump another patch to test: http://ix.io/27ap
  6. @hexdump can you please read out location 0x3006100 with either devmem from Linux or md.b from U-Boot? I suspect it will be 7, but it might be 3.
  7. I'm not sure, Android settings should work
  8. @hexdump that would be changed only in config file (CONFIG_DRAM_CLK). BTW, semi working variant is set to lower frequency.
  9. @hexdump Out of curiosity, why do you have different DRAM PLL settings in different reports? In this one frequency is 576 MHz (DRAM:PLL = b0003500) but for example in this one is 672 MHz (DRAM:PLL = b0003600). Did you change that in config file? Edit: According to Android boot log, it should be set to 576 MHz. Can you try if lowering frequency helps?
  10. @hexdump it really seems to be ATF issue. Try to comment out AXP805 initialization and make sure DT you are using doesn't have nodes for it. If still doesn't work, I suggest you contact apritzel.
  11. @hexdump Interesting, so mainline U-Boot fails in ATF, no matter which DRAM init method is used (libdram vs open source)? I think it can be related to the fact that we have old libdram ("V2_2"), while Android you have uses newer version ("V2_78"). Let's try to find newer blob... In worst case we could also analyze dumped U-Boot from your box, but a lot of information would be omitted. Can you try http://ix.io/26Ln ? I changed two fields according to Zynq documentation with similar DRAM controller. This may be fixed in newer libdram versions... edit: this one is V2_5: https://github.com/orangepi-xunlong/OrangePiH6_uboot/blob/master/sunxi_spl/dram/sun50iw6p1/dram/libdram edit2: and this V2_7: https://github.com/Allwinner-Homlet/H6-BSP4.9-bootloader/blob/master/uboot_2014_sunxi_spl/sunxi_spl/dram/sun50iw6p1/dram/libdram but now I don't know where to look for newer ones...
  12. @hexdump there is only one more DDR3 PHY specific difference I could find: http://ix.io/26L9
  13. @hexdump I'm using upstream U-Boot, currently at 8d8ee47e03 ("env: Add CONFIG_SYS_RELOC_GD_ENV_ADDR symbol"). All relevant patches were merged upstream for some time now, so there is no reason to use forks at this point.
  14. @hexdump what about http://ix.io/26IG ? Now I'm nitpicking differences between mainline U-Boot and libdram. Not sure what is the issue. Worst case would be to print out all DRAM PHY registers and compare them with libdram... EDIT: Issue is in Write Leveling alghoritm (0x200000), but I don't know why. Timings should be more or less same as in libdram.
  15. @hexdump is error always the same, e.g. you always see DRAM PHY PGSR0 = 20003d ?
  16. @hexdump what about http://ix.io/26D9 ?
  17. can you dump DT file from running Android? It holds few other DRAM settings which are important.
  18. @hexdump not really, DRAM initialization is pretty SoC specific.
  19. @hexdump can you try http://ix.io/26wK ? it would also help if you can dump DT from running Android.
  20. But for starters, you can add "#define DEBUG" at the very top of the file (before includes) arch/arm/mach-sunxi/dram_sun50i_h6.c. This should print some more info.
  21. So I guess 3xk77 means lot number. It seems that eventually DRAM controller is properly initialized, so it can be some kind of timing issue. I'll make a patch which will make verbose output of RAM initialization so we can see where it went wrong a bit later.
  22. According to Micron web site "d9prz" means MT41K512M4DA-107:K. Do all chips have "d9prz" printed on them?
  23. I can't find anything under that name. BTW, Android boot log would also help - at the very beginning, RAM configuration is printed although in a bit encrypted form.
  24. @hexdump Can you please read out all RAM chip markings? I wonder what combination is.
  25. wait for what? Until someone confirms that this actually fixes something, it's not going anywhere.
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