[Invalid] - OrangePi 4 UART on Pins 8, 10?

[jstefanop]

Looks like OPi4 has two active UART interfaces (ttyS2, S4). S2 is connected to the back 3 pins which are the debug ports, and S4 is uart on pins 19,21. 

 

Is there anyway to bring up another interface for UART on Pins 8, 10?

 

Ive tried adding uart1,2,3 etc in armbianEnv file in /boot as well as console=display but non of this works. 

[Werner]

Your issue report is not a valid bug report per the Armbian bug reporting instructions (https://www.armbian.com/bugs).  With limited resources the Armbian project is only able to spend time on issues where all the requested information has been provided and for only the boards/images/software that are supported.  Your report is invalid for one or more of the following reasons (non-exhaustive list):

 

• it is for an unsupported board or image (CSC/EOS/WIP/edge)
• it is for software that is not supported (such as userspace modules installed on top of the core operating system)
• it has been logged in the wrong forum (for example requests for help that are not actual bug reports)
• it lacks requested data (armbianmonitor output)
• it could have been easily solved by a quick search and/or reading documentation

 

Please review what you have submitted and the bug logging instructions (https://www.armbian.com/bugs) and either add the required information or open a new topic in the correct forum (such as Common issues / peer to peer technical support or General chit chat)

[jstefanop]

So looking around this uart seems to be named uart2b, and is referenced in the current.dts overlay in the armbian-config editor. Figured I could try and edit the rockchip_uar4.dbto file, but guess it needs to be decompiled?

 

EDIT

Got it decompile but it does not help, since all that overlay does is disable the SPI port and enable the UART port

 

So in the main overlay file this is what is referenced for uart2b:

 

uart2b {

            uart2b-xfer {
                rockchip,pins = <0x04 0x10 0x02 0xb7 0x04 0x11 0x02 0xb4>;
                phandle = <0x143>;
            };
        };
 

 

Would it work to simply copy these pin numbers and put it in the entry for uart4?

 

Only thing im not understanding is each uart port is referenced to one of these "serial" addresses

 

serial0 = "/serial@ff180000";
        serial1 = "/serial@ff190000";
        serial2 = "/serial@ff1a0000";
        serial3 = "/serial@ff1b0000";
        serial4 = "/serial@ff370000";
 

Would I need to create a new one, or can I hijack one of them and point the new pins to it?

[jstefanop]

After wasting way to much time on this finally figured it out...in case anyone NEEDs UART on Pin 8,10 (UART2B) this is how you do it

 

Go to amrbian config and edit .dts file

 

disable i2c3 port (shares same pins as UART2B) ...change status to "disabled" in i2c@ff130000

hijack uart2 address to point to UART2B pins instead of UART2C (the debug pins)....change phandle-0 in serial@ff1a0000 to 0x143

 

now this is all you technically need to do, but this is tied to ttyS2 which is also the serial console output which is configured i believe at the kernel level (if anyone know how to disable let me know), so we need to swap ttyS2 to another interface to voice this

 

so i just changed serial@ff1a0000 to point to ttyS1 by doing below

swap serial1 ->serial2

swap uart1 -> uart2

 

If anyone has an elegant way to do all of the above with a nice dts overlay lmk, have no idea how overlay syntax works. 

 

BTW also tried directly hijacking serial1 and serial 3 which are disabled (by changing phandle-0), but it only works in serial@ff1a0000...i guess all UART2 ports (UART2a,b,c) are tied to this address. 

[tparys]

Bunch of examples for sunxi chips: https://github.com/armbian/sunxi-DT-overlays

 

Documentation on how to use them: https://docs.armbian.com/User-Guide_Allwinner_overlays/

 

And a decent example that does multiple DTS edits (fragments): https://github.com/armbian/sunxi-DT-overlays/blob/master/examples/gpio-button.dts

 

Note that the first fragment selects the target edit point by phandle, where the second selects the target by DTS path.