Hqnicolas Posted June 2, 2023 Author Posted June 2, 2023 (edited) I'm using the firefly-roc-pc board as a base as indicated by @maka Base image: Armbian_23.08.0-trunk_Station-m2_jammy_edge_6.2.16_xfce_desktop.img H96 Max RK3566 4gb 32gb boot from SD-CARD Soldered ✔️ linux regular boot ✖️ it shows initframfs "can be USB bad assign for sd-card" serial ttl summary: Quote rk3566-firefly-roc-pc.dts rk3566-firefly-roc-pc.dtb Edited June 4, 2023 by hotnikq 0 Quote
maka Posted June 3, 2023 Posted June 3, 2023 What if you try with sdcard and usb simultaneously with the same image in both burned? 0 Quote
Hqnicolas Posted June 3, 2023 Author Posted June 3, 2023 (edited) On 6/3/2023 at 4:31 AM, maka said: What if you try with sdcard and usb need to patch USB.... no USB ports... Base image: Armbian_23.08.0-trunk_Station-m2_jammy_edge_6.2.16_xfce_desktop.img ✔️ Detect SD-CARD ✖️ Detect USB ✖️ Need to fix: Quote [ 0.000000] efi: UEFI not found. [ 0.068405] DMI not present or invalid. [ 0.746776] iommu: Default domain type: Translated [ 0.746806] iommu: DMA domain TLB invalidation policy: lazy mode [ 0.747553] usbcore: registered new interface driver usbfs [ 0.747616] usbcore: registered new interface driver hub [ 0.747678] usbcore: registered new device driver usb [ 0.748104] pps_core: LinuxPPS API ver. 1 registered [ 0.918178] arm-scmi firmware:scmi: Failed. SCMI protocol 22 not active. [ 1.106517] ghes_edac: GHES probing device list is empty [ 5.074356] Registered IR keymap rc-cec rk3566-firefly-roc-pc.dtb rk3566-firefly-roc-pc.dts Edited June 4, 2023 by hotnikq 1 Quote
Hqnicolas Posted June 3, 2023 Author Posted June 3, 2023 (edited) Fixed USB3.0 port Boot on Linux ✖️ Detect USB 2.0 port ✖️ Full dump: Quote Starting kernel ... I/TC: Secondary CPU 1 initializing I/TC: Secondary CPU 1 switching to normal world boot I/TC: Secondary CPU 2 initializing I/TC: Secondary CPU 2 switching to normal world boot I/TC: Secondary CPU 3 initializing I/TC: Secondary CPU 3 switching to normal world boot [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x412fd050] [ 0.000000] Linux version 6.2.16-media (armbian@next) (aarch64-linux-gnu-gcc (Ubuntu 11.3.0-1ubuntu1~22.04.1) 11.3.0, GNU ld (GNU Binutils for Ubuntu) 2.3 😎 #1 SMP PREEMPT_DYNAMIC Wed May 17 08:59:13 -03 2023 [ 0.000000] Machine model: Firefly rk3566-roc-pc [ 0.000000] efi: UEFI not found. [ 0.000000] NUMA: No NUMA configuration found [ 0.000000] NUMA: Faking a node at [mem 0x0000000000200000-0x00000001ffffffff] [ 0.000000] NUMA: NODE_DATA [mem 0x1ff764100-0x1ff769fff] [ 0.000000] Zone ranges: [ 0.000000] DMA [mem 0x0000000000200000-0x00000000ffffffff] [ 0.000000] DMA32 empty [ 0.000000] Normal [mem 0x0000000100000000-0x00000001ffffffff] [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000000200000-0x00000000083fffff] [ 0.000000] node 0: [mem 0x0000000009400000-0x00000000efffffff] [ 0.000000] node 0: [mem 0x00000001f0000000-0x00000001ffffffff] [ 0.000000] Initmem setup node 0 [mem 0x0000000000200000-0x00000001ffffffff] [ 0.000000] On node 0, zone DMA: 512 pages in unavailable ranges [ 0.000000] On node 0, zone DMA: 4096 pages in unavailable ranges [ 0.000000] cma: Reserved 256 MiB at 0x00000000e0000000 [ 0.000000] psci: probing for conduit method from DT. [ 0.000000] psci: PSCIv1.1 detected in firmware. [ 0.000000] psci: Using standard PSCI v0.2 function IDs [ 0.000000] psci: Trusted OS migration not required [ 0.000000] psci: SMC Calling Convention v1.2 [ 0.000000] percpu: Embedded 30 pages/cpu s83944 r8192 d30744 u122880 [ 0.000000] Detected VIPT I-cache on CPU0 [ 0.000000] CPU features: detected: GIC system register CPU interface [ 0.000000] CPU features: detected: Virtualization Host Extensions [ 0.000000] CPU features: detected: Qualcomm erratum 1009, or ARM erratum 1286807, 2441009 [ 0.000000] CPU features: detected: ARM errata 1165522, 1319367, or 1530923 [ 0.000000] alternatives: applying boot alternatives [ 0.000000] Fallback order for Node 0: 0 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1027656 [ 0.000000] Policy zone: Normal [ 0.000000] Kernel command line: root=UUID=8bffa7ed-2f1c-40d8-9e74-a674058d0110 console=ttyS02,1500000 console=tty0 rw no_console_suspend consoleblank=0 f sck.fix=yes fsck.repair=yes net.ifnames=0 splash plymouth.ignore-serial-consoles [ 0.000000] Unknown kernel command line parameters "splash", will be passed to user space. [ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear) [ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear) [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off [ 0.000000] software IO TLB: area num 4. [ 0.000000] software IO TLB: mapped [mem 0x00000000dc000000-0x00000000e0000000] (64MB) [ 0.000000] Memory: 3705476K/4175872K available (14784K kernel code, 3392K rwdata, 5100K rodata, 3776K init, 1029K bss, 208252K reserved, 262144K cma-rese rved) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 [ 0.000000] trace event string verifier disabled [ 0.000000] Dynamic Preempt: none [ 0.000000] rcu: Preemptible hierarchical RCU implementation. [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=4. [ 0.000000] Trampoline variant of Tasks RCU enabled. [ 0.000000] Tracing variant of Tasks RCU enabled. [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies. [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4 [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0 [ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode [ 0.000000] GICv3: 320 SPIs implemented [ 0.000000] GICv3: 0 Extended SPIs implemented [ 0.000000] GICv3: MBI range [296:319] [ 0.000000] GICv3: Using MBI frame 0x00000000fd410000 [ 0.000000] Root IRQ handler: gic_handle_irq [ 0.000000] GICv3: GICv3 features: 16 PPIs [ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x00000000fd460000 [ 0.000000] ITS: No ITS available, not enabling LPIs [ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention. [ 0.000000] arch_timer: cp15 timer(s) running at 24.00MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x588fe9dc0, max_idle_ns: 440795202592 ns [ 0.000000] sched_clock: 56 bits at 24MHz, resolution 41ns, wraps every 4398046511097ns [ 0.001669] Console: colour dummy device 80x25 [ 0.001693] printk: console [tty0] enabled [ 0.002593] Calibrating delay loop (skipped), value calculated using timer frequency.. 48.00 BogoMIPS (lpj=96000) [ 0.002637] pid_max: default: 32768 minimum: 301 [ 0.002985] LSM: initializing lsm=capability,yama,safesetid,integrity,bpf [ 0.003085] Yama: becoming mindful. [ 0.003182] LSM support for eBPF active [ 0.003419] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear) [ 0.003530] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear) [ 0.005538] cacheinfo: Unable to detect cache hierarchy for CPU 0 [ 0.006827] cblist_init_generic: Setting adjustable number of callback queues. [ 0.006866] cblist_init_generic: Setting shift to 2 and lim to 1. [ 0.007041] cblist_init_generic: Setting shift to 2 and lim to 1. [ 0.007407] rcu: Hierarchical SRCU implementation. [ 0.007432] rcu: Max phase no-delay instances is 1000. [ 0.014563] EFI services will not be available. [ 0.015332] smp: Bringing up secondary CPUs ... [ 0.017206] Detected VIPT I-cache on CPU1 [ 0.017334] cacheinfo: Unable to detect cache hierarchy for CPU 1 [ 0.017359] GICv3: CPU1: found redistributor 100 region 0:0x00000000fd480000 [ 0.017422] CPU1: Booted secondary processor 0x0000000100 [0x412fd050] [ 0.019253] Detected VIPT I-cache on CPU2 [ 0.019364] cacheinfo: Unable to detect cache hierarchy for CPU 2 [ 0.019387] GICv3: CPU2: found redistributor 200 region 0:0x00000000fd4a0000 [ 0.019437] CPU2: Booted secondary processor 0x0000000200 [0x412fd050] [ 0.021280] Detected VIPT I-cache on CPU3 [ 0.021387] cacheinfo: Unable to detect cache hierarchy for CPU 3 [ 0.021411] GICv3: CPU3: found redistributor 300 region 0:0x00000000fd4c0000 [ 0.021457] CPU3: Booted secondary processor 0x0000000300 [0x412fd050] [ 0.021599] smp: Brought up 1 node, 4 CPUs [ 0.021770] SMP: Total of 4 processors activated. [ 0.021790] CPU features: detected: 32-bit EL0 Support [ 0.021806] CPU features: detected: 32-bit EL1 Support [ 0.021823] CPU features: detected: Data cache clean to the PoU not required for I/D coherence [ 0.021845] CPU features: detected: Common not Private translations [ 0.021863] CPU features: detected: CRC32 instructions [ 0.021879] CPU features: detected: Data cache clean to Point of Persistence [ 0.021902] CPU features: detected: RCpc load-acquire (LDAPR) [ 0.021919] CPU features: detected: LSE atomic instructions [ 0.021935] CPU features: detected: Privileged Access Never [ 0.021951] CPU features: detected: RAS Extension Support [ 0.021970] CPU features: detected: Speculative Store Bypassing Safe (SSBS) [ 0.022111] CPU: All CPU(s) started at EL2 [ 0.022135] alternatives: applying system-wide alternatives [ 0.029046] devtmpfs: initialized [ 0.059248] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns [ 0.059323] futex hash table entries: 1024 (order: 4, 65536 bytes, linear) [ 0.067579] pinctrl core: initialized pinctrl subsystem [ 0.068597] DMI not present or invalid. [ 0.069611] NET: Registered PF_NETLINK/PF_ROUTE protocol family [ 0.071335] DMA: preallocated 2048 KiB GFP_KERNEL pool for atomic allocations [ 0.072115] DMA: preallocated 2048 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations [ 0.072582] DMA: preallocated 2048 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations [ 0.072715] audit: initializing netlink subsys (disabled) [ 0.072992] audit: type=2000 audit(0.068:1): state=initialized audit_enabled=0 res=1 [ 0.074257] thermal_sys: Registered thermal governor 'fair_share' [ 0.074269] thermal_sys: Registered thermal governor 'bang_bang' [ 0.074296] thermal_sys: Registered thermal governor 'step_wise' [ 0.074315] thermal_sys: Registered thermal governor 'user_space' [ 0.074408] cpuidle: using governor ladder [ 0.074481] cpuidle: using governor menu [ 0.074888] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers. [ 0.075097] ASID allocator initialised with 65536 entries [ 0.077174] Serial: AMBA PL011 UART driver [ 0.091356] platform fe040000.vop: Fixed dependency cycle(s) with /hdmi@fe0a0000 [ 0.117390] gpio gpiochip0: Static allocation of GPIO base is deprecated, use dynamic allocation. [ 0.118029] rockchip-gpio fdd60000.gpio: probed /pinctrl/gpio@fdd60000 [ 0.118508] gpio gpiochip1: Static allocation of GPIO base is deprecated, use dynamic allocation. [ 0.118896] rockchip-gpio fe740000.gpio: probed /pinctrl/gpio@fe740000 [ 0.119285] gpio gpiochip2: Static allocation of GPIO base is deprecated, use dynamic allocation. [ 0.119658] rockchip-gpio fe750000.gpio: probed /pinctrl/gpio@fe750000 [ 0.120074] gpio gpiochip3: Static allocation of GPIO base is deprecated, use dynamic allocation. [ 0.120428] rockchip-gpio fe760000.gpio: probed /pinctrl/gpio@fe760000 [ 0.120890] gpio gpiochip4: Static allocation of GPIO base is deprecated, use dynamic allocation. [ 0.121248] rockchip-gpio fe770000.gpio: probed /pinctrl/gpio@fe770000 [ 0.122707] platform fe0a0000.hdmi: Fixed dependency cycle(s) with /hdmi-con [ 0.127493] KASLR disabled due to lack of seed [ 0.128883] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages [ 0.128924] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page [ 0.128947] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages [ 0.128966] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page [ 0.128986] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages [ 0.129005] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page [ 0.129026] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages [ 0.129044] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page [ 0.197766] raid6: neonx8 gen() 1420 MB/s [ 0.265935] raid6: neonx4 gen() 1452 MB/s [ 0.334096] raid6: neonx2 gen() 1339 MB/s [ 0.402286] raid6: neonx1 gen() 1091 MB/s [ 0.470451] raid6: int64x8 gen() 910 MB/s [ 0.538613] raid6: int64x4 gen() 1049 MB/s [ 0.606759] raid6: int64x2 gen() 937 MB/s [ 0.674970] raid6: int64x1 gen() 673 MB/s [ 0.674993] raid6: using algorithm neonx4 gen() 1452 MB/s [ 0.743046] raid6: .... xor() 1097 MB/s, rmw enabled [ 0.743072] raid6: using neon recovery algorithm [ 0.744105] fbcon: Taking over console [ 0.744193] ACPI: Interpreter disabled. [ 0.747347] iommu: Default domain type: Translated [ 0.747377] iommu: DMA domain TLB invalidation policy: lazy mode [ 0.748193] usbcore: registered new interface driver usbfs [ 0.748257] usbcore: registered new interface driver hub [ 0.748320] usbcore: registered new device driver usb [ 0.748729] pps_core: LinuxPPS API ver. 1 registered [ 0.748755] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it> [ 0.748798] PTP clock support registered [ 0.749286] EDAC MC: Ver: 3.0.0 [ 0.749965] arm-scmi firmware:scmi: Enabled polling mode TX channel - prot_id:16 [ 0.750190] arm-scmi firmware:scmi: SCMI Notifications - Core Enabled. [ 0.750280] arm-scmi firmware:scmi: SCMI Protocol v2.0 'rockchip:' Firmware version 0x0 [ 0.752229] NetLabel: Initializing [ 0.752259] NetLabel: domain hash size = 128 [ 0.752277] NetLabel: protocols = UNLABELED CIPSOv4 CALIPSO [ 0.752387] NetLabel: unlabeled traffic allowed by default [ 0.752662] vgaarb: loaded [ 0.753355] clocksource: Switched to clocksource arch_sys_counter [ 0.754132] VFS: Disk quotas dquot_6.6.0 [ 0.754231] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes) [ 0.754697] pnp: PnP ACPI: disabled [ 0.769286] NET: Registered PF_INET protocol family [ 0.769768] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear) [ 0.774259] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear) [ 0.774370] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear) [ 0.774415] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear) [ 0.774708] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear) [ 0.775864] TCP: Hash tables configured (established 32768 bind 32768) [ 0.776356] MPTCP token hash table entries: 4096 (order: 4, 98304 bytes, linear) [ 0.776550] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear) [ 0.776680] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear) [ 0.777085] NET: Registered PF_UNIX/PF_LOCAL protocol family [ 0.777155] NET: Registered PF_XDP protocol family [ 0.777192] PCI: CLS 0 bytes, default 64 [ 0.778013] Trying to unpack rootfs image as initramfs... [ 0.800547] hw perfevents: enabled with armv8_cortex_a55 PMU driver, 7 counters available [ 0.801615] kvm [1]: IPA Size Limit: 40 bits [ 0.801673] kvm [1]: GICv3: no GICV resource entry [ 0.801696] kvm [1]: disabling GICv2 emulation [ 0.801737] kvm [1]: GIC system register CPU interface enabled [ 0.802155] kvm [1]: vgic interrupt IRQ9 [ 0.802869] kvm [1]: VHE mode initialized successfully [ 0.805311] Initialise system trusted keyrings [ 0.805790] workingset: timestamp_bits=39 max_order=20 bucket_order=0 [ 0.805955] zbud: loaded [ 0.807418] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.807509] fuse: init (API version 7.38) [ 0.861289] xor: measuring software checksum speed [ 0.867119] 8regs : 1721 MB/sec [ 0.873432] 32regs : 1576 MB/sec [ 0.879306] arm64_neon : 1690 MB/sec [ 0.879335] xor: using function: 8regs (1721 MB/sec) [ 0.879377] Key type asymmetric registered [ 0.879400] Asymmetric key parser 'x509' registered [ 0.879585] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 246) [ 0.879969] io scheduler mq-deadline registered [ 0.880123] io scheduler bfq registered [ 0.895800] arm-scmi firmware:scmi: Failed. SCMI protocol 22 not active. [ 0.902069] Serial: 8250/16550 driver, 8 ports, IRQ sharing enabled [ 0.907101] fe650000.serial: ttyS1 at MMIO 0xfe650000 (irq = 23, base_baud = 1500000) is a 16550A [ 0.908567] fe660000.serial: ttyS2 at MMIO 0xfe660000 (irq = 24, base_baud = 1500000) is a 16550A [ 0.908900] printk: console [ttyS2] enabled [ 1.027502] Serial: AMBA driver [ 1.031328] cacheinfo: Unable to detect cache hierarchy for CPU 0 [ 1.045701] brd: module loaded [ 1.056652] loop: module loaded [ 1.062435] thunder_xcv, ver 1.0 [ 1.062805] thunder_bgx, ver 1.0 [ 1.063140] nicpf, ver 1.0 [ 1.065202] usbcore: registered new interface driver usbserial_generic [ 1.065873] usbserial: USB Serial support registered for generic [ 1.066464] usbcore: registered new interface driver ch341 [ 1.067019] usbserial: USB Serial support registered for ch341-uart [ 1.067625] usbcore: registered new interface driver cp210x [ 1.068158] usbserial: USB Serial support registered for cp210x [ 1.068725] usbcore: registered new interface driver ftdi_sio [ 1.069274] usbserial: USB Serial support registered for FTDI USB Serial Device [ 1.069988] usbcore: registered new interface driver pl2303 [ 1.070525] usbserial: USB Serial support registered for pl2303 [ 1.071889] mousedev: PS/2 mouse device common for all mice [ 1.074937] fan53555-regulator 0-001c: FAN53555 Option[12] Rev[15] Detected! [ 1.084505] ghes_edac: GHES probing device list is empty [ 1.086779] ledtrig-cpu: registered to indicate activity on CPUs [ 1.088820] arm-scmi firmware:scmi: Failed. SCMI protocol 17 not active. [ 1.089532] SMCCC: SOC_ID: ARCH_SOC_ID not implemented, skipping .... [ 1.094993] NET: Registered PF_INET6 protocol family [ 2.804104] Freeing initrd memory: 32564K [ 2.861003] Segment Routing with IPv6 [ 2.861543] In-situ OAM (IOAM) with IPv6 [ 2.873215] registered taskstats version 1 [ 2.873883] Loading compiled-in X.509 certificates [ 2.878259] zswap: loaded using pool zstd/z3fold [ 2.892343] Key type .fscrypt registered [ 2.892741] Key type fscrypt-provisioning registered [ 2.895130] Btrfs loaded, crc32c=crc32c-generic, assert=on, integrity-checker=on, zoned=yes, fsverity=yes [ 2.923235] Key type encrypted registered [ 2.923694] ima: No TPM chip found, activating TPM-bypass! [ 2.924210] ima: Allocated hash algorithm: sha1 [ 2.924673] ima: No architecture policies found [ 2.925198] evm: Initialising EVM extended attributes: [ 2.925715] evm: security.selinux [ 2.926030] evm: security.SMACK64 [ 2.926339] evm: security.SMACK64EXEC [ 2.926675] evm: security.SMACK64TRANSMUTE [ 2.927049] evm: security.SMACK64MMAP [ 2.927385] evm: security.apparmor [ 2.927699] evm: security.ima [ 2.927975] evm: security.capability [ 2.928302] evm: HMAC attrs: 0x1 [ 2.981537] rk808 0-0020: chip id: 0x8090 [ 3.058822] rk808-regulator rk808-regulator.1.auto: there is no dvs0 gpio [ 3.059493] rk808-regulator rk808-regulator.1.auto: there is no dvs1 gpio [ 3.060115] rk808-regulator rk808-regulator.1.auto: max buck steps per change: 8 [ 3.122100] rk_gmac-dwmac fe010000.ethernet: IRQ eth_lpi not found [ 3.123675] rk_gmac-dwmac fe010000.ethernet: clock input or output? (input). [ 3.124329] rk_gmac-dwmac fe010000.ethernet: TX delay(0x4e). [ 3.124851] rk_gmac-dwmac fe010000.ethernet: RX delay(0x2c). [ 3.125422] rk_gmac-dwmac fe010000.ethernet: integrated PHY? (no). [ 3.126057] rk_gmac-dwmac fe010000.ethernet: clock input from PHY [ 3.131631] rk_gmac-dwmac fe010000.ethernet: init for RGMII [ 3.132541] rk_gmac-dwmac fe010000.ethernet: User ID: 0x30, Synopsys ID: 0x51 [ 3.133202] rk_gmac-dwmac fe010000.ethernet: DWMAC4/5 [ 3.133708] rk_gmac-dwmac fe010000.ethernet: DMA HW capability register supported [ 3.134389] rk_gmac-dwmac fe010000.ethernet: RX Checksum Offload Engine supported [ 3.135066] rk_gmac-dwmac fe010000.ethernet: TX Checksum insertion supported [ 3.135702] rk_gmac-dwmac fe010000.ethernet: Wake-Up On Lan supported [ 3.136363] rk_gmac-dwmac fe010000.ethernet: TSO supported [ 3.136870] rk_gmac-dwmac fe010000.ethernet: Enable RX Mitigation via HW Watchdog Timer [ 3.137616] rk_gmac-dwmac fe010000.ethernet: Enabled RFS Flow TC (entries=10) [ 3.138270] rk_gmac-dwmac fe010000.ethernet: TSO feature enabled [ 3.138818] rk_gmac-dwmac fe010000.ethernet: Using 32/32 bits DMA host/device width [ 3.293005] psci_checker: PSCI checker started using 4 CPUs [ 3.293581] psci_checker: Starting hotplug tests [ 3.294015] psci_checker: Trying to turn off and on again all CPUs [ 3.295388] psci: CPU0 killed (polled 0 ms) [ 3.299558] psci: CPU1 killed (polled 0 ms) [ 3.303258] psci: CPU2 killed (polled 0 ms) I/TC: Secondary CPU 0 initializing I/TC: Secondary CPU 0 switching to normal world boot [ 3.307196] Detected VIPT I-cache on CPU0 [ 3.307654] cacheinfo: Unable to detect cache hierarchy for CPU 0 [ 3.308215] GICv3: CPU0: found redistributor 0 region 0:0x00000000fd460000 [ 3.308908] CPU0: Booted secondary processor 0x0000000000 [0x412fd050] I/TC: Secondary CPU 1 initializing I/TC: Secondary CPU 1 switching to normal world boot [ 3.312360] Detected VIPT I-cache on CPU1 [ 3.312866] cacheinfo: Unable to detect cache hierarchy for CPU 1 [ 3.313431] GICv3: CPU1: found redistributor 100 region 0:0x00000000fd480000 [ 3.314137] CPU1: Booted secondary processor 0x0000000100 [0x412fd050] I/TC: Secondary CPU 2 initializing I/TC: Secondary CPU 2 switching to normal world boot [ 3.317701] Detected VIPT I-cache on CPU2 [ 3.318207] cacheinfo: Unable to detect cache hierarchy for CPU 2 [ 3.318773] GICv3: CPU2: found redistributor 200 region 0:0x00000000fd4a0000 [ 3.319476] CPU2: Booted secondary processor 0x0000000200 [0x412fd050] [ 3.321751] psci_checker: Trying to turn off and on again group 0 (CPUs 0-3) [ 3.322904] psci: CPU0 killed (polled 0 ms) [ 3.326640] psci: CPU1 killed (polled 0 ms) [ 3.329013] psci: CPU2 killed (polled 0 ms) I/TC: Secondary CPU 0 initializing I/TC: Secondary CPU 0 switching to normal world boot [ 3.332593] Detected VIPT I-cache on CPU0 [ 3.333054] cacheinfo: Unable to detect cache hierarchy for CPU 0 [ 3.333615] GICv3: CPU0: found redistributor 0 region 0:0x00000000fd460000 [ 3.334308] CPU0: Booted secondary processor 0x0000000000 [0x412fd050] I/TC: Secondary CPU 1 initializing I/TC: Secondary CPU 1 switching to normal world boot [ 3.337570] Detected VIPT I-cache on CPU1 [ 3.338073] cacheinfo: Unable to detect cache hierarchy for CPU 1 [ 3.338635] GICv3: CPU1: found redistributor 100 region 0:0x00000000fd480000 [ 3.339341] CPU1: Booted secondary processor 0x0000000100 [0x412fd050] I/TC: Secondary CPU 2 initializing I/TC: Secondary CPU 2 switching to normal world boot [ 3.343008] Detected VIPT I-cache on CPU2 [ 3.343511] cacheinfo: Unable to detect cache hierarchy for CPU 2 [ 3.344079] GICv3: CPU2: found redistributor 200 region 0:0x00000000fd4a0000 [ 3.344787] CPU2: Booted secondary processor 0x0000000200 [0x412fd050] [ 3.347051] psci_checker: Hotplug tests passed OK [ 3.347496] psci_checker: Starting suspend tests (10 cycles per state) [ 3.348150] psci_checker: cpuidle not available on CPU 0, ignoring [ 3.348715] psci_checker: cpuidle not available on CPU 1, ignoring [ 3.349273] psci_checker: cpuidle not available on CPU 2, ignoring [ 3.349927] psci_checker: cpuidle not available on CPU 3, ignoring [ 3.350493] psci_checker: Could not start suspend tests on any CPU [ 3.351050] psci_checker: PSCI checker completed [ 3.355820] Freeing unused kernel memory: 3776K [ 3.365570] Run /init as init process [ 4.478772] rk808-rtc rk808-rtc.3.auto: registered as rtc0 [ 4.483411] rk808-rtc rk808-rtc.3.auto: setting system clock to 2017-08-05T09:00:10 UTC (1501923610) [ 4.523597] panfrost fde60000.gpu: clock rate = 594000000 [ 4.524176] panfrost fde60000.gpu: bus_clock rate = 500000000 [ 4.540832] panfrost fde60000.gpu: mali-g52 id 0x7402 major 0x1 minor 0x0 status 0x0 [ 4.541658] panfrost fde60000.gpu: features: 00000000,00000cf7, issues: 00000000,00000400 [ 4.542432] panfrost fde60000.gpu: Features: L2:0x07110206 Shader:0x00000002 Tiler:0x00000209 Mem:0x1 MMU:0x00002823 AS:0xff JS:0x7 [ 4.543509] panfrost fde60000.gpu: shader_present=0x1 l2_present=0x1 [ 4.555185] rockchip-vop2 fe040000.vop: Adding to iommu group 2 [ 4.555833] iommu: Failed to allocate default IOMMU domain of type 11 for group (null) - Falling back to IOMMU_DOMAIN_DMA [ 4.568138] [drm] Initialized panfrost 1.2.0 20180908 for fde60000.gpu on minor 0 [ 4.573484] rockchip-drm display-subsystem: bound fe040000.vop (ops vop2_component_ops [rockchipdrm]) [ 4.580046] Synopsys Designware Multimedia Card Interface Driver [ 4.592511] dwmmc_rockchip fe2c0000.mmc: IDMAC supports 32-bit address mode. [ 4.593251] dwmmc_rockchip fe2c0000.mmc: Using internal DMA controller. [ 4.593997] dwmmc_rockchip fe2c0000.mmc: Version ID is 270a [ 4.594136] dma-pl330 fe530000.dma-controller: Loaded driver for PL330 DMAC-241330 [ 4.594362] dwmmc_rockchip fe2b0000.mmc: IDMAC supports 32-bit address mode. [ 4.594434] dwmmc_rockchip fe2b0000.mmc: Using internal DMA controller. [ 4.594448] dwmmc_rockchip fe2b0000.mmc: Version ID is 270a [ 4.594520] dwmmc_rockchip fe2b0000.mmc: DW MMC controller at irq 63,32 bit host data width,256 deep fifo [ 4.594547] dma-pl330 fe530000.dma-controller: DBUFF-128x8bytes Num_Chans-8 Num_Peri-32 Num_Events-16 [ 4.594588] dwmmc_rockchip fe2c0000.mmc: DW MMC controller at irq 62,32 bit host data width,256 deep fifo [ 4.597219] sdhci: Secure Digital Host Controller Interface driver [ 4.600124] sdhci: Copyright(c) Pierre Ossman [ 4.601308] dma-pl330 fe550000.dma-controller: Loaded driver for PL330 DMAC-241330 [ 4.602100] dma-pl330 fe550000.dma-controller: DBUFF-128x8bytes Num_Chans-8 Num_Peri-32 Num_Events-16 [ 4.604374] dwhdmi-rockchip fe0a0000.hdmi: Detected HDMI TX controller v2.11a with HDCP (DWC HDMI 2.0 TX PHY) [ 4.604490] dwmmc_rockchip fe2b0000.mmc: Got CD GPIO [ 4.607991] dwhdmi-rockchip fe0a0000.hdmi: registered DesignWare HDMI I2C bus driver [ 4.609596] rockchip-drm display-subsystem: bound fe0a0000.hdmi (ops dw_hdmi_rockchip_ops [rockchipdrm]) [ 4.612638] [drm] Initialized rockchip 1.0.0 20140818 for display-subsystem on minor 1 [ 4.618271] mmc_host mmc0: Bus speed (slot 0) = 375000Hz (slot req 400000Hz, actual 375000HZ div = 0) [ 4.625724] dwmmc_rockchip fe2c0000.mmc: IDMAC supports 32-bit address mode. [ 4.626443] dwmmc_rockchip fe2c0000.mmc: Using internal DMA controller. [ 4.627065] dwmmc_rockchip fe2c0000.mmc: Version ID is 270a [ 4.627608] dwmmc_rockchip fe2c0000.mmc: DW MMC controller at irq 62,32 bit host data width,256 deep fifo [ 4.637665] sdhci-pltfm: SDHCI platform and OF driver helper [ 4.639383] dwmmc_rockchip fe2c0000.mmc: IDMAC supports 32-bit address mode. [ 4.640134] dwmmc_rockchip fe2c0000.mmc: Using internal DMA controller. [ 4.640758] dwmmc_rockchip fe2c0000.mmc: Version ID is 270a [ 4.641313] dwmmc_rockchip fe2c0000.mmc: DW MMC controller at irq 62,32 bit host data width,256 deep fifo [ 4.647301] dwmmc_rockchip fe2c0000.mmc: IDMAC supports 32-bit address mode. [ 4.648041] dwmmc_rockchip fe2c0000.mmc: Using internal DMA controller. [ 4.648662] dwmmc_rockchip fe2c0000.mmc: Version ID is 270a [ 4.649224] dwmmc_rockchip fe2c0000.mmc: DW MMC controller at irq 62,32 bit host data width,256 deep fifo [ 4.678725] dwmmc_rockchip fe2c0000.mmc: IDMAC supports 32-bit address mode. [ 4.679441] dwmmc_rockchip fe2c0000.mmc: Using internal DMA controller. [ 4.680052] dwmmc_rockchip fe2c0000.mmc: Version ID is 270a [ 4.680604] dwmmc_rockchip fe2c0000.mmc: DW MMC controller at irq 62,32 bit host data width,256 deep fifo [ 4.683368] dwmmc_rockchip fe2c0000.mmc: allocated mmc-pwrseq [ 4.683935] mmc_host mmc2: card is non-removable. [ 4.685414] mmc1: SDHCI controller on fe310000.mmc [fe310000.mmc] using ADMA [ 4.701098] mmc_host mmc2: Bus speed (slot 0) = 375000Hz (slot req 400000Hz, actual 375000HZ div = 0) [ 4.735427] mmc1: new HS200 MMC card at address 0001 [ 4.816228] mmc_host mmc2: Bus speed (slot 0) = 50000000Hz (slot req 50000000Hz, actual 50000000HZ div = 0) [ 4.822553] mmc2: new high speed SDIO card at address 0001 [ 4.883145] Console: switching to colour frame buffer device 240x67 [ 4.987553] rockchip-drm display-subsystem: [drm] fb0: rockchipdrmfb frame buffer device [ 5.064058] Registered IR keymap rc-cec [ 5.064905] rc rc0: dw_hdmi as /devices/platform/fe0a0000.hdmi/rc/rc0 [ 5.066174] input: dw_hdmi as /devices/platform/fe0a0000.hdmi/rc/rc0/input0 [ 5.101058] xhci-hcd xhci-hcd.9.auto: xHCI Host Controller [ 5.102022] xhci-hcd xhci-hcd.9.auto: new USB bus registered, assigned bus number 1 [ 5.103359] xhci-hcd xhci-hcd.9.auto: hcc params 0x0220fe64 hci version 0x110 quirks 0x0000000002010010 [ 5.104824] xhci-hcd xhci-hcd.9.auto: irq 70, io mem 0xfd000000 [ 5.106040] xhci-hcd xhci-hcd.9.auto: xHCI Host Controller [ 5.106893] xhci-hcd xhci-hcd.9.auto: new USB bus registered, assigned bus number 2 [ 5.108017] xhci-hcd xhci-hcd.9.auto: Host supports USB 3.0 SuperSpeed [ 5.111554] hub 1-0:1.0: USB hub found [ 5.112256] hub 1-0:1.0: 1 port detected [ 5.113869] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. [ 5.117921] mmcblk1: mmc1:0001 032G00 29.1 GiB [ 5.117929] hub 2-0:1.0: USB hub found [ 5.118026] hub 2-0:1.0: 1 port detected [ 5.128739] mmcblk1: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12 p13 p14 p15 [ 5.136985] mmcblk1boot0: mmc1:0001 032G00 8.00 MiB [ 5.143699] mmcblk1boot1: mmc1:0001 032G00 8.00 MiB [ 5.148170] mmcblk1rpmb: mmc1:0001 032G00 4.00 MiB, chardev (240:0) [ 5.369392] usb 1-1: new low-speed USB device number 2 using xhci-hcd [ 5.563453] hid: raw HID events driver (C) Jiri Kosina [ 5.576323] usbcore: registered new interface driver usbhid [ 5.576965] usbhid: USB HID core driver [ 5.590164] input: Lenovo Lenovo Traditional USB Keyboard as /devices/platform/fd000000.usb/xhci-hcd.9.auto/usb1/1-1/1-1:1.0/0003:17EF:6099.0001/input/inp ut1 [ 5.649815] hid-generic 0003:17EF:6099.0001: input,hidraw0: USB HID v1.11 Keyboard [Lenovo Lenovo Traditional USB Keyboard] on usb-xhci-hcd.9.auto-1/input 0 rk3566-firefly-roc-pc.dtb rk3566-firefly-roc-pc.dts Edited June 4, 2023 by hotnikq 0 Quote
Hqnicolas Posted June 3, 2023 Author Posted June 3, 2023 I'm understanding why this image is falling in Initramfs On my last build kernel4.19 i use to boot into the internal MMC Quote chosen { bootargs = "earlycon=uart8250,mmio32,0xfe660000 swiotlb=8192 mem=4096M console=ttyFIQ0 root=PARTUUID=614e0000-0000-4b53-8000-1d28000054a9 rw rootwait"; phandle = <0x000001d7>; }; Now the Armbian_23.08.0-trunk_Station-m2_jammy_edge_6.2.16_xfce_desktop.img trying to tank with Quote chosen { stdout-path = "serial2:1500000n8"; }; ////////////// serial2 = "/serial@fe660000"; it's fine! same console that we used to. //////////// so we need to set rootfs by UUID and the kernel 6 read an internal value for console from file Quote append: root=UUID=8bffa7ed-2f1c-40d8-9e74-a674058d0110 console=ttyS02,1500000 0 Quote
Hqnicolas Posted June 3, 2023 Author Posted June 3, 2023 (edited) If you like what you see here and want to help: Donate Armbian the like button only costs a few dollars. Armbian Needs you help! ####################### WHAT IS THIS? ####################### This is an SD-card image! With this images you can create a v0.7 image and apply it to the v1.0 image from @hotnikq With v0.7 root You can create a v0.8 image from @hzdm to use the v0.5 image directly You will need do solder an SD-card Reader. check before if your device has the regulator: fan53555 check before if your device has: tcs4525 check before if your device has: RK809-5 works with 4gb and 8gb devices ####################### HOW TO BUILD IT! ####################### https://docs.armbian.com/Developer-Guide_Build-Preparation/ Runtime [ 6:05 min ] [✨] Repeat Build Options ./compile.sh build BOARD=station-m2 BRANCH=edge BUILD_DESKTOP=no BUILD_MINIMAL=yes KERNEL_CONFIGURE=yes RELEASE=bookworm ####################### HOW TO USE IT ####################### using the T95 Method flash the Wipe_part on Boot partition flash the Wipe_part on Recovery partition Connect the power cord... wait 1 second and in a fraction of second, connect the sd-Card on device..... if it doesn't boot, try again in a different timming 2 seconds after power. On sd card flash the unnoficial modified armbian ####################### SOLDERED READER EXAMPLE ####################### ######################### END ######################### ####################### FIRST BOOT ####################### Updated dtb file here Drop the rk3566-firefly-roc-pc.dtb file inside the /boot/dtb/rockchip/ #######################WHAT IS THIS? ####################### Base image: Armbian_23.11.0-trunk_Station-m2_jammy_edge_6.2.16_minimal.img ✔️ H96 Max RK3566 4gb and 8gb ✔️ boot from SD-CARD Soldered ✔️ runs kernel 6.2 DESKTOP ✔️ Boot on Linux XFCE Ambian✔️ display video HDMi ✔️ detect internal MMC ✔️ Detect SD-CARD ✔️ Detect USB 2.0 port ✖️ (need to drop the rk3566-firefly-roc-pc.dtb) Detect USB 3.0 port ✔️ (nothing better than an usb hub) ####################### HOW PUT IT ON MMC ####################### you can use it to make a v0.7 ROOT image. how? On 6/8/2023 at 7:16 PM, hotnikq said: any resemblance to this topic is mere adaptation Mount that image virtual device like /media/armbian_boot fdisk -l your-armbian-image-for-sd-card.img mount -o loop your-armbian-image-for-sd-card.img /media/armbian_boot if you can't "like WSL2" sudo apt-get install kpartx sudo kpartx -av your-armbian-image-for-sd-card.img sudo mount -o loop /dev/mapper/loop0p1 /media/armbian_boot Second Step: prepare an sd card or usb flash dummy , can be anithing with 6gb fdisk /dev/mmcblk1 N default default (lower this value to match the size of your root image) T 1 W third step: format that flash drive for ext4 mkfs.ext4 /dev/mmcblk1p1 fourth step: mount that clear partition and copy the entire virtual drive to the flash device mount /dev/mmcblk1p1 /mnt rsync -avx /media/armbian_boot/ /mnt fifth Step: Edit your uuid From Armbian Boot config "uuid for /dev/mmcblk1p1" blkid nano -w /mnt/boot/extlinux/extlinux.conf sixth step: make an hardware RAW.img from hardware flash drive with these parameters sudo dd if=/dev/mmcblk1p1 of=~/root.img bs=4096 status=progress PS: can be /dev/SDA" I do it on my h96max" so it's mmcblk1 now you have an ROOT IMAGE MADE BY YOURSELF! ./mkupdate.sh Uboot Legacy, Parameter.txt to create the Rockchip image Edited April 21 by Hqnicolas 2 Quote
Hqnicolas Posted June 4, 2023 Author Posted June 4, 2023 (edited) what needs to be done? need to put an sd card image inside the internal mmc because originally this board does not have SD card reader the only way i know of to do this is the old and fashion @thc013 method for FIT images.... instead of building the entire kernel on it, we just do a comand ./build.sh updateimg This comand will create a rockchip image with the android files that you extrated previously or the linux 4.19 that we compile in 2022.... all files need to be inside " /rockdev " folder Add file: ./package-file Add file: ./package-file done,offset=0x800,size=0x28b,userspace=0x1 Add file: ./Image/MiniLoaderAll.bin Add file: ./Image/MiniLoaderAll.bin done,offset=0x1000,size=0x701c0,userspace=0xe1 Add file: ./Image/parameter.txt Add file: ./Image/parameter.txt done,offset=0x71800,size=0x1f4,userspace=0x1 Add file: ./Image/uboot.img Add file: ./Image/uboot.img done,offset=0x72000,size=0x400000,userspace=0x800 Add file: ./Image/misc.img Add file: ./Image/misc.img done,offset=0x472000,size=0xc000,userspace=0x18 Add file: ./Image/boot.img On 11/10/2022 at 2:40 PM, hotnikq said: BUILD CUSTOM SDK - shaggy013 - 02-14-2022 Made this bsp/sdk because the beta wich is on the site don't makes a image wich you can flash and boot from sd/emmc and while mainline is cool a working bsp/sdk makes it more complete for me I looked how raxda and firefly made their bsp/sdk and made a custom one for the Quartz64 used some scripts of them and adjusted so they work to build a image Most sources are from rockchip and the just 2 or 3 comes from other sources (from firefly: rawimg script, qsetting and camera_engine_rkaiq package) So i tried to keep it some kind rockchip original and those packages were not on the rockhcip site or other open places so if it is a problem i can remove them BUILD CUSTOM SDK - shaggy013 - 02-14-2022 Quote *** ADDED *** Added buildconfigs for other pine boards with a rk356x PineNote ,Quartz64-b and Soquartz !!! DTS files not included only added a pinenote dts the soquartz and quartz64-b are just quartz64-a dts !! so if you got a dts for dowmstream kernel bards you can add them so instead of quartz64-rk3566-buildroot-k4.mk you do quartz64b-rk3566-buildroot-k4.mk For building a Quartz64-B image or pinenote-rk3566-buildroot-k4.mk For Building a Pinenote image or soquartz-rk3566-buildroot-k4.mk For building a Soquartz image and same for quartz64-rk3566-raw-k4.mk quartz64b-rk3566-raw-k4.mk For building a Quartz64-B SD-image or pinenote-rk3566-raw-k4.mk For Building a Pinenote SD-image or soquartz-rk3566-raw-k4.mk For building a Soquartz SD-image *Needed* Time Ubuntu 18.04 or 20.04 at least 200+GB of free space (yeah it likes to grow maybey more) *Building* #Packages Needed on pc sudo apt-get install repo git ssh make gcc libssl-dev liblz4-tool \ expect g++ patchelf chrpath gawk texinfo chrpath diffstat binfmt-support \ qemu-user-static live-build bison flex fakeroot cmake gcc-multilib g++-multilib \ unzip device-tree-compiler python-pip ncurses-dev python-pyelftools *Download BSP* #make bsp/sdk folder mkdir Quartz64 #go to Quartz64 folder cd Quartz64 # make .repo folder mkdir .repo #go to .repo folder cd .repo #download repo git clone https://github.com/rockchip-linux/repo or git clone https://gerrit.googlesource.com/git-repo repo #make repo executable chmod a+rx repo/repo #go back cd .. # Download repo manifest .repo/repo/repo init -u https://github.com/Shaggy013/manifests -b master -m rk356x_linux_custom_v1.2.8_20220309.xml # Dowload bsp/sdk .repo/repo/repo sync --no-clone-bundle ***** trouble **** if it gives trouble about github account https://elinux.org/Buildroot_how_to_contribute configure section **** only by trouble **** Now you see that your Quartz64 folder is full with new folders and files your Download is finished *Building* There are 4 distros you can build Buildroot,Debian,Ubuntu and Yocto You can choose to make the distro against the 4.19 or 5.10 kernel First you choose wich kernel #for 4.19 ./build.sh quartz64-rk3566-buildroot-k4.mk #or 5.10 ./build.sh quartz64-rk3566-buildroot-k5.mk For the first time you have to do it twice the first time can give a error you see something like this ***** example **** processing option: quartz64-rk3566-buildroot-k4.mk link kernel to proper kernel-directory renew kernel to proper kernel-directory link kernel 4 link Debian to proper Debian-distro renew Debian to proper Debian-Distro link debian to bullseye or buster link kernel 4 switching to board: /home/thc013/corner/Quartz64-release/device/rockchip/rk356x/quartz64-rk3566-buildroot-k4.mk ****** example **** so now you bsp is set to the right options You have multiple options but you have to make a uboot,kernel and recovery and a rootfs so the best start is just as a base for the later buiding of distros # build all (uboot,kernel,recovery,rootfs"buildroot",rockchip image) / AKA BUILDROOT ./build.sh **Info** For the 4.19 kernel you get after a few minutes a blue screen where you have to give the right voltage for the io-domains watch carefull some domains are not asked the domain info comes from the schematic or the dts file pmuio1-supply = <&vcc3v3_pmu>; not asked pmuio2-supply = <&vcc_3v3>; vccio1-supply = <&vccio_acodec>; 3,3 vccio2-supply = <&vcc_1v8>; not asked vccio3-supply = <&vccio_sd>; 3,3 vccio4-supply = <&vcca1v8_pmu>; vccio5-supply = <&vcc_3v3>; vccio6-supply = <&vcc1v8_dvp>; vccio7-supply = <&vcc_3v3>; After that the buildroot will start the rest of the building **** Depening on the speed of your pc it takes from a hour to ? so after some coffee and some heat for the cold weather you get Now it build a rockhip image DO NOT FLASH TO SD !!!!!!!! Make buildroot image ok! ..../Quartz64/rockdev/pack/QUARTZ64-RK3566-BUILDROOT-K4-GPT-!DATE!-2137.img Now it builds a rockhip image DO NOT FLASH TO SD !!!!!!!! #change to the SD/EMMC IMAGE option .#for 4.19 ./build.sh quartz64-rk3566-raw-k4.mk #or 5.10 ./build.sh quartz64-rk3566-raw-k5.mk #Build image ./build.sh rawimg ***Info *** Make raw image ok! ..../Quartz64/rockdev/pack/QUARTZ64-RK3566-RAW-K4-GPT-!DATE!-2137.img Now you can flash that image RAW to a sd or EMMC with your desired tool Etcher,dd etc ***** Now you can build a Debian or a Yocto image **** DEBIAN ****** #for 4.19 ./build.sh quartz64-rk3566-buildroot-k4.mk #or 5.10 ./build.sh quartz64-rk3566-buildroot-k5.mk !! before building you have to install extra packages they differ from ubuntu and debian so you have to install or overwrite them first sudo apt-get install binfmt-support qemu-user-static sudo dpkg -i ubuntu-build-service/packages/* sudo apt-get install -f # build Debian rootfs ./build.sh debian Now it build a rockhip image DO NOT FLASH TO SD !!!!!!!! #change to the SD/EMMC IMAGE option .#for 4.19 ./build.sh quartz64-rk3566-raw-k4.mk #or 5.10 ./build.sh quartz64-rk3566-raw-k5.mk #Build image ./build.sh rawimg ***Info *** Make raw image ok! ..../Quartz64/rockdev/pack/QUARTZ64-RK3566-RAW-K4-GPT-!DATE!-2137.img Now you can flash that image RAW to a sd or EMMC with your desired tool Etcher,dd etc Same as rest /Quartz64/rockdev/pack/ **** Ubuntu ****** #for 4.19 ./build.sh quartz64-rk3566-buildroot-k4.mk #or 5.10 ./build.sh quartz64-rk3566-buildroot-k5.mk !! before building you have to install extra packages they differ from ubuntu and debian so you have to install or overwrite them first sudo apt-get install binfmt-support qemu-user-static sudo dpkg -i ubuntu-build-service/packages/* sudo apt-get install -f # build Ubuntu rootfs ./build.sh ubuntu *** This build option ask after a few minutes the keyboard and region settings **** Now it build a rockhip image DO NOT FLASH TO SD !!!!!!!! #change to the SD/EMMC IMAGE option .#for 4.19 ./build.sh quartz64-rk3566-raw-k4.mk #or 5.10 ./build.sh quartz64-rk3566-raw-k5.mk #Build image ./build.sh rawimg ***Info *** Make raw image ok! ..../Quartz64/rockdev/pack/QUARTZ64-RK3566-RAW-K4-GPT-!DATE!-2137.img Now you can flash that image RAW to a sd or EMMC with your desired tool Etcher,dd etc Same as rest /Quartz64/rockdev/pack/ ***** YOCTO ***** !!! Yocto can take a time to build the toolchain has also clang etc included !!! #for 4.19 ./build.sh quartz64-rk3566-buildroot-k4.mk #or 5.10 ./build.sh quartz64-rk3566-buildroot-k5.mk # build Debian rootfs ./build.sh yocto Now it build a rockhip image DO NOT FLASH TO SD !!!!!!!! #change to the SD/EMMC IMAGE option .#for 4.19 ./build.sh quartz64-rk3566-raw-k4.mk #or 5.10 ./build.sh quartz64-rk3566-raw-k5.mk #Build image ./build.sh rawimg ***Info *** Make raw image ok! ..../Quartz64/rockdev/pack/QUARTZ64-RK3566-RAW-K4-GPT-!DATE!-2137.img Now you can flash that image RAW to a sd or EMMC with your desired tool Etcher,dd etc Same as rest /Quartz64/rockdev/pack/ ***** BUILD OPTIONS **** Available options: *.mk -switch to specified board config launch -list current SDK boards and switch to specified board config uboot -build uboot spl -build spl loader -build loader kernel -build kernel" modules -build kernel modules modules2 -build kernel modules to rockdev/pack/modules *added* toolchain -build toolchain extboot -build extlinux boot.img, boot from EFI partition rootfs -build default rootfs, currently build buildroot as default buildroot -build buildroot rootfs ramboot -build ramboot image multi-npu_boot -build boot image for multi-npu board yocto -build yocto rootfs debian -build debian 9 or 10 rootfs !! set in config !! !! only bullseye included ubuntu -build Ubuntu 20.04 rootfs !! set in config !! !! only focal included pcba -build pcba not tested recovery -build recovery all -build uboot, kernel, rootfs, recovery image cleanall -clean uboot, kernel, rootfs, recovery firmware -pack all the image we need to boot up system updateimg -pack update image not tested rawimg -pack raw image otapackage -pack ab update otapackage image (update_ota.img) not tested sdpackage -pack update sdcard package image (update_sdcard.img) not tested save -save images, patches, commands used to debug allsave -build all & firmware & updateimg & save check -check the environment of building info -see the current board building information app/<pkg> -build packages in the dir of app/* external/<pkg> -build packages in the dir of external/* **** Examples **** For if you made changes to uboot or the kernel buildroot is another story #u-boot ./build.sh uboot #kernel ./build.sh kernel #recovery ./build.sh recovery ***** Making modules from the kernel **** it can be that you want to copy or have some kernel modules to copy to your image ./build.sh modules2 makes in the folder rockdev/pack/modules the kernel-modules ********************************************************************************************************************** ****** TESTS ****** the distros all contain a folder rockchip test with some simple demos and test even a benchmark cd ~/rockchip_test # some test options ./rockhip_test.sh The npu video and gpu are most fun ******** ddr test : 1 (memtester & stressapptest) cpufreq test: 2 (cpufreq stresstest) ????flash stress test: 3 # not working # bluetooth test: 4 (bluetooth on&off test) # not working # audio test: 5 recovery test: 6 (default wipe all) suspend_resume test: 7 (suspend & resume) wifi test: 8 ethernet test: 9 auto reboot test: 10 ddr freq scaling test 11 #not working # npu test 12 npu2 test 13 (rk356x or rk3588) ??? camera test 14 (use rkisp_demo) video test 15 (use gstreamer-wayland and app_demo) gpu test 16 (use glmark2) # not working# chromium test 17 (chromium with video hardware acceleration)" nand power lost test: 18 ***** ************ Last Info ****** That is almost step for step i hope it just started with a dts and boardconfig but got a little bigger if i made any faults or i missed something please let me know no debug program just plain doing diff,reading(there is a lot),copy paste and some simple adjustments to make it work for me well it was something diffrent as making a custom limo os for the limo M1 360 from vodafone in 2009 (got first to root cdc_nand) gone glory the sources and info you can all find them on google and github and gitlab so no OFFICIAL ROCKCHIP or QUARTZ64 JUST !!CUSTOM!! I will include download links with the images it compiles and to make it work for another 3566 or 68 just make a boardconfig.mk in ?/Quartz64/device/rockchip/rk356x/ and make sure the defconfigs and dts are inthe right places well at least it gets you on the way SPECIAL THNX TO quartz64 chat , my free time ,a quartz64 too stay still alive ,ryzen 3700x+5700xt to keep me warm,20TB nas for the space,R.I.P sd (2),touchscreen,monitor and OPI4 (well the opi semi dead dont fuss with the fusb32 in uboot ) Edited June 4, 2023 by hotnikq 1 Quote
Hqnicolas Posted June 7, 2023 Author Posted June 7, 2023 (edited) how to DUMP from mmcblk1 Device Start End Sectors Size Type /dev/mmcblk1p1 8192 16383 8192 4M unknown /dev/mmcblk1p2 16384 24575 8192 4M unknown /dev/mmcblk1p3 24576 32767 8192 4M unknown /dev/mmcblk1p4 32768 61071326 61038559 29.1G EFI System install the android original image on MMC flash the Wipe_part on Boot partition flash the Wipe_part on Recovery partition and connect the ssd on soldered reader With armbian h96max v0.5 sudo dd if=/dev/mmcblk1 of=~/sd-card-copy.img bs=1M status=progress Your SD-card need to be 64gb to dump 32gb mmc Edited June 7, 2023 by hotnikq 1 Quote
Kenneth Hidalgo Posted June 7, 2023 Posted June 7, 2023 Hello everyone, I already have an image working on my h96max v56, it is Debian-based, the only problem is that the rootfs partition is only 6gb, who can help me to leave it with more space? 0 Quote
paradigman Posted June 7, 2023 Posted June 7, 2023 @Kenneth Hidalgo: if you share your working image with us so that we can install it, I will tell you the answer to your question. 😕 Otherwise: sudo resize2fs /dev/drive_to_grow 0 Quote
Kenneth Hidalgo Posted June 7, 2023 Posted June 7, 2023 Of course, when I have time, I'll share them with you. 1 Quote
Hqnicolas Posted June 7, 2023 Author Posted June 7, 2023 4 hours ago, Kenneth Hidalgo said: Hello everyone, I already have an image working on my h96max v56, it is Debian-based, the only problem is that the rootfs partition is only 6gb, who can help me to leave it with more space? ### Partition " / " resized to FULL DISK ### $ df -h sudo resize2fs /dev/mmcblk1p4 $ df -h 0 Quote
Kenneth Hidalgo Posted June 7, 2023 Posted June 7, 2023 https://www.123pan.com/s/QvbDVv-5Hpfd.html 0 Quote
Kenneth Hidalgo Posted June 7, 2023 Posted June 7, 2023 It's not there anymore I'm going to upload it to google drive 0 Quote
Hqnicolas Posted June 7, 2023 Author Posted June 7, 2023 2 minutes ago, Kenneth Hidalgo said: https://www.123pan.com/s/QvbDVv-5Hpfd.html Please edit action expired.... 0 Quote
Hqnicolas Posted June 7, 2023 Author Posted June 7, 2023 2 minutes ago, Kenneth Hidalgo said: It's not there anymore I'm going to upload it to google drive Please .tar.xz it first 0 Quote
Kenneth Hidalgo Posted June 7, 2023 Posted June 7, 2023 have some restrictions to change date set network 0 Quote
Kenneth Hidalgo Posted June 7, 2023 Posted June 7, 2023 https://drive.google.com/file/d/1FTOKB0pgqkLCJedyJrBq-qdONQ9KTM3-/view?usp=drive_link 0 Quote
Kenneth Hidalgo Posted June 7, 2023 Posted June 7, 2023 https://1fichier.com/?ai2bhmh67s8mn4vjab3x 0 Quote
Hqnicolas Posted June 8, 2023 Author Posted June 8, 2023 44 minutes ago, Kenneth Hidalgo said: https://drive.google.com/file/d/1FTOKB0pgqkLCJedyJrBq-qdONQ9KTM3-/view?usp=drive_link Please change permissions for "everyone with link" 0 Quote
Kenneth Hidalgo Posted June 8, 2023 Posted June 8, 2023 https://drive.google.com/file/d/1FTOKB0pgqkLCJedyJrBq-qdONQ9KTM3-/view?usp=sharing 1 Quote
Hqnicolas Posted June 8, 2023 Author Posted June 8, 2023 (edited) Linux version 4.19.193 (qmx_srv@qmxsrv-MS-7C09) (gcc version 6.3.1 20170404 (Linaro GCC 6.3-2017.05), GNU ld (Linaro_Binutils-2017.05) 2.27.0.20161019) #24 SMP Thu Mar 2 10:16:53 CST 2023 Machine model: Rockchip RK3566 EVB3 DDR3 V10 Board can't unpack the image on windows.... can't unpack the image on linux... sha256...... let's try DD it to an SD card on device MMC struct Quote root@linaro-alip:/home/linaro# lsblk NAME MAJ:MIN RM SIZE RO TYPE MOUNTPOINT mmcblk0 179:0 0 29.1G 0 disk ├─mmcblk0p1 179:1 0 4M 0 part ├─mmcblk0p2 179:2 0 4M 0 part ├─mmcblk0p3 179:3 0 32M 0 part ├─mmcblk0p4 179:4 0 64M 0 part ├─mmcblk0p5 179:5 0 32M 0 part ├─mmcblk0p6 179:6 0 6G 0 part / ├─mmcblk0p7 179:7 0 128M 0 part /media/linaro/a8682f9f-1928-4693-bd5c-a4f9 └─mmcblk0p8 179:8 0 22.9G 0 part /media/linaro/2c3bc23e-7aba-4a79-8509-244a mmcblk0boot0 179:32 0 8M 1 disk mmcblk0boot1 179:64 0 8M 1 disk BLKid: Quote /dev/mmcblk0p1: LABEL="armbi_root" UUID="daab97c2-c37f-4766-8eae-441c355546e1" BLOCK_SIZE="4096" TYPE="ext4" PARTUUID="48e7f43e-9370-4040-b954-c8a43cffc3a0" /dev/mmcblk1p15: UUID="d29b6245-7c54-498b-b07c-8686b886009e" BLOCK_SIZE="4096" TYPE="f2fs" PARTLABEL="userdata" PARTUUID="754e0000-0000-4f48-8000-5a1c000009e7" /dev/mmcblk1p11: UUID="777a36b9-d924-4eb8-94b3-759f24280d06" BLOCK_SIZE="4096" TYPE="ext4" PARTLABEL="metadata" PARTUUID="da290000-0000-4278-8000-68480000488f" /dev/mmcblk1p10: UUID="e8a0c1a4-14b4-49da-9e84-230873bf67ef" BLOCK_SIZE="4096" TYPE="ext4" PARTLABEL="cache" PARTUUID="61460000-0000-4f31-8000-0d0d000060e7" /dev/zram0: UUID="e39079db-ee82-4d87-9ddc-d1dbe32f1e6d" TYPE="swap" /dev/zram1: LABEL="log2ram" UUID="5e88c00c-a999-4cfa-9c6c-e6ae4aecd4f5" BLOCK_SIZE="4096" TYPE="ext4" /dev/mmcblk1p3: PARTLABEL="trust" PARTUUID="cc2e0000-0000-4f45-8000-462600000896" /dev/mmcblk1p13: PARTLABEL="logo" PARTUUID="a64b0000-0000-4530-8000-140c00000954" /dev/mmcblk1p1: PARTLABEL="security" PARTUUID="51720000-0000-402f-8000-591a00000d1e" /dev/mmcblk1p8: PARTLABEL="recovery" PARTUUID="633a0000-0000-4f05-8000-2202000023a1" /dev/mmcblk1p6: PARTLABEL="vbmeta" PARTUUID="c7070000-0000-4626-8000-12a100001e8b" /dev/mmcblk1p4: PARTLABEL="misc" PARTUUID="4f1b0000-0000-457e-8000-04ac00007464" /dev/mmcblk1p14: PARTLABEL="super" PARTUUID="89760000-0000-450e-8000-262700004300" /dev/mmcblk1p2: PARTLABEL="uboot" PARTUUID="ba210000-0000-4b35-8000-5be2000003ec" /dev/mmcblk1p12: PARTLABEL="baseparameter" PARTUUID="037e0000-0000-4701-8000-70040000769c" /dev/mmcblk1p9: PARTLABEL="backup" PARTUUID="d2350000-0000-4669-8000-588e0000465a" /dev/mmcblk1p7: PARTLABEL="boot" PARTUUID="4d7c0000-0000-420b-8000-2aa000004574" /dev/mmcblk1p5: PARTLABEL="dtbo" PARTUUID="0b4b0000-0000-4527-8000-623d0000459e" armbian@station-m2:~$ Let's try dtbview.exe "from Renate Teamblast" C:\>dtbview dtbo.img > big.txt Result DTB: Quote 000000 Header 000048 / { 000050 version = < 0x0 >; 000060 totalsize = < 0x30a4a00 >; 000070 timestamp = < 0x64182c44 >; 000080 description = "U-Boot FIT source file for arm"; 0000ac images { 0000b8 fdt { 0000c0 data-size = < 0x1e4af >; 0000d0 data-position = < 0x800 >; 0000e0 type = "flat_dt"; 0000f4 arch = "arm64"; 000108 compression = "none"; 00011c load = < 0xffffff00 >; 00012c hash { 000138 value = < 0x7d0a9eea 0x7126526a 0x3863e266 0x2c9221d0 0x15a74dc4 0x48441685 0x81a72d42 0x1e7c9f31 >; 000164 algo = "sha256"; 000178 } 00017c } 000180 kernel { 00018c data-size = < 0x15ba008 >; 00019c data-position = < 0x1ee00 >; 0001ac type = "kernel"; 0001c0 arch = "arm64"; 0001d4 os = "linux"; 0001e8 compression = "none"; 0001fc entry = < 0xffffff01 >; 00020c load = < 0xffffff01 >; 00021c hash { 000228 value = < 0x12d957b2 0x6e72c7e3 0xab747dc2 0xa52433b0 0xeb4e5a71 0xfeb69df7 0x2db12149 0x8da267bd >; 000254 algo = "sha256"; 000268 } 00026c } 000270 ramdisk { 00027c data-size = < 0x1aa3a98 >; 00028c data-position = < 0x15d9000 >; 00029c type = "ramdisk"; 0002b0 arch = "arm64"; 0002c4 os = "linux"; 0002d8 compression = "none"; 0002ec load = < 0xffffff02 >; 0002fc hash { 000308 value = < 0x3a626b27 0x8b6d2c15 0x5261fd8a 0x12f1c8a8 0xcda058d1 0x46349a96 0x8e74db97 0x7b3ac061 >; 000334 algo = "sha256"; 000348 } 00034c } 000350 resource { 000360 data-size = < 0x27a00 >; 000370 data-position = < 0x307cc00 >; 000380 type = "multi"; 000394 arch = "arm64"; 0003a8 compression = "none"; 0003bc hash { 0003c8 value = < 0xc108aa5e 0x41833d11 0xdacb6f54 0x4ed356e9 0x43864117 0x2b22935e 0xdd1b191c 0xed537e79 >; 0003f4 algo = "sha256"; 000408 } 00040c } 000410 } 000414 configurations { 000428 default = "conf"; 00043c conf { 000448 rollback-index = < 0x0 >; 000458 fdt = "fdt"; 000468 kernel = "kernel"; 00047c ramdisk = "ramdisk"; 000490 multi = "resource"; 0004a8 signature { 0004b8 algo = "sha256,rsa2048"; 0004d4 padding = "pss"; 0004e4 key-name-hint = "dev"; 0004f4 sign-images = "fdt\0kernel\0ramdisk\0multi"; 00051c } 000520 } 000524 } 000528 } 00052c End 000530 Strings 000800 Header 000838 / { 000840 compatible = "rockchip,rk3566-evb3-DDR3-v10\0rockchip,rk3566"; 00087c interrupt-parent = < 0x1 >; 00088c #address-cells = < 0x2 >; 00089c #size-cells = < 0x2 >; 0008ac model = "Rockchip RK3566 EVB3 DDR3 V10 Board"; 0008dc ddr_timing { 0008ec compatible = "rockchip,ddr-timing"; 00090c ddr2_speed_bin = < 0x0 >; 00091c ddr3_speed_bin = < 0x15 >; 00092c ddr4_speed_bin = < 0xc >; 00093c pd_idle = < 0xd >; 00094c sr_idle = < 0x5d >; 00095c sr_mc_gate_idle = < 0x0 >; 00096c srpd_lite_idle = < 0x0 >; 00097c standby_idle = < 0x0 >; 00098c auto_pd_dis_freq = < 0x42a >; 00099c auto_sr_dis_freq = < 0x320 >; 0009ac ddr2_dll_dis_freq = < 0x12c >; 0009bc ddr3_dll_dis_freq = < 0x12c >; 0009cc ddr4_dll_dis_freq = < 0x271 >; 0009dc phy_dll_dis_freq = < 0x190 >; 0009ec ddr2_odt_dis_freq = < 0x64 >; 0009fc phy_ddr2_odt_dis_freq = < 0x64 >; 000a0c ddr2_drv = < 0x2 >; 000a1c ddr2_odt = < 0x40 >; 000a2c phy_ddr2_ca_drv = < 0x0 >; 000a3c phy_ddr2_ck_drv = < 0x0 >; 000a4c phy_ddr2_dq_drv = < 0x0 >; 000a5c phy_ddr2_odt = < 0x0 >; 000a6c ddr3_odt_dis_freq = < 0x14d >; 000a7c phy_ddr3_odt_dis_freq = < 0x14d >; 000a8c ddr3_drv = < 0x2 >; 000a9c ddr3_odt = < 0x40 >; 000aac phy_ddr3_ca_drv = < 0x0 >; 000abc phy_ddr3_ck_drv = < 0x0 >; 000acc phy_ddr3_dq_drv = < 0x0 >; 000adc phy_ddr3_odt = < 0x0 >; 000aec phy_lpddr2_odt_dis_freq = < 0x14d >; 000afc lpddr2_drv = < 0x2 >; 000b0c phy_lpddr2_ca_drv = < 0x0 >; 000b1c phy_lpddr2_ck_drv = < 0x0 >; 000b2c phy_lpddr2_dq_drv = < 0x0 >; 000b3c phy_lpddr2_odt = < 0x0 >; 000b4c lpddr3_odt_dis_freq = < 0x14d >; 000b5c phy_lpddr3_odt_dis_freq = < 0x14d >; 000b6c lpddr3_drv = < 0x1 >; 000b7c lpddr3_odt = < 0x2 >; 000b8c phy_lpddr3_ca_drv = < 0x0 >; 000b9c phy_lpddr3_ck_drv = < 0x0 >; 000bac phy_lpddr3_dq_drv = < 0x0 >; 000bbc phy_lpddr3_odt = < 0x0 >; 000bcc lpddr4_odt_dis_freq = < 0x14d >; 000bdc phy_lpddr4_odt_dis_freq = < 0x14d >; 000bec lpddr4_drv = < 0x30 >; 000bfc lpddr4_dq_odt = < 0x1 >; 000c0c lpddr4_ca_odt = < 0x0 >; 000c1c phy_lpddr4_ca_drv = < 0x0 >; 000c2c phy_lpddr4_ck_cs_drv = < 0x0 >; 000c3c phy_lpddr4_dq_drv = < 0x0 >; 000c4c phy_lpddr4_odt = < 0x0 >; 000c5c ddr4_odt_dis_freq = < 0x271 >; 000c6c phy_ddr4_odt_dis_freq = < 0x271 >; 000c7c ddr4_drv = < 0x0 >; 000c8c ddr4_odt = < 0x200 >; 000c9c phy_ddr4_ca_drv = < 0x0 >; 000cac phy_ddr4_ck_drv = < 0x0 >; 000cbc phy_ddr4_dq_drv = < 0x0 >; 000ccc phy_ddr4_odt = < 0x0 >; 000cdc phandle = < 0xa6 >; 000cec } 000cf0 aliases { 000cfc csi2dphy0 = "/csi2-dphy0"; 000d14 csi2dphy1 = "/csi2-dphy1"; 000d2c csi2dphy2 = "/csi2-dphy2"; 000d44 dsi0 = "/dsi@fe060000"; 000d60 dsi1 = "/dsi@fe070000"; 000d7c ethernet1 = "/ethernet@fe010000"; 000d9c gpio0 = "/pinctrl/gpio@fdd60000"; 000dc0 gpio1 = "/pinctrl/gpio@fe740000"; 000de4 gpio2 = "/pinctrl/gpio@fe750000"; 000e08 gpio3 = "/pinctrl/gpio@fe760000"; 000e2c gpio4 = "/pinctrl/gpio@fe770000"; 000e50 i2c0 = "/i2c@fdd40000"; 000e6c i2c1 = "/i2c@fe5a0000"; 000e88 i2c2 = "/i2c@fe5b0000"; 000ea4 i2c3 = "/i2c@fe5c0000"; 000ec0 i2c4 = "/i2c@fe5d0000"; 000edc i2c5 = "/i2c@fe5e0000"; 000ef8 mmc0 = "/sdhci@fe310000"; 000f14 mmc1 = "/dwmmc@fe2b0000"; 000f30 mmc2 = "/dwmmc@fe2c0000"; 000f4c mmc3 = "/dwmmc@fe000000"; 000f68 serial0 = "/serial@fdd50000"; 000f88 serial1 = "/serial@fe650000"; 000fa8 serial2 = "/serial@fe660000"; 000fc8 serial3 = "/serial@fe670000"; 000fe8 serial4 = "/serial@fe680000"; 001008 serial5 = "/serial@fe690000"; 001028 serial6 = "/serial@fe6a0000"; 001048 serial7 = "/serial@fe6b0000"; 001068 serial8 = "/serial@fe6c0000"; 001088 serial9 = "/serial@fe6d0000"; 0010a8 spi0 = "/spi@fe610000"; 0010c4 spi1 = "/spi@fe620000"; 0010e0 spi2 = "/spi@fe630000"; 0010fc spi3 = "/spi@fe640000"; 001118 } 00111c cpus { 001128 #address-cells = < 0x2 >; 001138 #size-cells = < 0x0 >; 001148 cpu@0 { 001154 device_type = "cpu"; 001164 compatible = "arm,cortex-a55"; 001180 reg = < 0x0 0x0 >; 001194 enable-method = "psci"; 0011a8 clocks = < 0x2 0x0 >; 0011bc operating-points-v2 = < 0x3 >; 0011cc cpu-idle-states = < 0x4 >; 0011dc #cooling-cells = < 0x2 >; 0011ec dynamic-power-coefficient = < 0xbb >; 0011fc cpu-supply = < 0x5 >; 00120c phandle = < 0x9 >; 00121c power-model { 00122c compatible = "simple-power-model"; 00124c leakage-range = < 0xa 0x28 >; 001260 ls = < 0xffffdc14 0x18d8 0x0 >; 001278 static-coefficient = < 0x186a0 >; 001288 ts = < 0x1476e 0x3263d 0xffffef34 0x47 >; 0012a4 thermal-zone = "soc-thermal"; 0012bc } 0012c0 } 0012c4 cpu@100 { 0012d0 device_type = "cpu"; 0012e0 compatible = "arm,cortex-a55"; 0012fc reg = < 0x0 0x100 >; 001310 enable-method = "psci"; 001324 clocks = < 0x2 0x0 >; 001338 operating-points-v2 = < 0x3 >; 001348 cpu-idle-states = < 0x4 >; 001358 phandle = < 0xa >; 001368 } 00136c cpu@200 { 001378 device_type = "cpu"; 001388 compatible = "arm,cortex-a55"; 0013a4 reg = < 0x0 0x200 >; 0013b8 enable-method = "psci"; 0013cc clocks = < 0x2 0x0 >; 0013e0 operating-points-v2 = < 0x3 >; 0013f0 cpu-idle-states = < 0x4 >; 001400 phandle = < 0xb >; 001410 } 001414 cpu@300 { 001420 device_type = "cpu"; 001430 compatible = "arm,cortex-a55"; 00144c reg = < 0x0 0x300 >; 001460 enable-method = "psci"; 001474 clocks = < 0x2 0x0 >; 001488 operating-points-v2 = < 0x3 >; 001498 cpu-idle-states = < 0x4 >; 0014a8 phandle = < 0xc >; 0014b8 } 0014bc idle-states { 0014cc entry-method = "psci"; 0014e0 cpu-sleep { 0014f0 compatible = "arm,idle-state"; 00150c local-timer-stop; 001518 arm,psci-suspend-param = < 0x10000 >; 001528 entry-latency-us = < 0x64 >; 001538 exit-latency-us = < 0x78 >; 001548 min-residency-us = < 0x3e8 >; 001558 phandle = < 0x4 >; 001568 } 00156c } 001570 } 001574 cpu0-opp-table { 001588 compatible = "operating-points-v2"; 0015a8 opp-shared; 0015b4 mbist-vmin = < 0xc96a8 0xdbba0 0xe7ef0 >; 0015cc nvmem-cells = < 0x6 0x7 0x8 >; 0015e4 nvmem-cell-names = "leakage\0pvtm\0mbist-vmin"; 001608 rockchip,pvtm-voltage-sel = < 0x0 0x14050 0x0 0x14051 0x16b48 0x1 0x16b49 0x186a0 0x2 >; 001638 rockchip,pvtm-freq = < 0x639c0 >; 001648 rockchip,pvtm-volt = < 0xdbba0 >; 001658 rockchip,pvtm-ch = < 0x0 0x5 >; 00166c rockchip,pvtm-sample-time = < 0x3e8 >; 00167c rockchip,pvtm-number = < 0xa >; 00168c rockchip,pvtm-error = < 0x3e8 >; 00169c rockchip,pvtm-ref-temp = < 0x28 >; 0016ac rockchip,pvtm-temp-prop = < 0x1a 0x1a >; 0016c0 rockchip,thermal-zone = "soc-thermal"; 0016d8 rockchip,temp-hysteresis = < 0x1388 >; 0016e8 rockchip,low-temp = < 0x0 >; 0016f8 rockchip,low-temp-adjust-volt = < 0x0 0x648 0x124f8 >; 001710 phandle = < 0x3 >; 001720 opp-408000000 { 001734 opp-hz = < 0x0 0x18519600 >; 001748 opp-microvolt = < 0xc96a8 0xc96a8 0x118c30 >; 001760 clock-latency-ns = < 0x9c40 >; 001770 } 001774 opp-600000000 { 001788 opp-hz = < 0x0 0x23c34600 >; 00179c opp-microvolt = < 0xc96a8 0xc96a8 0x118c30 >; 0017b4 clock-latency-ns = < 0x9c40 >; 0017c4 } 0017c8 opp-816000000 { 0017dc opp-hz = < 0x0 0x30a32c00 >; 0017f0 opp-microvolt = < 0xc96a8 0xc96a8 0x118c30 >; 001808 clock-latency-ns = < 0x9c40 >; 001818 opp-suspend; 001824 } 001828 opp-1104000000 { 00183c opp-hz = < 0x0 0x41cdb400 >; 001850 opp-microvolt = < 0xc96a8 0xc96a8 0x118c30 >; 001868 clock-latency-ns = < 0x9c40 >; 001878 } 00187c opp-1416000000 { 001890 opp-hz = < 0x0 0x54667200 >; 0018a4 opp-microvolt = < 0xe1d48 0xe1d48 0x118c30 >; 0018bc clock-latency-ns = < 0x9c40 >; 0018cc } 0018d0 opp-1608000000 { 0018e4 opp-hz = < 0x0 0x5fd82200 >; 0018f8 opp-microvolt = < 0xf4240 0xf4240 0x118c30 >; 001910 clock-latency-ns = < 0x9c40 >; 001920 } 001924 opp-1800000000 { 001938 opp-hz = < 0x0 0x6b49d200 >; 00194c opp-microvolt = < 0x100590 0x100590 0x118c30 >; 001964 clock-latency-ns = < 0x9c40 >; 001974 } 001978 } 00197c arm-pmu { 001988 compatible = "arm,cortex-a55-pmu\0arm,armv8-pmuv3"; 0019b8 interrupts = < 0x0 0xe4 0x4 0x0 0xe5 0x4 0x0 0xe6 0x4 0x0 0xe7 0x4 >; 0019f4 interrupt-affinity = < 0x9 0xa 0xb 0xc >; 001a10 } 001a14 cpuinfo { 001a20 compatible = "rockchip,cpuinfo"; 001a40 nvmem-cells = < 0xd 0xe 0xf >; 001a58 nvmem-cell-names = "id\0cpu-version\0cpu-code"; 001a7c } 001a80 display-subsystem { 001a98 compatible = "rockchip,display-subsystem"; 001ac0 memory-region = < 0x10 0x11 >; 001ad4 memory-region-names = "drm-logo\0drm-cubic-lut"; 001af8 ports = < 0x12 >; 001b08 devfreq = < 0x13 >; 001b18 phandle = < 0x132 >; 001b28 route { 001b34 route-dsi0 { 001b44 status = "okay"; 001b58 logo,uboot = "logo.bmp"; 001b70 logo,kernel = "logo_kernel.bmp"; 001b8c logo,mode = "center"; 001ba0 charge_logo,mode = "center"; 001bb4 connect = < 0x14 >; 001bc4 phandle = < 0x133 >; 001bd4 } 001bd8 route-dsi1 { 001be8 status = "disabled"; 001c00 logo,uboot = "logo.bmp"; 001c18 logo,kernel = "logo_kernel.bmp"; 001c34 logo,mode = "center"; 001c48 charge_logo,mode = "center"; 001c5c connect = < 0x15 >; 001c6c phandle = < 0x134 >; 001c7c } 001c80 route-edp { 001c90 status = "disabled"; 001ca8 logo,uboot = "logo.bmp"; 001cc0 logo,kernel = "logo_kernel.bmp"; 001cdc logo,mode = "center"; 001cf0 charge_logo,mode = "center"; 001d04 connect = < 0x16 >; 001d14 phandle = < 0x135 >; 001d24 } 001d28 route-hdmi { 001d38 status = "okay"; 001d4c logo,uboot = "logo.bmp"; 001d64 logo,kernel = "logo_kernel.bmp"; 001d80 logo,mode = "center"; 001d94 charge_logo,mode = "center"; 001da8 connect = < 0x17 >; 001db8 phandle = < 0x136 >; 001dc8 } 001dcc route-lvds { 001ddc status = "disabled"; 001df4 logo,uboot = "logo.bmp"; 001e0c logo,kernel = "logo_kernel.bmp"; 001e28 logo,mode = "center"; 001e3c charge_logo,mode = "center"; 001e50 connect = < 0x18 >; 001e60 phandle = < 0x137 >; 001e70 } 001e74 route-rgb { 001e84 status = "disabled"; 001e9c logo,uboot = "logo.bmp"; 001eb4 logo,kernel = "logo_kernel.bmp"; 001ed0 logo,mode = "center"; 001ee4 charge_logo,mode = "center"; 001ef8 connect = < 0x19 >; 001f08 phandle = < 0x138 >; 001f18 } 001f1c } 001f20 } 001f24 firmware { 001f34 optee { 001f40 compatible = "linaro,optee-tz"; 001f5c method = "smc"; 001f6c phandle = < 0x139 >; 001f7c } 001f80 scmi { 001f8c compatible = "arm,scmi-smc"; 001fa8 shmem = < 0x1a >; 001fb8 arm,smc-id = < 0x82000010 >; 001fc8 #address-cells = < 0x1 >; 001fd8 #size-cells = < 0x0 >; 001fe8 phandle = < 0x13a >; 001ff8 protocol@14 { 002008 reg = < 0x14 >; 002018 #clock-cells = < 0x1 >; 002028 rockchip,clk-init = "Tfr"; 002038 phandle = < 0x2 >; 002048 } 00204c } 002050 sdei { 00205c compatible = "arm,sdei-1.0"; 002078 method = "smc"; 002088 phandle = < 0x13b >; 002098 } 00209c } 0020a0 mpp-srv { 0020ac compatible = "rockchip,mpp-service"; 0020d0 rockchip,taskqueue-count = < 0x6 >; 0020e0 rockchip,resetgroup-count = < 0x6 >; 0020f0 status = "okay"; 002104 phandle = < 0x66 >; 002114 } 002118 psci { 002124 compatible = "arm,psci-1.0"; 002140 method = "smc"; 002150 } 002154 reserved-memory { 002168 #address-cells = < 0x2 >; 002178 #size-cells = < 0x2 >; 002188 ranges; 002194 phandle = < 0x13c >; 0021a4 drm-logo@00000000 { 0021bc compatible = "rockchip,drm-logo"; 0021dc reg = < 0x0 0x0 0x0 0x0 >; 0021f8 phandle = < 0x10 >; 002208 } 00220c drm-cubic-lut@00000000 { 002228 compatible = "rockchip,drm-cubic-lut"; 00224c reg = < 0x0 0x0 0x0 0x0 >; 002268 phandle = < 0x11 >; 002278 } 00227c ramoops@110000 { 002290 compatible = "ramoops"; 0022a4 reg = < 0x0 0x110000 0x0 0xf0000 >; 0022c0 record-size = < 0x20000 >; 0022d0 console-size = < 0x80000 >; 0022e0 ftrace-size = < 0x0 >; 0022f0 pmsg-size = < 0x50000 >; 002300 phandle = < 0x13d >; 002310 } 002314 } 002318 rockchip-suspend { 002330 compatible = "rockchip,pm-rk3568"; 002350 status = "okay"; 002364 rockchip,sleep-debug-en = < 0x1 >; 002374 rockchip,sleep-mode-config = < 0x5ec >; 002384 rockchip,wakeup-config = < 0x10 >; 002394 phandle = < 0x13e >; 0023a4 } 0023a8 rockchip-system-monitor { 0023c4 compatible = "rockchip,system-monitor"; 0023e8 rockchip,thermal-zone = "soc-thermal"; 002400 phandle = < 0x13f >; 002410 } 002414 thermal-zones { 002428 phandle = < 0x140 >; 002438 soc-thermal { 002448 polling-delay-passive = < 0x14 >; 002458 polling-delay = < 0x3e8 >; 002468 sustainable-power = < 0x5c3 >; 002478 thermal-sensors = < 0x1b 0x0 >; 00248c phandle = < 0x141 >; 00249c trips { 0024a8 trip-point-0 { 0024bc temperature = < 0x11170 >; 0024cc hysteresis = < 0x7d0 >; 0024dc type = "passive"; 0024f0 phandle = < 0x142 >; 002500 } 002504 trip-point-1 { 002518 temperature = < 0x14c08 >; 002528 hysteresis = < 0x7d0 >; 002538 type = "passive"; 00254c phandle = < 0x1c >; 00255c } 002560 soc-crit { 002570 temperature = < 0x1c138 >; 002580 hysteresis = < 0x7d0 >; 002590 type = "critical"; 0025a8 phandle = < 0x143 >; 0025b8 } 0025bc } 0025c0 cooling-maps { 0025d4 map0 { 0025e0 trip = < 0x1c >; 0025f0 cooling-device = < 0x9 0xffffffff 0xffffffff >; 002608 contribution = < 0x400 >; 002618 } 00261c map1 { 002628 trip = < 0x1c >; 002638 cooling-device = < 0x1d 0xffffffff 0xffffffff >; 002650 contribution = < 0x400 >; 002660 } 002664 } 002668 } 00266c gpu-thermal { 00267c polling-delay-passive = < 0x14 >; 00268c polling-delay = < 0x3e8 >; 00269c thermal-sensors = < 0x1b 0x1 >; 0026b0 phandle = < 0x144 >; 0026c0 } 0026c4 } 0026c8 timer { 0026d4 compatible = "arm,armv8-timer"; 0026f0 interrupts = < 0x1 0xd 0xf04 0x1 0xe 0xf04 0x1 0xb 0xf04 0x1 0xa 0xf04 >; 00272c arm,no-tick-in-suspend; 002738 } 00273c external-gmac1-clock { 002758 compatible = "fixed-clock"; 002770 clock-frequency = < 0x7735940 >; 002780 clock-output-names = "gmac1_clkin"; 002798 #clock-cells = < 0x0 >; 0027a8 phandle = < 0x145 >; 0027b8 } 0027bc xpcs-gmac1-clock { 0027d4 compatible = "fixed-clock"; 0027ec clock-frequency = < 0x7735940 >; 0027fc clock-output-names = "clk_gmac1_xpcs_mii"; 00281c #clock-cells = < 0x0 >; 00282c phandle = < 0x146 >; 00283c } 002840 i2s1-mclkin-rx { 002854 compatible = "fixed-clock"; 00286c #clock-cells = < 0x0 >; 00287c clock-frequency = < 0xbb8000 >; 00288c clock-output-names = "i2s1_mclkin_rx"; 0028a8 phandle = < 0x147 >; 0028b8 } 0028bc i2s1-mclkin-tx { 0028d0 compatible = "fixed-clock"; 0028e8 #clock-cells = < 0x0 >; 0028f8 clock-frequency = < 0xbb8000 >; 002908 clock-output-names = "i2s1_mclkin_tx"; 002924 phandle = < 0x148 >; 002934 } 002938 i2s2-mclkin { 002948 compatible = "fixed-clock"; 002960 #clock-cells = < 0x0 >; 002970 clock-frequency = < 0xbb8000 >; 002980 clock-output-names = "i2s2_mclkin"; 002998 phandle = < 0x149 >; 0029a8 } 0029ac i2s3-mclkin { 0029bc compatible = "fixed-clock"; 0029d4 #clock-cells = < 0x0 >; 0029e4 clock-frequency = < 0xbb8000 >; 0029f4 clock-output-names = "i2s3_mclkin"; 002a0c phandle = < 0x14a >; 002a1c } 002a20 mpll { 002a2c compatible = "fixed-clock"; 002a44 #clock-cells = < 0x0 >; 002a54 clock-frequency = < 0x2faf0800 >; 002a64 clock-output-names = "mpll"; 002a78 phandle = < 0x14b >; 002a88 } 002a8c xin24m { 002a98 compatible = "fixed-clock"; 002ab0 #clock-cells = < 0x0 >; 002ac0 clock-frequency = < 0x16e3600 >; 002ad0 clock-output-names = "xin24m"; 002ae4 phandle = < 0x14c >; 002af4 } 002af8 xin32k { 002b04 compatible = "fixed-clock"; 002b1c clock-frequency = < 0x8000 >; 002b2c clock-output-names = "xin32k"; 002b40 #clock-cells = < 0x0 >; 002b50 pinctrl-names = "default"; 002b64 pinctrl-0 = < 0x1e >; 002b74 phandle = < 0x14d >; 002b84 } 002b88 scmi-shmem@10f000 { 002ba0 compatible = "arm,scmi-shmem"; 002bbc reg = < 0x0 0x10f000 0x0 0x100 >; 002bd8 phandle = < 0x1a >; 002be8 } 002bec sata@fc400000 { 002c00 compatible = "snps,dwc-ahci"; 002c1c reg = < 0x0 0xfc400000 0x0 0x1000 >; 002c38 clocks = < 0x1f 0x9b 0x1f 0x9c 0x1f 0x9d >; 002c5c clock-names = "sata\0pmalive\0rxoob"; 002c7c interrupts = < 0x0 0x5f 0x4 >; 002c94 interrupt-names = "hostc"; 002ca8 phys = < 0x20 0x1 >; 002cbc phy-names = "sata-phy"; 002cd4 ports-implemented = < 0x1 >; 002ce4 power-domains = < 0x21 0xf >; 002cf8 status = "disabled"; 002d10 phandle = < 0x14e >; 002d20 } 002d24 sata@fc800000 { 002d38 compatible = "snps,dwc-ahci"; 002d54 reg = < 0x0 0xfc800000 0x0 0x1000 >; 002d70 clocks = < 0x1f 0xa0 0x1f 0xa1 0x1f 0xa2 >; 002d94 clock-names = "sata\0pmalive\0rxoob"; 002db4 interrupts = < 0x0 0x60 0x4 >; 002dcc interrupt-names = "hostc"; 002de0 phys = < 0x22 0x1 >; 002df4 phy-names = "sata-phy"; 002e0c ports-implemented = < 0x1 >; 002e1c power-domains = < 0x21 0xf >; 002e30 status = "disabled"; 002e48 phandle = < 0x14f >; 002e58 } 002e5c usbdrd { 002e68 compatible = "rockchip,rk3568-dwc3\0rockchip,rk3399-dwc3"; 002ea0 clocks = < 0x1f 0xa6 0x1f 0xa7 0x1f 0xa5 0x1f 0x7f >; 002ecc clock-names = "ref_clk\0suspend_clk\0bus_clk\0pipe_clk"; 002f00 #address-cells = < 0x2 >; 002f10 #size-cells = < 0x2 >; 002f20 ranges; 002f2c status = "okay"; 002f40 phandle = < 0x150 >; 002f50 dwc3@fcc00000 { 002f64 compatible = "snps,dwc3"; 002f7c reg = < 0x0 0xfcc00000 0x0 0x400000 >; 002f98 interrupts = < 0x0 0xa9 0x4 >; 002fb0 dr_mode = "host"; 002fc4 phys = < 0x23 >; 002fd4 phy-names = "usb2-phy"; 002fec phy_type = "utmi_wide"; 003004 power-domains = < 0x21 0xf >; 003018 resets = < 0x1f 0x94 >; 00302c reset-names = "usb3-otg"; 003044 snps,dis_enblslpm_quirk; 003050 snps,dis-u2-freeclk-exists-quirk; 00305c snps,dis-del-phy-power-chg-quirk; 003068 snps,dis-tx-ipgap-linecheck-quirk; 003074 snps,dis_rxdet_inp3_quirk; 003080 snps,xhci-trb-ent-quirk; 00308c status = "okay"; 0030a0 extcon = < 0x24 >; 0030b0 maximum-speed = "high-speed"; 0030c8 snps,dis_u2_susphy_quirk; 0030d4 phandle = < 0x151 >; 0030e4 } 0030e8 } 0030ec usbhost { 0030f8 compatible = "rockchip,rk3568-dwc3\0rockchip,rk3399-dwc3"; 003130 clocks = < 0x1f 0xa9 0x1f 0xaa 0x1f 0xa8 0x1f 0x7f >; 00315c clock-names = "ref_clk\0suspend_clk\0bus_clk\0pipe_clk"; 003190 #address-cells = < 0x2 >; 0031a0 #size-cells = < 0x2 >; 0031b0 ranges; 0031bc status = "okay"; 0031d0 phandle = < 0x152 >; 0031e0 dwc3@fd000000 { 0031f4 compatible = "snps,dwc3"; 00320c reg = < 0x0 0xfd000000 0x0 0x400000 >; 003228 interrupts = < 0x0 0xaa 0x4 >; 003240 dr_mode = "host"; 003254 phys = < 0x25 0x20 0x4 >; 00326c phy-names = "usb2-phy\0usb3-phy"; 00328c phy_type = "utmi_wide"; 0032a4 power-domains = < 0x21 0xf >; 0032b8 resets = < 0x1f 0x95 >; 0032cc reset-names = "usb3-host"; 0032e4 snps,dis_enblslpm_quirk; 0032f0 snps,dis-u2-freeclk-exists-quirk; 0032fc snps,dis-del-phy-power-chg-quirk; 003308 snps,dis-tx-ipgap-linecheck-quirk; 003314 snps,dis_rxdet_inp3_quirk; 003320 snps,xhci-trb-ent-quirk; 00332c status = "okay"; 003340 phandle = < 0x153 >; 003350 } 003354 } 003358 interrupt-controller@fd400000 { 00337c compatible = "arm,gic-v3"; 003394 #interrupt-cells = < 0x3 >; 0033a4 #address-cells = < 0x2 >; 0033b4 #size-cells = < 0x2 >; 0033c4 ranges; 0033d0 interrupt-controller; 0033dc reg = < 0x0 0xfd400000 0x0 0x10000 0x0 0xfd460000 0x0 0xc0000 >; 003408 interrupts = < 0x1 0x9 0x4 >; 003420 phandle = < 0x1 >; 003430 interrupt-controller@fd440000 { 003454 compatible = "arm,gic-v3-its"; 003470 msi-controller; 00347c #msi-cells = < 0x1 >; 00348c reg = < 0x0 0xfd440000 0x0 0x20000 >; 0034a8 phandle = < 0xa9 >; 0034b8 } 0034bc } 0034c0 usb@fd800000 { 0034d4 compatible = "generic-ehci"; 0034f0 reg = < 0x0 0xfd800000 0x0 0x40000 >; 00350c interrupts = < 0x0 0x82 0x4 >; 003524 clocks = < 0x1f 0xbd 0x1f 0xbe 0x1f 0xbc 0x26 >; 00354c clock-names = "usbhost\0arbiter\0pclk\0utmi"; 003574 phys = < 0x27 >; 003584 phy-names = "usb2-phy"; 00359c status = "disabled"; 0035b4 phandle = < 0x154 >; 0035c4 } 0035c8 usb@fd840000 { 0035dc compatible = "generic-ohci"; 0035f8 reg = < 0x0 0xfd840000 0x0 0x40000 >; 003614 interrupts = < 0x0 0x83 0x4 >; 00362c clocks = < 0x1f 0xbd 0x1f 0xbe 0x1f 0xbc 0x26 >; 003654 clock-names = "usbhost\0arbiter\0pclk\0utmi"; 00367c phys = < 0x27 >; 00368c phy-names = "usb2-phy"; 0036a4 status = "disabled"; 0036bc phandle = < 0x155 >; 0036cc } 0036d0 usb@fd880000 { 0036e4 compatible = "generic-ehci"; 003700 reg = < 0x0 0xfd880000 0x0 0x40000 >; 00371c interrupts = < 0x0 0x85 0x4 >; 003734 clocks = < 0x1f 0xbf 0x1f 0xc0 0x1f 0xbc 0x26 >; 00375c clock-names = "usbhost\0arbiter\0pclk\0utmi"; 003784 phys = < 0x28 >; 003794 phy-names = "usb2-phy"; 0037ac status = "disabled"; 0037c4 phandle = < 0x156 >; 0037d4 } 0037d8 usb@fd8c0000 { 0037ec compatible = "generic-ohci"; 003808 reg = < 0x0 0xfd8c0000 0x0 0x40000 >; 003824 interrupts = < 0x0 0x86 0x4 >; 00383c clocks = < 0x1f 0xbf 0x1f 0xc0 0x1f 0xbc 0x26 >; 003864 clock-names = "usbhost\0arbiter\0pclk\0utmi"; 00388c phys = < 0x28 >; 00389c phy-names = "usb2-phy"; 0038b4 status = "disabled"; 0038cc phandle = < 0x157 >; 0038dc } 0038e0 syscon@fda00000 { 0038f4 compatible = "rockchip,rk3568-xpcs\0syscon"; 00391c reg = < 0x0 0xfda00000 0x0 0x200000 >; 003938 status = "disabled"; 003950 phandle = < 0x158 >; 003960 } 003964 syscon@fdc20000 { 003978 compatible = "rockchip,rk3568-pmugrf\0syscon\0simple-mfd"; 0039b0 reg = < 0x0 0xfdc20000 0x0 0x10000 >; 0039cc phandle = < 0x33 >; 0039dc io-domains { 0039ec compatible = "rockchip,rk3568-pmu-io-voltage-domain"; 003a20 status = "okay"; 003a34 pmuio2-supply = < 0x29 >; 003a44 vccio1-supply = < 0x2a >; 003a54 vccio3-supply = < 0x2b >; 003a64 vccio4-supply = < 0x2c >; 003a74 vccio5-supply = < 0x2d >; 003a84 vccio6-supply = < 0x2c >; 003a94 vccio7-supply = < 0x2d >; 003aa4 pmuio1-supply = < 0x29 >; 003ab4 phandle = < 0x159 >; 003ac4 } 003ac8 reboot-mode { 003ad8 compatible = "syscon-reboot-mode"; 003af8 offset = < 0x200 >; 003b08 mode-bootloader = < 0x5242c301 >; 003b18 mode-charge = < 0x5242c30b >; 003b28 mode-fastboot = < 0x5242c309 >; 003b38 mode-loader = < 0x5242c301 >; 003b48 mode-normal = < 0x5242c300 >; 003b58 mode-recovery = < 0x5242c303 >; 003b68 mode-ums = < 0x5242c30c >; 003b78 mode-panic = < 0x5242c307 >; 003b88 mode-watchdog = < 0x5242c308 >; 003b98 phandle = < 0x15a >; 003ba8 } 003bac } 003bb0 syscon@fdc50000 { 003bc4 compatible = "rockchip,rk3568-pipegrf\0syscon"; 003bf0 reg = < 0x0 0xfdc50000 0x0 0x1000 >; 003c0c phandle = < 0x102 >; 003c1c } 003c20 syscon@fdc60000 { 003c34 compatible = "rockchip,rk3568-grf\0syscon\0simple-mfd"; 003c68 reg = < 0x0 0xfdc60000 0x0 0x10000 >; 003c84 phandle = < 0x32 >; 003c94 io-domains { 003ca4 compatible = "rockchip,rk3568-io-voltage-domain"; 003cd4 status = "disabled"; 003cec phandle = < 0x15b >; 003cfc } 003d00 lvds { 003d0c compatible = "rockchip,rk3568-lvds"; 003d30 phys = < 0x2e >; 003d40 phy-names = "phy"; 003d50 status = "disabled"; 003d68 phandle = < 0x15c >; 003d78 ports { 003d84 #address-cells = < 0x1 >; 003d94 #size-cells = < 0x0 >; 003da4 port@0 { 003db0 reg = < 0x0 >; 003dc0 #address-cells = < 0x1 >; 003dd0 #size-cells = < 0x0 >; 003de0 endpoint@1 { 003df0 reg = < 0x1 >; 003e00 remote-endpoint = < 0x18 >; 003e10 status = "disabled"; 003e28 phandle = < 0x8a >; 003e38 } 003e3c endpoint@2 { 003e4c reg = < 0x2 >; 003e5c remote-endpoint = < 0x2f >; 003e6c status = "disabled"; 003e84 phandle = < 0x8b >; 003e94 } 003e98 } 003e9c } 003ea0 } 003ea4 rgb { 003eac compatible = "rockchip,rk3568-rgb"; 003ecc pinctrl-names = "default"; 003ee0 pinctrl-0 = < 0x30 >; 003ef0 status = "disabled"; 003f08 phandle = < 0x15d >; 003f18 ports { 003f24 #address-cells = < 0x1 >; 003f34 #size-cells = < 0x0 >; 003f44 port@0 { 003f50 reg = < 0x0 >; 003f60 #address-cells = < 0x1 >; 003f70 #size-cells = < 0x0 >; 003f80 endpoint@2 { 003f90 reg = < 0x2 >; 003fa0 remote-endpoint = < 0x19 >; 003fb0 status = "disabled"; 003fc8 phandle = < 0x8c >; 003fd8 } 003fdc } 003fe0 } 003fe4 } 003fe8 } 003fec syscon@fdc70000 { 004000 compatible = "rockchip,pipe-phy-grf\0syscon"; 00402c reg = < 0x0 0xfdc70000 0x0 0x1000 >; 004048 phandle = < 0x15e >; 004058 } 00405c syscon@fdc80000 { 004070 compatible = "rockchip,pipe-phy-grf\0syscon"; 00409c reg = < 0x0 0xfdc80000 0x0 0x1000 >; 0040b8 phandle = < 0x103 >; 0040c8 } 0040cc syscon@fdc90000 { 0040e0 compatible = "rockchip,pipe-phy-grf\0syscon"; 00410c reg = < 0x0 0xfdc90000 0x0 0x1000 >; 004128 phandle = < 0x104 >; 004138 } 00413c syscon@fdca0000 { 004150 compatible = "rockchip,rk3568-usb2phy-grf\0syscon"; 004180 reg = < 0x0 0xfdca0000 0x0 0x8000 >; 00419c phandle = < 0x109 >; 0041ac } 0041b0 syscon@fdca8000 { 0041c4 compatible = "rockchip,rk3568-usb2phy-grf\0syscon"; 0041f4 reg = < 0x0 0xfdca8000 0x0 0x8000 >; 004210 phandle = < 0x10c >; 004220 } 004224 edp-phy@fdcb0000 { 00423c compatible = "rockchip,rk3568-edp-phy"; 004260 reg = < 0x0 0xfdcb0000 0x0 0x8000 >; 00427c clocks = < 0x31 0x29 0x1f 0x192 >; 004298 clock-names = "refclk\0pclk"; 0042b0 resets = < 0x1f 0x1d6 >; 0042c4 reset-names = "apb"; 0042d4 #phy-cells = < 0x0 >; 0042e4 status = "okay"; 0042f8 phandle = < 0xa2 >; 004308 } 00430c sram@fdcc0000 { 004320 compatible = "mmio-sram"; 004338 reg = < 0x0 0xfdcc0000 0x0 0xb000 >; 004354 #address-cells = < 0x1 >; 004364 #size-cells = < 0x1 >; 004374 ranges = < 0x0 0x0 0xfdcc0000 0xb000 >; 004390 phandle = < 0x15f >; 0043a0 rkvdec-sram@0 { 0043b4 reg = < 0x0 0xb000 >; 0043c8 phandle = < 0x6e >; 0043d8 } 0043dc } 0043e0 clock-controller@fdd00000 { 004400 compatible = "rockchip,rk3568-pmucru"; 004424 reg = < 0x0 0xfdd00000 0x0 0x1000 >; 004440 rockchip,grf = < 0x32 >; 004450 rockchip,pmugrf = < 0x33 >; 004460 #clock-cells = < 0x1 >; 004470 #reset-cells = < 0x1 >; 004480 assigned-clocks = < 0x31 0x32 >; 004494 assigned-clock-parents = < 0x31 0x5 >; 0044a8 phandle = < 0x31 >; 0044b8 } 0044bc clock-controller@fdd20000 { 0044dc compatible = "rockchip,rk3568-cru"; 0044fc reg = < 0x0 0xfdd20000 0x0 0x1000 >; 004518 rockchip,grf = < 0x32 >; 004528 #clock-cells = < 0x1 >; 004538 #reset-cells = < 0x1 >; 004548 assigned-clocks = < 0x31 0x5 0x1f 0x106 0x1f 0x10b 0x31 0x1 0x31 0x2b 0x1f 0x3 0x1f 0x19b 0x1f 0x9 0x1f 0x19c 0x1f 0x19d 0x1f 0x1a1 0x1f 0x19e 0x1f 0x19f 0x1f 0x1a0 0x1f 0x4 0x1f 0x10d 0x1f 0x10e 0x1f 0x173 0x1f 0x174 0x1f 0x175 0x1f 0x176 0x1f 0xc9 0x1f 0xca 0x1f 0x6 0x1f 0x7e 0x1f 0x7f 0x1f 0x3d 0x1f 0x41 0x1f 0x45 0x1f 0x49 0x1f 0x4d 0x1f 0x4d 0x1f 0x55 0x1f 0x51 0x1f 0x5d 0x1f 0xdd >; 004674 assigned-clock-rates = < 0x8000 0x11e1a300 0x11e1a300 0xbebc200 0x5f5e100 0x3b9aca00 0x1dcd6500 0x13d92d40 0xee6b280 0x7735940 0x5f5e100 0x3b9aca0 0x2faf080 0x17d7840 0x46cf7100 0x8f0d180 0x5f5e100 0x1dcd6500 0x17d78400 0x8f0d180 0x5f5e100 0x11e1a300 0x8f0d180 0x47868c00 0x17d78400 0x5f5e100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x1dcd6500 >; 004710 assigned-clock-parents = < 0x31 0x8 0x1f 0x4 0x1f 0x4 >; 004734 phandle = < 0x1f >; 004744 } 004748 i2c@fdd40000 { 00475c compatible = "rockchip,rk3399-i2c"; 00477c reg = < 0x0 0xfdd40000 0x0 0x1000 >; 004798 clocks = < 0x31 0x7 0x31 0x2d >; 0047b4 clock-names = "i2c\0pclk"; 0047cc interrupts = < 0x0 0x2e 0x4 >; 0047e4 pinctrl-names = "default"; 0047f8 pinctrl-0 = < 0x34 >; 004808 #address-cells = < 0x1 >; 004818 #size-cells = < 0x0 >; 004828 status = "okay"; 00483c phandle = < 0x160 >; 00484c pmic@20 { 004858 compatible = "rockchip,rk809"; 004874 reg = < 0x20 >; 004884 interrupt-parent = < 0x35 >; 004894 interrupts = < 0x3 0x8 >; 0048a8 pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset"; 0048e4 pinctrl-0 = < 0x36 >; 0048f4 pinctrl-1 = < 0x37 0x38 >; 004908 pinctrl-2 = < 0x39 0x3a >; 00491c pinctrl-3 = < 0x39 0x3b >; 004930 rockchip,system-power-controller; 00493c wakeup-source; 004948 #clock-cells = < 0x1 >; 004958 clock-output-names = "rk808-clkout1\0rk808-clkout2"; 004980 pmic-reset-func = < 0x0 >; 004990 not-save-power-en = < 0x1 >; 0049a0 vcc1-supply = < 0x3c >; 0049b0 vcc2-supply = < 0x3c >; 0049c0 vcc3-supply = < 0x3c >; 0049d0 vcc4-supply = < 0x3c >; 0049e0 vcc5-supply = < 0x3c >; 0049f0 vcc6-supply = < 0x3c >; 004a00 vcc7-supply = < 0x3c >; 004a10 vcc8-supply = < 0x3c >; 004a20 vcc9-supply = < 0x3c >; 004a30 phandle = < 0x12a >; 004a40 pwrkey { 004a4c status = "okay"; 004a60 } 004a64 pinctrl_rk8xx { 004a78 gpio-controller; 004a84 #gpio-cells = < 0x2 >; 004a94 phandle = < 0x161 >; 004aa4 rk817_slppin_null { 004abc pins = "gpio_slp"; 004ad4 function = "pin_fun0"; 004aec phandle = < 0x162 >; 004afc } 004b00 rk817_slppin_slp { 004b18 pins = "gpio_slp"; 004b30 function = "pin_fun1"; 004b48 phandle = < 0x38 >; 004b58 } 004b5c rk817_slppin_pwrdn { 004b74 pins = "gpio_slp"; 004b8c function = "pin_fun2"; 004ba4 phandle = < 0x3a >; 004bb4 } 004bb8 rk817_slppin_rst { 004bd0 pins = "gpio_slp"; 004be8 function = "pin_fun3"; 004c00 phandle = < 0x3b >; 004c10 } 004c14 } 004c18 regulators { 004c28 DCDC_REG1 { 004c38 regulator-always-on; 004c44 regulator-boot-on; 004c50 regulator-min-microvolt = < 0x7a120 >; 004c60 regulator-max-microvolt = < 0x149970 >; 004c70 regulator-init-microvolt = < 0xdbba0 >; 004c80 regulator-ramp-delay = < 0x1771 >; 004c90 regulator-initial-mode = < 0x2 >; 004ca0 regulator-name = "vdd_logic"; 004cb8 phandle = < 0x61 >; 004cc8 regulator-state-mem { 004ce0 regulator-off-in-suspend; 004cec } 004cf0 } 004cf4 DCDC_REG2 { 004d04 regulator-always-on; 004d10 regulator-boot-on; 004d1c regulator-min-microvolt = < 0x7a120 >; 004d2c regulator-max-microvolt = < 0x149970 >; 004d3c regulator-init-microvolt = < 0xdbba0 >; 004d4c regulator-ramp-delay = < 0x1771 >; 004d5c regulator-initial-mode = < 0x2 >; 004d6c regulator-name = "vdd_gpu"; 004d80 phandle = < 0x63 >; 004d90 regulator-state-mem { 004da8 regulator-off-in-suspend; 004db4 } 004db8 } 004dbc DCDC_REG3 { 004dcc regulator-always-on; 004dd8 regulator-boot-on; 004de4 regulator-initial-mode = < 0x2 >; 004df4 regulator-name = "vcc_ddr"; 004e08 phandle = < 0x163 >; 004e18 regulator-state-mem { 004e30 regulator-on-in-suspend; 004e3c } 004e40 } 004e44 DCDC_REG4 { 004e54 regulator-always-on; 004e60 regulator-boot-on; 004e6c regulator-min-microvolt = < 0x7a120 >; 004e7c regulator-max-microvolt = < 0x149970 >; 004e8c regulator-init-microvolt = < 0xdbba0 >; 004e9c regulator-ramp-delay = < 0x1771 >; 004eac regulator-initial-mode = < 0x2 >; 004ebc regulator-name = "vdd_npu"; 004ed0 phandle = < 0x5e >; 004ee0 regulator-state-mem { 004ef8 regulator-off-in-suspend; 004f04 } 004f08 } 004f0c LDO_REG1 { 004f1c regulator-boot-on; 004f28 regulator-always-on; 004f34 regulator-min-microvolt = < 0xdbba0 >; 004f44 regulator-max-microvolt = < 0xdbba0 >; 004f54 regulator-name = "vdda0v9_image"; 004f70 phandle = < 0x164 >; 004f80 regulator-state-mem { 004f98 regulator-off-in-suspend; 004fa4 } 004fa8 } 004fac LDO_REG2 { 004fbc regulator-always-on; 004fc8 regulator-boot-on; 004fd4 regulator-min-microvolt = < 0xdbba0 >; 004fe4 regulator-max-microvolt = < 0xdbba0 >; 004ff4 regulator-name = "vdda_0v9"; 00500c phandle = < 0x165 >; 00501c regulator-state-mem { 005034 regulator-off-in-suspend; 005040 } 005044 } 005048 LDO_REG3 { 005058 regulator-always-on; 005064 regulator-boot-on; 005070 regulator-min-microvolt = < 0xdbba0 >; 005080 regulator-max-microvolt = < 0xdbba0 >; 005090 regulator-name = "vdda0v9_pmu"; 0050a8 phandle = < 0x166 >; 0050b8 regulator-state-mem { 0050d0 regulator-on-in-suspend; 0050dc regulator-suspend-microvolt = < 0xdbba0 >; 0050ec } 0050f0 } 0050f4 LDO_REG4 { 005104 regulator-always-on; 005110 regulator-boot-on; 00511c regulator-min-microvolt = < 0x325aa0 >; 00512c regulator-max-microvolt = < 0x325aa0 >; 00513c regulator-name = "vccio_acodec"; 005158 phandle = < 0x2a >; 005168 regulator-state-mem { 005180 regulator-off-in-suspend; 00518c } 005190 } 005194 LDO_REG5 { 0051a4 regulator-always-on; 0051b0 regulator-boot-on; 0051bc regulator-min-microvolt = < 0x1b7740 >; 0051cc regulator-max-microvolt = < 0x325aa0 >; 0051dc regulator-name = "vccio_sd"; 0051f4 phandle = < 0x2b >; 005204 regulator-state-mem { 00521c regulator-off-in-suspend; 005228 } 00522c } 005230 LDO_REG6 { 005240 regulator-always-on; 00524c regulator-boot-on; 005258 regulator-min-microvolt = < 0x325aa0 >; 005268 regulator-max-microvolt = < 0x325aa0 >; 005278 regulator-name = "vcc3v3_pmu"; 005290 phandle = < 0x29 >; 0052a0 regulator-state-mem { 0052b8 regulator-on-in-suspend; 0052c4 regulator-suspend-microvolt = < 0x325aa0 >; 0052d4 } 0052d8 } 0052dc LDO_REG7 { 0052ec regulator-always-on; 0052f8 regulator-boot-on; 005304 regulator-min-microvolt = < 0x1b7740 >; 005314 regulator-max-microvolt = < 0x1b7740 >; 005324 regulator-name = "vcca_1v8"; 00533c phandle = < 0x101 >; 00534c regulator-state-mem { 005364 regulator-off-in-suspend; 005370 } 005374 } 005378 LDO_REG8 { 005388 regulator-always-on; 005394 regulator-boot-on; 0053a0 regulator-min-microvolt = < 0x1b7740 >; 0053b0 regulator-max-microvolt = < 0x1b7740 >; 0053c0 regulator-name = "vcca1v8_pmu"; 0053d8 phandle = < 0x167 >; 0053e8 regulator-state-mem { 005400 regulator-on-in-suspend; 00540c regulator-suspend-microvolt = < 0x1b7740 >; 00541c } 005420 } 005424 LDO_REG9 { 005434 regulator-always-on; 005440 regulator-boot-on; 00544c regulator-min-microvolt = < 0x1b7740 >; 00545c regulator-max-microvolt = < 0x1b7740 >; 00546c regulator-name = "vcca1v8_image"; 005488 phandle = < 0x168 >; 005498 regulator-state-mem { 0054b0 regulator-off-in-suspend; 0054bc } 0054c0 } 0054c4 DCDC_REG5 { 0054d4 regulator-always-on; 0054e0 regulator-boot-on; 0054ec regulator-min-microvolt = < 0x1b7740 >; 0054fc regulator-max-microvolt = < 0x1b7740 >; 00550c regulator-name = "vcc_1v8"; 005520 phandle = < 0x2c >; 005530 regulator-state-mem { 005548 regulator-off-in-suspend; 005554 } 005558 } 00555c SWITCH_REG1 { 00556c regulator-always-on; 005578 regulator-boot-on; 005584 regulator-name = "vcc_3v3"; 005598 phandle = < 0x2d >; 0055a8 regulator-state-mem { 0055c0 regulator-off-in-suspend; 0055cc } 0055d0 } 0055d4 SWITCH_REG2 { 0055e4 regulator-always-on; 0055f0 regulator-boot-on; 0055fc regulator-name = "vcc3v3_sd"; 005614 phandle = < 0xaa >; 005624 regulator-state-mem { 00563c regulator-off-in-suspend; 005648 } 00564c } 005650 } 005654 codec { 005660 #sound-dai-cells = < 0x0 >; 005670 compatible = "rockchip,rk809-codec\0rockchip,rk817-codec"; 0056a8 clocks = < 0x1f 0x1a4 >; 0056bc clock-names = "mclk"; 0056d0 assigned-clocks = < 0x1f 0x1a4 0x1f 0x1a8 >; 0056ec assigned-clock-rates = < 0xbb8000 >; 0056fc assigned-clock-parents = < 0x1f 0x54 0x1f 0x1a4 >; 005718 pinctrl-names = "default"; 00572c hp-volume = < 0x14 >; 00573c spk-volume = < 0x3 >; 00574c mic-in-differential; 005758 status = "disabled"; 005770 phandle = < 0x122 >; 005780 } 005784 } 005788 tcs4525@1c { 005798 compatible = "tcs,tcs452x"; 0057b0 reg = < 0x1c >; 0057c0 vin-supply = < 0x3d >; 0057d0 regulator-compatible = "fan53555-reg"; 0057ec regulator-name = "vdd_cpu"; 005800 regulator-min-microvolt = < 0xadf34 >; 005810 regulator-max-microvolt = < 0x1535b0 >; 005820 regulator-init-microvolt = < 0xdbba0 >; 005830 regulator-ramp-delay = < 0x8fc >; 005840 fcs,suspend-voltage-selector = < 0x1 >; 005850 regulator-boot-on; 00585c regulator-always-on; 005868 phandle = < 0x5 >; 005878 regulator-state-mem { 005890 regulator-off-in-suspend; 00589c } 0058a0 } 0058a4 } 0058a8 serial@fdd50000 { 0058bc compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; 0058f0 reg = < 0x0 0xfdd50000 0x0 0x100 >; 00590c interrupts = < 0x0 0x74 0x4 >; 005924 clocks = < 0x31 0xb 0x31 0x2c >; 005940 clock-names = "baudclk\0apb_pclk"; 005960 reg-shift = < 0x2 >; 005970 reg-io-width = < 0x4 >; 005980 dmas = < 0x3e 0x0 0x3e 0x1 >; 00599c pinctrl-names = "default"; 0059b0 pinctrl-0 = < 0x3f >; 0059c0 status = "disabled"; 0059d8 phandle = < 0x169 >; 0059e8 } 0059ec pwm@fdd70000 { 005a00 compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; 005a34 reg = < 0x0 0xfdd70000 0x0 0x10 >; 005a50 #pwm-cells = < 0x3 >; 005a60 pinctrl-names = "active"; 005a74 pinctrl-0 = < 0x40 >; 005a84 clocks = < 0x31 0xd 0x31 0x30 >; 005aa0 clock-names = "pwm\0pclk"; 005ab8 status = "disabled"; 005ad0 phandle = < 0x16a >; 005ae0 } 005ae4 pwm@fdd70010 { 005af8 compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; 005b2c reg = < 0x0 0xfdd70010 0x0 0x10 >; 005b48 #pwm-cells = < 0x3 >; 005b58 pinctrl-names = "active"; 005b6c pinctrl-0 = < 0x41 >; 005b7c clocks = < 0x31 0xd 0x31 0x30 >; 005b98 clock-names = "pwm\0pclk"; 005bb0 status = "disabled"; 005bc8 phandle = < 0x16b >; 005bd8 } 005bdc pwm@fdd70020 { 005bf0 compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; 005c24 reg = < 0x0 0xfdd70020 0x0 0x10 >; 005c40 #pwm-cells = < 0x3 >; 005c50 pinctrl-names = "active"; 005c64 pinctrl-0 = < 0x42 >; 005c74 clocks = < 0x31 0xd 0x31 0x30 >; 005c90 clock-names = "pwm\0pclk"; 005ca8 status = "disabled"; 005cc0 phandle = < 0x16c >; 005cd0 } 005cd4 pwm@fdd70030 { 005ce8 compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; 005d1c reg = < 0x0 0xfdd70030 0x0 0x10 >; 005d38 interrupts = < 0x0 0x52 0x4 0x0 0x56 0x4 >; 005d5c #pwm-cells = < 0x3 >; 005d6c pinctrl-names = "active"; 005d80 pinctrl-0 = < 0x43 >; 005d90 clocks = < 0x31 0xd 0x31 0x30 >; 005dac clock-names = "pwm\0pclk"; 005dc4 status = "disabled"; 005ddc phandle = < 0x16d >; 005dec } 005df0 power-management@fdd90000 { 005e10 compatible = "rockchip,rk3568-pmu\0syscon\0simple-mfd"; 005e44 reg = < 0x0 0xfdd90000 0x0 0x1000 >; 005e60 phandle = < 0x16e >; 005e70 power-controller { 005e88 compatible = "rockchip,rk3568-power-controller"; 005eb8 #power-domain-cells = < 0x1 >; 005ec8 #address-cells = < 0x1 >; 005ed8 #size-cells = < 0x0 >; 005ee8 status = "okay"; 005efc phandle = < 0x21 >; 005f0c pd_npu@6 { 005f1c reg = < 0x6 >; 005f2c clocks = < 0x1f 0x27 0x1f 0x25 0x1f 0x26 >; 005f50 pm_qos = < 0x44 >; 005f60 } 005f64 pd_gpu@7 { 005f74 reg = < 0x7 >; 005f84 clocks = < 0x1f 0x19 0x1f 0x1a >; 005fa0 pm_qos = < 0x45 >; 005fb0 } 005fb4 pd_vi@8 { 005fc0 reg = < 0x8 >; 005fd0 clocks = < 0x1f 0xcc 0x1f 0xcd >; 005fec pm_qos = < 0x46 0x47 0x48 >; 006004 } 006008 pd_vo@9 { 006014 reg = < 0x9 >; 006024 clocks = < 0x1f 0xda 0x1f 0xdb 0x1f 0xdc >; 006048 pm_qos = < 0x49 0x4a 0x4b >; 006060 } 006064 pd_rga@10 { 006074 reg = < 0xa >; 006084 clocks = < 0x1f 0xf1 0x1f 0xf2 >; 0060a0 pm_qos = < 0x4c 0x4d 0x4e 0x4f 0x50 0x51 >; 0060c4 } 0060c8 pd_vpu@11 { 0060d8 reg = < 0xb >; 0060e8 clocks = < 0x1f 0xed >; 0060fc pm_qos = < 0x52 >; 00610c } 006110 pd_rkvdec@13 { 006124 clocks = < 0x1f 0x107 >; 006138 reg = < 0xd >; 006148 pm_qos = < 0x53 >; 006158 } 00615c pd_rkvenc@14 { 006170 reg = < 0xe >; 006180 clocks = < 0x1f 0x102 >; 006194 pm_qos = < 0x54 0x55 0x56 >; 0061ac } 0061b0 pd_pipe@15 { 0061c0 reg = < 0xf >; 0061d0 clocks = < 0x1f 0x7f >; 0061e4 pm_qos = < 0x57 0x58 0x59 0x5a 0x5b >; 006204 } 006208 } 00620c } 006210 pvtm@fde00000 { 006224 compatible = "rockchip,rk3568-core-pvtm"; 00624c reg = < 0x0 0xfde00000 0x0 0x100 >; 006268 #address-cells = < 0x1 >; 006278 #size-cells = < 0x0 >; 006288 pvtm@0 { 006294 reg = < 0x0 >; 0062a4 clocks = < 0x1f 0x13 0x1f 0x1c2 >; 0062c0 clock-names = "clk\0pclk"; 0062d8 resets = < 0x1f 0x1a 0x1f 0x19 >; 0062f4 reset-names = "rts\0rst-p"; 00630c thermal-zone = "soc-thermal"; 006324 } 006328 } 00632c npu@fde40000 { 006340 compatible = "rockchip,rk3568-rknpu\0rockchip,rknpu"; 006374 reg = < 0x0 0xfde40000 0x0 0x10000 >; 006390 interrupts = < 0x0 0x97 0x4 >; 0063a8 clocks = < 0x2 0x2 0x1f 0x23 0x1f 0x28 0x1f 0x29 >; 0063d4 clock-names = "scmi_clk\0clk\0aclk\0hclk"; 0063f8 assigned-clocks = < 0x1f 0x23 >; 00640c assigned-clock-rates = < 0x23c34600 >; 00641c resets = < 0x1f 0x2b 0x1f 0x2c >; 006438 reset-names = "srst_a\0srst_h"; 006454 power-domains = < 0x21 0x6 >; 006468 operating-points-v2 = < 0x5c >; 006478 iommus = < 0x5d >; 006488 status = "okay"; 00649c rknpu-supply = < 0x5e >; 0064ac phandle = < 0x16f >; 0064bc } 0064c0 npu-opp-table { 0064d4 compatible = "operating-points-v2"; 0064f4 mbist-vmin = < 0xc96a8 0xdbba0 0xe7ef0 >; 00650c nvmem-cells = < 0x5f 0x7 0x8 >; 006524 nvmem-cell-names = "leakage\0pvtm\0mbist-vmin"; 006548 rockchip,temp-hysteresis = < 0x1388 >; 006558 rockchip,low-temp = < 0x0 >; 006568 rockchip,low-temp-adjust-volt = < 0x0 0x2bc 0xc350 >; 006580 phandle = < 0x5c >; 006590 opp-200000000 { 0065a4 opp-hz = < 0x0 0xbebc200 >; 0065b8 opp-microvolt = < 0xc96a8 0xc96a8 0xf4240 >; 0065d0 } 0065d4 opp-300000000 { 0065e8 opp-hz = < 0x0 0x11b3dc40 >; 0065fc opp-microvolt = < 0xc96a8 0xc96a8 0xf4240 >; 006614 } 006618 opp-400000000 { 00662c opp-hz = < 0x0 0x17d78400 >; 006640 opp-microvolt = < 0xc96a8 0xc96a8 0xf4240 >; 006658 } 00665c opp-600000000 { 006670 opp-hz = < 0x0 0x23c34600 >; 006684 opp-microvolt = < 0xc96a8 0xc96a8 0xf4240 >; 00669c } 0066a0 opp-700000000 { 0066b4 opp-hz = < 0x0 0x29b92700 >; 0066c8 opp-microvolt = < 0xcf850 0xcf850 0xf4240 >; 0066e0 } 0066e4 opp-800000000 { 0066f8 opp-hz = < 0x0 0x2faf0800 >; 00670c opp-microvolt = < 0xd59f8 0xd59f8 0xf4240 >; 006724 } 006728 opp-900000000 { 00673c opp-hz = < 0x0 0x35a4e900 >; 006750 opp-microvolt = < 0xe1d48 0xe1d48 0xf4240 >; 006768 } 00676c opp-1000000000 { 006780 opp-hz = < 0x0 0x3b9aca00 >; 006794 opp-microvolt = < 0xf4240 0xf4240 0xf4240 >; 0067ac status = "disabled"; 0067c4 } 0067c8 } 0067cc bus-npu { 0067d8 compatible = "rockchip,rk3568-bus"; 0067f8 rockchip,busfreq-policy = "clkfreq"; 00680c clocks = < 0x2 0x2 >; 006820 clock-names = "bus"; 006830 operating-points-v2 = < 0x60 >; 006840 status = "okay"; 006854 bus-supply = < 0x61 >; 006864 pvtm-supply = < 0x5 >; 006874 phandle = < 0x170 >; 006884 } 006888 bus-npu-opp-table { 0068a0 compatible = "operating-points-v2"; 0068c0 opp-shared; 0068cc nvmem-cells = < 0x7 >; 0068dc nvmem-cell-names = "pvtm"; 0068f0 rockchip,pvtm-voltage-sel = < 0x0 0x14050 0x0 0x14051 0x16b48 0x1 0x16b49 0x186a0 0x2 >; 006920 rockchip,pvtm-ch = < 0x0 0x5 >; 006934 phandle = < 0x60 >; 006944 opp-1000000000 { 006958 opp-hz = < 0x0 0x3b9aca00 >; 00696c opp-microvolt = < 0xe7ef0 >; 00697c opp-microvolt-L0 = < 0xe7ef0 >; 00698c opp-microvolt-L1 = < 0xe1d48 >; 00699c opp-microvolt-L2 = < 0x0 >; 0069ac } 0069b0 opp-900000000 { 0069c4 opp-hz = < 0x0 0x35a4e900 >; 0069d8 opp-microvolt = < 0x0 >; 0069e8 } 0069ec } 0069f0 iommu@fde4b000 { 006a04 compatible = "rockchip,iommu-v2"; 006a24 reg = < 0x0 0xfde4b000 0x0 0x40 >; 006a40 interrupts = < 0x0 0x97 0x4 >; 006a58 interrupt-names = "rknpu_mmu"; 006a70 clocks = < 0x1f 0x28 0x1f 0x29 >; 006a8c clock-names = "aclk\0iface"; 006aa4 power-domains = < 0x21 0x6 >; 006ab8 #iommu-cells = < 0x0 >; 006ac8 status = "okay"; 006adc phandle = < 0x5d >; 006aec } 006af0 gpu@fde60000 { 006b04 compatible = "arm,mali-bifrost"; 006b24 reg = < 0x0 0xfde60000 0x0 0x4000 >; 006b40 interrupts = < 0x0 0x27 0x4 0x0 0x29 0x4 0x0 0x28 0x4 >; 006b70 interrupt-names = "GPU\0MMU\0JOB"; 006b88 upthreshold = < 0x28 >; 006b98 downdifferential = < 0xa >; 006ba8 clocks = < 0x2 0x1 0x1f 0x1b >; 006bc4 clock-names = "clk_mali\0clk_gpu"; 006be4 power-domains = < 0x21 0x7 >; 006bf8 #cooling-cells = < 0x2 >; 006c08 operating-points-v2 = < 0x62 >; 006c18 status = "okay"; 006c2c mali-supply = < 0x63 >; 006c3c phandle = < 0x1d >; 006c4c power-model { 006c5c compatible = "simple-power-model"; 006c7c leakage-range = < 0x5 0xf >; 006c90 ls = < 0xffffa23e 0x5927 0x0 >; 006ca8 static-coefficient = < 0x186a0 >; 006cb8 dynamic-coefficient = < 0x3b9 >; 006cc8 ts = < 0xfffe56a6 0xf87a 0xfffffab5 0x14 >; 006ce4 thermal-zone = "gpu-thermal"; 006cfc phandle = < 0x171 >; 006d0c } 006d10 } 006d14 opp-table2 { 006d24 compatible = "operating-points-v2"; 006d44 mbist-vmin = < 0xc96a8 0xdbba0 0xe7ef0 >; 006d5c nvmem-cells = < 0x64 0x7 0x8 >; 006d74 nvmem-cell-names = "leakage\0pvtm\0mbist-vmin"; 006d98 phandle = < 0x62 >; 006da8 opp-200000000 { 006dbc opp-hz = < 0x0 0xbebc200 >; 006dd0 opp-microvolt = < 0xc96a8 >; 006de0 } 006de4 opp-300000000 { 006df8 opp-hz = < 0x0 0x11e1a300 >; 006e0c opp-microvolt = < 0xc96a8 >; 006e1c } 006e20 opp-400000000 { 006e34 opp-hz = < 0x0 0x17d78400 >; 006e48 opp-microvolt = < 0xc96a8 >; 006e58 } 006e5c opp-600000000 { 006e70 opp-hz = < 0x0 0x23c34600 >; 006e84 opp-microvolt = < 0xc96a8 >; 006e94 } 006e98 opp-700000000 { 006eac opp-hz = < 0x0 0x29b92700 >; 006ec0 opp-microvolt = < 0xdbba0 >; 006ed0 } 006ed4 opp-800000000 { 006ee8 opp-hz = < 0x0 0x2faf0800 >; 006efc opp-microvolt = < 0xe7ef0 >; 006f0c } 006f10 } 006f14 pvtm@fde80000 { 006f28 compatible = "rockchip,rk3568-gpu-pvtm"; 006f50 reg = < 0x0 0xfde80000 0x0 0x100 >; 006f6c #address-cells = < 0x1 >; 006f7c #size-cells = < 0x0 >; 006f8c pvtm@1 { 006f98 reg = < 0x1 >; 006fa8 clocks = < 0x1f 0x1e 0x1f 0x1d >; 006fc4 clock-names = "clk\0pclk"; 006fdc resets = < 0x1f 0x24 0x1f 0x23 >; 006ff8 reset-names = "rts\0rst-p"; 007010 thermal-zone = "gpu-thermal"; 007028 } 00702c } 007030 pvtm@fde90000 { 007044 compatible = "rockchip,rk3568-npu-pvtm"; 00706c reg = < 0x0 0xfde90000 0x0 0x100 >; 007088 #address-cells = < 0x1 >; 007098 #size-cells = < 0x0 >; 0070a8 pvtm@2 { 0070b4 reg = < 0x2 >; 0070c4 clocks = < 0x1f 0x2b 0x1f 0x2a 0x1f 0x25 >; 0070e8 clock-names = "clk\0pclk\0hclk"; 007104 resets = < 0x1f 0x2e 0x1f 0x2d >; 007120 reset-names = "rts\0rst-p"; 007138 thermal-zone = "soc-thermal"; 007150 } 007154 } 007158 vdpu@fdea0400 { 00716c compatible = "rockchip,vpu-decoder-v2"; 007190 reg = < 0x0 0xfdea0400 0x0 0x400 >; 0071ac interrupts = < 0x0 0x8b 0x4 >; 0071c4 interrupt-names = "irq_dec"; 0071d8 clocks = < 0x1f 0xee 0x1f 0xef >; 0071f4 clock-names = "aclk_vcodec\0hclk_vcodec"; 007218 resets = < 0x1f 0x11a 0x1f 0x11b >; 007234 reset-names = "video_a\0video_h"; 007250 iommus = < 0x65 >; 007260 power-domains = < 0x21 0xb >; 007274 rockchip,srv = < 0x66 >; 007284 rockchip,taskqueue-node = < 0x0 >; 007294 rockchip,resetgroup-node = < 0x0 >; 0072a4 status = "okay"; 0072b8 phandle = < 0x172 >; 0072c8 } 0072cc iommu@fdea0800 { 0072e0 compatible = "rockchip,iommu-v2"; 007300 reg = < 0x0 0xfdea0800 0x0 0x40 >; 00731c interrupts = < 0x0 0x8a 0x4 >; 007334 interrupt-names = "vdpu_mmu"; 00734c clock-names = "aclk\0iface"; 007364 clocks = < 0x1f 0xee 0x1f 0xef >; 007380 power-domains = < 0x21 0xb >; 007394 #iommu-cells = < 0x0 >; 0073a4 status = "okay"; 0073b8 phandle = < 0x65 >; 0073c8 } 0073cc rk_rga@fdeb0000 { 0073e0 compatible = "rockchip,rga2"; 0073fc reg = < 0x0 0xfdeb0000 0x0 0x1000 >; 007418 interrupts = < 0x0 0x5a 0x4 >; 007430 clocks = < 0x1f 0xf3 0x1f 0xf4 0x1f 0xf5 >; 007454 clock-names = "aclk_rga\0hclk_rga\0clk_rga"; 00747c power-domains = < 0x21 0xa >; 007490 status = "okay"; 0074a4 phandle = < 0x173 >; 0074b4 } 0074b8 ebc@fdec0000 { 0074cc compatible = "rockchip,rk3568-ebc-tcon"; 0074f4 reg = < 0x0 0xfdec0000 0x0 0x5000 >; 007510 interrupts = < 0x0 0x11 0x4 >; 007528 clocks = < 0x1f 0xf9 0x1f 0xfa >; 007544 clock-names = "hclk\0dclk"; 00755c power-domains = < 0x21 0xa >; 007570 rockchip,grf = < 0x32 >; 007580 pinctrl-names = "default"; 007594 pinctrl-0 = < 0x67 >; 0075a4 status = "disabled"; 0075bc phandle = < 0x174 >; 0075cc } 0075d0 jpegd@fded0000 { 0075e4 compatible = "rockchip,rkv-jpeg-decoder-v1"; 007610 reg = < 0x0 0xfded0000 0x0 0x400 >; 00762c interrupts = < 0x0 0x3e 0x4 >; 007644 clocks = < 0x1f 0xfb 0x1f 0xfc >; 007660 clock-names = "aclk_vcodec\0hclk_vcodec"; 007684 rockchip,disable-auto-freq; 007690 resets = < 0x1f 0x12c 0x1f 0x12d >; 0076ac reset-names = "video_a\0video_h"; 0076c8 iommus = < 0x68 >; 0076d8 rockchip,srv = < 0x66 >; 0076e8 rockchip,taskqueue-node = < 0x1 >; 0076f8 rockchip,resetgroup-node = < 0x1 >; 007708 power-domains = < 0x21 0xa >; 00771c status = "okay"; 007730 phandle = < 0x175 >; 007740 } 007744 iommu@fded0480 { 007758 compatible = "rockchip,iommu-v2"; 007778 reg = < 0x0 0xfded0480 0x0 0x40 >; 007794 interrupts = < 0x0 0x3d 0x4 >; 0077ac interrupt-names = "jpegd_mmu"; 0077c4 clock-names = "aclk\0iface"; 0077dc clocks = < 0x1f 0xfb 0x1f 0xfc >; 0077f8 power-domains = < 0x21 0xa >; 00780c #iommu-cells = < 0x0 >; 00781c status = "okay"; 007830 phandle = < 0x68 >; 007840 } 007844 vepu@fdee0000 { 007858 compatible = "rockchip,vpu-encoder-v2"; 00787c reg = < 0x0 0xfdee0000 0x0 0x400 >; 007898 interrupts = < 0x0 0x40 0x4 >; 0078b0 clocks = < 0x1f 0xfd 0x1f 0xfe >; 0078cc clock-names = "aclk_vcodec\0hclk_vcodec"; 0078f0 rockchip,disable-auto-freq; 0078fc resets = < 0x1f 0x12e 0x1f 0x12f >; 007918 reset-names = "video_a\0video_h"; 007934 iommus = < 0x69 >; 007944 rockchip,srv = < 0x66 >; 007954 rockchip,taskqueue-node = < 0x2 >; 007964 rockchip,resetgroup-node = < 0x2 >; 007974 power-domains = < 0x21 0xa >; 007988 status = "okay"; 00799c phandle = < 0x176 >; 0079ac } 0079b0 iommu@fdee0800 { 0079c4 compatible = "rockchip,iommu-v2"; 0079e4 reg = < 0x0 0xfdee0800 0x0 0x40 >; 007a00 interrupts = < 0x0 0x3f 0x4 >; 007a18 interrupt-names = "vepu_mmu"; 007a30 clock-names = "aclk\0iface"; 007a48 clocks = < 0x1f 0xfd 0x1f 0xfe >; 007a64 power-domains = < 0x21 0xa >; 007a78 #iommu-cells = < 0x0 >; 007a88 status = "okay"; 007a9c phandle = < 0x69 >; 007aac } 007ab0 iep@fdef0000 { 007ac4 compatible = "rockchip,iep-v2"; 007ae0 reg = < 0x0 0xfdef0000 0x0 0x500 >; 007afc interrupts = < 0x0 0x38 0x4 >; 007b14 clocks = < 0x1f 0xf6 0x1f 0xf7 0x1f 0xf8 >; 007b38 clock-names = "aclk\0hclk\0sclk"; 007b54 resets = < 0x1f 0x127 0x1f 0x128 0x1f 0x129 >; 007b78 reset-names = "rst_a\0rst_h\0rst_s"; 007b98 power-domains = < 0x21 0xa >; 007bac rockchip,srv = < 0x66 >; 007bbc rockchip,taskqueue-node = < 0x5 >; 007bcc rockchip,resetgroup-node = < 0x5 >; 007bdc iommus = < 0x6a >; 007bec status = "okay"; 007c00 phandle = < 0x177 >; 007c10 } 007c14 iommu@fdef0800 { 007c28 compatible = "rockchip,iommu-v2"; 007c48 reg = < 0x0 0xfdef0800 0x0 0x100 >; 007c64 interrupts = < 0x0 0x38 0x4 >; 007c7c interrupt-names = "iep_mmu"; 007c90 clocks = < 0x1f 0xf6 0x1f 0xf7 >; 007cac clock-names = "aclk\0iface"; 007cc4 #iommu-cells = < 0x0 >; 007cd4 power-domains = < 0x21 0xa >; 007ce8 status = "okay"; 007cfc phandle = < 0x6a >; 007d0c } 007d10 eink@fdf00000 { 007d24 compatible = "rockchip,rk3568-eink-tcon"; 007d4c reg = < 0x0 0xfdf00000 0x0 0x74 >; 007d68 interrupts = < 0x0 0xb2 0x4 >; 007d80 clocks = < 0x1f 0xff 0x1f 0x100 >; 007d9c clock-names = "pclk\0hclk"; 007db4 status = "disabled"; 007dcc phandle = < 0x178 >; 007ddc } 007de0 rkvenc@fdf40000 { 007df4 compatible = "rockchip,rkv-encoder-v1"; 007e18 reg = < 0x0 0xfdf40000 0x0 0x400 >; 007e34 interrupts = < 0x0 0x8c 0x4 >; 007e4c interrupt-names = "irq_enc"; 007e60 clocks = < 0x1f 0x103 0x1f 0x104 0x1f 0x105 >; 007e84 clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; 007eb4 rockchip,normal-rates = < 0x11b3dc40 0x0 0x11b3dc40 >; 007ecc resets = < 0x1f 0x133 0x1f 0x134 0x1f 0x135 >; 007ef0 reset-names = "video_a\0video_h\0video_core"; 007f18 assigned-clocks = < 0x1f 0x103 0x1f 0x105 >; 007f34 assigned-clock-rates = < 0x11b3dc40 0x11b3dc40 >; 007f48 iommus = < 0x6b >; 007f58 node-name = "rkvenc"; 007f6c rockchip,srv = < 0x66 >; 007f7c rockchip,taskqueue-node = < 0x3 >; 007f8c rockchip,resetgroup-node = < 0x3 >; 007f9c power-domains = < 0x21 0xe >; 007fb0 operating-points-v2 = < 0x6c >; 007fc0 status = "okay"; 007fd4 venc-supply = < 0x61 >; 007fe4 phandle = < 0x179 >; 007ff4 } 007ff8 rkvenc-opp-table { 008010 compatible = "operating-points-v2"; 008030 nvmem-cells = < 0x7 >; 008040 nvmem-cell-names = "pvtm"; 008054 rockchip,pvtm-voltage-sel = < 0x0 0x14050 0x0 0x14051 0x16b48 0x1 0x16b49 0x186a0 0x2 >; 008084 rockchip,pvtm-ch = < 0x0 0x5 >; 008098 phandle = < 0x6c >; 0080a8 opp-297000000 { 0080bc opp-hz = < 0x0 0x11b3dc40 >; 0080d0 opp-microvolt = < 0x0 >; 0080e0 } 0080e4 opp-400000000 { 0080f8 opp-hz = < 0x0 0x17d78400 >; 00810c opp-microvolt = < 0xe7ef0 >; 00811c opp-microvolt-L0 = < 0xe7ef0 >; 00812c opp-microvolt-L1 = < 0xe1d48 >; 00813c opp-microvolt-L2 = < 0x0 >; 00814c } 008150 } 008154 iommu@fdf40f00 { 008168 compatible = "rockchip,iommu-v2"; 008188 reg = < 0x0 0xfdf40f00 0x0 0x40 0x0 0xfdf40f40 0x0 0x40 >; 0081b4 interrupts = < 0x0 0x8d 0x4 0x0 0x8e 0x4 >; 0081d8 interrupt-names = "rkvenc_mmu0\0rkvenc_mmu1"; 0081fc clocks = < 0x1f 0x103 0x1f 0x104 >; 008218 clock-names = "aclk\0iface"; 008230 rockchip,disable-mmu-reset; 00823c rockchip,enable-cmd-retry; 008248 #iommu-cells = < 0x0 >; 008258 power-domains = < 0x21 0xe >; 00826c status = "okay"; 008280 phandle = < 0x6b >; 008290 } 008294 rkvdec@fdf80200 { 0082a8 compatible = "rockchip,rkv-decoder-rk3568\0rockchip,rkv-decoder-v2"; 0082e8 reg = < 0x0 0xfdf80200 0x0 0x400 >; 008304 interrupts = < 0x0 0x5b 0x4 >; 00831c interrupt-names = "irq_dec"; 008330 clocks = < 0x1f 0x108 0x1f 0x109 0x1f 0x10a 0x1f 0x10b 0x1f 0x10c >; 008364 clock-names = "aclk_vcodec\0hclk_vcodec\0clk_cabac\0clk_core\0clk_hevc_cabac"; 0083ac rockchip,normal-rates = < 0x11b3dc40 0x0 0x11b3dc40 0x11b3dc40 0x23c34600 >; 0083cc rockchip,advanced-rates = < 0x179a7b00 0x0 0x179a7b00 0x179a7b00 0x23c34600 >; 0083ec rockchip,default-max-load = < 0x1fe000 >; 0083fc resets = < 0x1f 0x142 0x1f 0x143 0x1f 0x144 0x1f 0x145 0x1f 0x146 >; 008430 assigned-clocks = < 0x1f 0x108 0x1f 0x10a 0x1f 0x10b 0x1f 0x10c >; 00845c assigned-clock-rates = < 0x11b3dc40 0x11b3dc40 0x11b3dc40 0x11b3dc40 >; 008478 reset-names = "video_a\0video_h\0video_cabac\0video_core\0video_hevc_cabac"; 0084bc power-domains = < 0x21 0xd >; 0084d0 iommus = < 0x6d >; 0084e0 rockchip,srv = < 0x66 >; 0084f0 rockchip,taskqueue-node = < 0x4 >; 008500 rockchip,resetgroup-node = < 0x4 >; 008510 rockchip,sram = < 0x6e >; 008520 rockchip,rcb-iova = < 0x10000000 0x10000 >; 008534 rockchip,rcb-min-width = < 0x200 >; 008544 status = "okay"; 008558 phandle = < 0x17a >; 008568 } 00856c iommu@fdf80800 { 008580 compatible = "rockchip,iommu-v2"; 0085a0 reg = < 0x0 0xfdf80800 0x0 0x40 0x0 0xfdf80840 0x0 0x40 >; 0085cc interrupts = < 0x0 0x5c 0x4 >; 0085e4 interrupt-names = "rkvdec_mmu"; 0085fc clocks = < 0x1f 0x108 0x1f 0x109 >; 008618 clock-names = "aclk\0iface"; 008630 power-domains = < 0x21 0xd >; 008644 #iommu-cells = < 0x0 >; 008654 status = "okay"; 008668 phandle = < 0x6d >; 008678 } 00867c mipi-csi2@fdfb0000 { 008694 compatible = "rockchip,rk3568-mipi-csi2"; 0086bc reg = < 0x0 0xfdfb0000 0x0 0x10000 >; 0086d8 reg-names = "csihost_regs"; 0086f4 interrupts = < 0x0 0x8 0x4 0x0 0x9 0x4 >; 008718 interrupt-names = "csi-intr1\0csi-intr2"; 008738 clocks = < 0x1f 0xd5 >; 00874c clock-names = "pclk_csi2host"; 008768 resets = < 0x1f 0xff >; 00877c reset-names = "srst_csihost_p"; 008798 status = "disabled"; 0087b0 phandle = < 0x17b >; 0087c0 } 0087c4 rkcif@fdfe0000 { 0087d8 compatible = "rockchip,rk3568-cif"; 0087f8 reg = < 0x0 0xfdfe0000 0x0 0x8000 >; 008814 reg-names = "cif_regs"; 00882c interrupts = < 0x0 0x92 0x4 >; 008844 interrupt-names = "cif-intr"; 00885c clocks = < 0x1f 0xce 0x1f 0xcf 0x1f 0xd0 0x1f 0xd1 >; 008888 clock-names = "aclk_cif\0hclk_cif\0dclk_cif\0iclk_cif_g"; 0088bc resets = < 0x1f 0xf7 0x1f 0xf8 0x1f 0xf9 0x1f 0xfb 0x1f 0xfa >; 0088f0 reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_d\0rst_cif_p\0rst_cif_i"; 008930 assigned-clocks = < 0x1f 0xd0 >; 008944 assigned-clock-rates = < 0x11e1a300 >; 008954 power-domains = < 0x21 0x8 >; 008968 rockchip,grf = < 0x32 >; 008978 iommus = < 0x6f >; 008988 status = "okay"; 00899c phandle = < 0x70 >; 0089ac } 0089b0 iommu@fdfe0800 { 0089c4 compatible = "rockchip,iommu-v2"; 0089e4 reg = < 0x0 0xfdfe0800 0x0 0x100 >; 008a00 interrupts = < 0x0 0x92 0x4 >; 008a18 interrupt-names = "cif_mmu"; 008a2c clocks = < 0x1f 0xce 0x1f 0xcf >; 008a48 clock-names = "aclk\0iface"; 008a60 power-domains = < 0x21 0x8 >; 008a74 rockchip,disable-mmu-reset; 008a80 #iommu-cells = < 0x0 >; 008a90 status = "disabled"; 008aa8 phandle = < 0x6f >; 008ab8 } 008abc rkcif_dvp { 008acc compatible = "rockchip,rkcif-dvp"; 008aec rockchip,hw = < 0x70 >; 008afc status = "okay"; 008b10 phandle = < 0x72 >; 008b20 port { 008b2c endpoint { 008b3c remote-endpoint = < 0x71 >; 008b4c bus-width = < 0x8 >; 008b5c vsync-active = < 0x0 >; 008b6c hsync-active = < 0x1 >; 008b7c phandle = < 0xd1 >; 008b8c } 008b90 } 008b94 } 008b98 rkcif_dvp_sditf { 008bac compatible = "rockchip,rkcif-sditf"; 008bd0 rockchip,cif = < 0x72 >; 008be0 status = "disabled"; 008bf8 phandle = < 0x17c >; 008c08 } 008c0c rkcif_mipi_lvds { 008c20 compatible = "rockchip,rkcif-mipi-lvds"; 008c48 rockchip,hw = < 0x70 >; 008c58 status = "disabled"; 008c70 phandle = < 0x73 >; 008c80 } 008c84 rkcif_mipi_lvds_sditf { 008ca0 compatible = "rockchip,rkcif-sditf"; 008cc4 rockchip,cif = < 0x73 >; 008cd4 status = "disabled"; 008cec phandle = < 0x17d >; 008cfc } 008d00 rkisp@fdff0000 { 008d14 compatible = "rockchip,rk3568-rkisp"; 008d38 reg = < 0x0 0xfdff0000 0x0 0x10000 >; 008d54 interrupts = < 0x0 0x39 0x4 0x0 0x3a 0x4 0x0 0x3c 0x4 >; 008d84 interrupt-names = "mipi_irq\0mi_irq\0isp_irq"; 008da8 clocks = < 0x1f 0xd2 0x1f 0xd3 0x1f 0xd4 >; 008dcc clock-names = "aclk_isp\0hclk_isp\0clk_isp"; 008df4 resets = < 0x1f 0xfd 0x1f 0xfc >; 008e10 reset-names = "isp\0isp-h"; 008e28 rockchip,grf = < 0x32 >; 008e38 power-domains = < 0x21 0x8 >; 008e4c iommus = < 0x74 >; 008e5c rockchip,iq-feature = < 0x3fb 0xf7fe67ff >; 008e70 status = "okay"; 008e84 phandle = < 0x75 >; 008e94 } 008e98 iommu@fdff1a00 { 008eac compatible = "rockchip,iommu-v2"; 008ecc reg = < 0x0 0xfdff1a00 0x0 0x100 >; 008ee8 interrupts = < 0x0 0x3b 0x4 >; 008f00 interrupt-names = "isp_mmu"; 008f14 clocks = < 0x1f 0xd2 0x1f 0xd3 >; 008f30 clock-names = "aclk\0iface"; 008f48 power-domains = < 0x21 0x8 >; 008f5c #iommu-cells = < 0x0 >; 008f6c rockchip,disable-mmu-reset; 008f78 status = "okay"; 008f8c phandle = < 0x74 >; 008f9c } 008fa0 rkisp-vir0 { 008fb0 compatible = "rockchip,rkisp-vir"; 008fd0 rockchip,hw = < 0x75 >; 008fe0 status = "okay"; 008ff4 phandle = < 0x17e >; 009004 port { 009010 #address-cells = < 0x1 >; 009020 #size-cells = < 0x0 >; 009030 endpoint@0 { 009040 reg = < 0x0 >; 009050 remote-endpoint = < 0x76 >; 009060 phandle = < 0x108 >; 009070 } 009074 } 009078 } 00907c rkisp-vir1 { 00908c compatible = "rockchip,rkisp-vir"; 0090ac rockchip,hw = < 0x75 >; 0090bc status = "disabled"; 0090d4 phandle = < 0x17f >; 0090e4 } 0090e8 ethernet@fe010000 { 009100 compatible = "rockchip,rk3568-gmac\0snps,dwmac-4.20a"; 009134 reg = < 0x0 0xfe010000 0x0 0x10000 >; 009150 interrupts = < 0x0 0x20 0x4 0x0 0x1d 0x4 >; 009174 interrupt-names = "macirq\0eth_wake_irq"; 009194 rockchip,grf = < 0x32 >; 0091a4 clocks = < 0x1f 0x186 0x1f 0x189 0x1f 0x189 0x1f 0xc7 0x1f 0xc3 0x1f 0xc4 0x1f 0x189 0x1f 0xc8 0x1f 0xac >; 0091f8 clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed\0ptp_ref\0pclk_xpcs"; 009268 resets = < 0x1f 0xec >; 00927c reset-names = "stmmaceth"; 009294 snps,mixed-burst; 0092a0 snps,tso; 0092ac snps,axi-config = < 0x77 >; 0092bc snps,mtl-rx-config = < 0x78 >; 0092cc snps,mtl-tx-config = < 0x79 >; 0092dc status = "okay"; 0092f0 phy-mode = "rgmii"; 009304 clock_in_out = "output"; 009318 snps,reset-gpio = < 0x7a 0x1 0x1 >; 009330 snps,reset-active-low; 00933c snps,reset-delays-us = < 0x0 0x4e20 0x186a0 >; 009354 assigned-clocks = < 0x1f 0x189 0x1f 0x186 >; 009370 assigned-clock-parents = < 0x1f 0x187 0x1f 0xc5 >; 00938c assigned-clock-rates = < 0x0 0x7735940 >; 0093a0 pinctrl-names = "default"; 0093b4 pinctrl-0 = < 0x7b 0x7c 0x7d 0x7e 0x7f >; 0093d4 tx_delay = < 0x41 >; 0093e4 rx_delay = < 0x2e >; 0093f4 phy-handle = < 0x80 >; 009404 phandle = < 0x180 >; 009414 mdio { 009420 compatible = "snps,dwmac-mdio"; 00943c #address-cells = < 0x1 >; 00944c #size-cells = < 0x0 >; 00945c phandle = < 0x181 >; 00946c phy@0 { 009478 compatible = "ethernet-phy-ieee802.3-c22"; 0094a0 reg = < 0x0 >; 0094b0 phandle = < 0x80 >; 0094c0 } 0094c4 } 0094c8 stmmac-axi-config { 0094e0 snps,wr_osr_lmt = < 0x4 >; 0094f0 snps,rd_osr_lmt = < 0x8 >; 009500 snps,blen = < 0x0 0x0 0x0 0x0 0x10 0x8 0x4 >; 009528 phandle = < 0x77 >; 009538 } 00953c rx-queues-config { 009554 snps,rx-queues-to-use = < 0x1 >; 009564 phandle = < 0x78 >; 009574 queue0 { 009580 } 009584 } 009588 tx-queues-config { 0095a0 snps,tx-queues-to-use = < 0x1 >; 0095b0 phandle = < 0x79 >; 0095c0 queue0 { 0095cc } 0095d0 } 0095d4 } 0095d8 vop@fe040000 { 0095ec compatible = "rockchip,rk3568-vop"; 00960c reg = < 0x0 0xfe040000 0x0 0x3000 0x0 0xfe044000 0x0 0x1000 >; 009638 reg-names = "regs\0gamma_lut"; 009654 rockchip,grf = < 0x32 >; 009664 interrupts = < 0x0 0x94 0x4 >; 00967c clocks = < 0x1f 0xdd 0x1f 0xde 0x1f 0xdf 0x1f 0xe0 0x1f 0xe1 >; 0096b0 clock-names = "aclk_vop\0hclk_vop\0dclk_vp0\0dclk_vp1\0dclk_vp2"; 0096ec iommus = < 0x81 >; 0096fc power-domains = < 0x21 0x9 >; 009710 status = "okay"; 009724 assigned-clocks = < 0x1f 0xdf 0x1f 0xe0 >; 009740 assigned-clock-parents = < 0x31 0x2 0x1f 0x5 >; 00975c phandle = < 0x182 >; 00976c ports { 009778 #address-cells = < 0x1 >; 009788 #size-cells = < 0x0 >; 009798 phandle = < 0x12 >; 0097a8 port@0 { 0097b4 #address-cells = < 0x1 >; 0097c4 #size-cells = < 0x0 >; 0097d4 reg = < 0x0 >; 0097e4 phandle = < 0x183 >; 0097f4 endpoint@0 { 009804 reg = < 0x0 >; 009814 remote-endpoint = < 0x82 >; 009824 phandle = < 0x8d >; 009834 } 009838 endpoint@1 { 009848 reg = < 0x1 >; 009858 remote-endpoint = < 0x83 >; 009868 phandle = < 0x15 >; 009878 } 00987c endpoint@2 { 00988c reg = < 0x2 >; 00989c remote-endpoint = < 0x84 >; 0098ac phandle = < 0x16 >; 0098bc } 0098c0 endpoint@3 { 0098d0 reg = < 0x3 >; 0098e0 remote-endpoint = < 0x85 >; 0098f0 phandle = < 0x17 >; 009900 } 009904 } 009908 port@1 { 009914 #address-cells = < 0x1 >; 009924 #size-cells = < 0x0 >; 009934 reg = < 0x1 >; 009944 phandle = < 0x184 >; 009954 endpoint@0 { 009964 reg = < 0x0 >; 009974 remote-endpoint = < 0x86 >; 009984 phandle = < 0x14 >; 009994 } 009998 endpoint@1 { 0099a8 reg = < 0x1 >; 0099b8 remote-endpoint = < 0x87 >; 0099c8 phandle = < 0x96 >; 0099d8 } 0099dc endpoint@2 { 0099ec reg = < 0x2 >; 0099fc remote-endpoint = < 0x88 >; 009a0c phandle = < 0xa3 >; 009a1c } 009a20 endpoint@3 { 009a30 reg = < 0x3 >; 009a40 remote-endpoint = < 0x89 >; 009a50 phandle = < 0xa1 >; 009a60 } 009a64 endpoint@4 { 009a74 reg = < 0x4 >; 009a84 remote-endpoint = < 0x8a >; 009a94 phandle = < 0x18 >; 009aa4 } 009aa8 } 009aac port@2 { 009ab8 #address-cells = < 0x1 >; 009ac8 #size-cells = < 0x0 >; 009ad8 reg = < 0x2 >; 009ae8 phandle = < 0x185 >; 009af8 endpoint@0 { 009b08 reg = < 0x0 >; 009b18 remote-endpoint = < 0x8b >; 009b28 phandle = < 0x2f >; 009b38 } 009b3c endpoint@1 { 009b4c reg = < 0x1 >; 009b5c remote-endpoint = < 0x8c >; 009b6c phandle = < 0x19 >; 009b7c } 009b80 } 009b84 } 009b88 } 009b8c iommu@fe043e00 { 009ba0 compatible = "rockchip,iommu-v2"; 009bc0 reg = < 0x0 0xfe043e00 0x0 0x100 0x0 0xfe043f00 0x0 0x100 >; 009bec interrupts = < 0x0 0x94 0x4 >; 009c04 interrupt-names = "vop_mmu"; 009c18 clocks = < 0x1f 0xdd 0x1f 0xde >; 009c34 clock-names = "aclk\0iface"; 009c4c #iommu-cells = < 0x0 >; 009c5c status = "okay"; 009c70 phandle = < 0x81 >; 009c80 } 009c84 dsi@fe060000 { 009c98 compatible = "rockchip,rk3568-mipi-dsi"; 009cc0 reg = < 0x0 0xfe060000 0x0 0x10000 >; 009cdc interrupts = < 0x0 0x44 0x4 >; 009cf4 clocks = < 0x1f 0xe8 0x1f 0xda 0x2e >; 009d14 clock-names = "pclk\0hclk\0hs_clk"; 009d34 resets = < 0x1f 0x110 >; 009d48 reset-names = "apb"; 009d58 phys = < 0x2e >; 009d68 phy-names = "mipi_dphy"; 009d80 power-domains = < 0x21 0x9 >; 009d94 rockchip,grf = < 0x32 >; 009da4 #address-cells = < 0x1 >; 009db4 #size-cells = < 0x0 >; 009dc4 status = "disabled"; 009ddc phandle = < 0x186 >; 009dec ports { 009df8 #address-cells = < 0x1 >; 009e08 #size-cells = < 0x0 >; 009e18 port@0 { 009e24 reg = < 0x0 >; 009e34 #address-cells = < 0x1 >; 009e44 #size-cells = < 0x0 >; 009e54 phandle = < 0x187 >; 009e64 endpoint@0 { 009e74 reg = < 0x0 >; 009e84 remote-endpoint = < 0x8d >; 009e94 status = "disabled"; 009eac phandle = < 0x82 >; 009ebc } 009ec0 endpoint@1 { 009ed0 reg = < 0x1 >; 009ee0 remote-endpoint = < 0x14 >; 009ef0 status = "okay"; 009f04 phandle = < 0x86 >; 009f14 } 009f18 } 009f1c port@1 { 009f28 reg = < 0x1 >; 009f38 endpoint { 009f48 remote-endpoint = < 0x8e >; 009f58 phandle = < 0x94 >; 009f68 } 009f6c } 009f70 } 009f74 panel@0 { 009f80 status = "okay"; 009f94 compatible = "simple-panel-dsi"; 009fb4 reg = < 0x0 >; 009fc4 backlight = < 0x8f >; 009fd4 reset-delay-ms = < 0x3c >; 009fe4 enable-delay-ms = < 0x3c >; 009ff4 prepare-delay-ms = < 0x3c >; 00a004 unprepare-delay-ms = < 0x3c >; 00a014 disable-delay-ms = < 0x3c >; 00a024 dsi,flags = < 0xa03 >; 00a034 dsi,format = < 0x0 >; 00a044 dsi,lanes = < 0x4 >; 00a054 panel-init-sequence = < 0x230002fe 0x21230002 0x4002300 0x2006423 0x22a00 0x23000226 0x64230002 0x54002300 0x2506423 0x27b00 0x23000277 0x64230002 0xa2002300 0x29d6423 0x2c900 0x230002c5 0x64230002 0x1712300 0x2277123 0x25171 0x23000278 0x71230002 0x9e712300 0x2c67123 0x20289 0x23000228 0x89230002 0x52892300 0x2798923 0x29f89 0x230002c7 0x89230002 0x39e2300 0x2299e23 0x2539e 0x2300027a 0x9e230002 0xa09e2300 0x2c89e23 0x20900 0x23000205 0xb0230002 0x31002300 0x22bb023 0x25a00 0x23000255 0xb0230002 0x80002300 0x27cb023 0x2a700 0x230002a3 0xb0230002 0xce002300 0x2cab023 0x206c0 0x2300022d 0xc0230002 0x56c02300 0x27dc023 0x2a4c0 0x230002cb 0xc0230002 0x7cf2300 0x22fcf23 0x258cf 0x2300027e 0xcf230002 0xa5cf2300 0x2cccf23 0x208dd 0x23000230 0xdd230002 0x59dd2300 0x27fdd23 0x2a6dd 0x230002cd 0xdd230002 0xe152300 0x20ae923 0x23615 0x23000232 0xe9230002 0x5f152300 0x25be923 0x28515 0x23000281 0xe9230002 0xad152300 0x2a9e923 0x2d315 0x230002cf 0xe9230002 0xb142300 0x2331423 0x25c14 0x23000282 0x14230002 0xaa142300 0x2d01423 0x20c36 0x23000234 0x36230002 0x5d362300 0x2833623 0x2ab36 0x230002d1 0x36230002 0xd6b2300 0x2356b23 0x25e6b 0x23000284 0x6b230002 0xac6b2300 0x2d26b23 0x2135a 0x2300020f 0x94230002 0x3b5a2300 0x2379423 0x2645a 0x23000260 0x94230002 0x8a5a2300 0x2869423 0x2b25a 0x230002ae 0x94230002 0xd85a2300 0x2d49423 0x210d1 0x23000238 0xd1230002 0x61d12300 0x287d123 0x2afd1 0x230002d5 0xd1230002 0x11042300 0x2390423 0x26204 0x23000288 0x4230002 0xb0042300 0x2d60423 0x21205 0x2300023a 0x5230002 0x63052300 0x2890523 0x2b105 0x230002d7 0x5230002 0x18aa2300 0x2143623 0x242aa 0x2300023d 0x36230002 0x69aa2300 0x2653623 0x28faa 0x2300028b 0x36230002 0xb7aa2300 0x2b33623 0x2ddaa 0x230002d9 0x36230002 0x15742300 0x23f7423 0x26674 0x2300028c 0x74230002 0xb4742300 0x2da7423 0x2169f 0x23000240 0x9f230002 0x679f2300 0x28d9f23 0x2b59f 0x230002db 0x9f230002 0x17dc2300 0x241dc23 0x268dc 0x2300028e 0xdc230002 0xb6dc2300 0x2dcdc23 0x21dff 0x23000219 0x3230002 0x47ff2300 0x2430323 0x26eff 0x2300026a 0x3230002 0x94ff2300 0x2900323 0x2bcff 0x230002b8 0x3230002 0xe2ff2300 0x2de0323 0x21a35 0x23000244 0x35230002 0x6b352300 0x2913523 0x2b935 0x230002df 0x35230002 0x1b452300 0x2454523 0x26c45 0x23000292 0x45230002 0xba452300 0x2e04523 0x21c55 0x23000246 0x55230002 0x6d552300 0x2935523 0x2bb55 0x230002e1 0x55230002 0x22ff2300 0x21e6823 0x24cff 0x23000248 0x68230002 0x73ff2300 0x26f6823 0x299ff 0x23000295 0x68230002 0xc1ff2300 0x2bd6823 0x2e7ff 0x230002e3 0x68230002 0x1f7e2300 0x2497e23 0x2707e 0x23000296 0x7e230002 0xbe7e2300 0x2e47e23 0x22097 0x2300024a 0x97230002 0x71972300 0x2979723 0x2bf97 0x230002e5 0x97230002 0x21b52300 0x24bb523 0x272b5 0x23000298 0xb5230002 0xc0b52300 0x2e6b523 0x225f0 0x23000223 0xe8230002 0x4ff02300 0x24de823 0x276f0 0x23000274 0xe8230002 0x9cf02300 0x29ae823 0x2c4f0 0x230002c2 0xe8230002 0xeaf02300 0x2e8e823 0x224ff 0x2300024e 0xff230002 0x75ff2300 0x29bff23 0x2c3ff 0x230002e9 0xff230002 0xfe3d2300 0x2000423 0x2fe23 0x23000208 0x82230002 0xa002300 0x20b0023 0x20c01 0x23000216 0x230002 0x18022300 0x21b0423 0x21904 0x2300021c 0x81230002 0x1f002300 0x2200323 0x22304 0x23000221 0x1230002 0x54632300 0x2555423 0x26e45 0x2300026d 0x36230002 0xfe3d2300 0x2557823 0x2fe20 0x23000226 0x30230002 0xfe3d2300 0x2207123 0x2508f 0x23000251 0x8f230002 0xfe002300 0x2350005 0x78011105 0x1e012900 >; 00a578 panel-exit-sequence = < 0x5000128 0x5000110 >; 00a58c power-supply = < 0x90 >; 00a59c reset-gpios = < 0x91 0x5 0x1 >; 00a5b4 pinctrl-names = "default"; 00a5c8 pinctrl-0 = < 0x92 >; 00a5d8 phandle = < 0x188 >; 00a5e8 display-timings { 00a5fc native-mode = < 0x93 >; 00a60c phandle = < 0x189 >; 00a61c timing0 { 00a628 clock-frequency = < 0x7de2900 >; 00a638 hactive = < 0x438 >; 00a648 vactive = < 0x780 >; 00a658 hfront-porch = < 0xf >; 00a668 hsync-len = < 0x2 >; 00a678 hback-porch = < 0x1e >; 00a688 vfront-porch = < 0xf >; 00a698 vsync-len = < 0x2 >; 00a6a8 vback-porch = < 0xf >; 00a6b8 hsync-active = < 0x0 >; 00a6c8 vsync-active = < 0x0 >; 00a6d8 de-active = < 0x0 >; 00a6e8 pixelclk-active = < 0x1 >; 00a6f8 phandle = < 0x93 >; 00a708 } 00a70c } 00a710 ports { 00a71c #address-cells = < 0x1 >; 00a72c #size-cells = < 0x0 >; 00a73c port@0 { 00a748 reg = < 0x0 >; 00a758 endpoint { 00a768 remote-endpoint = < 0x94 >; 00a778 phandle = < 0x8e >; 00a788 } 00a78c } 00a790 } 00a794 } 00a798 } 00a79c dsi@fe070000 { 00a7b0 compatible = "rockchip,rk3568-mipi-dsi"; 00a7d8 reg = < 0x0 0xfe070000 0x0 0x10000 >; 00a7f4 interrupts = < 0x0 0x45 0x4 >; 00a80c clocks = < 0x1f 0xe9 0x1f 0xda 0x95 >; 00a82c clock-names = "pclk\0hclk\0hs_clk"; 00a84c resets = < 0x1f 0x111 >; 00a860 reset-names = "apb"; 00a870 phys = < 0x95 >; 00a880 phy-names = "mipi_dphy"; 00a898 power-domains = < 0x21 0x9 >; 00a8ac rockchip,grf = < 0x32 >; 00a8bc #address-cells = < 0x1 >; 00a8cc #size-cells = < 0x0 >; 00a8dc status = "disabled"; 00a8f4 phandle = < 0x18a >; 00a904 ports { 00a910 #address-cells = < 0x1 >; 00a920 #size-cells = < 0x0 >; 00a930 port@0 { 00a93c reg = < 0x0 >; 00a94c #address-cells = < 0x1 >; 00a95c #size-cells = < 0x0 >; 00a96c phandle = < 0x18b >; 00a97c endpoint@0 { 00a98c reg = < 0x0 >; 00a99c remote-endpoint = < 0x15 >; 00a9ac status = "disabled"; 00a9c4 phandle = < 0x83 >; 00a9d4 } 00a9d8 endpoint@1 { 00a9e8 reg = < 0x1 >; 00a9f8 remote-endpoint = < 0x96 >; 00aa08 status = "disabled"; 00aa20 phandle = < 0x87 >; 00aa30 } 00aa34 } 00aa38 port@1 { 00aa44 reg = < 0x1 >; 00aa54 endpoint { 00aa64 remote-endpoint = < 0x97 >; 00aa74 phandle = < 0x9d >; 00aa84 } 00aa88 } 00aa8c } 00aa90 panel@0 { 00aa9c status = "okay"; 00aab0 compatible = "simple-panel-dsi"; 00aad0 reg = < 0x0 >; 00aae0 backlight = < 0x98 >; 00aaf0 reset-delay-ms = < 0x3c >; 00ab00 enable-delay-ms = < 0x3c >; 00ab10 prepare-delay-ms = < 0x3c >; 00ab20 unprepare-delay-ms = < 0x3c >; 00ab30 disable-delay-ms = < 0x3c >; 00ab40 dsi,flags = < 0xa03 >; 00ab50 dsi,format = < 0x0 >; 00ab60 dsi,lanes = < 0x4 >; 00ab70 panel-init-sequence = < 0x230002fe 0x21230002 0x4002300 0x2006423 0x22a00 0x23000226 0x64230002 0x54002300 0x2506423 0x27b00 0x23000277 0x64230002 0xa2002300 0x29d6423 0x2c900 0x230002c5 0x64230002 0x1712300 0x2277123 0x25171 0x23000278 0x71230002 0x9e712300 0x2c67123 0x20289 0x23000228 0x89230002 0x52892300 0x2798923 0x29f89 0x230002c7 0x89230002 0x39e2300 0x2299e23 0x2539e 0x2300027a 0x9e230002 0xa09e2300 0x2c89e23 0x20900 0x23000205 0xb0230002 0x31002300 0x22bb023 0x25a00 0x23000255 0xb0230002 0x80002300 0x27cb023 0x2a700 0x230002a3 0xb0230002 0xce002300 0x2cab023 0x206c0 0x2300022d 0xc0230002 0x56c02300 0x27dc023 0x2a4c0 0x230002cb 0xc0230002 0x7cf2300 0x22fcf23 0x258cf 0x2300027e 0xcf230002 0xa5cf2300 0x2cccf23 0x208dd 0x23000230 0xdd230002 0x59dd2300 0x27fdd23 0x2a6dd 0x230002cd 0xdd230002 0xe152300 0x20ae923 0x23615 0x23000232 0xe9230002 0x5f152300 0x25be923 0x28515 0x23000281 0xe9230002 0xad152300 0x2a9e923 0x2d315 0x230002cf 0xe9230002 0xb142300 0x2331423 0x25c14 0x23000282 0x14230002 0xaa142300 0x2d01423 0x20c36 0x23000234 0x36230002 0x5d362300 0x2833623 0x2ab36 0x230002d1 0x36230002 0xd6b2300 0x2356b23 0x25e6b 0x23000284 0x6b230002 0xac6b2300 0x2d26b23 0x2135a 0x2300020f 0x94230002 0x3b5a2300 0x2379423 0x2645a 0x23000260 0x94230002 0x8a5a2300 0x2869423 0x2b25a 0x230002ae 0x94230002 0xd85a2300 0x2d49423 0x210d1 0x23000238 0xd1230002 0x61d12300 0x287d123 0x2afd1 0x230002d5 0xd1230002 0x11042300 0x2390423 0x26204 0x23000288 0x4230002 0xb0042300 0x2d60423 0x21205 0x2300023a 0x5230002 0x63052300 0x2890523 0x2b105 0x230002d7 0x5230002 0x18aa2300 0x2143623 0x242aa 0x2300023d 0x36230002 0x69aa2300 0x2653623 0x28faa 0x2300028b 0x36230002 0xb7aa2300 0x2b33623 0x2ddaa 0x230002d9 0x36230002 0x15742300 0x23f7423 0x26674 0x2300028c 0x74230002 0xb4742300 0x2da7423 0x2169f 0x23000240 0x9f230002 0x679f2300 0x28d9f23 0x2b59f 0x230002db 0x9f230002 0x17dc2300 0x241dc23 0x268dc 0x2300028e 0xdc230002 0xb6dc2300 0x2dcdc23 0x21dff 0x23000219 0x3230002 0x47ff2300 0x2430323 0x26eff 0x2300026a 0x3230002 0x94ff2300 0x2900323 0x2bcff 0x230002b8 0x3230002 0xe2ff2300 0x2de0323 0x21a35 0x23000244 0x35230002 0x6b352300 0x2913523 0x2b935 0x230002df 0x35230002 0x1b452300 0x2454523 0x26c45 0x23000292 0x45230002 0xba452300 0x2e04523 0x21c55 0x23000246 0x55230002 0x6d552300 0x2935523 0x2bb55 0x230002e1 0x55230002 0x22ff2300 0x21e6823 0x24cff 0x23000248 0x68230002 0x73ff2300 0x26f6823 0x299ff 0x23000295 0x68230002 0xc1ff2300 0x2bd6823 0x2e7ff 0x230002e3 0x68230002 0x1f7e2300 0x2497e23 0x2707e 0x23000296 0x7e230002 0xbe7e2300 0x2e47e23 0x22097 0x2300024a 0x97230002 0x71972300 0x2979723 0x2bf97 0x230002e5 0x97230002 0x21b52300 0x24bb523 0x272b5 0x23000298 0xb5230002 0xc0b52300 0x2e6b523 0x225f0 0x23000223 0xe8230002 0x4ff02300 0x24de823 0x276f0 0x23000274 0xe8230002 0x9cf02300 0x29ae823 0x2c4f0 0x230002c2 0xe8230002 0xeaf02300 0x2e8e823 0x224ff 0x2300024e 0xff230002 0x75ff2300 0x29bff23 0x2c3ff 0x230002e9 0xff230002 0xfe3d2300 0x2000423 0x2fe23 0x23000208 0x82230002 0xa002300 0x20b0023 0x20c01 0x23000216 0x230002 0x18022300 0x21b0423 0x21904 0x2300021c 0x81230002 0x1f002300 0x2200323 0x22304 0x23000221 0x1230002 0x54632300 0x2555423 0x26e45 0x2300026d 0x36230002 0xfe3d2300 0x2557823 0x2fe20 0x23000226 0x30230002 0xfe3d2300 0x2207123 0x2508f 0x23000251 0x8f230002 0xfe002300 0x2350005 0x78011105 0x1e012900 >; 00b094 panel-exit-sequence = < 0x5000128 0x5000110 >; 00b0a8 power-supply = < 0x99 >; 00b0b8 reset-gpios = < 0x9a 0x16 0x1 >; 00b0d0 pinctrl-names = "default"; 00b0e4 pinctrl-0 = < 0x9b >; 00b0f4 phandle = < 0x18c >; 00b104 display-timings { 00b118 native-mode = < 0x9c >; 00b128 phandle = < 0x18d >; 00b138 timing0 { 00b144 clock-frequency = < 0x7de2900 >; 00b154 hactive = < 0x438 >; 00b164 vactive = < 0x780 >; 00b174 hfront-porch = < 0xf >; 00b184 hsync-len = < 0x2 >; 00b194 hback-porch = < 0x1e >; 00b1a4 vfront-porch = < 0xf >; 00b1b4 vsync-len = < 0x2 >; 00b1c4 vback-porch = < 0xf >; 00b1d4 hsync-active = < 0x0 >; 00b1e4 vsync-active = < 0x0 >; 00b1f4 de-active = < 0x0 >; 00b204 pixelclk-active = < 0x1 >; 00b214 phandle = < 0x9c >; 00b224 } 00b228 } 00b22c ports { 00b238 #address-cells = < 0x1 >; 00b248 #size-cells = < 0x0 >; 00b258 port@0 { 00b264 reg = < 0x0 >; 00b274 endpoint { 00b284 remote-endpoint = < 0x9d >; 00b294 phandle = < 0x97 >; 00b2a4 } 00b2a8 } 00b2ac } 00b2b0 } 00b2b4 } 00b2b8 hdmi@fe0a0000 { 00b2cc compatible = "rockchip,rk3568-dw-hdmi"; 00b2f0 reg = < 0x0 0xfe0a0000 0x0 0x20000 >; 00b30c interrupts = < 0x0 0x2d 0x4 >; 00b324 clocks = < 0x1f 0xe6 0x1f 0xe7 0x1f 0x193 0x31 0x2 0x1f 0xde >; 00b358 clock-names = "iahb\0isfr\0cec\0ref\0hclk"; 00b37c power-domains = < 0x21 0x9 >; 00b390 reg-io-width = < 0x4 >; 00b3a0 rockchip,grf = < 0x32 >; 00b3b0 #sound-dai-cells = < 0x0 >; 00b3c0 pinctrl-names = "default"; 00b3d4 pinctrl-0 = < 0x9e 0x9f 0xa0 >; 00b3ec status = "okay"; 00b400 rockchip,phy-table = < 0x58834d4 0x8009 0x0 0x270 0x9d5b340 0x800b 0x0 0x26d 0xb1069a8 0x800b 0x0 0x1ed 0x11b3dc40 0x800b 0x0 0x1ad 0x2367b880 0x8029 0x0 0x88 0x0 0x0 0x0 0x0 >; 00b46c phandle = < 0x11f >; 00b47c ports { 00b488 #address-cells = < 0x1 >; 00b498 #size-cells = < 0x0 >; 00b4a8 port { 00b4b4 reg = < 0x0 >; 00b4c4 #address-cells = < 0x1 >; 00b4d4 #size-cells = < 0x0 >; 00b4e4 phandle = < 0x18e >; 00b4f4 endpoint@0 { 00b504 reg = < 0x0 >; 00b514 remote-endpoint = < 0x17 >; 00b524 status = "okay"; 00b538 phandle = < 0x85 >; 00b548 } 00b54c endpoint@1 { 00b55c reg = < 0x1 >; 00b56c remote-endpoint = < 0xa1 >; 00b57c status = "disabled"; 00b594 phandle = < 0x89 >; 00b5a4 } 00b5a8 } 00b5ac } 00b5b0 } 00b5b4 edp@fe0c0000 { 00b5c8 compatible = "rockchip,rk3568-edp"; 00b5e8 reg = < 0x0 0xfe0c0000 0x0 0x10000 >; 00b604 interrupts = < 0x0 0x12 0x4 >; 00b61c clocks = < 0x31 0x29 0x1f 0xea 0x1f 0xeb 0x1f 0xda >; 00b648 clock-names = "dp\0pclk\0spdif\0hclk"; 00b668 resets = < 0x1f 0x113 0x1f 0x112 >; 00b684 reset-names = "dp\0apb"; 00b698 phys = < 0xa2 >; 00b6a8 phy-names = "dp"; 00b6b8 power-domains = < 0x21 0x9 >; 00b6cc status = "okay"; 00b6e0 hpd-gpios = < 0x91 0x7 0x0 >; 00b6f8 phandle = < 0x18f >; 00b708 ports { 00b714 #address-cells = < 0x1 >; 00b724 #size-cells = < 0x0 >; 00b734 port@0 { 00b740 reg = < 0x0 >; 00b750 #address-cells = < 0x1 >; 00b760 #size-cells = < 0x0 >; 00b770 phandle = < 0x190 >; 00b780 endpoint@0 { 00b790 reg = < 0x0 >; 00b7a0 remote-endpoint = < 0x16 >; 00b7b0 status = "okay"; 00b7c4 phandle = < 0x84 >; 00b7d4 } 00b7d8 endpoint@1 { 00b7e8 reg = < 0x1 >; 00b7f8 remote-endpoint = < 0xa3 >; 00b808 status = "disabled"; 00b820 phandle = < 0x88 >; 00b830 } 00b834 } 00b838 } 00b83c } 00b840 qos@fe128000 { 00b854 compatible = "syscon"; 00b868 reg = < 0x0 0xfe128000 0x0 0x20 >; 00b884 phandle = < 0x45 >; 00b894 } 00b898 qos@fe138080 { 00b8ac compatible = "syscon"; 00b8c0 reg = < 0x0 0xfe138080 0x0 0x20 >; 00b8dc phandle = < 0x54 >; 00b8ec } 00b8f0 qos@fe138100 { 00b904 compatible = "syscon"; 00b918 reg = < 0x0 0xfe138100 0x0 0x20 >; 00b934 phandle = < 0x55 >; 00b944 } 00b948 qos@fe138180 { 00b95c compatible = "syscon"; 00b970 reg = < 0x0 0xfe138180 0x0 0x20 >; 00b98c phandle = < 0x56 >; 00b99c } 00b9a0 qos@fe148000 { 00b9b4 compatible = "syscon"; 00b9c8 reg = < 0x0 0xfe148000 0x0 0x20 >; 00b9e4 phandle = < 0x46 >; 00b9f4 } 00b9f8 qos@fe148080 { 00ba0c compatible = "syscon"; 00ba20 reg = < 0x0 0xfe148080 0x0 0x20 >; 00ba3c phandle = < 0x47 >; 00ba4c } 00ba50 qos@fe148100 { 00ba64 compatible = "syscon"; 00ba78 reg = < 0x0 0xfe148100 0x0 0x20 >; 00ba94 phandle = < 0x48 >; 00baa4 } 00baa8 qos@fe150000 { 00babc compatible = "syscon"; 00bad0 reg = < 0x0 0xfe150000 0x0 0x20 >; 00baec phandle = < 0x52 >; 00bafc } 00bb00 qos@fe158000 { 00bb14 compatible = "syscon"; 00bb28 reg = < 0x0 0xfe158000 0x0 0x20 >; 00bb44 phandle = < 0x4c >; 00bb54 } 00bb58 qos@fe158100 { 00bb6c compatible = "syscon"; 00bb80 reg = < 0x0 0xfe158100 0x0 0x20 >; 00bb9c phandle = < 0x4d >; 00bbac } 00bbb0 qos@fe158180 { 00bbc4 compatible = "syscon"; 00bbd8 reg = < 0x0 0xfe158180 0x0 0x20 >; 00bbf4 phandle = < 0x4e >; 00bc04 } 00bc08 qos@fe158200 { 00bc1c compatible = "syscon"; 00bc30 reg = < 0x0 0xfe158200 0x0 0x20 >; 00bc4c phandle = < 0x4f >; 00bc5c } 00bc60 qos@fe158280 { 00bc74 compatible = "syscon"; 00bc88 reg = < 0x0 0xfe158280 0x0 0x20 >; 00bca4 phandle = < 0x50 >; 00bcb4 } 00bcb8 qos@fe158300 { 00bccc compatible = "syscon"; 00bce0 reg = < 0x0 0xfe158300 0x0 0x20 >; 00bcfc phandle = < 0x51 >; 00bd0c } 00bd10 qos@fe180000 { 00bd24 compatible = "syscon"; 00bd38 reg = < 0x0 0xfe180000 0x0 0x20 >; 00bd54 phandle = < 0x44 >; 00bd64 } 00bd68 qos@fe190000 { 00bd7c compatible = "syscon"; 00bd90 reg = < 0x0 0xfe190000 0x0 0x20 >; 00bdac phandle = < 0x57 >; 00bdbc } 00bdc0 qos@fe190280 { 00bdd4 compatible = "syscon"; 00bde8 reg = < 0x0 0xfe190280 0x0 0x20 >; 00be04 phandle = < 0x58 >; 00be14 } 00be18 qos@fe190300 { 00be2c compatible = "syscon"; 00be40 reg = < 0x0 0xfe190300 0x0 0x20 >; 00be5c phandle = < 0x59 >; 00be6c } 00be70 qos@fe190380 { 00be84 compatible = "syscon"; 00be98 reg = < 0x0 0xfe190380 0x0 0x20 >; 00beb4 phandle = < 0x5a >; 00bec4 } 00bec8 qos@fe190400 { 00bedc compatible = "syscon"; 00bef0 reg = < 0x0 0xfe190400 0x0 0x20 >; 00bf0c phandle = < 0x5b >; 00bf1c } 00bf20 qos@fe198000 { 00bf34 compatible = "syscon"; 00bf48 reg = < 0x0 0xfe198000 0x0 0x20 >; 00bf64 phandle = < 0x53 >; 00bf74 } 00bf78 qos@fe1a8000 { 00bf8c compatible = "syscon"; 00bfa0 reg = < 0x0 0xfe1a8000 0x0 0x20 >; 00bfbc phandle = < 0x49 >; 00bfcc } 00bfd0 qos@fe1a8080 { 00bfe4 compatible = "syscon"; 00bff8 reg = < 0x0 0xfe1a8080 0x0 0x20 >; 00c014 phandle = < 0x4a >; 00c024 } 00c028 qos@fe1a8100 { 00c03c compatible = "syscon"; 00c050 reg = < 0x0 0xfe1a8100 0x0 0x20 >; 00c06c phandle = < 0x4b >; 00c07c } 00c080 dwmmc@fe000000 { 00c094 compatible = "rockchip,rk3568-dw-mshc\0rockchip,rk3288-dw-mshc"; 00c0d0 reg = < 0x0 0xfe000000 0x0 0x4000 >; 00c0ec interrupts = < 0x0 0x64 0x4 >; 00c104 max-frequency = < 0x8f0d180 >; 00c114 clocks = < 0x1f 0xc1 0x1f 0xc2 0x1f 0x18e 0x1f 0x18f >; 00c140 clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; 00c16c fifo-depth = < 0x100 >; 00c17c resets = < 0x1f 0xeb >; 00c190 reset-names = "reset"; 00c1a4 status = "disabled"; 00c1bc phandle = < 0x191 >; 00c1cc } 00c1d0 dfi@fe230000 { 00c1e4 reg = < 0x0 0xfe230000 0x0 0x400 >; 00c200 compatible = "rockchip,rk3568-dfi"; 00c220 rockchip,pmugrf = < 0x33 >; 00c230 status = "okay"; 00c244 phandle = < 0xa4 >; 00c254 } 00c258 dmc { 00c260 compatible = "rockchip,rk3568-dmc"; 00c280 interrupts = < 0x0 0xa 0x4 >; 00c298 interrupt-names = "complete"; 00c2b0 devfreq-events = < 0xa4 >; 00c2c0 clocks = < 0x2 0x3 >; 00c2d4 clock-names = "dmc_clk"; 00c2e8 operating-points-v2 = < 0xa5 >; 00c2f8 ddr_timing = < 0xa6 >; 00c308 vop-bw-dmc-freq = < 0x0 0x1f9 0x4f1a0 0x1fa 0x1869f 0x80e80 >; 00c32c upthreshold = < 0x28 >; 00c33c downdifferential = < 0x14 >; 00c34c system-status-level = < 0x1 0x4 0x8 0x8 0x2 0x1 0x10 0x4 0x10000 0x4 0x1000 0x8 0x4000 0x8 0x2000 0x8 0xc00 0x8 >; 00c3a0 auto-min-freq = < 0x4f1a0 >; 00c3b0 auto-freq-en = < 0x1 >; 00c3c0 #cooling-cells = < 0x2 >; 00c3d0 status = "disabled"; 00c3e8 center-supply = < 0x61 >; 00c3f8 phandle = < 0x13 >; 00c408 } 00c40c dmc-opp-table { 00c420 compatible = "operating-points-v2"; 00c440 mbist-vmin = < 0xc96a8 0xdbba0 0xe7ef0 >; 00c458 nvmem-cells = < 0xa7 0x7 0x8 >; 00c470 nvmem-cell-names = "leakage\0pvtm\0mbist-vmin"; 00c494 rockchip,temp-hysteresis = < 0x1388 >; 00c4a4 rockchip,low-temp = < 0x0 >; 00c4b4 rockchip,low-temp-adjust-volt = < 0x0 0x618 0x61a8 >; 00c4cc rockchip,leakage-voltage-sel = < 0x1 0x50 0x0 0x51 0xfe 0x1 >; 00c4f0 phandle = < 0xa5 >; 00c500 opp-1560000000 { 00c514 opp-hz = < 0x0 0x5cfbb600 >; 00c528 opp-microvolt = < 0xdbba0 >; 00c538 opp-microvolt-L0 = < 0xdbba0 >; 00c548 opp-microvolt-L1 = < 0xcf850 >; 00c558 } 00c55c } 00c560 pcie@fe260000 { 00c574 compatible = "rockchip,rk3568-pcie\0snps,dw-pcie"; 00c5a4 #address-cells = < 0x3 >; 00c5b4 #size-cells = < 0x2 >; 00c5c4 bus-range = < 0x0 0xf >; 00c5d8 clocks = < 0x1f 0x81 0x1f 0x82 0x1f 0x83 0x1f 0x84 0x1f 0x85 >; 00c60c clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux"; 00c63c device_type = "pci"; 00c64c interrupts = < 0x0 0x4b 0x4 0x0 0x4a 0x4 0x0 0x49 0x4 0x0 0x48 0x4 0x0 0x47 0x4 >; 00c694 interrupt-names = "sys\0pmc\0msg\0legacy\0err"; 00c6b8 #interrupt-cells = < 0x1 >; 00c6c8 interrupt-map-mask = < 0x0 0x0 0x0 0x7 >; 00c6e4 interrupt-map = < 0x0 0x0 0x0 0x1 0xa8 0x0 0x0 0x0 0x0 0x2 0xa8 0x1 0x0 0x0 0x0 0x3 0xa8 0x2 0x0 0x0 0x0 0x4 0xa8 0x3 >; 00c750 linux,pci-domain = < 0x0 >; 00c760 num-ib-windows = < 0x6 >; 00c770 num-ob-windows = < 0x2 >; 00c780 max-link-speed = < 0x2 >; 00c790 msi-map = < 0x0 0xa9 0x0 0x1000 >; 00c7ac num-lanes = < 0x1 >; 00c7bc phys = < 0x22 0x2 >; 00c7d0 phy-names = "pcie-phy"; 00c7e8 power-domains = < 0x21 0xf >; 00c7fc ranges = < 0x800 0x0 0x0 0x3 0x0 0x0 0x800000 0x81000000 0x0 0x800000 0x3 0x800000 0x0 0x100000 0x83000000 0x0 0x900000 0x3 0x900000 0x0 0x3f700000 >; 00c85c reg = < 0x3 0xc0000000 0x0 0x400000 0x0 0xfe260000 0x0 0x10000 >; 00c888 reg-names = "pcie-dbi\0pcie-apb"; 00c8a8 resets = < 0x1f 0xa1 >; 00c8bc reset-names = "pipe"; 00c8d0 status = "disabled"; 00c8e8 phandle = < 0x192 >; 00c8f8 legacy-interrupt-controller { 00c918 interrupt-controller; 00c924 #address-cells = < 0x0 >; 00c934 #interrupt-cells = < 0x1 >; 00c944 interrupt-parent = < 0x1 >; 00c954 interrupts = < 0x0 0x48 0x1 >; 00c96c phandle = < 0xa8 >; 00c97c } 00c980 } 00c984 dwmmc@fe2b0000 { 00c998 compatible = "rockchip,rk3568-dw-mshc\0rockchip,rk3288-dw-mshc"; 00c9d4 reg = < 0x0 0xfe2b0000 0x0 0x4000 >; 00c9f0 interrupts = < 0x0 0x62 0x4 >; 00ca08 max-frequency = < 0x8f0d180 >; 00ca18 clocks = < 0x1f 0xb0 0x1f 0xb1 0x1f 0x18a 0x1f 0x18b >; 00ca44 clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; 00ca70 fifo-depth = < 0x100 >; 00ca80 resets = < 0x1f 0xd4 >; 00ca94 reset-names = "reset"; 00caa8 status = "okay"; 00cabc supports-sd; 00cac8 bus-width = < 0x4 >; 00cad8 cap-mmc-highspeed; 00cae4 cap-sd-highspeed; 00caf0 disable-wp; 00cafc sd-uhs-sdr104; 00cb08 vmmc-supply = < 0xaa >; 00cb18 vqmmc-supply = < 0x2b >; 00cb28 pinctrl-names = "default"; 00cb3c pinctrl-0 = < 0xab 0xac 0xad 0xae >; 00cb58 phandle = < 0x193 >; 00cb68 } 00cb6c dwmmc@fe2c0000 { 00cb80 compatible = "rockchip,rk3568-dw-mshc\0rockchip,rk3288-dw-mshc"; 00cbbc reg = < 0x0 0xfe2c0000 0x0 0x4000 >; 00cbd8 interrupts = < 0x0 0x63 0x4 >; 00cbf0 max-frequency = < 0x8f0d180 >; 00cc00 clocks = < 0x1f 0xb2 0x1f 0xb3 0x1f 0x18c 0x1f 0x18d >; 00cc2c clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; 00cc58 fifo-depth = < 0x100 >; 00cc68 resets = < 0x1f 0xd6 >; 00cc7c reset-names = "reset"; 00cc90 status = "okay"; 00cca4 supports-sdio; 00ccb0 bus-width = < 0x4 >; 00ccc0 disable-wp; 00cccc cap-sd-highspeed; 00ccd8 cap-sdio-irq; 00cce4 keep-power-in-suspend; 00ccf0 mmc-pwrseq = < 0xaf >; 00cd00 non-removable; 00cd0c pinctrl-names = "default"; 00cd20 pinctrl-0 = < 0xb0 0xb1 0xb2 >; 00cd38 sd-uhs-sdr104; 00cd44 phandle = < 0x194 >; 00cd54 } 00cd58 sfc@fe300000 { 00cd6c compatible = "rockchip,sfc"; 00cd88 reg = < 0x0 0xfe300000 0x0 0x4000 >; 00cda4 interrupts = < 0x0 0x65 0x4 >; 00cdbc clocks = < 0x1f 0x78 0x1f 0x76 >; 00cdd8 clock-names = "clk_sfc\0hclk_sfc"; 00cdf8 assigned-clocks = < 0x1f 0x78 >; 00ce0c assigned-clock-rates = < 0x5f5e100 >; 00ce1c status = "okay"; 00ce30 phandle = < 0x195 >; 00ce40 } 00ce44 sdhci@fe310000 { 00ce58 compatible = "rockchip,dwcmshc-sdhci\0snps,dwcmshc-sdhci"; 00ce90 reg = < 0x0 0xfe310000 0x0 0x10000 >; 00ceac interrupts = < 0x0 0x13 0x4 >; 00cec4 assigned-clocks = < 0x1f 0x7b 0x1f 0x7d >; 00cee0 assigned-clock-rates = < 0xbebc200 0x16e3600 >; 00cef4 clocks = < 0x1f 0x7c 0x1f 0x7a 0x1f 0x79 0x1f 0x7b 0x1f 0x7d >; 00cf28 clock-names = "core\0bus\0axi\0block\0timer"; 00cf50 status = "okay"; 00cf64 bus-width = < 0x8 >; 00cf74 supports-emmc; 00cf80 non-removable; 00cf8c max-frequency = < 0xbebc200 >; 00cf9c phandle = < 0x196 >; 00cfac } 00cfb0 nandc@fe330000 { 00cfc4 compatible = "rockchip,rk-nandc-v9"; 00cfe8 reg = < 0x0 0xfe330000 0x0 0x4000 >; 00d004 interrupts = < 0x0 0x46 0x4 >; 00d01c nandc_id = < 0x0 >; 00d02c clocks = < 0x1f 0x75 0x1f 0x74 >; 00d048 clock-names = "clk_nandc\0hclk_nandc"; 00d06c status = "okay"; 00d080 #address-cells = < 0x1 >; 00d090 #size-cells = < 0x0 >; 00d0a0 phandle = < 0x197 >; 00d0b0 nand@0 { 00d0bc reg = < 0x0 >; 00d0cc nand-bus-width = < 0x8 >; 00d0dc nand-ecc-mode = "hw"; 00d0ec nand-ecc-strength = < 0x10 >; 00d0fc nand-ecc-step-size = < 0x400 >; 00d10c } 00d110 } 00d114 crypto@fe380000 { 00d128 compatible = "rockchip,rk3568-crypto"; 00d14c reg = < 0x0 0xfe380000 0x0 0x4000 >; 00d168 interrupts = < 0x0 0x4 0x4 >; 00d180 clocks = < 0x1f 0x6a 0x1f 0x6b 0x1f 0x6c 0x1f 0x6d >; 00d1ac clock-names = "aclk\0hclk\0sclk\0apb_pclk"; 00d1d0 assigned-clocks = < 0x1f 0x6c >; 00d1e4 assigned-clock-rates = < 0xbebc200 >; 00d1f4 resets = < 0x1f 0x69 >; 00d208 reset-names = "crypto-rst"; 00d220 status = "disabled"; 00d238 phandle = < 0x198 >; 00d248 } 00d24c rng@fe388000 { 00d260 compatible = "rockchip,cryptov2-rng"; 00d284 reg = < 0x0 0xfe388000 0x0 0x2000 >; 00d2a0 clocks = < 0x1f 0x70 0x1f 0x6f >; 00d2bc clock-names = "clk_trng\0hclk_trng"; 00d2dc resets = < 0x1f 0x6d >; 00d2f0 reset-names = "reset"; 00d304 status = "okay"; 00d318 phandle = < 0x199 >; 00d328 } 00d32c otp@fe38c000 { 00d340 compatible = "rockchip,rk3568-otp"; 00d360 reg = < 0x0 0xfe38c000 0x0 0x4000 >; 00d37c #address-cells = < 0x1 >; 00d38c #size-cells = < 0x1 >; 00d39c clocks = < 0x1f 0x73 0x1f 0x72 0x1f 0x71 0x1f 0x181 >; 00d3c8 clock-names = "usr\0sbpi\0apb\0phy"; 00d3e8 resets = < 0x1f 0x1cf >; 00d3fc reset-names = "otp_phy"; 00d410 phandle = < 0x19a >; 00d420 cpu-code@2 { 00d430 reg = < 0x2 0x2 >; 00d444 phandle = < 0xf >; 00d454 } 00d458 cpu-version@8 { 00d46c reg = < 0x8 0x1 >; 00d480 bits = < 0x3 0x3 >; 00d494 phandle = < 0xe >; 00d4a4 } 00d4a8 mbist-vmin@9 { 00d4bc reg = < 0x9 0x1 >; 00d4d0 bits = < 0x0 0x4 >; 00d4e4 phandle = < 0x8 >; 00d4f4 } 00d4f8 id@a { 00d504 reg = < 0xa 0x10 >; 00d518 phandle = < 0xd >; 00d528 } 00d52c cpu-leakage@1a { 00d540 reg = < 0x1a 0x1 >; 00d554 phandle = < 0x6 >; 00d564 } 00d568 log-leakage@1b { 00d57c reg = < 0x1b 0x1 >; 00d590 phandle = < 0xa7 >; 00d5a0 } 00d5a4 npu-leakage@1c { 00d5b8 reg = < 0x1c 0x1 >; 00d5cc phandle = < 0x5f >; 00d5dc } 00d5e0 gpu-leakage@1d { 00d5f4 reg = < 0x1d 0x1 >; 00d608 phandle = < 0x64 >; 00d618 } 00d61c core-pvtm@2a { 00d630 reg = < 0x2a 0x2 >; 00d644 phandle = < 0x7 >; 00d654 } 00d658 } 00d65c i2s@fe400000 { 00d670 compatible = "rockchip,rk3568-i2s-tdm"; 00d694 reg = < 0x0 0xfe400000 0x0 0x1000 >; 00d6b0 interrupts = < 0x0 0x34 0x4 >; 00d6c8 clocks = < 0x1f 0x3f 0x1f 0x43 0x1f 0x39 >; 00d6ec clock-names = "mclk_tx\0mclk_rx\0hclk"; 00d710 dmas = < 0xb3 0x0 >; 00d724 dma-names = "tx"; 00d734 resets = < 0x1f 0x50 0x1f 0x51 >; 00d750 reset-names = "tx-m\0rx-m"; 00d768 rockchip,cru = < 0x1f >; 00d778 rockchip,grf = < 0x32 >; 00d788 rockchip,playback-only; 00d794 #sound-dai-cells = < 0x0 >; 00d7a4 status = "okay"; 00d7b8 phandle = < 0x11e >; 00d7c8 } 00d7cc i2s@fe410000 { 00d7e0 compatible = "rockchip,rk3568-i2s-tdm"; 00d804 reg = < 0x0 0xfe410000 0x0 0x1000 >; 00d820 interrupts = < 0x0 0x35 0x4 >; 00d838 clocks = < 0x1f 0x47 0x1f 0x4b 0x1f 0x3a >; 00d85c clock-names = "mclk_tx\0mclk_rx\0hclk"; 00d880 dmas = < 0xb3 0x2 0xb3 0x3 >; 00d89c dma-names = "tx\0rx"; 00d8b0 resets = < 0x1f 0x52 0x1f 0x53 >; 00d8cc reset-names = "tx-m\0rx-m"; 00d8e4 rockchip,cru = < 0x1f >; 00d8f4 rockchip,grf = < 0x32 >; 00d904 #sound-dai-cells = < 0x0 >; 00d914 pinctrl-names = "default"; 00d928 pinctrl-0 = < 0xb4 0xb5 0xb6 0xb7 >; 00d944 status = "disabled"; 00d95c rockchip,clk-trcm = < 0x1 >; 00d96c phandle = < 0xc4 >; 00d97c } 00d980 i2s@fe420000 { 00d994 compatible = "rockchip,rk3568-i2s-tdm"; 00d9b8 reg = < 0x0 0xfe420000 0x0 0x1000 >; 00d9d4 interrupts = < 0x0 0x36 0x4 >; 00d9ec clocks = < 0x1f 0x4f 0x1f 0x4f 0x1f 0x3b >; 00da10 clock-names = "mclk_tx\0mclk_rx\0hclk"; 00da34 dmas = < 0xb3 0x4 0xb3 0x5 >; 00da50 dma-names = "tx\0rx"; 00da64 rockchip,cru = < 0x1f >; 00da74 rockchip,grf = < 0x32 >; 00da84 rockchip,clk-trcm = < 0x1 >; 00da94 #sound-dai-cells = < 0x0 >; 00daa4 pinctrl-names = "default"; 00dab8 pinctrl-0 = < 0xb8 0xb9 0xba 0xbb >; 00dad4 status = "disabled"; 00daec phandle = < 0x19b >; 00dafc } 00db00 i2s@fe430000 { 00db14 compatible = "rockchip,rk3568-i2s-tdm"; 00db38 reg = < 0x0 0xfe430000 0x0 0x1000 >; 00db54 interrupts = < 0x0 0x37 0x4 >; 00db6c clocks = < 0x1f 0x53 0x1f 0x57 0x1f 0x3c >; 00db90 clock-names = "mclk_tx\0mclk_rx\0hclk"; 00dbb4 dmas = < 0xb3 0x6 0xb3 0x7 >; 00dbd0 dma-names = "tx\0rx"; 00dbe4 resets = < 0x1f 0x55 0x1f 0x56 >; 00dc00 reset-names = "tx-m\0rx-m"; 00dc18 rockchip,cru = < 0x1f >; 00dc28 rockchip,grf = < 0x32 >; 00dc38 rockchip,clk-trcm = < 0x1 >; 00dc48 #sound-dai-cells = < 0x0 >; 00dc58 pinctrl-names = "default"; 00dc6c pinctrl-0 = < 0xbc 0xbd 0xbe 0xbf >; 00dc88 status = "okay"; 00dc9c phandle = < 0x11a >; 00dcac } 00dcb0 pdm@fe440000 { 00dcc4 compatible = "rockchip,rk3568-pdm\0rockchip,pdm"; 00dcf4 reg = < 0x0 0xfe440000 0x0 0x1000 >; 00dd10 clocks = < 0x1f 0x5a 0x1f 0x59 >; 00dd2c clock-names = "pdm_clk\0pdm_hclk"; 00dd4c dmas = < 0xb3 0x9 >; 00dd60 dma-names = "rx"; 00dd70 pinctrl-names = "default"; 00dd84 pinctrl-0 = < 0xc0 0xc1 0xc2 0xc3 >; 00dda0 #sound-dai-cells = < 0x0 >; 00ddb0 status = "disabled"; 00ddc8 phandle = < 0x120 >; 00ddd8 } 00dddc vad@fe450000 { 00ddf0 compatible = "rockchip,rk3568-vad"; 00de10 reg = < 0x0 0xfe450000 0x0 0x10000 >; 00de2c reg-names = "vad"; 00de3c clocks = < 0x1f 0x5b >; 00de50 clock-names = "hclk"; 00de64 interrupts = < 0x0 0x89 0x4 >; 00de7c rockchip,audio-src = < 0xc4 >; 00de8c rockchip,det-channel = < 0x0 >; 00de9c rockchip,mode = < 0x0 >; 00deac #sound-dai-cells = < 0x0 >; 00debc status = "disabled"; 00ded4 rockchip,buffer-time-ms = < 0x80 >; 00dee4 phandle = < 0x125 >; 00def4 } 00def8 spdif@fe460000 { 00df0c compatible = "rockchip,rk3568-spdif"; 00df30 reg = < 0x0 0xfe460000 0x0 0x1000 >; 00df4c interrupts = < 0x0 0x66 0x4 >; 00df64 dmas = < 0xb3 0x1 >; 00df78 dma-names = "tx"; 00df88 clock-names = "mclk\0hclk"; 00dfa0 clocks = < 0x1f 0x5f 0x1f 0x5c >; 00dfbc #sound-dai-cells = < 0x0 >; 00dfcc pinctrl-names = "default"; 00dfe0 pinctrl-0 = < 0xc5 >; 00dff0 status = "disabled"; 00e008 phandle = < 0x123 >; 00e018 } 00e01c audpwm@fe470000 { 00e030 compatible = "rockchip,rk3568-audio-pwm\0rockchip,audio-pwm-v1"; 00e06c reg = < 0x0 0xfe470000 0x0 0x1000 >; 00e088 clocks = < 0x1f 0x63 0x1f 0x60 >; 00e0a4 clock-names = "clk\0hclk"; 00e0bc dmas = < 0xb3 0x8 >; 00e0d0 dma-names = "tx"; 00e0e0 #sound-dai-cells = < 0x0 >; 00e0f0 rockchip,sample-width-bits = < 0xb >; 00e100 rockchip,interpolat-points = < 0x1 >; 00e110 status = "disabled"; 00e128 phandle = < 0x19c >; 00e138 } 00e13c codec-digital@fe478000 { 00e158 compatible = "rockchip,rk3568-codec-digital\0rockchip,codec-digital-v1"; 00e19c reg = < 0x0 0xfe478000 0x0 0x1000 >; 00e1b8 clocks = < 0x1f 0x67 0x1f 0x66 0x1f 0x65 0x1f 0x64 >; 00e1e4 clock-names = "adc\0dac\0i2c\0pclk"; 00e204 pinctrl-names = "default"; 00e218 pinctrl-0 = < 0xc6 >; 00e228 resets = < 0x1f 0x5f >; 00e23c reset-names = "reset"; 00e250 rockchip,grf = < 0x32 >; 00e260 #sound-dai-cells = < 0x0 >; 00e270 status = "disabled"; 00e288 phandle = < 0x11b >; 00e298 } 00e29c dmac@fe530000 { 00e2b0 compatible = "arm,pl330\0arm,primecell"; 00e2d4 reg = < 0x0 0xfe530000 0x0 0x4000 >; 00e2f0 interrupts = < 0x0 0xe 0x4 0x0 0xd 0x4 >; 00e314 clocks = < 0x1f 0x10d >; 00e328 clock-names = "apb_pclk"; 00e340 #dma-cells = < 0x1 >; 00e350 arm,pl330-periph-burst; 00e35c phandle = < 0x3e >; 00e36c } 00e370 dmac@fe550000 { 00e384 compatible = "arm,pl330\0arm,primecell"; 00e3a8 reg = < 0x0 0xfe550000 0x0 0x4000 >; 00e3c4 interrupts = < 0x0 0x10 0x4 0x0 0xf 0x4 >; 00e3e8 clocks = < 0x1f 0x10d >; 00e3fc clock-names = "apb_pclk"; 00e414 #dma-cells = < 0x1 >; 00e424 arm,pl330-periph-burst; 00e430 phandle = < 0xb3 >; 00e440 } 00e444 rkscr@fe560000 { 00e458 compatible = "rockchip-scr"; 00e474 reg = < 0x0 0xfe560000 0x0 0x10000 >; 00e490 interrupts = < 0x0 0x61 0x4 >; 00e4a8 pinctrl-names = "default"; 00e4bc pinctrl-0 = < 0xc7 >; 00e4cc clocks = < 0x1f 0x114 >; 00e4e0 clock-names = "g_pclk_sim_card"; 00e4fc status = "disabled"; 00e514 phandle = < 0x19d >; 00e524 } 00e528 can@fe570000 { 00e53c compatible = "rockchip,canfd-1.0"; 00e55c reg = < 0x0 0xfe570000 0x0 0x1000 >; 00e578 interrupts = < 0x0 0x1 0x4 >; 00e590 clocks = < 0x1f 0x141 0x1f 0x140 >; 00e5ac clock-names = "baudclk\0apb_pclk"; 00e5cc resets = < 0x1f 0x155 0x1f 0x154 >; 00e5e8 reset-names = "can\0can-apb"; 00e600 tx-fifo-depth = < 0x1 >; 00e610 rx-fifo-depth = < 0x6 >; 00e620 status = "disabled"; 00e638 assigned-clocks = < 0x1f 0x141 >; 00e64c assigned-clock-rates = < 0x8f0d180 >; 00e65c pinctrl-names = "default"; 00e670 pinctrl-0 = < 0xc8 >; 00e680 phandle = < 0x19e >; 00e690 } 00e694 can@fe580000 { 00e6a8 compatible = "rockchip,canfd-1.0"; 00e6c8 reg = < 0x0 0xfe580000 0x0 0x1000 >; 00e6e4 interrupts = < 0x0 0x2 0x4 >; 00e6fc clocks = < 0x1f 0x143 0x1f 0x142 >; 00e718 clock-names = "baudclk\0apb_pclk"; 00e738 resets = < 0x1f 0x157 0x1f 0x156 >; 00e754 reset-names = "can\0can-apb"; 00e76c tx-fifo-depth = < 0x1 >; 00e77c rx-fifo-depth = < 0x6 >; 00e78c status = "disabled"; 00e7a4 assigned-clocks = < 0x1f 0x143 >; 00e7b8 assigned-clock-rates = < 0x8f0d180 >; 00e7c8 pinctrl-names = "default"; 00e7dc pinctrl-0 = < 0xc9 >; 00e7ec phandle = < 0x19f >; 00e7fc } 00e800 can@fe590000 { 00e814 compatible = "rockchip,canfd-1.0"; 00e834 reg = < 0x0 0xfe590000 0x0 0x1000 >; 00e850 interrupts = < 0x0 0x3 0x4 >; 00e868 clocks = < 0x1f 0x145 0x1f 0x144 >; 00e884 clock-names = "baudclk\0apb_pclk"; 00e8a4 resets = < 0x1f 0x159 0x1f 0x158 >; 00e8c0 reset-names = "can\0can-apb"; 00e8d8 tx-fifo-depth = < 0x1 >; 00e8e8 rx-fifo-depth = < 0x6 >; 00e8f8 status = "disabled"; 00e910 assigned-clocks = < 0x1f 0x145 >; 00e924 assigned-clock-rates = < 0x8f0d180 >; 00e934 pinctrl-names = "default"; 00e948 pinctrl-0 = < 0xca >; 00e958 phandle = < 0x1a0 >; 00e968 } 00e96c i2c@fe5a0000 { 00e980 compatible = "rockchip,rk3399-i2c"; 00e9a0 reg = < 0x0 0xfe5a0000 0x0 0x1000 >; 00e9bc clocks = < 0x1f 0x148 0x1f 0x147 >; 00e9d8 clock-names = "i2c\0pclk"; 00e9f0 interrupts = < 0x0 0x2f 0x4 >; 00ea08 pinctrl-names = "default"; 00ea1c pinctrl-0 = < 0xcb >; 00ea2c #address-cells = < 0x1 >; 00ea3c #size-cells = < 0x0 >; 00ea4c status = "okay"; 00ea60 clock-frequency = < 0x186a0 >; 00ea70 phandle = < 0x1a1 >; 00ea80 gt1x@14 { 00ea8c compatible = "goodix,gt1x"; 00eaa4 reg = < 0x14 >; 00eab4 pinctrl-names = "default"; 00eac8 pinctrl-0 = < 0xcc >; 00ead8 goodix,rst-gpio = < 0x35 0xe 0x0 >; 00eaf0 goodix,irq-gpio = < 0x35 0xd 0x8 >; 00eb08 power-supply = < 0x90 >; 00eb18 status = "disabled"; 00eb30 phandle = < 0x1a2 >; 00eb40 } 00eb44 } 00eb48 i2c@fe5b0000 { 00eb5c compatible = "rockchip,rk3399-i2c"; 00eb7c reg = < 0x0 0xfe5b0000 0x0 0x1000 >; 00eb98 clocks = < 0x1f 0x14a 0x1f 0x149 >; 00ebb4 clock-names = "i2c\0pclk"; 00ebcc interrupts = < 0x0 0x30 0x4 >; 00ebe4 pinctrl-names = "default"; 00ebf8 pinctrl-0 = < 0xcd >; 00ec08 #address-cells = < 0x1 >; 00ec18 #size-cells = < 0x0 >; 00ec28 status = "okay"; 00ec3c phandle = < 0x1a3 >; 00ec4c gc2145@3c { 00ec5c status = "okay"; 00ec70 compatible = "galaxycore,gc2145"; 00ec90 reg = < 0x3c >; 00eca0 clocks = < 0x1f 0xd6 >; 00ecb4 clock-names = "xvclk"; 00ecc8 power-domains = < 0x21 0x8 >; 00ecdc pinctrl-names = "default"; 00ecf0 pinctrl-0 = < 0xce 0xcf 0xd0 >; 00ed08 power-gpios = < 0x7a 0x1c 0x0 >; 00ed20 pwdn-gpios = < 0x7a 0x1a 0x0 >; 00ed38 rockchip,camera-module-index = < 0x1 >; 00ed48 rockchip,camera-module-facing = "front"; 00ed5c rockchip,camera-module-name = "CameraKing"; 00ed74 rockchip,camera-module-lens-name = "Largan"; 00ed88 phandle = < 0x1a4 >; 00ed98 port { 00eda4 endpoint { 00edb4 remote-endpoint = < 0xd1 >; 00edc4 phandle = < 0x71 >; 00edd4 } 00edd8 } 00eddc } 00ede0 ov5695@36 { 00edf0 status = "okay"; 00ee04 compatible = "ovti,ov5695"; 00ee1c reg = < 0x36 >; 00ee2c clocks = < 0x1f 0xd7 >; 00ee40 clock-names = "xvclk"; 00ee54 power-domains = < 0x21 0x8 >; 00ee68 pinctrl-names = "default"; 00ee7c pinctrl-0 = < 0xd2 >; 00ee8c reset-gpios = < 0x7a 0x18 0x0 >; 00eea4 pwdn-gpios = < 0x7a 0x16 0x0 >; 00eebc rockchip,camera-module-index = < 0x0 >; 00eecc rockchip,camera-module-facing = "back"; 00eee0 rockchip,camera-module-name = "TongJu"; 00eef4 rockchip,camera-module-lens-name = "CHT842-MD"; 00ef0c phandle = < 0x1a5 >; 00ef1c port { 00ef28 endpoint { 00ef38 remote-endpoint = < 0xd3 >; 00ef48 data-lanes = < 0x1 0x2 >; 00ef5c phandle = < 0x106 >; 00ef6c } 00ef70 } 00ef74 } 00ef78 gc8034@37 { 00ef88 compatible = "galaxycore,gc8034"; 00efa8 status = "okay"; 00efbc reg = < 0x37 >; 00efcc clocks = < 0x1f 0xd7 >; 00efe0 clock-names = "xvclk"; 00eff4 power-domains = < 0x21 0x8 >; 00f008 pinctrl-names = "default"; 00f01c pinctrl-0 = < 0xd2 >; 00f02c reset-gpios = < 0x7a 0x18 0x1 >; 00f044 pwdn-gpios = < 0x7a 0x16 0x1 >; 00f05c rockchip,camera-module-index = < 0x0 >; 00f06c rockchip,camera-module-facing = "back"; 00f080 rockchip,camera-module-name = "RK-CMK-8M-2-v1"; 00f09c rockchip,camera-module-lens-name = "CK8401"; 00f0b0 phandle = < 0x1a6 >; 00f0c0 port { 00f0cc endpoint { 00f0dc remote-endpoint = < 0xd4 >; 00f0ec data-lanes = < 0x1 0x2 0x3 0x4 >; 00f108 phandle = < 0x107 >; 00f118 } 00f11c } 00f120 } 00f124 } 00f128 i2c@fe5c0000 { 00f13c compatible = "rockchip,rk3399-i2c"; 00f15c reg = < 0x0 0xfe5c0000 0x0 0x1000 >; 00f178 clocks = < 0x1f 0x14c 0x1f 0x14b >; 00f194 clock-names = "i2c\0pclk"; 00f1ac interrupts = < 0x0 0x31 0x4 >; 00f1c4 pinctrl-names = "default"; 00f1d8 pinctrl-0 = < 0xd5 >; 00f1e8 #address-cells = < 0x1 >; 00f1f8 #size-cells = < 0x0 >; 00f208 status = "disabled"; 00f220 phandle = < 0x1a7 >; 00f230 } 00f234 i2c@fe5d0000 { 00f248 compatible = "rockchip,rk3399-i2c"; 00f268 reg = < 0x0 0xfe5d0000 0x0 0x1000 >; 00f284 clocks = < 0x1f 0x14e 0x1f 0x14d >; 00f2a0 clock-names = "i2c\0pclk"; 00f2b8 interrupts = < 0x0 0x32 0x4 >; 00f2d0 pinctrl-names = "default"; 00f2e4 pinctrl-0 = < 0xd6 >; 00f2f4 #address-cells = < 0x1 >; 00f304 #size-cells = < 0x0 >; 00f314 status = "disabled"; 00f32c phandle = < 0x1a8 >; 00f33c } 00f340 i2c@fe5e0000 { 00f354 compatible = "rockchip,rk3399-i2c"; 00f374 reg = < 0x0 0xfe5e0000 0x0 0x1000 >; 00f390 clocks = < 0x1f 0x150 0x1f 0x14f >; 00f3ac clock-names = "i2c\0pclk"; 00f3c4 interrupts = < 0x0 0x33 0x4 >; 00f3dc pinctrl-names = "default"; 00f3f0 pinctrl-0 = < 0xd7 >; 00f400 #address-cells = < 0x1 >; 00f410 #size-cells = < 0x0 >; 00f420 status = "okay"; 00f434 phandle = < 0x1a9 >; 00f444 mxc6655xa@15 { 00f458 status = "okay"; 00f46c compatible = "gs_mxc6655xa"; 00f488 pinctrl-names = "default"; 00f49c pinctrl-0 = < 0xd8 >; 00f4ac reg = < 0x15 >; 00f4bc irq-gpio = < 0x7a 0x11 0x8 >; 00f4d4 irq_enable = < 0x0 >; 00f4e4 poll_delay_ms = < 0x1e >; 00f4f4 type = < 0x2 >; 00f504 power-off-in-suspend = < 0x1 >; 00f514 layout = < 0x1 >; 00f524 phandle = < 0x1aa >; 00f534 } 00f538 } 00f53c timer@fe5f0000 { 00f550 compatible = "rockchip,rk3568-timer\0rockchip,rk3288-timer"; 00f588 reg = < 0x0 0xfe5f0000 0x0 0x1000 >; 00f5a4 interrupts = < 0x0 0x6d 0x4 >; 00f5bc clocks = < 0x1f 0x16c 0x1f 0x16d >; 00f5d8 clock-names = "pclk\0timer"; 00f5f0 phandle = < 0x1ab >; 00f600 } 00f604 watchdog@fe600000 { 00f61c compatible = "snps,dw-wdt"; 00f634 reg = < 0x0 0xfe600000 0x0 0x100 >; 00f650 clocks = < 0x1f 0x116 0x1f 0x115 >; 00f66c clock-names = "tclk\0pclk"; 00f684 interrupts = < 0x0 0x95 0x4 >; 00f69c status = "okay"; 00f6b0 phandle = < 0x1ac >; 00f6c0 } 00f6c4 spi@fe610000 { 00f6d8 compatible = "rockchip,rk3066-spi"; 00f6f8 reg = < 0x0 0xfe610000 0x0 0x1000 >; 00f714 interrupts = < 0x0 0x67 0x4 >; 00f72c #address-cells = < 0x1 >; 00f73c #size-cells = < 0x0 >; 00f74c clocks = < 0x1f 0x152 0x1f 0x151 >; 00f768 clock-names = "spiclk\0apb_pclk"; 00f784 dmas = < 0x3e 0x14 0x3e 0x15 >; 00f7a0 dma-names = "tx\0rx"; 00f7b4 pinctrl-names = "default\0high_speed"; 00f7d4 pinctrl-0 = < 0xd9 0xda 0xdb >; 00f7ec pinctrl-1 = < 0xd9 0xda 0xdc >; 00f804 status = "disabled"; 00f81c phandle = < 0x1ad >; 00f82c } 00f830 spi@fe620000 { 00f844 compatible = "rockchip,rk3066-spi"; 00f864 reg = < 0x0 0xfe620000 0x0 0x1000 >; 00f880 interrupts = < 0x0 0x68 0x4 >; 00f898 #address-cells = < 0x1 >; 00f8a8 #size-cells = < 0x0 >; 00f8b8 clocks = < 0x1f 0x154 0x1f 0x153 >; 00f8d4 clock-names = "spiclk\0apb_pclk"; 00f8f0 dmas = < 0x3e 0x16 0x3e 0x17 >; 00f90c dma-names = "tx\0rx"; 00f920 pinctrl-names = "default\0high_speed"; 00f940 pinctrl-0 = < 0xdd 0xde 0xdf >; 00f958 pinctrl-1 = < 0xdd 0xde 0xe0 >; 00f970 status = "disabled"; 00f988 phandle = < 0x1ae >; 00f998 } 00f99c spi@fe630000 { 00f9b0 compatible = "rockchip,rk3066-spi"; 00f9d0 reg = < 0x0 0xfe630000 0x0 0x1000 >; 00f9ec interrupts = < 0x0 0x69 0x4 >; 00fa04 #address-cells = < 0x1 >; 00fa14 #size-cells = < 0x0 >; 00fa24 clocks = < 0x1f 0x156 0x1f 0x155 >; 00fa40 clock-names = "spiclk\0apb_pclk"; 00fa5c dmas = < 0x3e 0x18 0x3e 0x19 >; 00fa78 dma-names = "tx\0rx"; 00fa8c pinctrl-names = "default\0high_speed"; 00faac pinctrl-0 = < 0xe1 0xe2 0xe3 >; 00fac4 pinctrl-1 = < 0xe1 0xe2 0xe4 >; 00fadc status = "disabled"; 00faf4 phandle = < 0x1af >; 00fb04 } 00fb08 spi@fe640000 { 00fb1c compatible = "rockchip,rk3066-spi"; 00fb3c reg = < 0x0 0xfe640000 0x0 0x1000 >; 00fb58 interrupts = < 0x0 0x6a 0x4 >; 00fb70 #address-cells = < 0x1 >; 00fb80 #size-cells = < 0x0 >; 00fb90 clocks = < 0x1f 0x158 0x1f 0x157 >; 00fbac clock-names = "spiclk\0apb_pclk"; 00fbc8 dmas = < 0x3e 0x1a 0x3e 0x1b >; 00fbe4 dma-names = "tx\0rx"; 00fbf8 pinctrl-names = "default\0high_speed"; 00fc18 pinctrl-0 = < 0xe5 0xe6 0xe7 >; 00fc30 pinctrl-1 = < 0xe5 0xe6 0xe8 >; 00fc48 status = "okay"; 00fc5c max-freq = < 0x2faf080 >; 00fc6c phandle = < 0x1b0 >; 00fc7c spi_testdev@00 { 00fc90 compatible = "rockchip,spidev"; 00fcac reg = < 0x0 >; 00fcbc spi-max-frequency = < 0x4c4b40 >; 00fccc } 00fcd0 } 00fcd4 serial@fe650000 { 00fce8 compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; 00fd1c reg = < 0x0 0xfe650000 0x0 0x100 >; 00fd38 interrupts = < 0x0 0x75 0x4 >; 00fd50 clocks = < 0x1f 0x11f 0x1f 0x11c >; 00fd6c clock-names = "baudclk\0apb_pclk"; 00fd8c reg-shift = < 0x2 >; 00fd9c reg-io-width = < 0x4 >; 00fdac dmas = < 0x3e 0x2 0x3e 0x3 >; 00fdc8 pinctrl-names = "default"; 00fddc pinctrl-0 = < 0xe9 0xea >; 00fdf0 status = "okay"; 00fe04 phandle = < 0x1b1 >; 00fe14 } 00fe18 serial@fe660000 { 00fe2c compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; 00fe60 reg = < 0x0 0xfe660000 0x0 0x100 >; 00fe7c interrupts = < 0x0 0x76 0x4 >; 00fe94 clocks = < 0x1f 0x123 0x1f 0x120 >; 00feb0 clock-names = "baudclk\0apb_pclk"; 00fed0 reg-shift = < 0x2 >; 00fee0 reg-io-width = < 0x4 >; 00fef0 dmas = < 0x3e 0x4 0x3e 0x5 >; 00ff0c pinctrl-names = "default"; 00ff20 pinctrl-0 = < 0xeb >; 00ff30 status = "disabled"; 00ff48 phandle = < 0x1b2 >; 00ff58 } 00ff5c serial@fe670000 { 00ff70 compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; 00ffa4 reg = < 0x0 0xfe670000 0x0 0x100 >; 00ffc0 interrupts = < 0x0 0x77 0x4 >; 00ffd8 clocks = < 0x1f 0x127 0x1f 0x124 >; 00fff4 clock-names = "baudclk\0apb_pclk"; 010014 reg-shift = < 0x2 >; 010024 reg-io-width = < 0x4 >; 010034 dmas = < 0x3e 0x6 0x3e 0x7 >; 010050 pinctrl-names = "default"; 010064 pinctrl-0 = < 0xec >; 010074 status = "disabled"; 01008c phandle = < 0x1b3 >; 01009c } 0100a0 serial@fe680000 { 0100b4 compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; 0100e8 reg = < 0x0 0xfe680000 0x0 0x100 >; 010104 interrupts = < 0x0 0x78 0x4 >; 01011c clocks = < 0x1f 0x12b 0x1f 0x128 >; 010138 clock-names = "baudclk\0apb_pclk"; 010158 reg-shift = < 0x2 >; 010168 reg-io-width = < 0x4 >; 010178 dmas = < 0x3e 0x8 0x3e 0x9 >; 010194 pinctrl-names = "default"; 0101a8 pinctrl-0 = < 0xed >; 0101b8 status = "disabled"; 0101d0 phandle = < 0x1b4 >; 0101e0 } 0101e4 serial@fe690000 { 0101f8 compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; 01022c reg = < 0x0 0xfe690000 0x0 0x100 >; 010248 interrupts = < 0x0 0x79 0x4 >; 010260 clocks = < 0x1f 0x12f 0x1f 0x12c >; 01027c clock-names = "baudclk\0apb_pclk"; 01029c reg-shift = < 0x2 >; 0102ac reg-io-width = < 0x4 >; 0102bc dmas = < 0x3e 0xa 0x3e 0xb >; 0102d8 pinctrl-names = "default"; 0102ec pinctrl-0 = < 0xee >; 0102fc status = "disabled"; 010314 phandle = < 0x1b5 >; 010324 } 010328 serial@fe6a0000 { 01033c compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; 010370 reg = < 0x0 0xfe6a0000 0x0 0x100 >; 01038c interrupts = < 0x0 0x7a 0x4 >; 0103a4 clocks = < 0x1f 0x133 0x1f 0x130 >; 0103c0 clock-names = "baudclk\0apb_pclk"; 0103e0 reg-shift = < 0x2 >; 0103f0 reg-io-width = < 0x4 >; 010400 dmas = < 0x3e 0xc 0x3e 0xd >; 01041c pinctrl-names = "default"; 010430 pinctrl-0 = < 0xef >; 010440 status = "disabled"; 010458 phandle = < 0x1b6 >; 010468 } 01046c serial@fe6b0000 { 010480 compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; 0104b4 reg = < 0x0 0xfe6b0000 0x0 0x100 >; 0104d0 interrupts = < 0x0 0x7b 0x4 >; 0104e8 clocks = < 0x1f 0x137 0x1f 0x134 >; 010504 clock-names = "baudclk\0apb_pclk"; 010524 reg-shift = < 0x2 >; 010534 reg-io-width = < 0x4 >; 010544 dmas = < 0x3e 0xe 0x3e 0xf >; 010560 pinctrl-names = "default"; 010574 pinctrl-0 = < 0xf0 >; 010584 status = "okay"; 010598 phandle = < 0x1b7 >; 0105a8 } 0105ac serial@fe6c0000 { 0105c0 compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; 0105f4 reg = < 0x0 0xfe6c0000 0x0 0x100 >; 010610 interrupts = < 0x0 0x7c 0x4 >; 010628 clocks = < 0x1f 0x13b 0x1f 0x138 >; 010644 clock-names = "baudclk\0apb_pclk"; 010664 reg-shift = < 0x2 >; 010674 reg-io-width = < 0x4 >; 010684 dmas = < 0x3e 0x10 0x3e 0x11 >; 0106a0 pinctrl-names = "default"; 0106b4 pinctrl-0 = < 0xf1 >; 0106c4 status = "disabled"; 0106dc phandle = < 0x1b8 >; 0106ec } 0106f0 serial@fe6d0000 { 010704 compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart"; 010738 reg = < 0x0 0xfe6d0000 0x0 0x100 >; 010754 interrupts = < 0x0 0x7d 0x4 >; 01076c clocks = < 0x1f 0x13f 0x1f 0x13c >; 010788 clock-names = "baudclk\0apb_pclk"; 0107a8 reg-shift = < 0x2 >; 0107b8 reg-io-width = < 0x4 >; 0107c8 dmas = < 0x3e 0x12 0x3e 0x13 >; 0107e4 pinctrl-names = "default"; 0107f8 pinctrl-0 = < 0xf2 >; 010808 status = "disabled"; 010820 phandle = < 0x1b9 >; 010830 } 010834 pwm@fe6e0000 { 010848 compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; 01087c reg = < 0x0 0xfe6e0000 0x0 0x10 >; 010898 #pwm-cells = < 0x3 >; 0108a8 pinctrl-names = "active"; 0108bc pinctrl-0 = < 0xf3 >; 0108cc clocks = < 0x1f 0x15a 0x1f 0x159 >; 0108e8 clock-names = "pwm\0pclk"; 010900 status = "okay"; 010914 phandle = < 0x11c >; 010924 } 010928 pwm@fe6e0010 { 01093c compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; 010970 reg = < 0x0 0xfe6e0010 0x0 0x10 >; 01098c #pwm-cells = < 0x3 >; 01099c pinctrl-names = "active"; 0109b0 pinctrl-0 = < 0xf4 >; 0109c0 clocks = < 0x1f 0x15a 0x1f 0x159 >; 0109dc clock-names = "pwm\0pclk"; 0109f4 status = "okay"; 010a08 phandle = < 0x11d >; 010a18 } 010a1c pwm@fe6e0020 { 010a30 compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; 010a64 reg = < 0x0 0xfe6e0020 0x0 0x10 >; 010a80 #pwm-cells = < 0x3 >; 010a90 pinctrl-names = "active"; 010aa4 pinctrl-0 = < 0xf5 >; 010ab4 clocks = < 0x1f 0x15a 0x1f 0x159 >; 010ad0 clock-names = "pwm\0pclk"; 010ae8 status = "disabled"; 010b00 phandle = < 0x1ba >; 010b10 } 010b14 pwm@fe6e0030 { 010b28 compatible = "rockchip,remotectl-pwm"; 010b4c reg = < 0x0 0xfe6e0030 0x0 0x10 >; 010b68 interrupts = < 0x0 0x53 0x4 0x0 0x57 0x4 >; 010b8c #pwm-cells = < 0x3 >; 010b9c pinctrl-names = "default"; 010bb0 pinctrl-0 = < 0xf6 >; 010bc0 clocks = < 0x1f 0x15a 0x1f 0x159 >; 010bdc clock-names = "pwm\0pclk"; 010bf4 status = "disabled"; 010c0c remote_pwm_id = < 0x3 >; 010c1c handle_cpu_id = < 0x1 >; 010c2c remote_support_psci = < 0x0 >; 010c3c phandle = < 0x1bb >; 010c4c ir_key1 { 010c58 rockchip,usercode = < 0x4040 >; 010c68 rockchip,key_table = < 0xf2 0xe8 0xba 0x9e 0xf4 0x67 0xf1 0x6c 0xef 0x69 0xee 0x6a 0xbd 0x66 0xea 0x73 0xe3 0x72 0xe2 0xd9 0xb2 0x74 0xbc 0x71 0xec 0x8b 0xbf 0x190 0xe0 0x191 0xe1 0x192 0xe9 0xb7 0xe6 0xf8 0xe8 0xb9 0xe7 0xba 0xf0 0x184 0xbe 0x175 >; 010d24 } 010d28 ir_key2 { 010d34 rockchip,usercode = < 0xff00 >; 010d44 rockchip,key_table = < 0xf9 0x66 0xbf 0x9e 0xfb 0x8b 0xaa 0xe8 0xb9 0x67 0xe9 0x6c 0xb8 0x69 0xea 0x6a 0xeb 0x72 0xef 0x73 0xf7 0x71 0xe7 0x74 0xfc 0x74 0xa9 0x72 0xa8 0x72 0xe0 0x72 0xa5 0x72 0xab 0xb7 0xb7 0x184 0xe8 0x184 0xf8 0xb8 0xaf 0xb9 0xed 0x72 0xee 0xba 0xb3 0x72 0xf1 0x72 0xf2 0x72 0xf3 0xd9 0xb4 0x72 0xbe 0xd9 >; 010e40 } 010e44 ir_key3 { 010e50 rockchip,usercode = < 0x1dcc >; 010e60 rockchip,key_table = < 0xee 0xe8 0xf0 0x9e 0xf8 0x67 0xbb 0x6c 0xef 0x69 0xed 0x6a 0xfc 0x66 0xf1 0x73 0xfd 0x72 0xb7 0xd9 0xff 0x74 0xf3 0x71 0xbf 0x8b 0xf9 0x191 0xf5 0x192 0xb3 0x184 0xbe 0x2 0xba 0x3 0xb2 0x4 0xbd 0x5 0xf9 0x6 0xb1 0x7 0xfc 0x8 0xf8 0x9 0xb0 0xa 0xb6 0xb 0xb5 0xe >; 010f44 } 010f48 } 010f4c pwm@fe6f0000 { 010f60 compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; 010f94 reg = < 0x0 0xfe6f0000 0x0 0x10 >; 010fb0 #pwm-cells = < 0x3 >; 010fc0 pinctrl-names = "active"; 010fd4 pinctrl-0 = < 0xf7 >; 010fe4 clocks = < 0x1f 0x15d 0x1f 0x15c >; 011000 clock-names = "pwm\0pclk"; 011018 status = "disabled"; 011030 phandle = < 0x1bc >; 011040 } 011044 pwm@fe6f0010 { 011058 compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; 01108c reg = < 0x0 0xfe6f0010 0x0 0x10 >; 0110a8 #pwm-cells = < 0x3 >; 0110b8 pinctrl-names = "active"; 0110cc pinctrl-0 = < 0xf8 >; 0110dc clocks = < 0x1f 0x15d 0x1f 0x15c >; 0110f8 clock-names = "pwm\0pclk"; 011110 status = "disabled"; 011128 phandle = < 0x1bd >; 011138 } 01113c pwm@fe6f0020 { 011150 compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; 011184 reg = < 0x0 0xfe6f0020 0x0 0x10 >; 0111a0 #pwm-cells = < 0x3 >; 0111b0 pinctrl-names = "active"; 0111c4 pinctrl-0 = < 0xf9 >; 0111d4 clocks = < 0x1f 0x15d 0x1f 0x15c >; 0111f0 clock-names = "pwm\0pclk"; 011208 status = "disabled"; 011220 phandle = < 0x1be >; 011230 } 011234 pwm@fe6f0030 { 011248 compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; 01127c reg = < 0x0 0xfe6f0030 0x0 0x10 >; 011298 interrupts = < 0x0 0x54 0x4 0x0 0x58 0x4 >; 0112bc #pwm-cells = < 0x3 >; 0112cc pinctrl-names = "active"; 0112e0 pinctrl-0 = < 0xfa >; 0112f0 clocks = < 0x1f 0x15d 0x1f 0x15c >; 01130c clock-names = "pwm\0pclk"; 011324 status = "disabled"; 01133c phandle = < 0x1bf >; 01134c } 011350 pwm@fe700000 { 011364 compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; 011398 reg = < 0x0 0xfe700000 0x0 0x10 >; 0113b4 #pwm-cells = < 0x3 >; 0113c4 pinctrl-names = "active"; 0113d8 pinctrl-0 = < 0xfb >; 0113e8 clocks = < 0x1f 0x160 0x1f 0x15f >; 011404 clock-names = "pwm\0pclk"; 01141c status = "disabled"; 011434 phandle = < 0x1c0 >; 011444 } 011448 pwm@fe700010 { 01145c compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; 011490 reg = < 0x0 0xfe700010 0x0 0x10 >; 0114ac #pwm-cells = < 0x3 >; 0114bc pinctrl-names = "active"; 0114d0 pinctrl-0 = < 0xfc >; 0114e0 clocks = < 0x1f 0x160 0x1f 0x15f >; 0114fc clock-names = "pwm\0pclk"; 011514 status = "disabled"; 01152c phandle = < 0x1c1 >; 01153c } 011540 pwm@fe700020 { 011554 compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; 011588 reg = < 0x0 0xfe700020 0x0 0x10 >; 0115a4 #pwm-cells = < 0x3 >; 0115b4 pinctrl-names = "active"; 0115c8 pinctrl-0 = < 0xfd >; 0115d8 clocks = < 0x1f 0x160 0x1f 0x15f >; 0115f4 clock-names = "pwm\0pclk"; 01160c status = "disabled"; 011624 phandle = < 0x1c2 >; 011634 } 011638 pwm@fe700030 { 01164c compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm"; 011680 reg = < 0x0 0xfe700030 0x0 0x10 >; 01169c interrupts = < 0x0 0x55 0x4 0x0 0x59 0x4 >; 0116c0 #pwm-cells = < 0x3 >; 0116d0 pinctrl-names = "active"; 0116e4 pinctrl-0 = < 0xfe >; 0116f4 clocks = < 0x1f 0x160 0x1f 0x15f >; 011710 clock-names = "pwm\0pclk"; 011728 status = "disabled"; 011740 phandle = < 0x1c3 >; 011750 } 011754 tsadc@fe710000 { 011768 compatible = "rockchip,rk3568-tsadc"; 01178c reg = < 0x0 0xfe710000 0x0 0x100 >; 0117a8 interrupts = < 0x0 0x73 0x4 >; 0117c0 rockchip,grf = < 0x32 >; 0117d0 clocks = < 0x1f 0x111 0x1f 0x10f >; 0117ec clock-names = "tsadc\0apb_pclk"; 011808 assigned-clocks = < 0x1f 0x110 0x1f 0x111 >; 011824 assigned-clock-rates = < 0x1036640 0xaae60 >; 011838 resets = < 0x1f 0x182 0x1f 0x181 0x1f 0x1d7 >; 01185c reset-names = "tsadc\0tsadc-apb\0tsadc-phy"; 011884 #thermal-sensor-cells = < 0x1 >; 011894 rockchip,hw-tshut-temp = < 0x1d4c0 >; 0118a4 rockchip,hw-tshut-mode = < 0x0 >; 0118b4 rockchip,hw-tshut-polarity = < 0x0 >; 0118c4 pinctrl-names = "gpio\0otpout"; 0118dc pinctrl-0 = < 0xff >; 0118ec pinctrl-1 = < 0x100 >; 0118fc status = "okay"; 011910 phandle = < 0x1b >; 011920 } 011924 saradc@fe720000 { 011938 compatible = "rockchip,rk3568-saradc\0rockchip,rk3399-saradc"; 011974 reg = < 0x0 0xfe720000 0x0 0x100 >; 011990 interrupts = < 0x0 0x5d 0x4 >; 0119a8 #io-channel-cells = < 0x1 >; 0119b8 clocks = < 0x1f 0x113 0x1f 0x112 >; 0119d4 clock-names = "saradc\0apb_pclk"; 0119f0 resets = < 0x1f 0x180 >; 011a04 reset-names = "saradc-apb"; 011a1c status = "okay"; 011a30 vref-supply = < 0x101 >; 011a40 phandle = < 0x118 >; 011a50 } 011a54 mailbox@fe780000 { 011a6c compatible = "rockchip,rk3568-mailbox\0rockchip,rk3368-mailbox"; 011aa8 reg = < 0x0 0xfe780000 0x0 0x1000 >; 011ac4 interrupts = < 0x0 0xb7 0x4 0x0 0xb8 0x4 0x0 0xb9 0x4 0x0 0xba 0x4 >; 011b00 clocks = < 0x1f 0x11b >; 011b14 clock-names = "pclk_mailbox"; 011b30 #mbox-cells = < 0x1 >; 011b40 status = "disabled"; 011b58 phandle = < 0x1c4 >; 011b68 } 011b6c phy@fe830000 { 011b80 compatible = "rockchip,rk3568-naneng-combphy"; 011bac reg = < 0x0 0xfe830000 0x0 0x100 >; 011bc8 #phy-cells = < 0x1 >; 011bd8 clocks = < 0x31 0x22 0x1f 0x17d 0x1f 0x7f >; 011bfc clock-names = "refclk\0apbclk\0pipe_clk"; 011c20 assigned-clocks = < 0x31 0x22 >; 011c34 assigned-clock-rates = < 0x5f5e100 >; 011c44 resets = < 0x1f 0x1c6 0x1f 0x1c7 >; 011c60 reset-names = "combphy-apb\0combphy"; 011c80 rockchip,pipe-grf = < 0x102 >; 011c90 rockchip,pipe-phy-grf = < 0x103 >; 011ca0 status = "okay"; 011cb4 phandle = < 0x20 >; 011cc4 } 011cc8 phy@fe840000 { 011cdc compatible = "rockchip,rk3568-naneng-combphy"; 011d08 reg = < 0x0 0xfe840000 0x0 0x100 >; 011d24 #phy-cells = < 0x1 >; 011d34 clocks = < 0x31 0x25 0x1f 0x17e 0x1f 0x7f >; 011d58 clock-names = "refclk\0apbclk\0pipe_clk"; 011d7c assigned-clocks = < 0x31 0x25 >; 011d90 assigned-clock-rates = < 0x5f5e100 >; 011da0 resets = < 0x1f 0x1c8 0x1f 0x1c9 >; 011dbc reset-names = "combphy-apb\0combphy"; 011ddc rockchip,pipe-grf = < 0x102 >; 011dec rockchip,pipe-phy-grf = < 0x104 >; 011dfc status = "disabled"; 011e14 phandle = < 0x22 >; 011e24 } 011e28 video-phy@fe850000 { 011e40 compatible = "rockchip,rk3568-video-phy"; 011e68 reg = < 0x0 0xfe850000 0x0 0x10000 0x0 0xfe060000 0x0 0x10000 >; 011e94 clocks = < 0x31 0x17 0x1f 0x17a 0x1f 0xe8 >; 011eb8 clock-names = "ref\0pclk_phy\0pclk_host"; 011edc #clock-cells = < 0x0 >; 011eec resets = < 0x1f 0x1bb >; 011f00 reset-names = "rst"; 011f10 power-domains = < 0x21 0x9 >; 011f24 #phy-cells = < 0x0 >; 011f34 status = "okay"; 011f48 phandle = < 0x2e >; 011f58 } 011f5c video-phy@fe860000 { 011f74 compatible = "rockchip,rk3568-video-phy"; 011f9c reg = < 0x0 0xfe860000 0x0 0x10000 0x0 0xfe070000 0x0 0x10000 >; 011fc8 clocks = < 0x31 0x19 0x1f 0x17b 0x1f 0xe9 >; 011fec clock-names = "ref\0pclk_phy\0pclk_host"; 012010 #clock-cells = < 0x0 >; 012020 resets = < 0x1f 0x1bc >; 012034 reset-names = "rst"; 012044 power-domains = < 0x21 0x9 >; 012058 #phy-cells = < 0x0 >; 012068 status = "disabled"; 012080 phandle = < 0x95 >; 012090 } 012094 csi2-dphy-hw@fe870000 { 0120b0 compatible = "rockchip,rk3568-csi2-dphy-hw"; 0120dc reg = < 0x0 0xfe870000 0x0 0x1000 >; 0120f8 clocks = < 0x1f 0x179 >; 01210c clock-names = "pclk"; 012120 rockchip,grf = < 0x32 >; 012130 status = "okay"; 012144 phandle = < 0x105 >; 012154 } 012158 csi2-dphy0 { 012168 compatible = "rockchip,rk3568-csi2-dphy"; 012190 rockchip,hw = < 0x105 >; 0121a0 status = "okay"; 0121b4 phandle = < 0x1c5 >; 0121c4 ports { 0121d0 #address-cells = < 0x1 >; 0121e0 #size-cells = < 0x0 >; 0121f0 port@0 { 0121fc reg = < 0x0 >; 01220c #address-cells = < 0x1 >; 01221c #size-cells = < 0x0 >; 01222c endpoint@1 { 01223c reg = < 0x1 >; 01224c remote-endpoint = < 0x106 >; 01225c data-lanes = < 0x1 0x2 >; 012270 phandle = < 0xd3 >; 012280 } 012284 endpoint@2 { 012294 reg = < 0x2 >; 0122a4 remote-endpoint = < 0x107 >; 0122b4 data-lanes = < 0x1 0x2 0x3 0x4 >; 0122d0 phandle = < 0xd4 >; 0122e0 } 0122e4 } 0122e8 port@1 { 0122f4 reg = < 0x1 >; 012304 #address-cells = < 0x1 >; 012314 #size-cells = < 0x0 >; 012324 endpoint@0 { 012334 reg = < 0x0 >; 012344 remote-endpoint = < 0x108 >; 012354 phandle = < 0x76 >; 012364 } 012368 } 01236c } 012370 } 012374 csi2-dphy1 { 012384 compatible = "rockchip,rk3568-csi2-dphy"; 0123ac rockchip,hw = < 0x105 >; 0123bc status = "disabled"; 0123d4 phandle = < 0x1c6 >; 0123e4 } 0123e8 csi2-dphy2 { 0123f8 compatible = "rockchip,rk3568-csi2-dphy"; 012420 rockchip,hw = < 0x105 >; 012430 status = "disabled"; 012448 phandle = < 0x1c7 >; 012458 } 01245c usb2-phy@fe8a0000 { 012474 compatible = "rockchip,rk3568-usb2phy"; 012498 reg = < 0x0 0xfe8a0000 0x0 0x10000 >; 0124b4 interrupts = < 0x0 0x87 0x4 >; 0124cc clocks = < 0x31 0x13 >; 0124e0 clock-names = "phyclk"; 0124f4 #clock-cells = < 0x0 >; 012504 assigned-clocks = < 0x1f 0xb >; 012518 assigned-clock-parents = < 0x24 >; 012528 clock-output-names = "usb480m_phy"; 012540 rockchip,usbgrf = < 0x109 >; 012550 status = "okay"; 012564 phandle = < 0x24 >; 012574 host-port { 012584 #phy-cells = < 0x0 >; 012594 status = "okay"; 0125a8 phy-supply = < 0x10a >; 0125b8 phandle = < 0x25 >; 0125c8 } 0125cc otg-port { 0125dc #phy-cells = < 0x0 >; 0125ec status = "okay"; 012600 vbus-supply = < 0x10b >; 012610 phandle = < 0x23 >; 012620 } 012624 } 012628 usb2-phy@fe8b0000 { 012640 compatible = "rockchip,rk3568-usb2phy"; 012664 reg = < 0x0 0xfe8b0000 0x0 0x10000 >; 012680 interrupts = < 0x0 0x88 0x4 >; 012698 clocks = < 0x31 0x15 >; 0126ac clock-names = "phyclk"; 0126c0 #clock-cells = < 0x0 >; 0126d0 rockchip,usbgrf = < 0x10c >; 0126e0 status = "okay"; 0126f4 phandle = < 0x26 >; 012704 host-port { 012714 #phy-cells = < 0x0 >; 012724 status = "okay"; 012738 phy-supply = < 0x10a >; 012748 phandle = < 0x28 >; 012758 } 01275c otg-port { 01276c #phy-cells = < 0x0 >; 01277c status = "okay"; 012790 phy-supply = < 0x10a >; 0127a0 phandle = < 0x27 >; 0127b0 } 0127b4 } 0127b8 pinctrl { 0127c4 compatible = "rockchip,rk3568-pinctrl"; 0127e8 rockchip,grf = < 0x32 >; 0127f8 rockchip,pmu = < 0x33 >; 012808 #address-cells = < 0x2 >; 012818 #size-cells = < 0x2 >; 012828 ranges; 012834 phandle = < 0x10d >; 012844 gpio@fdd60000 { 012858 compatible = "rockchip,gpio-bank"; 012878 reg = < 0x0 0xfdd60000 0x0 0x100 >; 012894 interrupts = < 0x0 0x21 0x4 >; 0128ac clocks = < 0x31 0x2e 0x31 0xc >; 0128c8 gpio-controller; 0128d4 #gpio-cells = < 0x2 >; 0128e4 gpio-ranges = < 0x10d 0x0 0x0 0x20 >; 012900 interrupt-controller; 01290c #interrupt-cells = < 0x2 >; 01291c phandle = < 0x35 >; 01292c } 012930 gpio@fe740000 { 012944 compatible = "rockchip,gpio-bank"; 012964 reg = < 0x0 0xfe740000 0x0 0x100 >; 012980 interrupts = < 0x0 0x22 0x4 >; 012998 clocks = < 0x1f 0x163 0x1f 0x164 >; 0129b4 gpio-controller; 0129c0 #gpio-cells = < 0x2 >; 0129d0 gpio-ranges = < 0x10d 0x0 0x20 0x20 >; 0129ec interrupt-controller; 0129f8 #interrupt-cells = < 0x2 >; 012a08 phandle = < 0x91 >; 012a18 } 012a1c gpio@fe750000 { 012a30 compatible = "rockchip,gpio-bank"; 012a50 reg = < 0x0 0xfe750000 0x0 0x100 >; 012a6c interrupts = < 0x0 0x23 0x4 >; 012a84 clocks = < 0x1f 0x165 0x1f 0x166 >; 012aa0 gpio-controller; 012aac #gpio-cells = < 0x2 >; 012abc gpio-ranges = < 0x10d 0x0 0x40 0x20 >; 012ad8 interrupt-controller; 012ae4 #interrupt-cells = < 0x2 >; 012af4 phandle = < 0x12c >; 012b04 } 012b08 gpio@fe760000 { 012b1c compatible = "rockchip,gpio-bank"; 012b3c reg = < 0x0 0xfe760000 0x0 0x100 >; 012b58 interrupts = < 0x0 0x24 0x4 >; 012b70 clocks = < 0x1f 0x167 0x1f 0x168 >; 012b8c gpio-controller; 012b98 #gpio-cells = < 0x2 >; 012ba8 gpio-ranges = < 0x10d 0x0 0x60 0x20 >; 012bc4 interrupt-controller; 012bd0 #interrupt-cells = < 0x2 >; 012be0 phandle = < 0x7a >; 012bf0 } 012bf4 gpio@fe770000 { 012c08 compatible = "rockchip,gpio-bank"; 012c28 reg = < 0x0 0xfe770000 0x0 0x100 >; 012c44 interrupts = < 0x0 0x25 0x4 >; 012c5c clocks = < 0x1f 0x169 0x1f 0x16a >; 012c78 gpio-controller; 012c84 #gpio-cells = < 0x2 >; 012c94 gpio-ranges = < 0x10d 0x0 0x80 0x20 >; 012cb0 interrupt-controller; 012cbc #interrupt-cells = < 0x2 >; 012ccc phandle = < 0x9a >; 012cdc } 012ce0 pcfg-pull-up { 012cf4 bias-pull-up; 012d00 phandle = < 0x110 >; 012d10 } 012d14 pcfg-pull-down { 012d28 bias-pull-down; 012d34 phandle = < 0x117 >; 012d44 } 012d48 pcfg-pull-none { 012d5c bias-disable; 012d68 phandle = < 0x10e >; 012d78 } 012d7c pcfg-pull-none-drv-level-1 { 012d9c bias-disable; 012da8 drive-strength = < 0x1 >; 012db8 phandle = < 0x112 >; 012dc8 } 012dcc pcfg-pull-none-drv-level-2 { 012dec bias-disable; 012df8 drive-strength = < 0x2 >; 012e08 phandle = < 0x111 >; 012e18 } 012e1c pcfg-pull-none-drv-level-3 { 012e3c bias-disable; 012e48 drive-strength = < 0x3 >; 012e58 phandle = < 0x116 >; 012e68 } 012e6c pcfg-pull-up-drv-level-1 { 012e8c bias-pull-up; 012e98 drive-strength = < 0x1 >; 012ea8 phandle = < 0x115 >; 012eb8 } 012ebc pcfg-pull-up-drv-level-2 { 012edc bias-pull-up; 012ee8 drive-strength = < 0x2 >; 012ef8 phandle = < 0x10f >; 012f08 } 012f0c pcfg-pull-none-smt { 012f24 bias-disable; 012f30 input-schmitt-enable; 012f3c phandle = < 0x113 >; 012f4c } 012f50 pcfg-output-low-pull-down { 012f70 output-low; 012f7c bias-pull-down; 012f88 phandle = < 0x114 >; 012f98 } 012f9c acodec { 012fa8 acodec-pins { 012fb8 rockchip,pins = < 0x1 0x9 0x5 0x10e 0x1 0x1 0x5 0x10e 0x1 0x0 0x5 0x10e 0x1 0x7 0x5 0x10e 0x1 0x8 0x5 0x10e 0x1 0x3 0x5 0x10e 0x1 0x5 0x5 0x10e >; 013034 phandle = < 0xc6 >; 013044 } 013048 } 01304c cam { 013054 cam-clkout0 { 013064 rockchip,pins = < 0x4 0x7 0x1 0x10e >; 013080 phandle = < 0xd2 >; 013090 } 013094 camera-pwr { 0130a4 rockchip,pins = < 0x0 0x11 0x0 0x10e >; 0130c0 phandle = < 0x131 >; 0130d0 } 0130d4 } 0130d8 can0 { 0130e4 can0m1-pins { 0130f4 rockchip,pins = < 0x2 0x2 0x4 0x10e 0x2 0x1 0x4 0x10e >; 013120 phandle = < 0xc8 >; 013130 } 013134 } 013138 can1 { 013144 can1m1-pins { 013154 rockchip,pins = < 0x4 0x12 0x3 0x10e 0x4 0x13 0x3 0x10e >; 013180 phandle = < 0xc9 >; 013190 } 013194 } 013198 can2 { 0131a4 can2m1-pins { 0131b4 rockchip,pins = < 0x2 0x9 0x4 0x10e 0x2 0xa 0x4 0x10e >; 0131e0 phandle = < 0xca >; 0131f0 } 0131f4 } 0131f8 cif { 013200 cif-clk { 01320c rockchip,pins = < 0x4 0x10 0x1 0x10e >; 013228 phandle = < 0xce >; 013238 } 01323c cif-dvp-clk { 01324c rockchip,pins = < 0x4 0x11 0x1 0x10e 0x4 0xe 0x1 0x10e 0x4 0xf 0x1 0x10e >; 013288 phandle = < 0xcf >; 013298 } 01329c cif-dvp-bus16 { 0132b0 rockchip,pins = < 0x3 0x1e 0x1 0x10e 0x3 0x1f 0x1 0x10e 0x4 0x0 0x1 0x10e 0x4 0x1 0x1 0x10e 0x4 0x2 0x1 0x10e 0x4 0x3 0x1 0x10e 0x4 0x4 0x1 0x10e 0x4 0x5 0x1 0x10e >; 01333c phandle = < 0xd0 >; 01334c } 013350 } 013354 clk32k { 013360 clk32k-out0 { 013370 rockchip,pins = < 0x0 0x8 0x2 0x10e >; 01338c phandle = < 0x1e >; 01339c } 0133a0 } 0133a4 ebc { 0133ac ebc-pins { 0133bc rockchip,pins = < 0x4 0x10 0x2 0x10e 0x4 0xb 0x2 0x10e 0x4 0xc 0x2 0x10e 0x4 0x6 0x2 0x10e 0x4 0x11 0x2 0x10e 0x3 0x16 0x2 0x10e 0x3 0x17 0x2 0x10e 0x3 0x18 0x2 0x10e 0x3 0x19 0x2 0x10e 0x3 0x1a 0x2 0x10e 0x3 0x1b 0x2 0x10e 0x3 0x1c 0x2 0x10e 0x3 0x1d 0x2 0x10e 0x3 0x1e 0x2 0x10e 0x3 0x1f 0x2 0x10e 0x4 0x0 0x2 0x10e 0x4 0x1 0x2 0x10e 0x4 0x2 0x2 0x10e 0x4 0x3 0x2 0x10e 0x4 0x4 0x2 0x10e 0x4 0x5 0x2 0x10e 0x4 0xe 0x2 0x10e 0x4 0xf 0x2 0x10e >; 013538 phandle = < 0x67 >; 013548 } 01354c } 013550 gmac1 { 01355c gmac1m0-miim { 013570 rockchip,pins = < 0x3 0x14 0x3 0x10e 0x3 0x15 0x3 0x10e >; 01359c phandle = < 0x7b >; 0135ac } 0135b0 gmac1m0-rx-bus2 { 0135c4 rockchip,pins = < 0x3 0x9 0x3 0x10e 0x3 0xa 0x3 0x10e 0x3 0xb 0x3 0x10e >; 013600 phandle = < 0x7d >; 013610 } 013614 } 013618 hdmitx { 013624 hdmitxm0-cec { 013638 rockchip,pins = < 0x4 0x19 0x1 0x10e >; 013654 phandle = < 0xa0 >; 013664 } 013668 hdmitx-scl { 013678 rockchip,pins = < 0x4 0x17 0x1 0x10e >; 013694 phandle = < 0x9e >; 0136a4 } 0136a8 hdmitx-sda { 0136b8 rockchip,pins = < 0x4 0x18 0x1 0x10e >; 0136d4 phandle = < 0x9f >; 0136e4 } 0136e8 } 0136ec i2c0 { 0136f8 i2c0-xfer { 013708 rockchip,pins = < 0x0 0x9 0x1 0x113 0x0 0xa 0x1 0x113 >; 013734 phandle = < 0x34 >; 013744 } 013748 } 01374c i2c1 { 013758 i2c1-xfer { 013768 rockchip,pins = < 0x0 0xb 0x1 0x113 0x0 0xc 0x1 0x113 >; 013794 phandle = < 0xcb >; 0137a4 } 0137a8 } 0137ac i2c2 { 0137b8 i2c2m1-xfer { 0137c8 rockchip,pins = < 0x4 0xd 0x1 0x113 0x4 0xc 0x1 0x113 >; 0137f4 phandle = < 0xcd >; 013804 } 013808 } 01380c i2c3 { 013818 i2c3m0-xfer { 013828 rockchip,pins = < 0x1 0x1 0x1 0x113 0x1 0x0 0x1 0x113 >; 013854 phandle = < 0xd5 >; 013864 } 013868 } 01386c i2c4 { 013878 i2c4m0-xfer { 013888 rockchip,pins = < 0x4 0xb 0x1 0x113 0x4 0xa 0x1 0x113 >; 0138b4 phandle = < 0xd6 >; 0138c4 } 0138c8 } 0138cc i2c5 { 0138d8 i2c5m0-xfer { 0138e8 rockchip,pins = < 0x3 0xb 0x4 0x113 0x3 0xc 0x4 0x113 >; 013914 phandle = < 0xd7 >; 013924 } 013928 } 01392c i2s1 { 013938 i2s1m0-lrcktx { 01394c rockchip,pins = < 0x1 0x5 0x1 0x10e >; 013968 phandle = < 0xb5 >; 013978 } 01397c i2s1m0-sclktx { 013990 rockchip,pins = < 0x1 0x3 0x1 0x10e >; 0139ac phandle = < 0xb4 >; 0139bc } 0139c0 i2s1m0-sdi0 { 0139d0 rockchip,pins = < 0x1 0xb 0x1 0x10e >; 0139ec phandle = < 0xb6 >; 0139fc } 013a00 i2s1m0-sdo0 { 013a10 rockchip,pins = < 0x1 0x7 0x1 0x10e >; 013a2c phandle = < 0xb7 >; 013a3c } 013a40 } 013a44 i2s2 { 013a50 i2s2m0-lrcktx { 013a64 rockchip,pins = < 0x2 0x13 0x1 0x10e >; 013a80 phandle = < 0xb9 >; 013a90 } 013a94 i2s2m0-sclktx { 013aa8 rockchip,pins = < 0x2 0x12 0x1 0x10e >; 013ac4 phandle = < 0xb8 >; 013ad4 } 013ad8 i2s2m0-sdi { 013ae8 rockchip,pins = < 0x2 0x15 0x1 0x10e >; 013b04 phandle = < 0xba >; 013b14 } 013b18 i2s2m0-sdo { 013b28 rockchip,pins = < 0x2 0x14 0x1 0x10e >; 013b44 phandle = < 0xbb >; 013b54 } 013b58 } 013b5c i2s3 { 013b68 i2s3m1-lrck { 013b78 rockchip,pins = < 0x4 0x14 0x5 0x10e >; 013b94 phandle = < 0xbd >; 013ba4 } 013ba8 i2s3m1-sclk { 013bb8 rockchip,pins = < 0x4 0x13 0x5 0x10e >; 013bd4 phandle = < 0xbc >; 013be4 } 013be8 i2s3m1-sdi { 013bf8 rockchip,pins = < 0x4 0x16 0x5 0x10e >; 013c14 phandle = < 0xbe >; 013c24 } 013c28 i2s3m1-sdo { 013c38 rockchip,pins = < 0x4 0x15 0x5 0x10e >; 013c54 phandle = < 0xbf >; 013c64 } 013c68 } 013c6c lcdc { 013c78 lcdc-ctl { 013c88 rockchip,pins = < 0x3 0x0 0x1 0x10e 0x2 0x18 0x1 0x10e 0x2 0x19 0x1 0x10e 0x2 0x1a 0x1 0x10e 0x2 0x1b 0x1 0x10e 0x2 0x1c 0x1 0x10e 0x2 0x1d 0x1 0x10e 0x2 0x1e 0x1 0x10e 0x2 0x1f 0x1 0x10e 0x3 0x1 0x1 0x10e 0x3 0x2 0x1 0x10e 0x3 0x3 0x1 0x10e 0x3 0x4 0x1 0x10e 0x3 0x5 0x1 0x10e 0x3 0x6 0x1 0x10e 0x3 0x7 0x1 0x10e 0x3 0x8 0x1 0x10e 0x3 0x9 0x1 0x10e 0x3 0xa 0x1 0x10e 0x3 0xb 0x1 0x10e 0x3 0xc 0x1 0x10e 0x3 0xd 0x1 0x10e 0x3 0xe 0x1 0x10e 0x3 0xf 0x1 0x10e 0x3 0x10 0x1 0x10e 0x3 0x13 0x1 0x10e 0x3 0x11 0x1 0x10e 0x3 0x12 0x1 0x10e >; 013e54 phandle = < 0x30 >; 013e64 } 013e68 } 013e6c pdm { 013e74 pdmm1-clk1 { 013e84 rockchip,pins = < 0x4 0x0 0x4 0x10e >; 013ea0 phandle = < 0xc0 >; 013eb0 } 013eb4 pdmm1-sdi1 { 013ec4 rockchip,pins = < 0x4 0x1 0x4 0x10e >; 013ee0 phandle = < 0xc1 >; 013ef0 } 013ef4 pdmm1-sdi2 { 013f04 rockchip,pins = < 0x4 0x2 0x5 0x10e >; 013f20 phandle = < 0xc2 >; 013f30 } 013f34 pdmm1-sdi3 { 013f44 rockchip,pins = < 0x4 0x3 0x5 0x10e >; 013f60 phandle = < 0xc3 >; 013f70 } 013f74 } 013f78 pmic { 013f84 pmic_int { 013f94 rockchip,pins = < 0x0 0x3 0x0 0x110 >; 013fb0 phandle = < 0x36 >; 013fc0 } 013fc4 soc_slppin_gpio { 013fd8 rockchip,pins = < 0x0 0x2 0x0 0x114 >; 013ff4 phandle = < 0x39 >; 014004 } 014008 soc_slppin_slp { 01401c rockchip,pins = < 0x0 0x2 0x1 0x110 >; 014038 phandle = < 0x37 >; 014048 } 01404c soc_slppin_rst { 014060 rockchip,pins = < 0x0 0x2 0x2 0x10e >; 01407c phandle = < 0x1c8 >; 01408c } 014090 } 014094 pwm0 { 0140a0 pwm0m0-pins { 0140b0 rockchip,pins = < 0x0 0xf 0x1 0x10e >; 0140cc phandle = < 0x40 >; 0140dc } 0140e0 } 0140e4 pwm1 { 0140f0 pwm1m0-pins { 014100 rockchip,pins = < 0x0 0x10 0x1 0x10e >; 01411c phandle = < 0x41 >; 01412c } 014130 } 014134 pwm2 { 014140 pwm2m0-pins { 014150 rockchip,pins = < 0x0 0x11 0x1 0x10e >; 01416c phandle = < 0x42 >; 01417c } 014180 } 014184 pwm3 { 014190 pwm3-pins { 0141a0 rockchip,pins = < 0x0 0x12 0x1 0x10e >; 0141bc phandle = < 0x43 >; 0141cc } 0141d0 } 0141d4 pwm4 { 0141e0 pwm4-pins { 0141f0 rockchip,pins = < 0x0 0x13 0x1 0x10e >; 01420c phandle = < 0xf3 >; 01421c } 014220 } 014224 pwm5 { 014230 pwm5-pins { 014240 rockchip,pins = < 0x0 0x14 0x1 0x10e >; 01425c phandle = < 0xf4 >; 01426c } 014270 } 014274 pwm6 { 014280 pwm6-pins { 014290 rockchip,pins = < 0x0 0x15 0x1 0x10e >; 0142ac phandle = < 0xf5 >; 0142bc } 0142c0 } 0142c4 pwm7 { 0142d0 pwm7-pins { 0142e0 rockchip,pins = < 0x0 0x16 0x1 0x10e >; 0142fc phandle = < 0xf6 >; 01430c } 014310 } 014314 pwm8 { 014320 pwm8m0-pins { 014330 rockchip,pins = < 0x3 0x9 0x5 0x10e >; 01434c phandle = < 0xf7 >; 01435c } 014360 } 014364 pwm9 { 014370 pwm9m0-pins { 014380 rockchip,pins = < 0x3 0xa 0x5 0x10e >; 01439c phandle = < 0xf8 >; 0143ac } 0143b0 } 0143b4 pwm10 { 0143c0 pwm10m0-pins { 0143d4 rockchip,pins = < 0x3 0xd 0x5 0x10e >; 0143f0 phandle = < 0xf9 >; 014400 } 014404 } 014408 pwm11 { 014414 pwm11m0-pins { 014428 rockchip,pins = < 0x3 0xe 0x5 0x10e >; 014444 phandle = < 0xfa >; 014454 } 014458 } 01445c pwm12 { 014468 pwm12m0-pins { 01447c rockchip,pins = < 0x3 0xf 0x2 0x10e >; 014498 phandle = < 0xfb >; 0144a8 } 0144ac } 0144b0 pwm13 { 0144bc pwm13m0-pins { 0144d0 rockchip,pins = < 0x3 0x10 0x2 0x10e >; 0144ec phandle = < 0xfc >; 0144fc } 014500 } 014504 pwm14 { 014510 pwm14m0-pins { 014524 rockchip,pins = < 0x3 0x14 0x1 0x10e >; 014540 phandle = < 0xfd >; 014550 } 014554 } 014558 pwm15 { 014564 pwm15m0-pins { 014578 rockchip,pins = < 0x3 0x15 0x1 0x10e >; 014594 phandle = < 0xfe >; 0145a4 } 0145a8 } 0145ac scr { 0145b4 scr-pins { 0145c4 rockchip,pins = < 0x1 0x2 0x3 0x10e 0x1 0x7 0x3 0x110 0x1 0x3 0x3 0x110 0x1 0x5 0x3 0x10e >; 014610 phandle = < 0xc7 >; 014620 } 014624 } 014628 sdmmc0 { 014634 sdmmc0-bus4 { 014644 rockchip,pins = < 0x1 0x1d 0x1 0x10f 0x1 0x1e 0x1 0x10f 0x1 0x1f 0x1 0x10f 0x2 0x0 0x1 0x10f >; 014690 phandle = < 0xab >; 0146a0 } 0146a4 sdmmc0-clk { 0146b4 rockchip,pins = < 0x2 0x2 0x1 0x10f >; 0146d0 phandle = < 0xac >; 0146e0 } 0146e4 sdmmc0-cmd { 0146f4 rockchip,pins = < 0x2 0x1 0x1 0x10f >; 014710 phandle = < 0xad >; 014720 } 014724 sdmmc0-det { 014734 rockchip,pins = < 0x0 0x4 0x1 0x110 >; 014750 phandle = < 0xae >; 014760 } 014764 } 014768 sdmmc1 { 014774 sdmmc1-bus4 { 014784 rockchip,pins = < 0x2 0x3 0x1 0x10f 0x2 0x4 0x1 0x10f 0x2 0x5 0x1 0x10f 0x2 0x6 0x1 0x10f >; 0147d0 phandle = < 0xb0 >; 0147e0 } 0147e4 sdmmc1-clk { 0147f4 rockchip,pins = < 0x2 0x8 0x1 0x10f >; 014810 phandle = < 0xb2 >; 014820 } 014824 sdmmc1-cmd { 014834 rockchip,pins = < 0x2 0x7 0x1 0x10f >; 014850 phandle = < 0xb1 >; 014860 } 014864 } 014868 spdif { 014874 spdifm0-tx { 014884 rockchip,pins = < 0x1 0x4 0x4 0x10e >; 0148a0 phandle = < 0xc5 >; 0148b0 } 0148b4 } 0148b8 spi0 { 0148c4 spi0m0-pins { 0148d4 rockchip,pins = < 0x0 0xd 0x2 0x10e 0x0 0x15 0x2 0x10e 0x0 0xe 0x2 0x10e >; 014910 phandle = < 0xdb >; 014920 } 014924 spi0m0-cs0 { 014934 rockchip,pins = < 0x0 0x16 0x2 0x10e >; 014950 phandle = < 0xd9 >; 014960 } 014964 spi0m0-cs1 { 014974 rockchip,pins = < 0x0 0x14 0x2 0x10e >; 014990 phandle = < 0xda >; 0149a0 } 0149a4 } 0149a8 spi1 { 0149b4 spi1m0-pins { 0149c4 rockchip,pins = < 0x2 0xd 0x3 0x10e 0x2 0xe 0x3 0x10e 0x2 0xf 0x4 0x10e >; 014a00 phandle = < 0xdf >; 014a10 } 014a14 spi1m0-cs0 { 014a24 rockchip,pins = < 0x2 0x10 0x4 0x10e >; 014a40 phandle = < 0xdd >; 014a50 } 014a54 spi1m0-cs1 { 014a64 rockchip,pins = < 0x2 0x16 0x3 0x10e >; 014a80 phandle = < 0xde >; 014a90 } 014a94 } 014a98 spi2 { 014aa4 spi2m0-pins { 014ab4 rockchip,pins = < 0x2 0x11 0x4 0x10e 0x2 0x12 0x4 0x10e 0x2 0x13 0x4 0x10e >; 014af0 phandle = < 0xe3 >; 014b00 } 014b04 spi2m0-cs0 { 014b14 rockchip,pins = < 0x2 0x14 0x4 0x10e >; 014b30 phandle = < 0xe1 >; 014b40 } 014b44 spi2m0-cs1 { 014b54 rockchip,pins = < 0x2 0x15 0x4 0x10e >; 014b70 phandle = < 0xe2 >; 014b80 } 014b84 } 014b88 spi3 { 014b94 spi3m0-pins { 014ba4 rockchip,pins = < 0x4 0xb 0x4 0x10e 0x4 0x8 0x4 0x10e 0x4 0xa 0x4 0x10e >; 014be0 phandle = < 0xe7 >; 014bf0 } 014bf4 spi3m0-cs0 { 014c04 rockchip,pins = < 0x4 0x6 0x4 0x10e >; 014c20 phandle = < 0xe5 >; 014c30 } 014c34 spi3m0-cs1 { 014c44 rockchip,pins = < 0x4 0x7 0x4 0x10e >; 014c60 phandle = < 0xe6 >; 014c70 } 014c74 } 014c78 tsadc { 014c84 tsadc-shutorg { 014c98 rockchip,pins = < 0x0 0x1 0x2 0x10e >; 014cb4 phandle = < 0x100 >; 014cc4 } 014cc8 } 014ccc uart0 { 014cd8 uart0-xfer { 014ce8 rockchip,pins = < 0x0 0x10 0x3 0x110 0x0 0x11 0x3 0x110 >; 014d14 phandle = < 0x3f >; 014d24 } 014d28 } 014d2c uart1 { 014d38 uart1m0-xfer { 014d4c rockchip,pins = < 0x2 0xb 0x2 0x110 0x2 0xc 0x2 0x110 >; 014d78 phandle = < 0xe9 >; 014d88 } 014d8c uart1m0-ctsn { 014da0 rockchip,pins = < 0x2 0xe 0x2 0x10e >; 014dbc phandle = < 0xea >; 014dcc } 014dd0 uart1m0-rtsn { 014de4 rockchip,pins = < 0x2 0xd 0x2 0x10e >; 014e00 phandle = < 0x12e >; 014e10 } 014e14 } 014e18 uart2 { 014e24 uart2m0-xfer { 014e38 rockchip,pins = < 0x0 0x18 0x1 0x110 0x0 0x19 0x1 0x110 >; 014e64 phandle = < 0xeb >; 014e74 } 014e78 } 014e7c uart3 { 014e88 uart3m0-xfer { 014e9c rockchip,pins = < 0x1 0x0 0x2 0x110 0x1 0x1 0x2 0x110 >; 014ec8 phandle = < 0xec >; 014ed8 } 014edc } 014ee0 uart4 { 014eec uart4m0-xfer { 014f00 rockchip,pins = < 0x1 0x4 0x2 0x110 0x1 0x6 0x2 0x110 >; 014f2c phandle = < 0xed >; 014f3c } 014f40 } 014f44 uart5 { 014f50 uart5m0-xfer { 014f64 rockchip,pins = < 0x2 0x1 0x3 0x110 0x2 0x2 0x3 0x110 >; 014f90 phandle = < 0xee >; 014fa0 } 014fa4 } 014fa8 uart6 { 014fb4 uart6m0-xfer { 014fc8 rockchip,pins = < 0x2 0x3 0x3 0x110 0x2 0x4 0x3 0x110 >; 014ff4 phandle = < 0xef >; 015004 } 015008 } 01500c uart7 { 015018 uart7m2-xfer { 01502c rockchip,pins = < 0x4 0x3 0x4 0x110 0x4 0x2 0x4 0x110 >; 015058 phandle = < 0xf0 >; 015068 } 01506c } 015070 uart8 { 01507c uart8m0-xfer { 015090 rockchip,pins = < 0x2 0x16 0x2 0x110 0x2 0x15 0x3 0x110 >; 0150bc phandle = < 0xf1 >; 0150cc } 0150d0 } 0150d4 uart9 { 0150e0 uart9m0-xfer { 0150f4 rockchip,pins = < 0x2 0x7 0x3 0x110 0x2 0x8 0x3 0x110 >; 015120 phandle = < 0xf2 >; 015130 } 015134 } 015138 spi0-hs { 015144 spi0m0-pins { 015154 rockchip,pins = < 0x0 0xd 0x2 0x115 0x0 0x15 0x2 0x115 0x0 0xe 0x2 0x115 >; 015190 phandle = < 0xdc >; 0151a0 } 0151a4 } 0151a8 spi1-hs { 0151b4 spi1m0-pins { 0151c4 rockchip,pins = < 0x2 0xd 0x3 0x115 0x2 0xe 0x3 0x115 0x2 0xf 0x4 0x115 >; 015200 phandle = < 0xe0 >; 015210 } 015214 } 015218 spi2-hs { 015224 spi2m0-pins { 015234 rockchip,pins = < 0x2 0x11 0x4 0x115 0x2 0x12 0x4 0x115 0x2 0x13 0x4 0x115 >; 015270 phandle = < 0xe4 >; 015280 } 015284 } 015288 spi3-hs { 015294 spi3m0-pins { 0152a4 rockchip,pins = < 0x4 0xb 0x4 0x115 0x4 0x8 0x4 0x115 0x4 0xa 0x4 0x115 >; 0152e0 phandle = < 0xe8 >; 0152f0 } 0152f4 } 0152f8 gmac-txd-level3 { 01530c gmac1m0-tx-bus2-level3 { 015328 rockchip,pins = < 0x3 0xd 0x3 0x116 0x3 0xe 0x3 0x116 0x3 0xf 0x3 0x10e >; 015364 phandle = < 0x7c >; 015374 } 015378 gmac1m0-rgmii-bus-level3 { 015398 rockchip,pins = < 0x3 0x4 0x3 0x10e 0x3 0x5 0x3 0x10e 0x3 0x2 0x3 0x116 0x3 0x3 0x3 0x116 >; 0153e4 phandle = < 0x7f >; 0153f4 } 0153f8 } 0153fc gmac-txc-level2 { 015410 gmac1m0-rgmii-clk-level2 { 015430 rockchip,pins = < 0x3 0x7 0x3 0x10e 0x3 0x6 0x3 0x111 >; 01545c phandle = < 0x7e >; 01546c } 015470 } 015474 gpio-func { 015484 tsadc-gpio-func { 015498 rockchip,pins = < 0x0 0x1 0x0 0x10e >; 0154b4 phandle = < 0xff >; 0154c4 } 0154c8 } 0154cc mxc6655xa { 0154dc mxc6655xa_irq_gpio { 0154f4 rockchip,pins = < 0x3 0x11 0x0 0x10e >; 015510 phandle = < 0xd8 >; 015520 } 015524 } 015528 touch { 015534 touch-gpio { 015544 rockchip,pins = < 0x0 0xd 0x0 0x110 0x0 0xe 0x0 0x10e >; 015570 phandle = < 0xcc >; 015580 } 015584 } 015588 sdio-pwrseq { 015598 wifi-enable-h { 0155ac rockchip,pins = < 0x2 0x9 0x0 0x10e >; 0155c8 phandle = < 0x12b >; 0155d8 } 0155dc } 0155e0 usb { 0155e8 vcc5v0-host-en { 0155fc rockchip,pins = < 0x0 0x6 0x0 0x10e >; 015618 phandle = < 0x128 >; 015628 } 01562c vcc5v0-otg-en { 015640 rockchip,pins = < 0x0 0x5 0x0 0x10e >; 01565c phandle = < 0x129 >; 01566c } 015670 } 015674 wireless-bluetooth { 01568c uart8-gpios { 01569c rockchip,pins = < 0x2 0x9 0x0 0x10e >; 0156b8 phandle = < 0x1c9 >; 0156c8 } 0156cc uart1-gpios { 0156dc rockchip,pins = < 0x2 0xd 0x0 0x10e >; 0156f8 phandle = < 0x12f >; 015708 } 01570c } 015710 headphone { 015720 hp-det { 01572c rockchip,pins = < 0x4 0xb 0x0 0x117 >; 015748 phandle = < 0x130 >; 015758 } 01575c } 015760 lcd0 { 01576c lcd-rst-gpio { 015780 rockchip,pins = < 0x1 0x5 0x0 0x10e >; 01579c phandle = < 0x92 >; 0157ac } 0157b0 } 0157b4 lcd1 { 0157c0 lcd1-rst-gpio { 0157d4 rockchip,pins = < 0x4 0x16 0x0 0x10e >; 0157f0 phandle = < 0x9b >; 015800 } 015804 } 015808 wireless-wlan { 01581c wifi-host-wake-irq { 015834 rockchip,pins = < 0x2 0xa 0x0 0x117 >; 015850 phandle = < 0x12d >; 015860 } 015864 } 015868 } 01586c adc-keys { 01587c compatible = "adc-keys"; 015894 io-channels = < 0x118 0x0 >; 0158a8 io-channel-names = "buttons"; 0158bc keyup-threshold-microvolt = < 0x1b7740 >; 0158cc poll-interval = < 0x64 >; 0158dc phandle = < 0x1ca >; 0158ec vol-up-key { 0158fc label = "volume up"; 015914 linux,code = < 0x73 >; 015924 press-threshold-microvolt = < 0x6d6 >; 015934 } 015938 vol-down-key { 01594c label = "volume down"; 015964 linux,code = < 0x72 >; 015974 press-threshold-microvolt = < 0x48a1c >; 015984 } 015988 menu-key { 015998 label = "menu"; 0159ac linux,code = < 0x8b >; 0159bc press-threshold-microvolt = < 0xef420 >; 0159cc } 0159d0 back-key { 0159e0 label = "back"; 0159f4 linux,code = < 0x9e >; 015a04 press-threshold-microvolt = < 0x13eb9c >; 015a14 } 015a18 } 015a1c audiopwmout-diff { 015a34 status = "disabled"; 015a4c compatible = "simple-audio-card"; 015a6c simple-audio-card,format = "i2s"; 015a7c simple-audio-card,name = "rockchip,audiopwmout-diff"; 015aa4 simple-audio-card,mclk-fs = < 0x100 >; 015ab4 simple-audio-card,bitclock-master = < 0x119 >; 015ac4 simple-audio-card,frame-master = < 0x119 >; 015ad4 phandle = < 0x1cb >; 015ae4 simple-audio-card,cpu { 015b00 sound-dai = < 0x11a >; 015b10 } 015b14 simple-audio-card,codec { 015b30 sound-dai = < 0x11b >; 015b40 phandle = < 0x119 >; 015b50 } 015b54 } 015b58 backlight { 015b68 compatible = "pwm-backlight"; 015b84 pwms = < 0x11c 0x0 0x61a8 0x0 >; 015ba0 brightness-levels = < 0x0 0x14 0x14 0x15 0x15 0x16 0x16 0x17 0x17 0x18 0x18 0x19 0x19 0x1a 0x1a 0x1b 0x1b 0x1c 0x1c 0x1d 0x1d 0x1e 0x1e 0x1f 0x1f 0x20 0x20 0x21 0x21 0x22 0x22 0x23 0x23 0x24 0x24 0x25 0x25 0x26 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0 0xa1 0xa2 0xa3 0xa4 0xa5 0xa6 0xa7 0xa8 0xa9 0xaa 0xab 0xac 0xad 0xae 0xaf 0xb0 0xb1 0xb2 0xb3 0xb4 0xb5 0xb6 0xb7 0xb8 0xb9 0xba 0xbb 0xbc 0xbd 0xbe 0xbf 0xc0 0xc1 0xc2 0xc3 0xc4 0xc5 0xc6 0xc7 0xc8 0xc9 0xca 0xcb 0xcc 0xcd 0xce 0xcf 0xd0 0xd1 0xd2 0xd3 0xd4 0xd5 0xd6 0xd7 0xd8 0xd9 0xda 0xdb 0xdc 0xdd 0xde 0xdf 0xe0 0xe1 0xe2 0xe3 0xe4 0xe5 0xe6 0xe7 0xe8 0xe9 0xea 0xeb 0xec 0xed 0xee 0xef 0xf0 0xf1 0xf2 0xf3 0xf4 0xf5 0xf6 0xf7 0xf8 0xf9 0xfa 0xfb 0xfc 0xfd 0xfe 0xff >; 015fac default-brightness-level = < 0xc8 >; 015fbc phandle = < 0x8f >; 015fcc } 015fd0 backlight1 { 015fe0 compatible = "pwm-backlight"; 015ffc pwms = < 0x11d 0x0 0x61a8 0x0 >; 016018 brightness-levels = < 0x0 0x14 0x14 0x15 0x15 0x16 0x16 0x17 0x17 0x18 0x18 0x19 0x19 0x1a 0x1a 0x1b 0x1b 0x1c 0x1c 0x1d 0x1d 0x1e 0x1e 0x1f 0x1f 0x20 0x20 0x21 0x21 0x22 0x22 0x23 0x23 0x24 0x24 0x25 0x25 0x26 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0 0xa1 0xa2 0xa3 0xa4 0xa5 0xa6 0xa7 0xa8 0xa9 0xaa 0xab 0xac 0xad 0xae 0xaf 0xb0 0xb1 0xb2 0xb3 0xb4 0xb5 0xb6 0xb7 0xb8 0xb9 0xba 0xbb 0xbc 0xbd 0xbe 0xbf 0xc0 0xc1 0xc2 0xc3 0xc4 0xc5 0xc6 0xc7 0xc8 0xc9 0xca 0xcb 0xcc 0xcd 0xce 0xcf 0xd0 0xd1 0xd2 0xd3 0xd4 0xd5 0xd6 0xd7 0xd8 0xd9 0xda 0xdb 0xdc 0xdd 0xde 0xdf 0xe0 0xe1 0xe2 0xe3 0xe4 0xe5 0xe6 0xe7 0xe8 0xe9 0xea 0xeb 0xec 0xed 0xee 0xef 0xf0 0xf1 0xf2 0xf3 0xf4 0xf5 0xf6 0xf7 0xf8 0xf9 0xfa 0xfb 0xfc 0xfd 0xfe 0xff >; 016424 default-brightness-level = < 0xc8 >; 016434 phandle = < 0x98 >; 016444 } 016448 dc-12v { 016454 compatible = "regulator-fixed"; 016470 regulator-name = "dc_12v"; 016484 regulator-always-on; 016490 regulator-boot-on; 01649c regulator-min-microvolt = < 0xb71b00 >; 0164ac regulator-max-microvolt = < 0xb71b00 >; 0164bc phandle = < 0x126 >; 0164cc } 0164d0 hdmi-sound { 0164e0 compatible = "simple-audio-card"; 016500 simple-audio-card,format = "i2s"; 016510 simple-audio-card,mclk-fs = < 0x80 >; 016520 simple-audio-card,name = "rockchip,hdmi"; 01653c status = "okay"; 016550 phandle = < 0x1cc >; 016560 simple-audio-card,cpu { 01657c sound-dai = < 0x11e >; 01658c } 016590 simple-audio-card,codec { 0165ac sound-dai = < 0x11f >; 0165bc } 0165c0 } 0165c4 leds { 0165d0 compatible = "gpio-leds"; 0165e8 phandle = < 0x1cd >; 0165f8 work { 016604 gpios = < 0x35 0x1b 0x0 >; 01661c linux,default-trigger = "heartbeat"; 016634 status = "disabled"; 01664c phandle = < 0x1ce >; 01665c } 016660 led-status { 016670 gpios = < 0x35 0x1b 0x0 >; 016688 linux,default-trigger = "timer"; 01669c default-state = "on"; 0166ac } 0166b0 led-system { 0166c0 gpios = < 0x35 0x1c 0x0 >; 0166d8 linux,default-trigger = "none"; 0166ec default-state = "on"; 0166fc } 016700 led-wifi { 016710 gpios = < 0x35 0x1d 0x0 >; 016728 linux,default-trigger = "none"; 01673c default-state = "on"; 01674c } 016750 led-eth { 01675c gpios = < 0x35 0x1e 0x0 >; 016774 linux,default-trigger = "none"; 016788 default-state = "on"; 016798 } 01679c led-board { 0167ac gpios = < 0x9a 0x17 0x0 >; 0167c4 linux,default-trigger = "none"; 0167d8 default-state = "on"; 0167e8 } 0167ec } 0167f0 dummy-codec { 016800 status = "disabled"; 016818 compatible = "rockchip,dummy-codec"; 01683c #sound-dai-cells = < 0x0 >; 01684c phandle = < 0x121 >; 01685c } 016860 pdm-mic-array { 016874 status = "disabled"; 01688c compatible = "simple-audio-card"; 0168ac simple-audio-card,name = "rockchip,pdm-mic-array"; 0168d0 phandle = < 0x1cf >; 0168e0 simple-audio-card,cpu { 0168fc sound-dai = < 0x120 >; 01690c } 016910 simple-audio-card,codec { 01692c sound-dai = < 0x121 >; 01693c } 016940 } 016944 rk809-sound { 016954 status = "disabled"; 01696c compatible = "simple-audio-card"; 01698c simple-audio-card,format = "i2s"; 01699c simple-audio-card,name = "rockchip,rk809-codec"; 0169c0 simple-audio-card,mclk-fs = < 0x100 >; 0169d0 phandle = < 0x1d0 >; 0169e0 simple-audio-card,cpu { 0169fc sound-dai = < 0x11a >; 016a0c } 016a10 simple-audio-card,codec { 016a2c sound-dai = < 0x122 >; 016a3c } 016a40 } 016a44 spdif-sound { 016a54 status = "okay"; 016a68 compatible = "simple-audio-card"; 016a88 simple-audio-card,name = "ROCKCHIP,SPDIF"; 016aa4 simple-audio-card,cpu { 016ac0 sound-dai = < 0x123 >; 016ad0 } 016ad4 simple-audio-card,codec { 016af0 sound-dai = < 0x124 >; 016b00 } 016b04 } 016b08 spdif-out { 016b18 status = "okay"; 016b2c compatible = "linux,spdif-dit"; 016b48 #sound-dai-cells = < 0x0 >; 016b58 phandle = < 0x124 >; 016b68 } 016b6c vad-sound { 016b7c status = "disabled"; 016b94 compatible = "rockchip,multicodecs-card"; 016bbc rockchip,card-name = "rockchip,rk3568-vad"; 016bdc rockchip,cpu = < 0xc4 >; 016bec rockchip,codec = < 0x122 0x125 >; 016c00 phandle = < 0x1d1 >; 016c10 } 016c14 vcc3v3-sys { 016c24 compatible = "regulator-fixed"; 016c40 regulator-name = "vcc3v3_sys"; 016c58 regulator-always-on; 016c64 regulator-boot-on; 016c70 regulator-min-microvolt = < 0x325aa0 >; 016c80 regulator-max-microvolt = < 0x325aa0 >; 016c90 vin-supply = < 0x126 >; 016ca0 phandle = < 0x3c >; 016cb0 } 016cb4 vcc5v0-sys { 016cc4 compatible = "regulator-fixed"; 016ce0 regulator-name = "vcc5v0_sys"; 016cf8 regulator-always-on; 016d04 regulator-boot-on; 016d10 regulator-min-microvolt = < 0x4c4b40 >; 016d20 regulator-max-microvolt = < 0x4c4b40 >; 016d30 vin-supply = < 0x126 >; 016d40 phandle = < 0x3d >; 016d50 } 016d54 vcc5v0-usb { 016d64 compatible = "regulator-fixed"; 016d80 regulator-name = "vcc5v0_usb"; 016d98 regulator-always-on; 016da4 regulator-boot-on; 016db0 regulator-min-microvolt = < 0x4c4b40 >; 016dc0 regulator-max-microvolt = < 0x4c4b40 >; 016dd0 vin-supply = < 0x126 >; 016de0 phandle = < 0x127 >; 016df0 } 016df4 vcc5v0-host-regulator { 016e10 compatible = "regulator-fixed"; 016e2c regulator-name = "vcc5v0_host"; 016e44 regulator-boot-on; 016e50 regulator-always-on; 016e5c regulator-min-microvolt = < 0x4c4b40 >; 016e6c regulator-max-microvolt = < 0x4c4b40 >; 016e7c enable-active-high; 016e88 gpio = < 0x35 0x6 0x0 >; 016ea0 vin-supply = < 0x127 >; 016eb0 pinctrl-names = "default"; 016ec4 pinctrl-0 = < 0x128 >; 016ed4 phandle = < 0x10a >; 016ee4 } 016ee8 vcc5v0-otg-regulator { 016f04 compatible = "regulator-fixed"; 016f20 regulator-name = "vcc5v0_otg"; 016f38 regulator-min-microvolt = < 0x4c4b40 >; 016f48 regulator-max-microvolt = < 0x4c4b40 >; 016f58 enable-active-high; 016f64 gpio = < 0x35 0x5 0x0 >; 016f7c vin-supply = < 0x127 >; 016f8c pinctrl-names = "default"; 016fa0 pinctrl-0 = < 0x129 >; 016fb0 phandle = < 0x10b >; 016fc0 } 016fc4 vcc3v3-lcd0-n { 016fd8 compatible = "regulator-fixed"; 016ff4 regulator-name = "vcc3v3_lcd0_n"; 017010 regulator-boot-on; 01701c regulator-min-microvolt = < 0x325aa0 >; 01702c regulator-max-microvolt = < 0x325aa0 >; 01703c enable-active-high; 017048 gpio = < 0x35 0x10 0x0 >; 017060 vin-supply = < 0x3c >; 017070 phandle = < 0x90 >; 017080 regulator-state-mem { 017098 regulator-off-in-suspend; 0170a4 } 0170a8 } 0170ac vcc3v3-lcd1-n { 0170c0 compatible = "regulator-fixed"; 0170dc regulator-name = "vcc3v3_lcd1_n"; 0170f8 regulator-boot-on; 017104 regulator-min-microvolt = < 0x325aa0 >; 017114 regulator-max-microvolt = < 0x325aa0 >; 017124 enable-active-high; 017130 gpio = < 0x35 0x15 0x0 >; 017148 vin-supply = < 0x3c >; 017158 phandle = < 0x99 >; 017168 regulator-state-mem { 017180 regulator-off-in-suspend; 01718c } 017190 } 017194 sdio-pwrseq { 0171a4 compatible = "mmc-pwrseq-simple"; 0171c4 clocks = < 0x12a 0x1 >; 0171d8 clock-names = "ext_clock"; 0171f0 pinctrl-names = "default"; 017204 pinctrl-0 = < 0x12b >; 017214 post-power-on-delay-ms = < 0xc8 >; 017224 reset-gpios = < 0x12c 0x9 0x1 >; 01723c phandle = < 0xaf >; 01724c } 017250 wireless-wlan { 017264 compatible = "wlan-platdata"; 017280 rockchip,grf = < 0x32 >; 017290 wifi_chip_type = "ap6398s"; 0172a4 status = "okay"; 0172b8 pinctrl-names = "default"; 0172cc pinctrl-0 = < 0x12d >; 0172dc WIFI,host_wake_irq = < 0x12c 0xa 0x0 >; 0172f4 phandle = < 0x1d2 >; 017304 } 017308 wireless-bluetooth { 017320 compatible = "bluetooth-platdata"; 017340 clocks = < 0x12a 0x1 >; 017354 clock-names = "ext_clock"; 01736c uart_rts_gpios = < 0x12c 0xd 0x1 >; 017384 pinctrl-names = "default\0rts_gpio"; 0173a4 pinctrl-0 = < 0x12e >; 0173b4 pinctrl-1 = < 0x12f >; 0173c4 BT,reset_gpio = < 0x12c 0xf 0x0 >; 0173dc BT,wake_gpio = < 0x12c 0x11 0x0 >; 0173f4 BT,wake_host_irq = < 0x12c 0x10 0x0 >; 01740c status = "okay"; 017420 phandle = < 0x1d3 >; 017430 } 017434 test-power { 017444 status = "okay"; 017458 } 01745c rk-headset { 01746c compatible = "rockchip_headset"; 01748c headset_gpio = < 0x9a 0xb 0x1 >; 0174a4 pinctrl-names = "default"; 0174b8 pinctrl-0 = < 0x130 >; 0174c8 phandle = < 0x1d4 >; 0174d8 } 0174dc vcc3v3-vga { 0174ec compatible = "regulator-fixed"; 017508 regulator-name = "vcc3v3_vga"; 017520 regulator-always-on; 01752c regulator-boot-on; 017538 gpio = < 0x9a 0xa 0x0 >; 017550 enable-active-high; 01755c vin-supply = < 0x3c >; 01756c status = "disabled"; 017584 phandle = < 0x1d5 >; 017594 } 017598 vcc-camera-regulator { 0175b4 compatible = "regulator-fixed"; 0175d0 gpio = < 0x35 0x11 0x0 >; 0175e8 pinctrl-names = "default"; 0175fc pinctrl-0 = < 0x131 >; 01760c regulator-name = "vcc_camera"; 017624 enable-active-high; 017630 regulator-always-on; 01763c regulator-boot-on; 017648 phandle = < 0x1d6 >; 017658 } 01765c chosen { 017668 bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rw rootwait"; 0176d0 phandle = < 0x1d7 >; 0176e0 } 0176e4 fiq-debugger { 0176f8 compatible = "rockchip,fiq-debugger"; 01771c rockchip,serial-id = < 0x2 >; 01772c rockchip,wake-irq = < 0x0 >; 01773c rockchip,irq-mode-enable = < 0x1 >; 01774c rockchip,baudrate = < 0x16e360 >; 01775c interrupts = < 0x0 0xfc 0x8 >; 017774 pinctrl-names = "default"; 017788 pinctrl-0 = < 0xeb >; 017798 status = "okay"; 0177ac phandle = < 0x1d8 >; 0177bc } 0177c0 debug@fd904000 { 0177d4 compatible = "rockchip,debug"; 0177f0 reg = < 0x0 0xfd904000 0x0 0x1000 0x0 0xfd905000 0x0 0x1000 0x0 0xfd906000 0x0 0x1000 0x0 0xfd907000 0x0 0x1000 >; 01783c phandle = < 0x1d9 >; 01784c } 017850 cspmu@fd90c000 { 017864 compatible = "rockchip,cspmu"; 017880 reg = < 0x0 0xfd90c000 0x0 0x1000 0x0 0xfd90d000 0x0 0x1000 0x0 0xfd90e000 0x0 0x1000 0x0 0xfd90f000 0x0 0x1000 >; 0178cc phandle = < 0x1da >; 0178dc } 0178e0 __symbols__ { 0178f0 ddr_timing = "/ddr_timing"; 017908 cpu0 = "/cpus/cpu@0"; 017920 cpu1 = "/cpus/cpu@100"; 01793c cpu2 = "/cpus/cpu@200"; 017958 cpu3 = "/cpus/cpu@300"; 017974 CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; 01799c cpu0_opp_table = "/cpu0-opp-table"; 0179b8 display_subsystem = "/display-subsystem"; 0179d8 route_dsi0 = "/display-subsystem/route/route-dsi0"; 017a08 route_dsi1 = "/display-subsystem/route/route-dsi1"; 017a38 route_edp = "/display-subsystem/route/route-edp"; 017a68 route_hdmi = "/display-subsystem/route/route-hdmi"; 017a98 route_lvds = "/display-subsystem/route/route-lvds"; 017ac8 route_rgb = "/display-subsystem/route/route-rgb"; 017af8 optee = "/firmware/optee"; 017b14 scmi = "/firmware/scmi"; 017b30 scmi_clk = "/firmware/scmi/protocol@14"; 017b58 sdei = "/firmware/sdei"; 017b74 mpp_srv = "/mpp-srv"; 017b8c reserved_memory = "/reserved-memory"; 017bac drm_logo = "/reserved-memory/drm-logo@00000000"; 017bdc drm_cubic_lut = "/reserved-memory/drm-cubic-lut@00000000"; 017c10 ramoops = "/reserved-memory/ramoops@110000"; 017c3c rockchip_suspend = "/rockchip-suspend"; 017c5c rockchip_system_monitor = "/rockchip-system-monitor"; 017c84 thermal_zones = "/thermal-zones"; 017ca0 soc_thermal = "/thermal-zones/soc-thermal"; 017cc8 threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; 017d04 target = "/thermal-zones/soc-thermal/trips/trip-point-1"; 017d40 soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; 017d78 gpu_thermal = "/thermal-zones/gpu-thermal"; 017da0 gmac1_clkin = "/external-gmac1-clock"; 017dc4 gmac1_xpcsclk = "/xpcs-gmac1-clock"; 017de4 i2s1_mclkin_rx = "/i2s1-mclkin-rx"; 017e00 i2s1_mclkin_tx = "/i2s1-mclkin-tx"; 017e1c i2s2_mclkin = "/i2s2-mclkin"; 017e38 i2s3_mclkin = "/i2s3-mclkin"; 017e54 mpll = "/mpll"; 017e68 xin24m = "/xin24m"; 017e7c xin32k = "/xin32k"; 017e90 scmi_shmem = "/scmi-shmem@10f000"; 017eb0 sata1 = "/sata@fc400000"; 017ecc sata2 = "/sata@fc800000"; 017ee8 usbdrd30 = "/usbdrd"; 017efc usbdrd_dwc3 = "/usbdrd/dwc3@fcc00000"; 017f20 usbhost30 = "/usbhost"; 017f38 usbhost_dwc3 = "/usbhost/dwc3@fd000000"; 017f5c gic = "/interrupt-controller@fd400000"; 017f88 its = "/interrupt-controller@fd400000/interrupt-controller@fd440000"; 017fd4 usb_host0_ehci = "/usb@fd800000"; 017ff0 usb_host0_ohci = "/usb@fd840000"; 01800c usb_host1_ehci = "/usb@fd880000"; 018028 usb_host1_ohci = "/usb@fd8c0000"; 018044 xpcs = "/syscon@fda00000"; 018064 pmugrf = "/syscon@fdc20000"; 018084 pmu_io_domains = "/syscon@fdc20000/io-domains"; 0180ac reboot_mode = "/syscon@fdc20000/reboot-mode"; 0180d8 pipegrf = "/syscon@fdc50000"; 0180f8 grf = "/syscon@fdc60000"; 018118 io_domains = "/syscon@fdc60000/io-domains"; 018140 lvds = "/syscon@fdc60000/lvds"; 018164 lvds_in_vp1 = "/syscon@fdc60000/lvds/ports/port@0/endpoint@1"; 0181a0 lvds_in_vp2 = "/syscon@fdc60000/lvds/ports/port@0/endpoint@2"; 0181dc rgb = "/syscon@fdc60000/rgb"; 018200 rgb_in_vp2 = "/syscon@fdc60000/rgb/ports/port@0/endpoint@2"; 01823c pipe_phy_grf0 = "/syscon@fdc70000"; 01825c pipe_phy_grf1 = "/syscon@fdc80000"; 01827c pipe_phy_grf2 = "/syscon@fdc90000"; 01829c usb2phy0_grf = "/syscon@fdca0000"; 0182bc usb2phy1_grf = "/syscon@fdca8000"; 0182dc edp_phy = "/edp-phy@fdcb0000"; 0182fc sram = "/sram@fdcc0000"; 018318 rkvdec_sram = "/sram@fdcc0000/rkvdec-sram@0"; 018344 pmucru = "/clock-controller@fdd00000"; 01836c cru = "/clock-controller@fdd20000"; 018394 i2c0 = "/i2c@fdd40000"; 0183b0 rk809 = "/i2c@fdd40000/pmic@20"; 0183d4 pinctrl_rk8xx = "/i2c@fdd40000/pmic@20/pinctrl_rk8xx"; 018404 rk817_slppin_null = "/i2c@fdd40000/pmic@20/pinctrl_rk8xx/rk817_slppin_null"; 018448 rk817_slppin_slp = "/i2c@fdd40000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp"; 01848c rk817_slppin_pwrdn = "/i2c@fdd40000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn"; 0184d0 rk817_slppin_rst = "/i2c@fdd40000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst"; 018514 vdd_logic = "/i2c@fdd40000/pmic@20/regulators/DCDC_REG1"; 01854c vdd_gpu = "/i2c@fdd40000/pmic@20/regulators/DCDC_REG2"; 018584 vcc_ddr = "/i2c@fdd40000/pmic@20/regulators/DCDC_REG3"; 0185bc vdd_npu = "/i2c@fdd40000/pmic@20/regulators/DCDC_REG4"; 0185f4 vdda0v9_image = "/i2c@fdd40000/pmic@20/regulators/LDO_REG1"; 01862c vdda_0v9 = "/i2c@fdd40000/pmic@20/regulators/LDO_REG2"; 018664 vdda0v9_pmu = "/i2c@fdd40000/pmic@20/regulators/LDO_REG3"; 01869c vccio_acodec = "/i2c@fdd40000/pmic@20/regulators/LDO_REG4"; 0186d4 vccio_sd = "/i2c@fdd40000/pmic@20/regulators/LDO_REG5"; 01870c vcc3v3_pmu = "/i2c@fdd40000/pmic@20/regulators/LDO_REG6"; 018744 vcca_1v8 = "/i2c@fdd40000/pmic@20/regulators/LDO_REG7"; 01877c vcca1v8_pmu = "/i2c@fdd40000/pmic@20/regulators/LDO_REG8"; 0187b4 vcca1v8_image = "/i2c@fdd40000/pmic@20/regulators/LDO_REG9"; 0187ec vcc_1v8 = "/i2c@fdd40000/pmic@20/regulators/DCDC_REG5"; 018824 vcc_3v3 = "/i2c@fdd40000/pmic@20/regulators/SWITCH_REG1"; 018860 vcc3v3_sd = "/i2c@fdd40000/pmic@20/regulators/SWITCH_REG2"; 01889c rk809_codec = "/i2c@fdd40000/pmic@20/codec"; 0188c4 vdd_cpu = "/i2c@fdd40000/tcs4525@1c"; 0188ec uart0 = "/serial@fdd50000"; 01890c pwm0 = "/pwm@fdd70000"; 018928 pwm1 = "/pwm@fdd70010"; 018944 pwm2 = "/pwm@fdd70020"; 018960 pwm3 = "/pwm@fdd70030"; 01897c pmu = "/power-management@fdd90000"; 0189a4 power = "/power-management@fdd90000/power-controller"; 0189dc rknpu = "/npu@fde40000"; 0189f8 npu_opp_table = "/npu-opp-table"; 018a14 bus_npu = "/bus-npu"; 018a2c bus_npu_opp_table = "/bus-npu-opp-table"; 018a4c rknpu_mmu = "/iommu@fde4b000"; 018a68 gpu = "/gpu@fde60000"; 018a84 gpu_power_model = "/gpu@fde60000/power-model"; 018aac gpu_opp_table = "/opp-table2"; 018ac4 vdpu = "/vdpu@fdea0400"; 018ae0 vdpu_mmu = "/iommu@fdea0800"; 018afc rk_rga = "/rk_rga@fdeb0000"; 018b1c ebc = "/ebc@fdec0000"; 018b38 jpegd = "/jpegd@fded0000"; 018b54 jpegd_mmu = "/iommu@fded0480"; 018b70 vepu = "/vepu@fdee0000"; 018b8c vepu_mmu = "/iommu@fdee0800"; 018ba8 iep = "/iep@fdef0000"; 018bc4 iep_mmu = "/iommu@fdef0800"; 018be0 eink = "/eink@fdf00000"; 018bfc rkvenc = "/rkvenc@fdf40000"; 018c1c rkvenc_opp_table = "/rkvenc-opp-table"; 018c3c rkvenc_mmu = "/iommu@fdf40f00"; 018c58 rkvdec = "/rkvdec@fdf80200"; 018c78 rkvdec_mmu = "/iommu@fdf80800"; 018c94 mipi_csi2 = "/mipi-csi2@fdfb0000"; 018cb4 rkcif = "/rkcif@fdfe0000"; 018cd0 rkcif_mmu = "/iommu@fdfe0800"; 018cec rkcif_dvp = "/rkcif_dvp"; 018d04 dvp_in_bcam = "/rkcif_dvp/port/endpoint"; 018d2c rkcif_dvp_sditf = "/rkcif_dvp_sditf"; 018d4c rkcif_mipi_lvds = "/rkcif_mipi_lvds"; 018d6c rkcif_mipi_lvds_sditf = "/rkcif_mipi_lvds_sditf"; 018d90 rkisp = "/rkisp@fdff0000"; 018dac rkisp_mmu = "/iommu@fdff1a00"; 018dc8 rkisp_vir0 = "/rkisp-vir0"; 018de0 isp0_in = "/rkisp-vir0/port/endpoint@0"; 018e08 rkisp_vir1 = "/rkisp-vir1"; 018e20 gmac1 = "/ethernet@fe010000"; 018e40 mdio1 = "/ethernet@fe010000/mdio"; 018e64 rgmii_phy1 = "/ethernet@fe010000/mdio/phy@0"; 018e90 gmac1_stmmac_axi_setup = "/ethernet@fe010000/stmmac-axi-config"; 018ec4 gmac1_mtl_rx_setup = "/ethernet@fe010000/rx-queues-config"; 018ef4 gmac1_mtl_tx_setup = "/ethernet@fe010000/tx-queues-config"; 018f24 vop = "/vop@fe040000"; 018f40 vop_out = "/vop@fe040000/ports"; 018f60 vp0 = "/vop@fe040000/ports/port@0"; 018f88 vp0_out_dsi0 = "/vop@fe040000/ports/port@0/endpoint@0"; 018fbc vp0_out_dsi1 = "/vop@fe040000/ports/port@0/endpoint@1"; 018ff0 vp0_out_edp = "/vop@fe040000/ports/port@0/endpoint@2"; 019024 vp0_out_hdmi = "/vop@fe040000/ports/port@0/endpoint@3"; 019058 vp1 = "/vop@fe040000/ports/port@1"; 019080 vp1_out_dsi0 = "/vop@fe040000/ports/port@1/endpoint@0"; 0190b4 vp1_out_dsi1 = "/vop@fe040000/ports/port@1/endpoint@1"; 0190e8 vp1_out_edp = "/vop@fe040000/ports/port@1/endpoint@2"; 01911c vp1_out_hdmi = "/vop@fe040000/ports/port@1/endpoint@3"; 019150 vp1_out_lvds = "/vop@fe040000/ports/port@1/endpoint@4"; 019184 vp2 = "/vop@fe040000/ports/port@2"; 0191ac vp2_out_lvds = "/vop@fe040000/ports/port@2/endpoint@0"; 0191e0 vp2_out_rgb = "/vop@fe040000/ports/port@2/endpoint@1"; 019214 vop_mmu = "/iommu@fe043e00"; 019230 dsi0 = "/dsi@fe060000"; 01924c dsi0_in = "/dsi@fe060000/ports/port@0"; 019274 dsi0_in_vp0 = "/dsi@fe060000/ports/port@0/endpoint@0"; 0192a8 dsi0_in_vp1 = "/dsi@fe060000/ports/port@0/endpoint@1"; 0192dc dsi_out_panel = "/dsi@fe060000/ports/port@1/endpoint"; 01930c dsi0_panel = "/dsi@fe060000/panel@0"; 019330 disp_timings0 = "/dsi@fe060000/panel@0/display-timings"; 019364 dsi0_timing0 = "/dsi@fe060000/panel@0/display-timings/timing0"; 0193a0 panel_in_dsi = "/dsi@fe060000/panel@0/ports/port@0/endpoint"; 0193d8 dsi1 = "/dsi@fe070000"; 0193f4 dsi1_in = "/dsi@fe070000/ports/port@0"; 01941c dsi1_in_vp0 = "/dsi@fe070000/ports/port@0/endpoint@0"; 019450 dsi1_in_vp1 = "/dsi@fe070000/ports/port@0/endpoint@1"; 019484 dsi1_out_panel = "/dsi@fe070000/ports/port@1/endpoint"; 0194b4 dsi1_panel = "/dsi@fe070000/panel@0"; 0194d8 disp_timings1 = "/dsi@fe070000/panel@0/display-timings"; 01950c dsi1_timing0 = "/dsi@fe070000/panel@0/display-timings/timing0"; 019548 panel_in_dsi1 = "/dsi@fe070000/panel@0/ports/port@0/endpoint"; 019580 hdmi = "/hdmi@fe0a0000"; 01959c hdmi_in = "/hdmi@fe0a0000/ports/port"; 0195c4 hdmi_in_vp0 = "/hdmi@fe0a0000/ports/port/endpoint@0"; 0195f8 hdmi_in_vp1 = "/hdmi@fe0a0000/ports/port/endpoint@1"; 01962c edp = "/edp@fe0c0000"; 019648 edp_in = "/edp@fe0c0000/ports/port@0"; 019670 edp_in_vp0 = "/edp@fe0c0000/ports/port@0/endpoint@0"; 0196a4 edp_in_vp1 = "/edp@fe0c0000/ports/port@0/endpoint@1"; 0196d8 qos_gpu = "/qos@fe128000"; 0196f4 qos_rkvenc_rd_m0 = "/qos@fe138080"; 019710 qos_rkvenc_rd_m1 = "/qos@fe138100"; 01972c qos_rkvenc_wr_m0 = "/qos@fe138180"; 019748 qos_isp = "/qos@fe148000"; 019764 qos_vicap0 = "/qos@fe148080"; 019780 qos_vicap1 = "/qos@fe148100"; 01979c qos_vpu = "/qos@fe150000"; 0197b8 qos_ebc = "/qos@fe158000"; 0197d4 qos_iep = "/qos@fe158100"; 0197f0 qos_jpeg_dec = "/qos@fe158180"; 01980c qos_jpeg_enc = "/qos@fe158200"; 019828 qos_rga_rd = "/qos@fe158280"; 019844 qos_rga_wr = "/qos@fe158300"; 019860 qos_npu = "/qos@fe180000"; 01987c qos_pcie2x1 = "/qos@fe190000"; 019898 qos_sata1 = "/qos@fe190280"; 0198b4 qos_sata2 = "/qos@fe190300"; 0198d0 qos_usb3_0 = "/qos@fe190380"; 0198ec qos_usb3_1 = "/qos@fe190400"; 019908 qos_rkvdec = "/qos@fe198000"; 019924 qos_hdcp = "/qos@fe1a8000"; 019940 qos_vop_m0 = "/qos@fe1a8080"; 01995c qos_vop_m1 = "/qos@fe1a8100"; 019978 sdmmc2 = "/dwmmc@fe000000"; 019994 dfi = "/dfi@fe230000"; 0199b0 dmc = "/dmc"; 0199c4 dmc_opp_table = "/dmc-opp-table"; 0199e0 pcie2x1 = "/pcie@fe260000"; 0199fc pcie2x1_intc = "/pcie@fe260000/legacy-interrupt-controller"; 019a34 sdmmc0 = "/dwmmc@fe2b0000"; 019a50 sdmmc1 = "/dwmmc@fe2c0000"; 019a6c sfc = "/sfc@fe300000"; 019a88 sdhci = "/sdhci@fe310000"; 019aa4 nandc0 = "/nandc@fe330000"; 019ac0 crypto = "/crypto@fe380000"; 019ae0 rng = "/rng@fe388000"; 019afc otp = "/otp@fe38c000"; 019b18 cpu_code = "/otp@fe38c000/cpu-code@2"; 019b40 otp_cpu_version = "/otp@fe38c000/cpu-version@8"; 019b68 mbist_vmin = "/otp@fe38c000/mbist-vmin@9"; 019b90 otp_id = "/otp@fe38c000/id@a"; 019bb0 cpu_leakage = "/otp@fe38c000/cpu-leakage@1a"; 019bdc log_leakage = "/otp@fe38c000/log-leakage@1b"; 019c08 npu_leakage = "/otp@fe38c000/npu-leakage@1c"; 019c34 gpu_leakage = "/otp@fe38c000/gpu-leakage@1d"; 019c60 core_pvtm = "/otp@fe38c000/core-pvtm@2a"; 019c88 i2s0_8ch = "/i2s@fe400000"; 019ca4 i2s1_8ch = "/i2s@fe410000"; 019cc0 i2s2_2ch = "/i2s@fe420000"; 019cdc i2s3_2ch = "/i2s@fe430000"; 019cf8 pdm = "/pdm@fe440000"; 019d14 vad = "/vad@fe450000"; 019d30 spdif_8ch = "/spdif@fe460000"; 019d4c audpwm = "/audpwm@fe470000"; 019d6c dig_acodec = "/codec-digital@fe478000"; 019d90 dmac0 = "/dmac@fe530000"; 019dac dmac1 = "/dmac@fe550000"; 019dc8 scr = "/rkscr@fe560000"; 019de4 can0 = "/can@fe570000"; 019e00 can1 = "/can@fe580000"; 019e1c can2 = "/can@fe590000"; 019e38 i2c1 = "/i2c@fe5a0000"; 019e54 gt1x = "/i2c@fe5a0000/gt1x@14"; 019e78 i2c2 = "/i2c@fe5b0000"; 019e94 gc2145 = "/i2c@fe5b0000/gc2145@3c"; 019eb8 gc2145_out = "/i2c@fe5b0000/gc2145@3c/port/endpoint"; 019eec ov5695 = "/i2c@fe5b0000/ov5695@36"; 019f10 ov5695_out = "/i2c@fe5b0000/ov5695@36/port/endpoint"; 019f44 gc8034 = "/i2c@fe5b0000/gc8034@37"; 019f68 gc8034_out = "/i2c@fe5b0000/gc8034@37/port/endpoint"; 019f9c i2c3 = "/i2c@fe5c0000"; 019fb8 i2c4 = "/i2c@fe5d0000"; 019fd4 i2c5 = "/i2c@fe5e0000"; 019ff0 mxc6655xa = "/i2c@fe5e0000/mxc6655xa@15"; 01a018 rktimer = "/timer@fe5f0000"; 01a034 wdt = "/watchdog@fe600000"; 01a054 spi0 = "/spi@fe610000"; 01a070 spi1 = "/spi@fe620000"; 01a08c spi2 = "/spi@fe630000"; 01a0a8 spi3 = "/spi@fe640000"; 01a0c4 uart1 = "/serial@fe650000"; 01a0e4 uart2 = "/serial@fe660000"; 01a104 uart3 = "/serial@fe670000"; 01a124 uart4 = "/serial@fe680000"; 01a144 uart5 = "/serial@fe690000"; 01a164 uart6 = "/serial@fe6a0000"; 01a184 uart7 = "/serial@fe6b0000"; 01a1a4 uart8 = "/serial@fe6c0000"; 01a1c4 uart9 = "/serial@fe6d0000"; 01a1e4 pwm4 = "/pwm@fe6e0000"; 01a200 pwm5 = "/pwm@fe6e0010"; 01a21c pwm6 = "/pwm@fe6e0020"; 01a238 pwm7 = "/pwm@fe6e0030"; 01a254 pwm8 = "/pwm@fe6f0000"; 01a270 pwm9 = "/pwm@fe6f0010"; 01a28c pwm10 = "/pwm@fe6f0020"; 01a2a8 pwm11 = "/pwm@fe6f0030"; 01a2c4 pwm12 = "/pwm@fe700000"; 01a2e0 pwm13 = "/pwm@fe700010"; 01a2fc pwm14 = "/pwm@fe700020"; 01a318 pwm15 = "/pwm@fe700030"; 01a334 tsadc = "/tsadc@fe710000"; 01a350 saradc = "/saradc@fe720000"; 01a370 mailbox = "/mailbox@fe780000"; 01a390 combphy1_usq = "/phy@fe830000"; 01a3ac combphy2_psq = "/phy@fe840000"; 01a3c8 video_phy0 = "/video-phy@fe850000"; 01a3e8 video_phy1 = "/video-phy@fe860000"; 01a408 csi2_dphy_hw = "/csi2-dphy-hw@fe870000"; 01a42c csi2_dphy0 = "/csi2-dphy0"; 01a444 mipi_in_ucam0 = "/csi2-dphy0/ports/port@0/endpoint@1"; 01a474 mipi_in_ucam1 = "/csi2-dphy0/ports/port@0/endpoint@2"; 01a4a4 csidphy_out = "/csi2-dphy0/ports/port@1/endpoint@0"; 01a4d4 csi2_dphy1 = "/csi2-dphy1"; 01a4ec csi2_dphy2 = "/csi2-dphy2"; 01a504 usb2phy0 = "/usb2-phy@fe8a0000"; 01a524 u2phy0_host = "/usb2-phy@fe8a0000/host-port"; 01a550 u2phy0_otg = "/usb2-phy@fe8a0000/otg-port"; 01a578 usb2phy1 = "/usb2-phy@fe8b0000"; 01a598 u2phy1_host = "/usb2-phy@fe8b0000/host-port"; 01a5c4 u2phy1_otg = "/usb2-phy@fe8b0000/otg-port"; 01a5ec pinctrl = "/pinctrl"; 01a604 gpio0 = "/pinctrl/gpio@fdd60000"; 01a628 gpio1 = "/pinctrl/gpio@fe740000"; 01a64c gpio2 = "/pinctrl/gpio@fe750000"; 01a670 gpio3 = "/pinctrl/gpio@fe760000"; 01a694 gpio4 = "/pinctrl/gpio@fe770000"; 01a6b8 pcfg_pull_up = "/pinctrl/pcfg-pull-up"; 01a6dc pcfg_pull_down = "/pinctrl/pcfg-pull-down"; 01a700 pcfg_pull_none = "/pinctrl/pcfg-pull-none"; 01a724 pcfg_pull_none_drv_level_1 = "/pinctrl/pcfg-pull-none-drv-level-1"; 01a754 pcfg_pull_none_drv_level_2 = "/pinctrl/pcfg-pull-none-drv-level-2"; 01a784 pcfg_pull_none_drv_level_3 = "/pinctrl/pcfg-pull-none-drv-level-3"; 01a7b4 pcfg_pull_up_drv_level_1 = "/pinctrl/pcfg-pull-up-drv-level-1"; 01a7e4 pcfg_pull_up_drv_level_2 = "/pinctrl/pcfg-pull-up-drv-level-2"; 01a814 pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; 01a83c pcfg_output_low_pull_down = "/pinctrl/pcfg-output-low-pull-down"; 01a86c acodec_pins = "/pinctrl/acodec/acodec-pins"; 01a894 cam_clkout0 = "/pinctrl/cam/cam-clkout0"; 01a8bc camera_pwr = "/pinctrl/cam/camera-pwr"; 01a8e0 can0m1_pins = "/pinctrl/can0/can0m1-pins"; 01a908 can1m1_pins = "/pinctrl/can1/can1m1-pins"; 01a930 can2m1_pins = "/pinctrl/can2/can2m1-pins"; 01a958 cif_clk = "/pinctrl/cif/cif-clk"; 01a97c cif_dvp_clk = "/pinctrl/cif/cif-dvp-clk"; 01a9a4 cif_dvp_bus16 = "/pinctrl/cif/cif-dvp-bus16"; 01a9cc clk32k_out0 = "/pinctrl/clk32k/clk32k-out0"; 01a9f4 ebc_pins = "/pinctrl/ebc/ebc-pins"; 01aa18 gmac1m0_miim = "/pinctrl/gmac1/gmac1m0-miim"; 01aa40 gmac1m0_rx_bus2 = "/pinctrl/gmac1/gmac1m0-rx-bus2"; 01aa6c hdmitxm0_cec = "/pinctrl/hdmitx/hdmitxm0-cec"; 01aa98 hdmitx_scl = "/pinctrl/hdmitx/hdmitx-scl"; 01aac0 hdmitx_sda = "/pinctrl/hdmitx/hdmitx-sda"; 01aae8 i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer"; 01ab0c i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer"; 01ab30 i2c2m1_xfer = "/pinctrl/i2c2/i2c2m1-xfer"; 01ab58 i2c3m0_xfer = "/pinctrl/i2c3/i2c3m0-xfer"; 01ab80 i2c4m0_xfer = "/pinctrl/i2c4/i2c4m0-xfer"; 01aba8 i2c5m0_xfer = "/pinctrl/i2c5/i2c5m0-xfer"; 01abd0 i2s1m0_lrcktx = "/pinctrl/i2s1/i2s1m0-lrcktx"; 01abf8 i2s1m0_sclktx = "/pinctrl/i2s1/i2s1m0-sclktx"; 01ac20 i2s1m0_sdi0 = "/pinctrl/i2s1/i2s1m0-sdi0"; 01ac48 i2s1m0_sdo0 = "/pinctrl/i2s1/i2s1m0-sdo0"; 01ac70 i2s2m0_lrcktx = "/pinctrl/i2s2/i2s2m0-lrcktx"; 01ac98 i2s2m0_sclktx = "/pinctrl/i2s2/i2s2m0-sclktx"; 01acc0 i2s2m0_sdi = "/pinctrl/i2s2/i2s2m0-sdi"; 01ace8 i2s2m0_sdo = "/pinctrl/i2s2/i2s2m0-sdo"; 01ad10 i2s3m1_lrck = "/pinctrl/i2s3/i2s3m1-lrck"; 01ad38 i2s3m1_sclk = "/pinctrl/i2s3/i2s3m1-sclk"; 01ad60 i2s3m1_sdi = "/pinctrl/i2s3/i2s3m1-sdi"; 01ad88 i2s3m1_sdo = "/pinctrl/i2s3/i2s3m1-sdo"; 01adb0 lcdc_ctl = "/pinctrl/lcdc/lcdc-ctl"; 01add4 pdmm1_clk1 = "/pinctrl/pdm/pdmm1-clk1"; 01adf8 pdmm1_sdi1 = "/pinctrl/pdm/pdmm1-sdi1"; 01ae1c pdmm1_sdi2 = "/pinctrl/pdm/pdmm1-sdi2"; 01ae40 pdmm1_sdi3 = "/pinctrl/pdm/pdmm1-sdi3"; 01ae64 pmic_int = "/pinctrl/pmic/pmic_int"; 01ae88 soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio"; 01aeb4 soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp"; 01aee0 soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst"; 01af0c pwm0m0_pins = "/pinctrl/pwm0/pwm0m0-pins"; 01af34 pwm1m0_pins = "/pinctrl/pwm1/pwm1m0-pins"; 01af5c pwm2m0_pins = "/pinctrl/pwm2/pwm2m0-pins"; 01af84 pwm3_pins = "/pinctrl/pwm3/pwm3-pins"; 01afa8 pwm4_pins = "/pinctrl/pwm4/pwm4-pins"; 01afcc pwm5_pins = "/pinctrl/pwm5/pwm5-pins"; 01aff0 pwm6_pins = "/pinctrl/pwm6/pwm6-pins"; 01b014 pwm7_pins = "/pinctrl/pwm7/pwm7-pins"; 01b038 pwm8m0_pins = "/pinctrl/pwm8/pwm8m0-pins"; 01b060 pwm9m0_pins = "/pinctrl/pwm9/pwm9m0-pins"; 01b088 pwm10m0_pins = "/pinctrl/pwm10/pwm10m0-pins"; 01b0b0 pwm11m0_pins = "/pinctrl/pwm11/pwm11m0-pins"; 01b0d8 pwm12m0_pins = "/pinctrl/pwm12/pwm12m0-pins"; 01b100 pwm13m0_pins = "/pinctrl/pwm13/pwm13m0-pins"; 01b128 pwm14m0_pins = "/pinctrl/pwm14/pwm14m0-pins"; 01b150 pwm15m0_pins = "/pinctrl/pwm15/pwm15m0-pins"; 01b178 scr_pins = "/pinctrl/scr/scr-pins"; 01b19c sdmmc0_bus4 = "/pinctrl/sdmmc0/sdmmc0-bus4"; 01b1c4 sdmmc0_clk = "/pinctrl/sdmmc0/sdmmc0-clk"; 01b1ec sdmmc0_cmd = "/pinctrl/sdmmc0/sdmmc0-cmd"; 01b214 sdmmc0_det = "/pinctrl/sdmmc0/sdmmc0-det"; 01b23c sdmmc1_bus4 = "/pinctrl/sdmmc1/sdmmc1-bus4"; 01b264 sdmmc1_clk = "/pinctrl/sdmmc1/sdmmc1-clk"; 01b28c sdmmc1_cmd = "/pinctrl/sdmmc1/sdmmc1-cmd"; 01b2b4 spdifm0_tx = "/pinctrl/spdif/spdifm0-tx"; 01b2dc spi0m0_pins = "/pinctrl/spi0/spi0m0-pins"; 01b304 spi0m0_cs0 = "/pinctrl/spi0/spi0m0-cs0"; 01b32c spi0m0_cs1 = "/pinctrl/spi0/spi0m0-cs1"; 01b354 spi1m0_pins = "/pinctrl/spi1/spi1m0-pins"; 01b37c spi1m0_cs0 = "/pinctrl/spi1/spi1m0-cs0"; 01b3a4 spi1m0_cs1 = "/pinctrl/spi1/spi1m0-cs1"; 01b3cc spi2m0_pins = "/pinctrl/spi2/spi2m0-pins"; 01b3f4 spi2m0_cs0 = "/pinctrl/spi2/spi2m0-cs0"; 01b41c spi2m0_cs1 = "/pinctrl/spi2/spi2m0-cs1"; 01b444 spi3m0_pins = "/pinctrl/spi3/spi3m0-pins"; 01b46c spi3m0_cs0 = "/pinctrl/spi3/spi3m0-cs0"; 01b494 spi3m0_cs1 = "/pinctrl/spi3/spi3m0-cs1"; 01b4bc tsadc_shutorg = "/pinctrl/tsadc/tsadc-shutorg"; 01b4e8 uart0_xfer = "/pinctrl/uart0/uart0-xfer"; 01b510 uart1m0_xfer = "/pinctrl/uart1/uart1m0-xfer"; 01b538 uart1m0_ctsn = "/pinctrl/uart1/uart1m0-ctsn"; 01b560 uart1m0_rtsn = "/pinctrl/uart1/uart1m0-rtsn"; 01b588 uart2m0_xfer = "/pinctrl/uart2/uart2m0-xfer"; 01b5b0 uart3m0_xfer = "/pinctrl/uart3/uart3m0-xfer"; 01b5d8 uart4m0_xfer = "/pinctrl/uart4/uart4m0-xfer"; 01b600 uart5m0_xfer = "/pinctrl/uart5/uart5m0-xfer"; 01b628 uart6m0_xfer = "/pinctrl/uart6/uart6m0-xfer"; 01b650 uart7m2_xfer = "/pinctrl/uart7/uart7m2-xfer"; 01b678 uart8m0_xfer = "/pinctrl/uart8/uart8m0-xfer"; 01b6a0 uart9m0_xfer = "/pinctrl/uart9/uart9m0-xfer"; 01b6c8 spi0m0_pins_hs = "/pinctrl/spi0-hs/spi0m0-pins"; 01b6f4 spi1m0_pins_hs = "/pinctrl/spi1-hs/spi1m0-pins"; 01b720 spi2m0_pins_hs = "/pinctrl/spi2-hs/spi2m0-pins"; 01b74c spi3m0_pins_hs = "/pinctrl/spi3-hs/spi3m0-pins"; 01b778 gmac1m0_tx_bus2_level3 = "/pinctrl/gmac-txd-level3/gmac1m0-tx-bus2-level3"; 01b7b4 gmac1m0_rgmii_bus_level3 = "/pinctrl/gmac-txd-level3/gmac1m0-rgmii-bus-level3"; 01b7f4 gmac1m0_rgmii_clk_level2 = "/pinctrl/gmac-txc-level2/gmac1m0-rgmii-clk-level2"; 01b834 tsadc_gpio_func = "/pinctrl/gpio-func/tsadc-gpio-func"; 01b864 mxc6655xa_irq_gpio = "/pinctrl/mxc6655xa/mxc6655xa_irq_gpio"; 01b898 touch_gpio = "/pinctrl/touch/touch-gpio"; 01b8c0 wifi_enable_h = "/pinctrl/sdio-pwrseq/wifi-enable-h"; 01b8f0 vcc5v0_host_en = "/pinctrl/usb/vcc5v0-host-en"; 01b918 vcc5v0_otg_en = "/pinctrl/usb/vcc5v0-otg-en"; 01b940 uart8_gpios = "/pinctrl/wireless-bluetooth/uart8-gpios"; 01b974 uart1_gpios = "/pinctrl/wireless-bluetooth/uart1-gpios"; 01b9a8 hp_det = "/pinctrl/headphone/hp-det"; 01b9d0 lcd0_rst_gpio = "/pinctrl/lcd0/lcd-rst-gpio"; 01b9f8 lcd1_rst_gpio = "/pinctrl/lcd1/lcd1-rst-gpio"; 01ba20 wifi_host_wake_irq = "/pinctrl/wireless-wlan/wifi-host-wake-irq"; 01ba58 adc_keys = "/adc-keys"; 01ba70 audiopwmout_diff = "/audiopwmout-diff"; 01ba90 master = "/audiopwmout-diff/simple-audio-card,codec"; 01bac8 backlight = "/backlight"; 01bae0 backlight1 = "/backlight1"; 01baf8 dc_12v = "/dc-12v"; 01bb0c hdmi_sound = "/hdmi-sound"; 01bb24 leds = "/leds"; 01bb38 work_led = "/leds/work"; 01bb50 pdmics = "/dummy-codec"; 01bb6c pdm_mic_array = "/pdm-mic-array"; 01bb88 rk809_sound = "/rk809-sound"; 01bba4 spdif_out = "/spdif-out"; 01bbbc vad_sound = "/vad-sound"; 01bbd4 vcc3v3_sys = "/vcc3v3-sys"; 01bbec vcc5v0_sys = "/vcc5v0-sys"; 01bc04 vcc5v0_usb = "/vcc5v0-usb"; 01bc1c vcc5v0_host = "/vcc5v0-host-regulator"; 01bc40 vcc5v0_otg = "/vcc5v0-otg-regulator"; 01bc64 vcc3v3_lcd0_n = "/vcc3v3-lcd0-n"; 01bc80 vcc3v3_lcd1_n = "/vcc3v3-lcd1-n"; 01bc9c sdio_pwrseq = "/sdio-pwrseq"; 01bcb8 wireless_wlan = "/wireless-wlan"; 01bcd4 wireless_bluetooth = "/wireless-bluetooth"; 01bcf4 rk_headset = "/rk-headset"; 01bd0c vcc3v3_vga = "/vcc3v3-vga"; 01bd24 vcc_camera = "/vcc-camera-regulator"; 01bd48 chosen = "/chosen"; 01bd5c fiq_debugger = "/fiq-debugger"; 01bd78 debug = "/debug@fd904000"; 01bd94 cspmu = "/cspmu@fd90c000"; 01bdb0 } 01bdb4 } 01bdb8 End 01bdbc Strings 01ecaf Boot TTL LOG Quote DDR Version V1.11 20211103 ln ddrconfig:7 LPDDR4X, 324MHz BW=32 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=4096MB tdqss: cs0 dqs0: -48ps, dqs1: -168ps, dqs2: -120ps, dqs3: -217ps, tdqss: cs1 dqs0: -48ps, dqs1: -168ps, dqs2: -96ps, dqs3: -217ps, change to: 324MHz PHY drv:clk:36,ca:36,DQ:29,odt:0 vrefinner:41%, vrefout:41% dram drv:40,odt:0 clk skew:0x65 change to: 528MHz PHY drv:clk:36,ca:36,DQ:29,odt:0 vrefinner:41%, vrefout:41% dram drv:40,odt:0 clk skew:0x58 change to: 780MHz PHY drv:clk:36,ca:36,DQ:29,odt:0 vrefinner:41%, vrefout:41% dram drv:40,odt:0 clk skew:0x58 change to: 1056MHz(final freq) PHY drv:clk:36,ca:36,DQ:29,odt:60 vrefinner:16%, vrefout:22% dram drv:40,odt:80 vref_ca:00000071 clk skew:0x43 cs 0: the read training result: DQS0:0x40, DQS1:0x36, DQS2:0x3f, DQS3:0x3e, min :0x11 0x11 0x13 0xe 0x2 0x3 0x5 0x8 , 0x2 0x3 0x1 0x1 0x5 0x7 0xa 0x7 , 0xf 0xe 0xd 0xb 0x1 0x1 0x2 0x5 , 0xb 0x7 0x6 0x1 0xe 0xd 0xf 0xd , mid :0x2f 0x2f 0x30 0x2d 0x21 0x20 0x24 0x26 ,0x20 0x20 0x20 0x1f 0x23 0x26 0x28 0x24 , 0x2e 0x2d 0x2c 0x2b 0x20 0x21 0x22 0x24 ,0x2b 0x27 0x25 0x21 0x2e 0x2c 0x2e 0x2c , max :0x4d 0x4e 0x4d 0x4d 0x40 0x3d 0x44 0x45 ,0x3e 0x3e 0x40 0x3d 0x42 0x45 0x47 0x42 , 0x4d 0x4d 0x4b 0x4b 0x40 0x42 0x42 0x44 ,0x4b 0x47 0x45 0x41 0x4e 0x4b 0x4e 0x4b , range:0x3c 0x3d 0x3a 0x3f 0x3e 0x3a 0x3f 0x3d ,0x3c 0x3b 0x3f 0x3c 0x3d 0x3e 0x3d 0x3b , 0x3e 0x3f 0x3e 0x40 0x3f 0x41 0x40 0x3f ,0x40 0x40 0x3f 0x40 0x40 0x3e 0x3f 0x3e , the write training result: DQS0:0x3d, DQS1:0x2d, DQS2:0x33, DQS3:0x26, min :0x5f 0x64 0x63 0x62 0x53 0x53 0x58 0x5c 0x5c ,0x4d 0x4e 0x4d 0x4c 0x51 0x53 0x55 0x55 0x4f , 0x57 0x57 0x54 0x55 0x4b 0x4c 0x4c 0x52 0x50 ,0x49 0x47 0x44 0x3f 0x4c 0x4b 0x4c 0x4c 0x49 , mid :0x7c 0x80 0x80 0x7e 0x70 0x71 0x75 0x78 0x78 ,0x6a 0x6a 0x68 0x67 0x6e 0x6e 0x70 0x70 0x6b , 0x74 0x73 0x70 0x71 0x67 0x67 0x67 0x6d 0x6c ,0x65 0x63 0x5f 0x5b 0x68 0x67 0x66 0x68 0x64 , max :0x99 0x9d 0x9d 0x9b 0x8e 0x8f 0x92 0x94 0x94 ,0x88 0x87 0x84 0x83 0x8b 0x8a 0x8b 0x8b 0x88 , 0x91 0x90 0x8c 0x8e 0x83 0x82 0x83 0x88 0x88 ,0x82 0x80 0x7b 0x78 0x84 0x83 0x81 0x84 0x80 , range:0x3a 0x39 0x3a 0x39 0x3b 0x3c 0x3a 0x38 0x38 ,0x3b 0x39 0x37 0x37 0x3a 0x37 0x36 0x36 0x39 , 0x3a 0x39 0x38 0x39 0x38 0x36 0x37 0x36 0x38 ,0x39 0x39 0x37 0x39 0x38 0x38 0x35 0x38 0x37 , cs 1: the read training result: DQS0:0x41, DQS1:0x39, DQS2:0x3f, DQS3:0x3e, min :0x11 0x11 0x13 0xf 0x1 0x3 0x7 0x9 , 0x3 0x4 0x1 0x1 0x7 0x9 0xb 0x8 , 0x10 0xf 0xe 0xb 0x2 0x1 0x3 0x6 , 0xc 0x8 0x6 0x1 0xd 0xd 0xf 0xd , mid :0x2f 0x31 0x31 0x2e 0x21 0x21 0x26 0x27 ,0x22 0x23 0x21 0x21 0x26 0x29 0x2a 0x27 , 0x2e 0x2e 0x2c 0x2a 0x21 0x21 0x23 0x24 ,0x2c 0x27 0x25 0x21 0x2d 0x2c 0x2e 0x2b , max :0x4d 0x51 0x4f 0x4e 0x41 0x40 0x46 0x46 ,0x42 0x43 0x42 0x41 0x46 0x49 0x4a 0x46 , 0x4d 0x4d 0x4a 0x4a 0x41 0x42 0x43 0x43 ,0x4c 0x47 0x45 0x41 0x4d 0x4c 0x4e 0x4a , range:0x3c 0x40 0x3c 0x3f 0x40 0x3d 0x3f 0x3d ,0x3f 0x3f 0x41 0x40 0x3f 0x40 0x3f 0x3e , 0x3d 0x3e 0x3c 0x3f 0x3f 0x41 0x40 0x3d ,0x40 0x3f 0x3f 0x40 0x40 0x3f 0x3f 0x3d , the write training result: DQS0:0x3d, DQS1:0x2d, DQS2:0x33, DQS3:0x26, min :0x5f 0x63 0x63 0x62 0x53 0x53 0x57 0x5c 0x5c ,0x4e 0x4d 0x4c 0x4c 0x50 0x52 0x56 0x55 0x4f , 0x5a 0x5a 0x57 0x58 0x4e 0x4f 0x50 0x55 0x53 ,0x49 0x46 0x43 0x3d 0x4d 0x4a 0x4c 0x4c 0x49 , mid :0x7c 0x7f 0x7f 0x7d 0x70 0x70 0x74 0x78 0x77 ,0x6b 0x6a 0x68 0x67 0x6d 0x6e 0x70 0x6f 0x6b , 0x78 0x77 0x74 0x75 0x6b 0x6a 0x6c 0x70 0x6e ,0x65 0x61 0x5f 0x5a 0x68 0x67 0x67 0x68 0x65 , max :0x99 0x9c 0x9c 0x99 0x8d 0x8e 0x92 0x94 0x92 ,0x88 0x87 0x84 0x83 0x8b 0x8a 0x8a 0x89 0x88 , 0x96 0x94 0x91 0x92 0x89 0x86 0x88 0x8c 0x8a ,0x81 0x7d 0x7b 0x78 0x84 0x84 0x82 0x84 0x82 , range:0x3a 0x39 0x39 0x37 0x3a 0x3b 0x3b 0x38 0x36 ,0x3a 0x3a 0x38 0x37 0x3b 0x38 0x34 0x34 0x39 , 0x3c 0x3a 0x3a 0x3a 0x3b 0x37 0x38 0x37 0x37 ,0x38 0x37 0x38 0x3b 0x37 0x3a 0x36 0x38 0x39 , CA Training result: cs:0 min :0x54 0x4a 0x4e 0x40 0x4d 0x3f 0x4b ,0x4e 0x41 0x4a 0x3c 0x4c 0x39 0x4e , cs:0 mid :0x8c 0x8e 0x86 0x85 0x85 0x84 0x77 ,0x87 0x86 0x82 0x82 0x83 0x7f 0x78 , cs:0 max :0xc4 0xd3 0xbe 0xcb 0xbe 0xc9 0xa3 ,0xc0 0xcb 0xba 0xc8 0xba 0xc5 0xa3 , cs:0 range:0x70 0x89 0x70 0x8b 0x71 0x8a 0x58 ,0x72 0x8a 0x70 0x8c 0x6e 0x8c 0x55 , cs:1 min :0x50 0x4a 0x49 0x45 0x49 0x42 0x4a ,0x4a 0x45 0x46 0x3f 0x48 0x3c 0x4a , cs:1 mid :0x8c 0x8c 0x86 0x86 0x84 0x84 0x76 ,0x86 0x85 0x81 0x81 0x82 0x7d 0x76 , cs:1 max :0xc8 0xcf 0xc3 0xc8 0xbf 0xc6 0xa3 ,0xc3 0xc5 0xbd 0xc3 0xbd 0xbe 0xa3 , cs:1 range:0x78 0x85 0x7a 0x83 0x76 0x84 0x59 ,0x79 0x80 0x77 0x84 0x75 0x82 0x59 , out U-Boot SPL board init U-Boot SPL 2017.09-ga1f6fc00a0-210413 #ldq (Apr 13 2021 - 11:35:00) unknown raw ID phN unrecognized JEDEC id bytes: 00, 00, 00 Trying to boot from MMC2 MMC error: The cmd index is 1, ret is -110 Card did not respond to voltage select! mmc_init: -95, time 10 spl: mmc init failed with error: -95 Trying to boot from MMC1 SPL: A/B-slot: _a, successful: 0, tries-remain: 7 ## Verified-boot: 0 ## Checking atf-1 0x00040000 ... sha256+ OK ## Checking uboot 0x00a00000 ... sha256+ OK ## Checking fdt 0x00b3bb50 ... sha256+ OK ## Checking atf-2 0xfdcc9000 ... sha256+ OK ## Checking atf-3 0xfdcd0000 ... sha256+ OK ## Checking optee 0x08400000 ... sha256+ OK Jumping to U-Boot(0x00a00000) via ARM Trusted Firmware(0x00040000) Total: 217.566 ms INFO: Preloader serial: 2 NOTICE: BL31: v2.3():v2.3-152-g4e725b15f:cl NOTICE: BL31: Built : 10:51:13, Jul 15 2021 INFO: GICv3 without legacy support detected. INFO: ARM GICv3 driver initialized in EL3 INFO: pmu v1 is valid INFO: dfs DDR fsp_param[0].freq_mhz= 1056MHz INFO: dfs DDR fsp_param[1].freq_mhz= 324MHz INFO: dfs DDR fsp_param[2].freq_mhz= 528MHz INFO: dfs DDR fsp_param[3].freq_mhz= 780MHz INFO: Using opteed sec cpu_context! INFO: boot cpu mask: 0 INFO: BL31: Initializing runtime services INFO: BL31: Initializing BL32 I/TC: I/TC: Start rockchip platform init I/TC: Rockchip release version: 1.0 I/TC: OP-TEE version: 3.6.0-307-g0b06ae94 #1 Fri May 7 01:52:27 UTC 2021 aarch64 I/TC: Initialized INFO: BL31: Preparing for EL3 exit to normal world INFO: Entry point address = 0xa00000 INFO: SPSR = 0x3c9 U-Boot 2017.09 #qmx_srv (Mar 20 2023 - 17:46:24 +0800) Model: Rockchip RK3568 Evaluation Board PreSerial: 2, raw, 0xfe660000 DRAM: 4 GiB Sysmem: init Relocation Offset: ed23d000 Relocation fdt: eb9f8820 - eb9fecd0 CR: M/C/I Using default environment dwmmc@fe2b0000: 1, dwmmc@fe2c0000: 2, sdhci@fe310000: 0 Bootdev(atags): mmc 0 MMC0: HS200, 200Mhz PartType: EFI DM: v1 boot mode: normal FIT: no signed, no conf required DTB: rk-kernel.dtb HASH(c): OK I2c0 speed: 100000Hz PMIC: RK8090 (on=0x40, off=0x00) vdd_logic init 900000 uV vdd_gpu init 900000 uV vdd_npu init 900000 uV vsel-gpios- not found! Error: -2 vdd_cpu init 900000 uV io-domain: OK dmc_fsp failed, ret=-19 Warn: can't find connect driver Warn: can't get connect driver Could not find baseparameter partition Model: Rockchip RK3566 EVB3 DDR3 V10 Board Rockchip UBOOT DRM driver version: v1.0.1 VOP have 2 active VP vp0 have layer nr:3[0 2 4 ], primary plane: 4 vp1 have layer nr:3[1 3 5 ], primary plane: 5 vp2 have layer nr:0[], primary plane: 0 xfer: num: 2, addr: 0x50 xfer: num: 2, addr: 0x50 Monitor has basic audio support Could not find baseparameter partition mode:3840x2160 hdmi@fe0a0000: detailed mode clock 297000 kHz, flags[5] H: 3840 4016 4104 4400 V: 2160 2168 2178 2250 bus_format: 2025 VOP update mode to: 3840x2160p30, type: HDMI0 for VP0 VP0 set crtc_clock to 297000KHz VOP VP0 enable Smart0[654x270->654x270@1593x945] fmt[2] addr[0xedf04000] CEA mode used vic=95 final pixclk = 297000000 tmdsclk = 297000000 PHY powered down in 0 iterations PHY PLL locked 1 iterations PHY powered down in 0 iterations PHY PLL locked 1 iterations sink has audio support hdmi_set_clk_regenerator: fs=48000Hz ftdms=297.000MHz N=5120 cts=247500 CLK: (sync kernel. arm: enter 816000 KHz, init 816000 KHz, kernel 0N/A) apll 1416000 KHz dpll 528000 KHz gpll 1188000 KHz cpll 1000000 KHz npll 1200000 KHz vpll 24000 KHz hpll 297000 KHz ppll 200000 KHz armclk 1416000 KHz aclk_bus 150000 KHz pclk_bus 100000 KHz aclk_top_high 500000 KHz aclk_top_low 400000 KHz hclk_top 150000 KHz pclk_top 100000 KHz aclk_perimid 300000 KHz hclk_perimid 150000 KHz pclk_pmu 100000 KHz Net: eth1: ethernet@fe010000 Hit key to stop autoboot('CTRL+C'): 0 ANDROID: reboot reason: "(none)" optee api revision: 2.0 TEEC: Waring: Could not find security partition Not AVB images, AVB skip No valid android hdr Android image load failed Android boot failed, error -1. ## Booting FIT Image at 0xea21e800 with size 0x015d9000 Fdt Ramdisk skip relocation ## Loading kernel from FIT Image at ea21e800 ... Using 'conf' configuration ## Verified-boot: 0 Trying 'kernel' kernel subimage Description: unavailable Type: Kernel Image Compression: uncompressed Data Start: 0xea23d600 Data Size: 22781960 Bytes = 21.7 MiB Architecture: AArch64 OS: Linux Load Address: 0x00280000 Entry Point: 0x00280000 Hash algo: sha256 Hash value: 12d957b26e72c7e3ab747dc2a52433b0eb4e5a71feb69df72db121498da267bd Verifying Hash Integrity ... sha256+ OK ## Loading fdt from FIT Image at ea21e800 ... Using 'conf' configuration Trying 'fdt' fdt subimage Description: unavailable Type: Flat Device Tree Compression: uncompressed Data Start: 0xea21f000 Data Size: 124079 Bytes = 121.2 KiB Architecture: AArch64 Load Address: 0x08300000 Hash algo: sha256 Hash value: 7d0a9eea7126526a3863e2662c9221d015a74dc44844168581a72d421e7c9f31 Verifying Hash Integrity ... sha256+ OK Loading fdt from 0x08300000 to 0x08300000 Booting using the fdt blob at 0x08300000 Loading Kernel Image from 0xea23d600 to 0x00280000 ... OK kernel loaded at 0x00280000, end = 0x0183a008 'reserved-memory' ramoops@110000: addr=110000 size=f0000 Using Device Tree in place at 0000000008300000, end 00000000083214ae vp0, plane_mask:0x15, primary-id:4, curser-id:-1 vp1, plane_mask:0x2a, primary-id:5, curser-id:-1 vp2, plane_mask:0x0, primary-id:0, curser-id:-1 Adding bank: 0x00200000 - 0x08400000 (size: 0x08200000) Adding bank: 0x09400000 - 0xf0000000 (size: 0xe6c00000) Adding bank: 0x1f0000000 - 0x200000000 (size: 0x10000000) Total: 898.753 ms Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x412fd050] [ 0.000000] Linux version 4.19.193 (qmx_srv@qmxsrv-MS-7C09) (gcc version 6.3.1 20170404 (Linaro GCC 6.3-2017.05), GNU ld (Linaro_Binutils-2017.05) 2.27.0.20161019) #24 SMP Thu Mar 2 10:16:53 CST 2023 [ 0.000000] Machine model: Rockchip RK3566 EVB3 DDR3 V10 Board [ 0.000000] earlycon: uart8250 at MMIO32 0x00000000fe660000 (options '') [ 0.000000] bootconsole [uart8250] enabled [ 0.000000] cma: Reserved 16 MiB at 0x00000000eec00000 [ 0.000000] psci: probing for conduit method from DT. [ 0.000000] psci: PSCIv1.1 detected in firmware. [ 0.000000] psci: Using standard PSCI v0.2 function IDs [ 0.000000] psci: Trusted OS migration not required [ 0.000000] psci: SMC Calling Convention v1.2 [ 0.000000] percpu: Embedded 23 pages/cpu s54312 r8192 d31704 u94208 [ 0.000000] Detected VIPT I-cache on CPU0 [ 0.000000] CPU features: detected: Virtualization Host Extensions [ 0.000000] CPU features: detected: Speculative Store Bypassing Safe (SSBS) [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1027656 [ 0.000000] Kernel command line: storagemedia=emmc androidboot.storagemedia=emmc androidboot.mode=normal androidboot.verifiedbootstate=orange rw rootwait earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 [ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes) [ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes) [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off [ 0.000000] software IO TLB: mapped [mem 0xe9f00000-0xedf00000] (64MB) [ 0.000000] Memory: 3978812K/4175872K available (13694K kernel code, 2024K rwdata, 4860K rodata, 1600K init, 1810K bss, 180676K reserved, 16384K cma-reserved) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 [ 0.000000] ftrace: allocating 50172 entries in 196 pages [ 0.000000] rcu: Hierarchical RCU implementation. [ 0.000000] rcu: RCU event tracing is enabled. [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=4. [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4 [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0 [ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode [ 0.000000] GICv3: Distributor has no Range Selector support [ 0.000000] GICv3: no VLPI support, no direct LPI support [ 0.000000] ITS [mem 0xfd440000-0xfd45ffff] [ 0.000000] ITS@0x00000000fd440000: allocated 8192 Devices @210000 (indirect, esz 8, psz 64K, shr 0) [ 0.000000] ITS@0x00000000fd440000: allocated 32768 Interrupt Collections @220000 (flat, esz 2, psz 64K, shr 0) [ 0.000000] ITS: using cache flushing for cmd queue [ 0.000000] GIC: using LPI property table @0x0000000000230000 [ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x00000000fd460000 [ 0.000000] CPU0: using LPI pending table @0x0000000000240000 [ 0.000000] GIC: using cache flushing for LPI property table [ 0.000000] random: random: get_random_bytes called from start_kernel+0x36c/0x510 with crng_init=0 [ 0.000000] arch_timer: cp15 timer(s) running at 24.00MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x588fe9dc0, max_idle_ns: 440795202592 ns [ 0.000004] sched_clock: 56 bits at 24MHz, resolution 41ns, wraps every 4398046511097ns [ 0.001672] Console: colour dummy device 80x25 [ 0.002113] Calibrating delay loop (skipped), value calculated using timer frequency.. 48.00 BogoMIPS (lpj=80000) [ 0.003056] pid_max: default: 32768 minimum: 301 [ 0.003583] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes) [ 0.004208] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes) [ 0.006028] ASID allocator initialised with 32768 entries [ 0.006624] rcu: Hierarchical SRCU implementation. [ 0.008989] Platform MSI: interrupt-controller@fd440000 domain created [ 0.009922] PCI/MSI: /interrupt-controller@fd400000/interrupt-controller@fd440000 domain created [ 0.011266] smp: Bringing up secondary CPUs ... [ 0.012251] Detected VIPT I-cache on CPU1 [ 0.012282] GICv3: CPU1: found redistributor 100 region 0:0x00000000fd480000 [ 0.012321] CPU1: using LPI pending table @0x0000000000250000 [ 0.012366] CPU1: Booted secondary processor 0x0000000100 [0x412fd050] [ 0.012932] Detected VIPT I-cache on CPU2 [ 0.012955] GICv3: CPU2: found redistributor 200 region 0:0x00000000fd4a0000 [ 0.012989] CPU2: using LPI pending table @0x0000000000260000 [ 0.013022] CPU2: Booted secondary processor 0x0000000200 [0x412fd050] [ 0.013554] Detected VIPT I-cache on CPU3 [ 0.013575] GICv3: CPU3: found redistributor 300 region 0:0x00000000fd4c0000 [ 0.013608] CPU3: using LPI pending table @0x0000000000270000 [ 0.013639] CPU3: Booted secondary processor 0x0000000300 [0x412fd050] [ 0.013721] smp: Brought up 1 node, 4 CPUs [ 0.020514] SMP: Total of 4 processors activated. [ 0.020947] CPU features: detected: GIC system register CPU interface [ 0.021535] CPU features: detected: Privileged Access Never [ 0.022047] CPU features: detected: LSE atomic instructions [ 0.022568] CPU features: detected: User Access Override [ 0.023058] CPU features: detected: 32-bit EL0 Support [ 0.023529] CPU features: detected: RAS Extension Support [ 0.024145] CPU: All CPU(s) started at EL2 [ 0.024537] alternatives: patching kernel code [ 0.029694] devtmpfs: initialized [ 0.045348] Registered cp15_barrier emulation handler [ 0.045863] Registered setend emulation handler [ 0.046505] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 6370867519511994 ns [ 0.047410] futex hash table entries: 1024 (order: 4, 65536 bytes) [ 0.048463] pinctrl core: initialized pinctrl subsystem [ 0.049719] NET: Registered protocol family 16 [ 0.052861] cpuidle: using governor menu [ 0.053251] Registered FIQ tty driver [ 0.053946] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers. [ 0.055359] DMA: preallocated 256 KiB pool for atomic allocations [ 0.059571] console [pstore-1] enabled [ 0.059921] pstore: Registered ramoops as persistent store backend [ 0.060492] ramoops: attached 0xf0000@0x110000, ecc: 0/0 [ 0.082726] rockchip-gpio fdd60000.gpio: probed gpio0 (fdd60000.gpio) [ 0.083791] rockchip-gpio fe740000.gpio: probed gpio1 (fe740000.gpio) [ 0.084788] rockchip-gpio fe750000.gpio: probed gpio2 (fe750000.gpio) [ 0.085787] rockchip-gpio fe760000.gpio: probed gpio3 (fe760000.gpio) [ 0.086787] rockchip-gpio fe770000.gpio: probed gpio4 (fe770000.gpio) [ 0.087451] rockchip-pinctrl pinctrl: probed pinctrl [ 0.096753] cryptd: max_cpu_qlen set to 1000 [[ 0.098466] console [ttyFIQ0] enabled 0.098466] console [ttyFIQ0] enabled [ 0.099157] bootconsole [ 0.099157] bootconsole [uart8250] disabled [uart8250] disabled [ 0.100076] Registered fiq debugger ttyFIQ0 [ 0.100873] vcc3v3_sys: supplied by dc_12v [ 0.101155] vcc5v0_sys: supplied by dc_12v [ 0.101434] vcc5v0_usb: supplied by dc_12v [ 0.101835] vcc5v0_host: supplied by vcc5v0_usb [ 0.102177] vcc5v0_otg: supplied by vcc5v0_usb [ 0.102479] vcc3v3_lcd0_n: supplied by vcc3v3_sys [ 0.102817] vcc3v3_lcd1_n: supplied by vcc3v3_sys [ 0.103922] rk_iommu fde4b000.iommu: version = 2 [ 0.104366] rk_iommu fdea0800.iommu: version = 2 [ 0.104767] rk_iommu fded0480.iommu: version = 2 [ 0.105116] rk_iommu fdee0800.iommu: version = 2 [ 0.105411] rk_iommu fdef0800.iommu: version = 2 [ 0.105692] rk_iommu fdf40f00.iommu: version = 2 [ 0.106076] rk_iommu fdf80800.iommu: version = 2 [ 0.106383] rk_iommu fdff1a00.iommu: version = 2 [ 0.106587] rk_iommu fe043e00.iommu: version = 2 [ 0.107274] SCSI subsystem initialized [ 0.107492] usbcore: registered new interface driver usbfs [ 0.107547] usbcore: registered new interface driver hub [ 0.107594] usbcore: registered new device driver usb [ 0.107674] media: Linux media interface: v0.10 [ 0.107719] videodev: Linux video capture interface: v2.00 [ 0.107789] pps_core: LinuxPPS API ver. 1 registered [ 0.107804] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it> [ 0.107829] PTP clock support registered [ 0.108091] arm-scmi firmware:scmi: SCMI Protocol v2.0 'rockchip:' Firmware version 0x0 [ 0.109977] Advanced Linux Sound Architecture Driver Initialized. [ 0.110383] Bluetooth: Core ver 2.22 [ 0.110429] NET: Registered protocol family 31 [ 0.110444] Bluetooth: HCI device and connection manager initialized [ 0.110462] Bluetooth: HCI socket layer initialized [ 0.110478] Bluetooth: L2CAP socket layer initialized [ 0.110513] Bluetooth: SCO socket layer initialized [ 0.110907] rockchip-cpuinfo cpuinfo: SoC : 35662000 [ 0.110925] rockchip-cpuinfo cpuinfo: Serial : baedc7b8eb5ab5fa [ 0.111680] clocksource: Switched to clocksource arch_sys_counter [ 0.173276] thermal thermal_zone1: power_allocator: sustainable_power will be estimated [ 0.173578] NET: Registered protocol family 2 [ 0.174071] tcp_listen_portaddr_hash hash table entries: 2048 (order: 4, 81920 bytes) [ 0.174154] TCP established hash table entries: 32768 (order: 6, 262144 bytes) [ 0.174345] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes) [ 0.175162] TCP: Hash tables configured (established 32768 bind 32768) [ 0.175291] UDP hash table entries: 2048 (order: 5, 196608 bytes) [ 0.175468] UDP-Lite hash table entries: 2048 (order: 5, 196608 bytes) [ 0.175767] NET: Registered protocol family 1 [ 0.176214] RPC: Registered named UNIX socket transport module. [ 0.176231] RPC: Registered udp transport module. [ 0.176244] RPC: Registered tcp transport module. [ 0.176255] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.178189] hw perfevents: enabled with armv8_pmuv3 PMU driver, 7 counters available [ 0.179837] Initialise system trusted keyrings [ 0.180007] workingset: timestamp_bits=61 max_order=20 bucket_order=0 [ 0.185042] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.185696] NFS: Registering the id_resolver key type [ 0.185734] Key type id_resolver registered [ 0.185748] Key type id_legacy registered [ 0.185782] ntfs: driver 2.1.32 [Flags: R/O]. [ 0.186011] jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc. [ 0.186190] fuse init (API version 7.27) [ 0.186496] SGI XFS with security attributes, no debug enabled [ 0.188517] NET: Registered protocol family 38 [ 0.188551] Key type asymmetric registered [ 0.188565] Asymmetric key parser 'x509' registered [ 0.188610] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243) [ 0.188626] io scheduler noop registered [ 0.188639] io scheduler deadline registered [ 0.188738] io scheduler cfq registered (default) [ 0.188756] io scheduler mq-deadline registered [ 0.188769] io scheduler kyber registered [ 0.189632] rockchip-csi2-dphy csi2-dphy0: csi2 dphy0 probe successfully! [ 0.189776] rockchip-csi2-dphy-hw fe870000.csi2-dphy-hw: csi2 dphy hw probe successfully! [ 0.191399] phy phy-fe8a0000.usb2-phy.0: Linked as a consumer to regulator.5 [ 0.191636] phy phy-fe8a0000.usb2-phy.1: Linked as a consumer to regulator.6 [ 0.192830] extcon extcon1: failed to create extcon usb2-phy link [ 0.192947] phy phy-fe8b0000.usb2-phy.2: Linked as a consumer to regulator.5 [ 0.193081] phy phy-fe8b0000.usb2-phy.3: Linked as a consumer to regulator.5 [ 0.193187] phy phy-fe8b0000.usb2-phy.3: No vbus specified for otg port [ 0.199669] pwm-backlight backlight: backlight supply power not found, using dummy regulator [ 0.199761] pwm-backlight backlight: Linked as a consumer to regulator.0 [ 0.199952] pwm-backlight backlight1: backlight1 supply power not found, using dummy regulator [ 0.200015] pwm-backlight backlight1: Linked as a consumer to regulator.0 [ 0.200217] mpp_service mpp-srv: eccf16e83556 author: Finley Xiao 2021-07-05 soc: rockchip: opp_select: Export rockchip_nvmem_cell_read_u8/u16() [ 0.200228] mpp_service mpp-srv: probe start [ 0.201006] iommu: Adding device fdf40000.rkvenc to group 5 [ 0.201044] mpp_rkvenc fdf40000.rkvenc: Linked as a consumer to fdf40f00.iommu [ 0.201230] mpp_rkvenc fdf40000.rkvenc: probing start [ 0.201654] mpp_rkvenc fdf40000.rkvenc: venc regulator not ready, retry [ 0.201700] rkvenc_init:1196: failed to add venc devfreq [ 0.202866] iommu: Adding device fdea0400.vdpu to group 1 [ 0.202902] mpp_vdpu2 fdea0400.vdpu: Linked as a consumer to fdea0800.iommu [ 0.203055] mpp_vdpu2 fdea0400.vdpu: probe device [ 0.203559] mpp_vdpu2 fdea0400.vdpu: probing finish [ 0.204017] iommu: Adding device fdee0000.vepu to group 3 [ 0.204051] mpp_vepu2 fdee0000.vepu: Linked as a consumer to fdee0800.iommu [ 0.204221] mpp_vepu2 fdee0000.vepu: probe device [ 0.204678] mpp_vepu2 fdee0000.vepu: probing finish [ 0.205167] iommu: Adding device fdef0000.iep to group 4 [ 0.205208] mpp-iep2 fdef0000.iep: Linked as a consumer to fdef0800.iommu [ 0.205334] mpp-iep2 fdef0000.iep: probe device [ 0.205738] mpp-iep2 fdef0000.iep: allocate roi buffer failed [ 0.205897] mpp-iep2 fdef0000.iep: probing finish [ 0.206385] iommu: Adding device fded0000.jpegd to group 2 [ 0.206418] mpp_jpgdec fded0000.jpegd: Linked as a consumer to fded0480.iommu [ 0.206544] mpp_jpgdec fded0000.jpegd: probe device [ 0.206990] mpp_jpgdec fded0000.jpegd: probing finish [ 0.207463] iommu: Adding device fdf80200.rkvdec to group 6 [ 0.207495] mpp_rkvdec2 fdf80200.rkvdec: Linked as a consumer to fdf80800.iommu [ 0.207703] mpp_rkvdec2 fdf80200.rkvdec: probing start [ 0.208102] mpp_rkvdec2 fdf80200.rkvdec: shared_niu_a is not found! [ 0.208120] rkvdec2_init:875: No niu aclk reset resource define [ 0.208136] mpp_rkvdec2 fdf80200.rkvdec: shared_niu_h is not found! [ 0.208148] rkvdec2_init:878: No niu hclk reset resource define [ 0.208449] mpp_rkvdec2 fdf80200.rkvdec: sram_start 0x00000000fdcc0000 [ 0.208468] mpp_rkvdec2 fdf80200.rkvdec: rcb_iova 0x0000000010000000 [ 0.208477] mpp_rkvdec2 fdf80200.rkvdec: sram_size 45056 [ 0.208484] mpp_rkvdec2 fdf80200.rkvdec: rcb_size 65536 [ 0.208495] mpp_rkvdec2 fdf80200.rkvdec: min_width 512 [ 0.208520] mpp_rkvdec2 fdf80200.rkvdec: probing finish [ 0.208830] mpp_service mpp-srv: probe success [ 0.214524] dma-pl330 fe530000.dmac: Loaded driver for PL330 DMAC-241330 [ 0.214554] dma-pl330 fe530000.dmac: DBUFF-128x8bytes Num_Chans-8 Num_Peri-32 Num_Events-16 [ 0.216392] dma-pl330 fe550000.dmac: Loaded driver for PL330 DMAC-241330 [ 0.216408] dma-pl330 fe550000.dmac: DBUFF-128x8bytes Num_Chans-8 Num_Peri-32 Num_Events-16 [ 0.217955] rockchip-system-monitor rockchip-system-monitor: system monitor probe [ 0.218931] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled [ 0.219714] fe650000.serial: ttyS1 at MMIO 0xfe650000 (irq = 55, base_baud = 1500000) is a 16550A [ 0.220171] fe6b0000.serial: ttyS7 at MMIO 0xfe6b0000 (irq = 56, base_baud = 1500000) is a 16550A [ 0.222447] random: fast init done [ 0.222738] random: crng init done [ 0.223080] iommu: Adding device fe040000.vop to group 8 [ 0.223119] rockchip-vop2 fe040000.vop: Linked as a consumer to fe043e00.iommu [ 0.227301] rockchip-drm display-subsystem: Linked as a consumer to fe040000.vop [ 0.227819] rockchip-drm display-subsystem: Linked as a consumer to fe0c0000.edp [ 0.228261] rockchip-drm display-subsystem: Linked as a consumer to fe0a0000.hdmi [ 0.229726] rockchip-drm display-subsystem: dmc is disabled [ 0.229988] rockchip-vop2 fe040000.vop: [drm:vop2_bind] vp0 assign plane mask: 0x15, primary plane phy id: 4 [ 0.230013] rockchip-vop2 fe040000.vop: [drm:vop2_bind] vp1 assign plane mask: 0x2a, primary plane phy id: 5 [ 0.230033] rockchip-vop2 fe040000.vop: [drm:vop2_bind] vp2 assign plane mask: 0x0, primary plane phy id: -1 [ 0.230233] [drm] unsupported AFBC format[3432564e] [ 0.230286] [drm] failed to init overlay plane Cluster0-win1 [ 0.230340] [drm] failed to init overlay plane Cluster1-win1 [ 0.230471] rockchip-drm display-subsystem: bound fe040000.vop (ops 0xffffff8008ebf7d8) [ 0.231346] rockchip-drm display-subsystem: bound fe0c0000.edp (ops 0xffffff8008ec2888) [ 0.231542] dwhdmi-rockchip fe0a0000.hdmi: Detected HDMI TX controller v2.11a with HDCP (DWC HDMI 2.0 TX PHY) [ 0.232024] dwhdmi-rockchip fe0a0000.hdmi: registered DesignWare HDMI I2C bus driver [ 0.232626] rockchip-drm display-subsystem: bound fe0a0000.hdmi (ops 0xffffff8008ec32e0) [ 0.232656] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 0.232670] [drm] No driver support for vblank timestamp query. [ 0.232854] get_framebuffer_by_node: failed to get logo,offset [ 0.711283] rockchip-drm display-subsystem: fb0: frame buffer device [ 0.712168] [drm] Initialized rockchip 2.0.0 20140818 for display-subsystem on minor 0 [ 0.717372] mali fde60000.gpu: Kernel DDK version g2p0-01eac0 [ 0.717479] mali fde60000.gpu: Power management initialization failed error = -517 [ 0.717507] mali fde60000.gpu: Device initialization Deferred [ 0.717879] cacheinfo: Unable to detect cache hierarchy for CPU 0 [ 0.718525] brd: module loaded [ 0.724223] loop: module loaded [ 0.724584] zram: Added device: zram0 [ 0.724699] lkdtm: No crash points registered, enable through debugfs [ 0.728401] libphy: Fixed MDIO Bus: probed [ 0.728453] tun: Universal TUN/TAP device driver, 1.6 [ 0.729931] rk_gmac-dwmac fe010000.ethernet: no regulator found [ 0.729955] rk_gmac-dwmac fe010000.ethernet: clock input or output? (output). [ 0.729966] rk_gmac-dwmac fe010000.ethernet: TX delay(0x41). [ 0.729975] rk_gmac-dwmac fe010000.ethernet: RX delay(0x2e). [ 0.729988] rk_gmac-dwmac fe010000.ethernet: integrated PHY? (no). [ 0.735037] rk_gmac-dwmac fe010000.ethernet: init for RGMII [ 0.735272] rk_gmac-dwmac fe010000.ethernet: User ID: 0x30, Synopsys ID: 0x51 [ 0.735289] rk_gmac-dwmac fe010000.ethernet: DWMAC4/5 [ 0.735305] rk_gmac-dwmac fe010000.ethernet: DMA HW capability register supported [ 0.735316] rk_gmac-dwmac fe010000.ethernet: RX Checksum Offload Engine supported [ 0.735328] rk_gmac-dwmac fe010000.ethernet: TX Checksum insertion supported [ 0.735340] rk_gmac-dwmac fe010000.ethernet: Wake-Up On Lan supported [ 0.735378] rk_gmac-dwmac fe010000.ethernet: TSO supported [ 0.735392] rk_gmac-dwmac fe010000.ethernet: Enable RX Mitigation via HW Watchdog Timer [ 0.735407] rk_gmac-dwmac fe010000.ethernet: TSO feature enabled [ 0.868366] libphy: stmmac: probed [ 0.870545] usbcore: registered new interface driver rndis_wlan [ 0.870612] usbcore: registered new interface driver rtl8150 [ 0.870659] usbcore: registered new interface driver r8152 [ 0.870709] usbcore: registered new interface driver asix [ 0.870760] usbcore: registered new interface driver ax88179_178a [ 0.870806] usbcore: registered new interface driver cdc_ether [ 0.870853] usbcore: registered new interface driver rndis_host [ 0.870910] usbcore: registered new interface driver cdc_ncm [ 0.870958] usbcore: registered new interface driver cdc_mbim [ 0.872142] dwc3 fcc00000.dwc3: Failed to get clk 'ref': -2 [ 0.875405] dwc3 fd000000.dwc3: Failed to get clk 'ref': -2 [ 0.879484] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver [ 0.879514] ehci-pci: EHCI PCI platform driver [ 0.879584] ehci-platform: EHCI generic platform driver [ 0.879940] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver [ 0.879965] ohci-platform: OHCI generic platform driver [ 0.880919] xhci-hcd xhci-hcd.5.auto: xHCI Host Controller [ 0.881089] xhci-hcd xhci-hcd.5.auto: new USB bus registered, assigned bus number 1 [ 0.881412] xhci-hcd xhci-hcd.5.auto: hcc params 0x0220fe64 hci version 0x110 quirks 0x0000001002010010 [ 0.881477] xhci-hcd xhci-hcd.5.auto: irq 69, io mem 0xfcc00000 [ 0.881801] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 4.19 [ 0.881819] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 0.881832] usb usb1: Product: xHCI Host Controller [ 0.881844] usb usb1: Manufacturer: Linux 4.19.193 xhci-hcd [ 0.881856] usb usb1: SerialNumber: xhci-hcd.5.auto [ 0.882269] hub 1-0:1.0: USB hub found [ 0.882315] hub 1-0:1.0: 1 port detected [ 0.882649] xhci-hcd xhci-hcd.5.auto: xHCI Host Controller [ 0.882806] xhci-hcd xhci-hcd.5.auto: new USB bus registered, assigned bus number 2 [ 0.882832] xhci-hcd xhci-hcd.5.auto: Host supports USB 3.0 SuperSpeed [ 0.882903] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. [ 0.883019] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 4.19 [ 0.883037] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 0.883050] usb usb2: Product: xHCI Host Controller [ 0.883063] usb usb2: Manufacturer: Linux 4.19.193 xhci-hcd [ 0.883074] usb usb2: SerialNumber: xhci-hcd.5.auto [ 0.883438] hub 2-0:1.0: USB hub found [ 0.883481] hub 2-0:1.0: 1 port detected [ 0.883943] xhci-hcd xhci-hcd.6.auto: xHCI Host Controller [ 0.884095] xhci-hcd xhci-hcd.6.auto: new USB bus registered, assigned bus number 3 [ 0.884407] xhci-hcd xhci-hcd.6.auto: hcc params 0x0220fe64 hci version 0x110 quirks 0x0000011002010010 [ 0.884466] xhci-hcd xhci-hcd.6.auto: irq 70, io mem 0xfd000000 [ 0.884729] usb usb3: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 4.19 [ 0.884748] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 0.884762] usb usb3: Product: xHCI Host Controller [ 0.884774] usb usb3: Manufacturer: Linux 4.19.193 xhci-hcd [ 0.884785] usb usb3: SerialNumber: xhci-hcd.6.auto [ 0.885195] hub 3-0:1.0: USB hub found [ 0.885239] hub 3-0:1.0: 1 port detected [ 0.885532] xhci-hcd xhci-hcd.6.auto: xHCI Host Controller [ 0.885679] xhci-hcd xhci-hcd.6.auto: new USB bus registered, assigned bus number 4 [ 0.885704] xhci-hcd xhci-hcd.6.auto: Host supports USB 3.0 SuperSpeed [ 0.885779] usb usb4: We don't know the algorithms for LPM for this host, disabling LPM. [ 0.885889] usb usb4: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 4.19 [ 0.885907] usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 0.885921] usb usb4: Product: xHCI Host Controller [ 0.885933] usb usb4: Manufacturer: Linux 4.19.193 xhci-hcd [ 0.885945] usb usb4: SerialNumber: xhci-hcd.6.auto [ 0.886303] hub 4-0:1.0: USB hub found [ 0.886349] hub 4-0:1.0: 1 port detected [ 0.886760] usbcore: registered new interface driver cdc_acm [ 0.886776] cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters [ 0.886838] usbcore: registered new interface driver cdc_wdm [ 0.887073] usbcore: registered new interface driver uas [ 0.887191] usbcore: registered new interface driver usb-storage [ 0.887294] usbcore: registered new interface driver usbserial_generic [ 0.887329] usbserial: USB Serial support registered for generic [ 0.887380] usbcore: registered new interface driver cp210x [ 0.887411] usbserial: USB Serial support registered for cp210x [ 0.887483] usbcore: registered new interface driver ftdi_sio [ 0.887516] usbserial: USB Serial support registered for FTDI USB Serial Device [ 0.887664] usbcore: registered new interface driver keyspan [ 0.887697] usbserial: USB Serial support registered for Keyspan - (without firmware) [ 0.887727] usbserial: USB Serial support registered for Keyspan 1 port adapter [ 0.887750] usbserial: USB Serial support registered for Keyspan 2 port adapter [ 0.887780] usbserial: USB Serial support registered for Keyspan 4 port adapter [ 0.887832] usbcore: registered new interface driver option [ 0.887865] usbserial: USB Serial support registered for GSM modem (1-port) [ 0.888061] usbcore: registered new interface driver oti6858 [ 0.888099] usbserial: USB Serial support registered for oti6858 [ 0.888148] usbcore: registered new interface driver pl2303 [ 0.888183] usbserial: USB Serial support registered for pl2303 [ 0.888238] usbcore: registered new interface driver qcserial [ 0.888269] usbserial: USB Serial support registered for Qualcomm USB modem [ 0.888359] usbcore: registered new interface driver sierra [ 0.888395] usbserial: USB Serial support registered for Sierra USB modem [ 0.889890] usbcore: registered new interface driver usbtouchscreen [ 0.889956] cyttsp5_loader_init: Parade TTSP FW Loader Driver (Built TTDA.03.08.874312) rc=0 [ 0.889975] cyttsp5_device_access_init: Parade TTSP Device Access Driver (Built TTDA.03.08.874312) rc=0 [ 0.890692] i2c /dev entries driver [ 0.892843] rk808 0-0020: chip id: 0x8090 [ 0.892898] rk808 0-0020: No cache defaults, reading back from HW [ 0.916612] rk808 0-0020: source: on=0x40, off=0x00 [ 0.916638] rk808 0-0020: support dcdc3 fb mode:-22, 63 [ 0.916655] rk808 0-0020: support pmic reset mode:0,0 [ 0.921327] rk808-regulator rk808-regulator: there is no dvs0 gpio [ 0.921360] rk808-regulator rk808-regulator: there is no dvs1 gpio [ 0.921616] vdd_logic: supplied by vcc3v3_sys [ 0.921949] vdd_gpu: supplied by vcc3v3_sys [ 0.922208] vcc_ddr: supplied by vcc3v3_sys [ 0.922482] vdd_npu: supplied by vcc3v3_sys [ 0.922750] vcc_1v8: supplied by vcc3v3_sys [ 0.923003] vdda0v9_image: supplied by vcc3v3_sys [ 0.923254] vdda_0v9: supplied by vcc3v3_sys [ 0.923501] vdda0v9_pmu: supplied by vcc3v3_sys [ 0.923737] vccio_acodec: supplied by vcc3v3_sys [ 0.923984] vccio_sd: supplied by vcc3v3_sys [ 0.924239] vcc3v3_pmu: supplied by vcc3v3_sys [ 0.924494] vcca_1v8: supplied by vcc3v3_sys [ 0.924758] vcca1v8_pmu: supplied by vcc3v3_sys [ 0.925054] vcca1v8_image: supplied by vcc3v3_sys [ 0.925316] vcc_3v3: supplied by vcc3v3_sys [ 0.925547] vcc3v3_sd: supplied by vcc3v3_sys [ 0.925818] rk817-battery rk817-battery: Failed to find matching dt id [ 0.926042] rk817-charger rk817-charger: Failed to find matching dt id [ 0.929117] input: rk805 pwrkey as /devices/platform/fdd40000.i2c/i2c-0/0-0020/rk805-pwrkey/input/input0 [ 0.935187] rk808-rtc rk808-rtc: registered as rtc0 [ 0.936901] rk808-rtc rk808-rtc: setting system clock to 2017-08-04 09:01:05 UTC (1501837265) [ 0.938505] fan53555-regulator 0-001c: FAN53555 Option[12] Rev[15] Detected! [ 0.941811] vdd_cpu: supplied by vcc5v0_sys [ 0.944114] rockchip-pinctrl pinctrl: pin gpio3-11 already requested by fe010000.ethernet; cannot claim for fe5e0000.i2c [ 0.944140] rockchip-pinctrl pinctrl: pin-107 (fe5e0000.i2c) status -22 [ 0.944151] rockchip-pinctrl pinctrl: could not request pin 107 (gpio3-11) from group i2c5m0-xfer on device rockchip-pinctrl [ 0.944159] rk3x-i2c fe5e0000.i2c: Error applying setting, reverse things back [ 0.944180] rk3x-i2c: probe of fe5e0000.i2c failed with error -22 [ 0.945946] iommu: Adding device fdff0000.rkisp to group 7 [ 0.945987] rkisp_hw fdff0000.rkisp: Linked as a consumer to fdff1a00.iommu [ 0.946171] rkisp_hw fdff0000.rkisp: is_thunderboot: 0 [ 0.946190] rkisp_hw fdff0000.rkisp: max input:0x0@0fps [ 0.946220] rkisp_hw fdff0000.rkisp: can't request region for resource [mem 0xfdff0000-0xfdffffff] [ 0.946959] rkisp rkisp-vir0: rkisp driver version: v01.06.01 [ 0.947044] rkisp rkisp-vir0: No memory-region-thunderboot specified [ 0.947239] rkisp rkisp-vir0: Entity type for entity rkisp-isp-subdev was not initialized! [ 0.947265] rkisp rkisp-vir0: Entity type for entity rkisp-csi-subdev was not initialized! [ 0.948906] usbcore: registered new interface driver uvcvideo [ 0.948926] USB Video Class driver (1.1.1) [ 0.949231] rockchip-iodomain fdc20000.syscon:io-domains: Linked as a consumer to regulator.20 [ 0.949262] rockchip-iodomain fdc20000.syscon:io-domains: pmuio1(3300000 uV) supplied by vcc3v3_pmu [ 0.949372] rockchip-iodomain fdc20000.syscon:io-domains: pmuio2(3300000 uV) supplied by vcc3v3_pmu [ 0.949456] rockchip-iodomain fdc20000.syscon:io-domains: Linked as a consumer to regulator.18 [ 0.949490] rockchip-iodomain fdc20000.syscon:io-domains: vccio1(3300000 uV) supplied by vccio_acodec [ 0.949598] rockchip-iodomain fdc20000.syscon:io-domains: Linked as a consumer to regulator.19 [ 0.949632] rockchip-iodomain fdc20000.syscon:io-domains: vccio3(3300000 uV) supplied by vccio_sd [ 0.949723] rockchip-iodomain fdc20000.syscon:io-domains: Linked as a consumer to regulator.14 [ 0.949749] rockchip-iodomain fdc20000.syscon:io-domains: vccio4(1800000 uV) supplied by vcc_1v8 [ 0.949829] rockchip-iodomain fdc20000.syscon:io-domains: Linked as a consumer to regulator.24 [ 0.949863] rockchip-iodomain fdc20000.syscon:io-domains: vccio5(3300000 uV) supplied by vcc_3v3 [ 0.949945] rockchip-iodomain fdc20000.syscon:io-domains: vccio6(1800000 uV) supplied by vcc_1v8 [ 0.950050] rockchip-iodomain fdc20000.syscon:io-domains: vccio7(3300000 uV) supplied by vcc_3v3 [ 0.953336] rockchip-thermal fe710000.tsadc: tsadc is probed successfully! [ 0.954386] Bluetooth: HCI UART driver ver 2.3 [ 0.954402] Bluetooth: HCI UART protocol H4 registered [ 0.954416] Bluetooth: HCI UART protocol ATH3K registered [ 0.954493] usbcore: registered new interface driver bfusb [ 0.954559] usbcore: registered new interface driver btusb [ 0.954871] cpu cpu0: leakage=30 [ 0.954918] cpu cpu0: pvtm = 89970, from nvmem [ 0.954940] cpu cpu0: pvtm-volt-sel=1 [ 0.955807] cpu cpu0: Linked as a consumer to regulator.26 [ 0.955867] cpu cpu0: Dropping the link to regulator.26 [ 0.956477] cpu cpu0: Linked as a consumer to regulator.26 [ 0.957094] cpu cpu0: avs=0 [ 0.957155] energy_model: pd0: hertz/watts ratio non-monotonically decreasing: em_cap_state 2 >= em_cap_state1 [ 0.957337] cpu cpu0: l=0 h=2147483647 hyst=5000 l_limit=0 h_limit=0 h_table=0 [ 0.962200] sdhci: Secure Digital Host Controller Interface driver [ 0.962224] sdhci: Copyright(c) Pierre Ossman [ 0.962236] Synopsys Designware Multimedia Card Interface Driver [ 0.963134] dwmmc_rockchip fe2b0000.dwmmc: IDMAC supports 32-bit address mode. [ 0.963305] dwmmc_rockchip fe2b0000.dwmmc: Using internal DMA controller. [ 0.963321] dwmmc_rockchip fe2b0000.dwmmc: Version ID is 270a [ 0.963383] dwmmc_rockchip fe2b0000.dwmmc: DW MMC controller at irq 39,32 bit host data width,256 deep fifo [ 0.963524] dwmmc_rockchip fe2b0000.dwmmc: Linked as a consumer to regulator.25 [ 0.963594] dwmmc_rockchip fe2b0000.dwmmc: Linked as a consumer to regulator.19 [ 0.975445] mmc_host mmc1: Bus speed (slot 0) = 375000Hz (slot req 400000Hz, actual 375000HZ div = 0) [ 0.988711] dwmmc_rockchip fe2c0000.dwmmc: IDMAC supports 32-bit address mode. [ 0.988820] dwmmc_rockchip fe2c0000.dwmmc: Using internal DMA controller. [ 0.988841] dwmmc_rockchip fe2c0000.dwmmc: Version ID is 270a [ 0.988896] dwmmc_rockchip fe2c0000.dwmmc: DW MMC controller at irq 40,32 bit host data width,256 deep fifo [ 0.989038] dwmmc_rockchip fe2c0000.dwmmc: allocated mmc-pwrseq [ 0.989050] mmc_host mmc2: card is non-removable. [ 1.208780] mmc_host mmc2: Bus speed (slot 0) = 375000Hz (slot req 400000Hz, actual 375000HZ div = 0) [ 1.222206] sdhci-pltfm: SDHCI platform and OF driver helper [ 1.224348] mmc0: Unknown controller version (5). You may experience problems. [ 1.255077] mmc0: SDHCI controller on fe310000.sdhci [fe310000.sdhci] using ADMA [ 1.257057] mmc2: queuing unknown CIS tuple 0x80 (2 bytes) [ 1.257157] hidraw: raw HID events driver (C) Jiri Kosina [ 1.257531] usbcore: registered new interface driver usbhid [ 1.257546] usbhid: USB HID core driver [ 1.257929] rockchip,bus bus-npu: Linked as a consumer to regulator.10 [ 1.257957] rockchip,bus bus-npu: Failed to get leakage [ 1.258021] rockchip,bus bus-npu: pvtm = 89970, from nvmem [ 1.258042] rockchip,bus bus-npu: pvtm-volt-sel=1 [ 1.258255] rockchip,bus bus-npu: avs=0 [ 1.260877] rockchip-saradc fe720000.saradc: Linked as a consumer to regulator.21 [ 1.260975] mmc2: queuing unknown CIS tuple 0x80 (7 bytes) [ 1.261538] optee: probing for conduit method from DT. [ 1.261575] optee: revision 3.6 (0b06ae94) [ 1.261979] optee: initialized driver [ 1.261995] rksfc_base v1.1 2016-01-08 [ 1.262580] rksfc fe300000.sfc: rksfc_probe clk rate = 99000000 [ 1.262692] rkflash_dev_init enter [ 1.262717] sfc nor id: 0 0 0 [ 1.262729] rkflash[1] is invalid [ 1.262731] rkflash_dev_init enter [ 1.262756] sfc_nand id: 0 0 0 [ 1.262762] rkflash[2] is invalid [ 1.262978] mmc2: queuing unknown CIS tuple 0x80 (3 bytes) [ 1.263558] usbcore: registered new interface driver snd-usb-audio [ 1.265642] rk817-codec rk817-codec: DMA mask not set [ 1.272227] Initializing XFRM netlink socket [ 1.272644] NET: Registered protocol family 10 [ 1.273452] Segment Routing with IPv6 [ 1.273554] NET: Registered protocol family 17 [ 1.273582] NET: Registered protocol family 15 [ 1.273708] Bluetooth: RFCOMM socket layer initialized [ 1.273747] Bluetooth: RFCOMM ver 1.11 [ 1.273762] Bluetooth: HIDP (Human Interface Emulation) ver 1.2 [ 1.273797] Bluetooth: HIDP socket layer initialized [ 1.273844] [BT_RFKILL]: Enter rfkill_rk_init [ 1.273858] [WLAN_RFKILL]: Enter rfkill_wlan_init [ 1.274408] [WLAN_RFKILL]: Enter rfkill_wlan_probe [ 1.274466] [WLAN_RFKILL]: wlan_platdata_parse_dt: wifi_chip_type = ap6398s [ 1.274481] [WLAN_RFKILL]: wlan_platdata_parse_dt: enable wifi power control. [ 1.274494] [WLAN_RFKILL]: wlan_platdata_parse_dt: wifi power controled by gpio. [ 1.274532] [WLAN_RFKILL]: wlan_platdata_parse_dt: WIFI,host_wake_irq = 74, flags = 0. [ 1.274550] [WLAN_RFKILL]: wlan_platdata_parse_dt: The ref_wifi_clk not found ! [ 1.274562] [WLAN_RFKILL]: rfkill_wlan_probe: init gpio [ 1.274574] [WLAN_RFKILL]: rfkill_set_wifi_bt_power: 1 [ 1.274586] [WLAN_RFKILL]: Exit rfkill_wlan_probe [ 1.275256] [BT_RFKILL]: bluetooth_platdata_parse_dt: get property: uart_rts_gpios = 77. [ 1.275293] [BT_RFKILL]: bluetooth_platdata_parse_dt: get property: BT,reset_gpio = 79. [ 1.275315] [BT_RFKILL]: bluetooth_platdata_parse_dt: get property: BT,wake_gpio = 81. [ 1.275336] [BT_RFKILL]: bluetooth_platdata_parse_dt: get property: BT,wake_host_irq = 80. [ 1.275408] [BT_RFKILL]: Request irq for bt wakeup host [ 1.275503] [BT_RFKILL]: ** disable irq [ 1.275657] [BT_RFKILL]: bt_default device registered. [ 1.275836] Key type dns_resolver registered [ 1.275854] openvswitch: Open vSwitch switching datapath [ 1.276091] mpls_gso: MPLS GSO support [ 1.276416] flash vendor_init_thread! [ 1.276435] flash vendor storage:20170308 ret = -1 [ 1.276681] rockchip-pinctrl pinctrl: pin gpio4-7 already requested by fe640000.spi; cannot claim for 2-0036 [ 1.276708] rockchip-pinctrl pinctrl: pin-135 (2-0036) status -22 [ 1.276718] rockchip-pinctrl pinctrl: could not request pin 135 (gpio4-7) from group cam-clkout0 on device rockchip-pinctrl [ 1.276729] ov5695 2-0036: Error applying setting, reverse things back [ 1.276765] ov5695: probe of 2-0036 failed with error -22 [ 1.277038] rockchip-pinctrl pinctrl: pin gpio4-7 already requested by fe640000.spi; cannot claim for 2-0037 [ 1.277058] rockchip-pinctrl pinctrl: pin-135 (2-0037) status -22 [ 1.277075] rockchip-pinctrl pinctrl: could not request pin 135 (gpio4-7) from group cam-clkout0 on device rockchip-pinctrl [ 1.277088] gc8034 2-0037: Error applying setting, reverse things back [ 1.277111] gc8034: probe of 2-0037 failed with error -22 [ 1.278124] Loading compiled-in X.509 certificates [ 1.278862] pstore: Using compression: deflate [ 1.279922] rga2: Driver loaded successfully ver:3.2.63318 [ 1.280424] rga2: Module initialized. [ 1.286583] mmc0: new HS200 MMC card at address 0001 [ 1.287639] mmcblk0: mmc0:0001 032G00 29.1 GiB [ 1.288385] mmcblk0boot0: mmc0:0001 032G00 partition 1 8.00 MiB [ 1.289082] mmcblk0boot1: mmc0:0001 032G00 partition 2 8.00 MiB [ 1.289369] mmcblk0rpmb: mmc0:0001 032G00 partition 3 4.00 MiB, chardev (238:0) [ 1.292414] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 [ 1.309441] mpp_rkvenc fdf40000.rkvenc: probing start [ 1.310080] mpp_rkvenc fdf40000.rkvenc: Linked as a consumer to regulator.10 [ 1.310117] mpp_rkvenc fdf40000.rkvenc: Failed to get leakage [ 1.310189] mpp_rkvenc fdf40000.rkvenc: pvtm = 89970, from nvmem [ 1.310211] mpp_rkvenc fdf40000.rkvenc: pvtm-volt-sel=1 [ 1.310399] mpp_rkvenc fdf40000.rkvenc: avs=0 [ 1.310779] mpp_rkvenc fdf40000.rkvenc: failed to find power_model node [ 1.310801] mpp_rkvenc fdf40000.rkvenc: failed to initialize power model [ 1.310829] mpp_rkvenc fdf40000.rkvenc: failed to get dynamic-coefficient [ 1.311195] mpp_rkvenc fdf40000.rkvenc: probing finish [ 1.311898] mali fde60000.gpu: Kernel DDK version g2p0-01eac0 [ 1.312066] mali fde60000.gpu: Linked as a consumer to regulator.11 [ 1.312212] mali fde60000.gpu: dev_pm_opp_set_regulators: no regulator (shadercores) found: -19 [ 1.312301] mali fde60000.gpu: leakage=8 [ 1.312343] mali fde60000.gpu: pvtm = 89970, from nvmem [ 1.312754] mali fde60000.gpu: avs=0 [ 1.312775] W : [File] : drivers/gpu/arm/bifrost/platform/rk/mali_kbase_config_rk.c; [Line] : 112; [Func] : kbase_platform_rk_init(); power-off-delay-ms not available. [ 1.313085] mali fde60000.gpu: GPU identified as 0x2 arch 7.4.0 r1p0 status 0 [ 1.313179] mali fde60000.gpu: No memory group manager is configured [ 1.313551] mali fde60000.gpu: l=-2147483648 h=2147483647 hyst=0 l_limit=0 h_limit=0 h_table=0 [ 1.314142] mali fde60000.gpu: Probed as mali0 [ 1.314614] input: adc-keys as /devices/platform/adc-keys/input/input1 [ 1.315718] asoc-simple-card hdmi-sound: i2s-hifi <-> fe400000.i2s mapping ok [ 1.319118] rockchip-pinctrl pinctrl: pin gpio4-11 already requested by fe640000.spi; cannot claim for rk-headset [ 1.319144] rockchip-pinctrl pinctrl: pin-139 (rk-headset) status -22 [ 1.319157] rockchip-pinctrl pinctrl: could not request pin 139 (gpio4-11) from group hp-det on device rockchip-pinctrl [ 1.319168] rockchip_headset rk-headset: Error applying setting, reverse things back [ 1.319193] rockchip_headset: probe of rk-headset failed with error -22 [ 1.319460] iommu: Adding device fde40000.npu to group 0 [ 1.319494] RKNPU fde40000.npu: Linked as a consumer to fde4b000.iommu [ 1.319979] RKNPU fde40000.npu: RKNPU: rknpu iommu is enabled, using iommu mode [ 1.320105] RKNPU fde40000.npu: Linked as a consumer to regulator.13 [ 1.320125] RKNPU fde40000.npu: can't request region for resource [mem 0xfde40000-0xfde4ffff] [ 1.320535] [drm] Initialized rknpu 0.4.2 20210701 for fde40000.npu on minor 1 [ 1.320601] RKNPU fde40000.npu: leakage=4 [ 1.320641] RKNPU fde40000.npu: pvtm = 89970, from nvmem [ 1.321103] RKNPU fde40000.npu: avs=0 [ 1.321706] RKNPU fde40000.npu: l=0 h=2147483647 hyst=5000 l_limit=0 h_limit=0 h_table=0 [ 1.322319] cfg80211: Loading compiled-in X.509 certificates for regulatory database [ 1.324213] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7' [ 1.325207] rockchip-pm rockchip-suspend: not set pwm-regulator-config [ 1.325823] I : [File] : drivers/gpu/arm/mali400/mali/linux/mali_kernel_linux.c; [Line] : 417; [Func] : mali_module_init(); svn_rev_string_from_arm of this mali_ko is '', rk_ko_ver is '5', built at '10:15:48', on 'Mar 2 2023'. [ 1.326202] Mali: [ 1.326204] Mali device driver loaded [ 1.326226] rkisp rkisp-vir0: clear unready subdev num: 2 [ 1.326239] rockchip-csi2-dphy0: No link between dphy and sensor [ 1.326605] rockchip-csi2-dphy0: No link between dphy and sensor [ 1.326621] rkisp-vir0: update sensor failed [ 1.326777] ALSA device list: [ 1.326788] #0: rockchip,hdmi [ 1.327076] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2 [ 1.327092] cfg80211: failed to load regulatory.db [ 1.328820] mmc_host mmc2: Bus speed (slot 0) = 148500000Hz (slot req 150000000Hz, actual 148500000HZ div = 0) [ 1.332770] EXT4-fs (mmcblk0p6): mounted filesystem with ordered data mode. Opts: (null) [ 1.332832] VFS: Mounted root (ext4 filesystem) on device 179:6. [ 1.334643] devtmpfs: mounted [ 1.336509] Freeing unused kernel memory: 1600K [ 1.351749] Run /sbin/init as init process [ 1.400326] vendor storage:20190527 ret = 0 [ 1.415963] devfreq fde60000.gpu: Couldn't update frequency transition information. [ 1.557578] systemd[1]: System time before build time, advancing clock. [ 1.561403] systemd[1]: Failed to lookup module alias 'autofs4': Function not implemented Welcome to Debian GNU/Linux 10 (buster)! [ 1.655139] dwmmc_rockchip fe2c0000.dwmmc: Successfully tuned phase to 186 [ 1.658153] mmc2: new ultra high speed SDR104 SDIO card at address 0001 File /lib/systemd/system/systemd-journald.service:12 configures an IP firewall (IPAddressDeny=any), but the local system does not support BPF/cgroup based firewalling. Proceeding WITHOUT firewalling in effect! (This warning is only shown for the first loaded unit using IP firewalling.) [ OK ] Listening on Journal Socket (/dev/log). [ OK ] Created slice system-getty.slice. [ OK ] Created slice User and Session Slice. [ OK ] Started Forward Password R…uests to Wall Directory Watch. [ OK ] Listening on Syslog Socket. [ OK ] Listening on udev Kernel Socket. [ OK ] Created slice system-serial\x2dgetty.slice. [ OK ] Listening on Network Service Netlink Socket. [ OK ] Listening on udev Control Socket. [ OK ] Listening on initctl Compatibility Named Pipe. [ OK ] Reached target Remote File Systems. [ OK ] Reached target Slices. [ OK ] Reached target Remote Encrypted Volumes. [ OK ] Reached target Swap. [ OK ] Listening on Journal Socket. Starting Nameserver information manager... Starting Remount Root and Kernel File Systems... Starting Wait Until Kernel Time Synchronized... Starting udev Coldplug all Devices... Mounting Kernel Debug File System... Starting Journal Service... Starting Load Kernel Modules... Starting Set the console keyboard layout... [ OK ] Started Dispatch Password …ts to Console Directory Watch. [ OK ] Reached target Local Encrypted Volumes. [ OK ] Started Remount Root and Kernel File Systems. [ OK ] Mounted Kernel Debug File System. [ OK ] Started Nameserver information manager. Starting Load/Save Random Seed... Starting Create System Users... [ OK ] Started Load Kernel Modules. Mounting FUSE Control File System... Starting Apply Kernel Variables... Mounting Kernel Configuration File System... [ OK ] Mounted FUSE Control File System. [ OK ] Mounted Kernel Configuration File System. [ OK ] Started Load/Save Random Seed. [ OK ] Started Apply Kernel Variables. [ OK ] Started Journal Service. Starting Flush Journal to Persistent Storage... [ 3.139148] systemd-journald[133]: Received request to flush runtime journal from PID 1 [ OK ] Started Flush Journal to Persistent Storage. [ OK ] Started Create System Users. Starting Create Static Device Nodes in /dev... [ OK ] Started Create Static Device Nodes in /dev. Starting udev Kernel Device Manager... [ OK ] Started udev Kernel Device Manager. Starting Network Service... [ OK ] Started udev Coldplug all Devices. [ OK ] Started Set the console keyboard layout. [ OK ] Reached target Local File Systems (Pre). [ OK ] Reached target Local File Systems. Starting Set console font and keymap... Starting Enable support fo…l executable binary formats... Starting Create Volatile Files and Directories... Starting Helper to synchronize boot up for ifupdown... [ OK ] Started Set console font and keymap. [ OK ] Started Enable support for…nal executable binary formats. [ OK ] Started Helper to synchronize boot up for ifupdown. Starting Raise network interfaces... [ OK ] Started Create Volatile Files and Directories. Starting Update UTMP about System Boot/Shutdown... [ OK ] Started Network Service. Starting Network Name Resolution... [ OK ] Started Update UTMP about System Boot/Shutdown. [ OK ] Reached target System Initialization. [ OK ] Listening on triggerhappy.socket. [ OK ] Listening on OpenBSD Secure Shell server socket. [ OK ] Listening on ACPID Listen Socket. [ OK ] Started Daily Cleanup of Temporary Directories. [ OK ] Started ACPI Events Check. [ OK ] Reached target Paths. [ OK ] Listening on D-Bus System Message Bus Socket. [ OK ] Reached target Sockets. [ OK ] Reached target Basic System. Starting adbd for Debian... Starting enable ASYNC for Debian Display... Starting Initialize hardware monitoring sensors... Starting Daemon for power management... Starting rkisp 3A engine... Starting System Logging Service... Starting triggerhappy global hotkey daemon... Starting Disk Manager... [ OK ] Started ACPI event daemon. Starting LSB: Load kernel …d to enable cpufreq scaling... [ OK ] Started D-Bus System Message Bus. Starting WPA supplicant... Starting Network Manager... Starting Login Service... [ OK ] Started triggerhappy global hotkey daemon. [ OK ] Started System Logging Service. [ OK ] Started rkisp 3A engine. [ OK ] Started Initialize hardware monitoring sensors. [ OK ] Created slice system-systemd\x2dbacklight.slice. Starting Load/Save Screen …ess of backlight:backlight1... Starting Load/Save Screen …ness of backlight:backlight... [ OK ] Started Setup rockchip platform environment. [ OK ] Started enable ASYNC for Debian Display. [ 4.174478] file system registered [ OK ] Started Load/Save Screen B…tness of backlight:backlight1. [ OK ] Started Load/Save Screen B…htness of backlight:backlight. [ 4.310430] EXT4-fs (mmcblk0p6): re-mounted. Opts: (null) [ 4.505324] Mass Storage Function, version: 2009/09/11 [ 4.506865] LUN: removable file: (no medium) [ 4.825111] read descriptors [ 4.825185] read strings [ OK ] Started Network Name Resolution. [ OK ] Started LSB: Load kernel m…ded to enable cpufreq scaling. [ OK ] Found device /dev/ttyFIQ0. [ OK ] Started Raise network interfaces. [ OK ] Started Daemon for power management. Starting Hostname Service... Starting Authorization Manager... [ OK ] Listening on Load/Save RF …itch Status /dev/rfkill Watch. [ OK ] Created slice system-zram\x2dsetup.slice. Starting Setup zram based device zram0... [ OK ] Started Manage Sound Card State (restore and store). Starting Save/Restore Sound Card State... Starting LSB: set CPUFreq kernel parameters... [ OK ] Reached target Host and Network Name Lookups. Starting Load/Save RF Kill Switch Status... [ OK ] Started Network Manager. [ OK ] Started WPA supplicant. [ OK ] Started Login Service. [ OK ] Started Save/Restore Sound Card State. [ OK ] Reached target Sound Card. [ OK ] Reached target Network. Starting vsftpd FTP server... Starting /etc/rc.local Compatibility... Starting Permit User Sessions... Starting Advanced IEEE 802…/WPA/WPA2/EAP Authenticator... Starting Network Time Service... [ OK ] Started Load/Save RF Kill Switch Status. [ OK ] Started Setup zram based device zram0. [ OK ] Started vsftpd FTP server. [ OK ] Started Permit User Sessions. [FAILED] Failed to start Advanced I…1X/WPA/WPA2/EAP Authenticator. See 'systemctl status hostapd.service' for details. [ OK ] Started Authorization Manager. [ OK ] Started Hostname Service. Starting Network Manager Script Dispatcher Service... [FAILED] Failed to start Network Time Service. See 'systemctl status ntp.service' for details. [ OK ] Started Network Manager Script Dispatcher Service. [ OK ] Started LSB: set CPUFreq kernel parameters. [ 5.720133] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ 5.722252] Generic PHY stmmac-1:00: attached PHY driver [Generic PHY] (mii_bus:phy_addr=stmmac-1:00, irq=POLL) [ 5.744406] dwmac4: Master AXI performs any burst length [ 5.744459] rk_gmac-dwmac fe010000.ethernet eth0: No Safety Features support found [ 5.744485] rk_gmac-dwmac fe010000.ethernet eth0: IEEE 1588-2008 Advanced Timestamp supported [ 5.744823] rk_gmac-dwmac fe010000.ethernet eth0: registered PTP clock [ 5.749304] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ OK ] Started adbd for Debian. Starting Light Display Manager... [ OK ] Started Disk Manager. [ OK ] Started Light Display Manager. [ OK ] Stopped Advanced IEEE 802.…1X/WPA/WPA2/EAP Authenticator. Starting Advanced IEEE 802…/WPA/WPA2/EAP Authenticator... [FAILED] Failed to start Advanced I…1X/WPA/WPA2/EAP Authenticator. See 'systemctl status hostapd.service' for details. [ 7.725000] broken atomic modeset userspace detected, disabling atomic [ 8.807367] [drm:dw_hdmi_rockchip_set_property] *ERROR* failed to set rockchip hdmi connector property hdmi_color_depth_capacity [ 8.807452] [drm:dw_hdmi_rockchip_set_property] *ERROR* failed to set rockchip hdmi connector property hdmi_output_mode_capacity [ 8.940695] [drm:dw_hdmi_rockchip_set_property] *ERROR* failed to set rockchip hdmi connector property output_type_capacity [ 9.364987] rc.local[486]: Creating SSH2 RSA key; this may take some time ... [ 9.391112] rc.local[486]: 2048 SHA256:nH8BHNmo6G8iNCRyS4KOfmF6WB3gQ3V6MOCGFgSyYoc root@linaro-alip (RSA) [ 9.462038] rc.local[486]: Creating SSH2 ECDSA key; this may take some time ... [ 9.487735] rc.local[486]: 256 SHA256:TZSSrr0kHCzn0kcwG3i80HdpalMSMEj5Md+Zbv2iwQk root@linaro-alip (ECDSA) [ 9.534690] rc.local[486]: Creating SSH2 ED25519 key; this may take some time ... [ 9.561101] rc.local[486]: 256 SHA256:kzAVvxSmhqsRiS2lEfYyQWmFqeVopv3eD2kaw0VKih0 root@linaro-alip (ED25519) [ OK ] Stopped Advanced IEEE 802.…1X/WPA/WPA2/EAP Authenticator. Starting Advanced IEEE 802…/WPA/WPA2/EAP Authenticator... [FAILED] Failed to start Advanced I…1X/WPA/WPA2/EAP Authenticator. See 'systemctl status hostapd.service' for details. [ 10.074131] Freeing drm_logo memory: 732K [ OK ] Created slice User Slice of UID 1000. Starting User Runtime Directory /run/user/1000... [ OK ] Started User Runtime Directory /run/user/1000. Starting User Manager for UID 1000... [ OK ] Started User Manager for UID 1000. [ OK ] Started Session c1 of user linaro. [ OK ] Stopped Advanced IEEE 802.…1X/WPA/WPA2/EAP Authenticator. Starting Advanced IEEE 802…/WPA/WPA2/EAP Authenticator... [FAILED] Failed to start Advanced I…1X/WPA/WPA2/EAP Authenticator. See 'systemctl status hostapd.service' for details. [ 12.536928] rc.local[486]: rescue-ssh.target is a disabled or a static unit, not starting it. [ 12.865935] rc.local[486]: insserv: warning: script 'rkisp_3A.sh' missing LSB tags [ 12.867694] rc.local[486]: insserv: Default-Start undefined, assuming empty start runlevel(s) for script `rkisp_3A.sh' [ 12.868899] rc.local[486]: insserv: Default-Stop undefined, assuming empty stop runlevel(s) for script `rkisp_3A.sh' [ 12.870511] rc.local[486]: insserv: warning: script 'S10atomic_commit.sh' missing LSB tags [ 12.871688] rc.local[486]: insserv: Default-Start undefined, assuming empty start runlevel(s) for script `S10atomic_commit.sh' [ 12.873211] rc.local[486]: insserv: Default-Stop undefined, assuming empty stop runlevel(s) for script `S10atomic_commit.sh' [ 12.877399] rc.local[486]: insserv: warning: script 'S99_usbhost_en.sh' missing LSB tags [ 12.878170] rc.local[486]: insserv: Default-Start undefined, assuming empty start runlevel(s) for script `S99_usbhost_en.sh' [ 12.879424] rc.local[486]: insserv: Default-Stop undefined, assuming empty stop runlevel(s) for script `S99_usbhost_en.sh' [ OK ] Stopped Advanced IEEE 802.…1X/WPA/WPA2/EAP Authenticator. Starting Advanced IEEE 802…/WPA/WPA2/EAP Authenticator... [FAILED] Failed to start Advanced I…1X/WPA/WPA2/EAP Authenticator. See 'systemctl status hostapd.service' for details. Starting OpenBSD Secure Shell server... Starting Bluetooth service... [FAILED] Failed to start OpenBSD Secure Shell server. See 'systemctl status ssh.service' for details. [ 15.961433] rc.local[486]: Job for ssh.service failed because the control process exited with error code. [ 15.962762] rc.local[486]: See "systemctl status ssh.service" and "journalctl -xe" for details. [ 15.987173] rc.local[486]: invoke-rc.d: initscript ssh, action "restart" failed. [ OK ] Started Bluetooth service. [ 16.112070] rc.local[486]: ● ssh.service - OpenBSD Secure Shell server [ 16.113777] rc.local[486]: Loaded: loaded (/lib/systemd/system/ssh.service; enabled; vendor preset: enabled) [ 16.116968] rc.local[486]: Active: failed (Result: exit-code) since Thu 2019-02-14 10:12:12 UTC; 152ms ago [ 16.118841] rc.local[486]: Docs: man:sshd(8) [ 16.119780] rc.local[486]: man:sshd_config(5) [ 16.121407] rc.local[486]: Process: 1030 ExecStartPre=/usr/sbin/sshd -t (code=exited, status=0/SUCCESS) [ 16.124597] rc.local[486]: Process: 1046 ExecStart=/usr/sbin/sshd -D $SSHD_OPTS (code=exited, status=255/EXCEPTION) [ 16.127920] rc.local[486]: Main PID: 1046 (code=exited, status=255/EXCEPTION) [ 16.135190] rc.local[486]: Feb 14 10:12:12 linaro-alip sshd[1046]: error: Bind to port 22 on 0.0.0.0 failed: Address already in use. [ 16.136404] rc.local[486]: Feb 14 10:12:12 linaro-alip sshd[1046]: error: Bind to port 22 on :: failed: Address already in use. [ 16.137824] rc.local[486]: Feb 14 10:12:12 linaro-alip sshd[1046]: fatal: Cannot bind any address. [ 16.139002] rc.local[486]: Feb 14 10:12:12 linaro-alip systemd[1]: ssh.service: Failed with result 'exit-code'. [ 16.140175] rc.local[486]: Feb 14 10:12:12 linaro-alip systemd[1]: Failed to start OpenBSD Secure Shell server. [FAILED] Failed to start /etc/rc.local Compatibility. See 'systemctl status rc-local.service' for details. [ OK ] Started Serial Getty on ttyFIQ0. [ OK ] Started Getty on tty1. [ OK ] Reached target Login Prompts. [ OK ] Stopped Advanced IEEE 802.…1X/WPA/WPA2/EAP Authenticator. [ 17.582538] EXT4-fs (mmcblk0p8): mounting ext2 file system using the ext4 subsystem Starting Advanced IEEE 802…/WPA/WPA2/EAP Authenticator... [ 17.592393] EXT4-fs (mmcblk0p8): warning: mounting unchecked fs, running e2fsck is recommended [ 17.609003] EXT4-fs (mmcblk0p8): mounted filesystem without journal. Opts: (null) [FAILED] Failed to start Advanced I…1X/WPA/WPA2/EAP Authenticator. See 'systemctl status hostapd.service' for details. [ OK ] Created slice system-clean\x2dmount\x2dpoint.slice. [ OK ] Started Clean the /media/l…8509-244aa3b1d889 mount point. [ 18.040824] EXT4-fs (mmcblk0p7): mounting ext2 file system using the ext4 subsystem [ 18.047023] EXT4-fs (mmcblk0p7): mounted filesystem without journal. Opts: (null) [ OK ] Started Clean the /media/l…bd5c-a4f94bfa3bd9 mount point. [ OK ] Stopped Advanced IEEE 802.…1X/WPA/WPA2/EAP Authenticator. Starting Advanced IEEE 802…/WPA/WPA2/EAP Authenticator... [FAILED] Failed to start Advanced I…1X/WPA/WPA2/EAP Authenticator. See 'systemctl status hostapd.service' for details. [ 21.266363] ttyFIQ ttyFIQ0: tty_port_close_start: tty->count = 1 port count = 2 Debian GNU/Linux 10 linaro-alip ttyFIQ0 linaro-alip login: root (automatic login) Linux linaro-alip 4.19.193 #24 SMP Thu Mar 2 10:16:53 CST 2023 aarch64 The programs included with the Debian GNU/Linux system are free software; the exact distribution terms for each program are described in the individual files in /usr/share/doc/*/copyright. Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent permitted by applicable law. root@linaro-alip:~# [ 29.512470] dhd_module_init: in Dongle Host Driver, version 1.579.77.41.22 (r-20191105-2)(20191120-1) [ 29.512503] ======== dhd_wlan_init_plat_data ======== [ 29.512511] [WLAN_RFKILL]: rockchip_wifi_get_oob_irq: Enter [ 29.512590] dhd_wlan_init_gpio: WL_HOST_WAKE=-1, oob_irq=97, oob_irq_flags=0x414 [ 29.512604] dhd_wlan_init_gpio: WL_REG_ON=-1 [ 29.512611] dhd_wifi_platform_load: Enter [ 29.512618] Power-up adapter 'DHD generic adapter' [ 29.515913] wifi_platform_set_power = 1 [ 29.515943] ======== PULL WL_REG_ON(-1) HIGH! ======== [ 29.515952] [WLAN_RFKILL]: rockchip_wifi_power: 1 [ 29.515963] [WLAN_RFKILL]: rockchip_wifi_power: toggle = false [ 29.515971] [WLAN_RFKILL]: wifi turn on power [GPIO-1-0] [ 29.821752] wifi_platform_bus_enumerate device present 1 [ 29.821796] ======== Card detection to detect SDIO card! ======== [ 29.821811] mmc2:mmc host rescan start! [ 29.838143] bcmsdh_register: register client driver [ 29.838615] bcmsdh_sdmmc_probe: Enter num=1 [ 29.841874] bcmsdh_sdmmc_probe: Enter num=2 [ 29.841924] bus num (host idx)=2, slot num (rca)=1 [ 29.841939] found adapter info 'DHD generic adapter' [ 29.842011] sdioh_attach: set sd_f2_blocksize 256 [ 29.842078] sdioh_attach: sd clock rate = 0 [ 29.842318] dhdsdio_probe : no mutex held. set lock [ 29.842460] F1 signature read @0x18000000=0x16024335 [ 29.850907] F1 signature OK, socitype:0x1 chip:0x4339 rev:0x1 pkg:0x0 [ 29.852046] DHD: dongle ram size is set to 786432(orig 786432) at 0x180000 [ 29.852158] [dhd] dhd_conf_set_chiprev : chip=0x4339, chiprev=1 [ 29.852313] [dhd] CFG80211-ERROR) wl_setup_wiphy : Registering Vendor80211 [ 29.852860] [dhd] CFG80211-ERROR) wl_setup_wiphy : SAE support [ 29.857405] [dhd] CFG80211-ERROR) wl_init_prof : wl_init_prof: No profile [ 29.865058] dhd_attach(): thread:dhd_watchdog_thread:586 started [ 29.865201] dhd_attach(): thread:dhd_dpc:587 started [ 29.865295] dhd_attach(): thread:dhd_rxf:588 started [ 29.865313] dhd_deferred_work_init: work queue initialized [ 29.865325] dhd_tcpack_suppress_set: TCP ACK Suppress mode 0 -> mode 2 [ 29.865528] sdioh_cis_read: func_cis_ptr[0]=0x10ac [ 29.870715] Dongle Host Driver, version 1.579.77.41.22 (r-20191105-2)(20191120-1) [ 29.878523] Register interface [wlan0] MAC: f0:25:b7:4c:b3:57 [ 29.878523] [ 29.878732] dhd_tcpack_suppress_set: TCP ACK Suppress mode 2 -> mode 0 [ 29.878774] dhd_wl_ioctl: returning as busstate=0 [ 29.878788] dhd_dbg_detach_pkt_monitor, 2204 [ 29.878799] dhd_bus_devreset: == Power OFF == [ 29.888419] bcmsdh_oob_intr_unregister: Enter [ 29.888455] bcmsdh_oob_intr_unregister: irq is not registered [ 29.888473] dhd_txglom_enable: enable 0 [ 29.888481] dhd_bus_devreset: WLAN OFF DONE [ 29.888810] wifi_platform_set_power = 0 [ 29.888829] ======== PULL WL_REG_ON(-1) LOW! ======== [ 29.888836] [WLAN_RFKILL]: rockchip_wifi_power: 0 [ 29.888858] [WLAN_RFKILL]: rockchip_wifi_power: toggle = false [ 29.888865] [WLAN_RFKILL]: wifi shut off power [GPIO-1-1] [ 29.888874] dhdsdio_probe : the lock is released. [ 29.889086] dhd_module_init: Exit err=0 [ 30.043275] IPv6: ADDRCONF(NETDEV_UP): wlan0: link is not ready [ 30.043525] dhd_open: Enter 00000000f2571afd [ 30.043538] dhd_open : no mutex held. set lock [ 30.043549] [ 30.043549] Dongle Host Driver, version 1.579.77.41.22 (r-20191105-2)(20191120-1) [ 30.043565] [dhd-wlan0] wl_android_wifi_on : in g_wifi_on=0 [ 30.043572] wifi_platform_set_power = 1 [ 30.043578] ======== PULL WL_REG_ON(-1) HIGH! ======== [ 30.043585] [WLAN_RFKILL]: rockchip_wifi_power: 1 [ 30.043592] [WLAN_RFKILL]: rockchip_wifi_power: toggle = false [ 30.043598] [WLAN_RFKILL]: wifi turn on power [GPIO-1-0] [ 30.228175] broken atomic modeset userspace detected, disabling atomic [ 30.348449] sdio_reset_comm(): [ 30.568442] mmc_host mmc2: Bus speed (slot 0) = 375000Hz (slot req 400000Hz, actual 375000HZ div = 0) [ 30.583444] mmc_host mmc2: Bus speed (slot 0) = 375000Hz (slot req 100000Hz, actual 93750HZ div = 2) [ 30.601170] mmc_host mmc2: Bus speed (slot 0) = 375000Hz (slot req 375000Hz, actual 375000HZ div = 0) [ 30.613381] mmc2: queuing unknown CIS tuple 0x80 (2 bytes) [ 30.616563] mmc2: queuing unknown CIS tuple 0x80 (7 bytes) [ 30.618333] mmc2: queuing unknown CIS tuple 0x80 (3 bytes) [ 30.682009] mmc_host mmc2: Bus speed (slot 0) = 148500000Hz (slot req 150000000Hz, actual 148500000HZ div = 0) [ 31.025117] dwmmc_rockchip fe2c0000.dwmmc: Successfully tuned phase to 186 [ 31.025208] sdioh_start: set sd_f2_blocksize 256 [ 31.025512] [ 31.025512] [ 31.025512] dhd_bus_devreset: == WLAN ON == [ 31.025621] F1 signature read @0x18000000=0x16024335 [ 31.029308] F1 signature OK, socitype:0x1 chip:0x4339 rev:0x1 pkg:0x0 [ 31.029893] DHD: dongle ram size is set to 786432(orig 786432) at 0x180000 [ 31.033881] [dhd] dhd_conf_read_config : Ignore config file /vendor/etc/firmware/config.txt [ 31.033917] [dhd] dhd_conf_set_path_params : Final fw_path=/vendor/etc/firmware/fw_bcm4339a0_ag.bin [ 31.033924] [dhd] dhd_conf_set_path_params : Final nv_path=/vendor/etc/firmware/nvram_AP6335.txt [ 31.033930] [dhd] dhd_conf_set_path_params : Final clm_path=/vendor/etc/firmware/clm_bcm4339a0_ag.blob [ 31.033935] [dhd] dhd_conf_set_path_params : Final conf_path=/vendor/etc/firmware/config.txt [ 31.034816] dhd_os_open_image: /vendor/etc/firmware/fw_bcm4339a0_ag.bin (569309 bytes) open success [ 31.111428] dhd_os_open_image: /vendor/etc/firmware/nvram_AP6335.txt (2366 bytes) open success [ 31.112398] NVRAM version: AP6335_NVRAM_V1.7_04102014 [ 31.113521] dhdsdio_write_vars: Download, Upload and compare of NVRAM succeeded. [ 31.316931] dhd_bus_init: enable 0x06, ready 0x06 (waited 0us) [ 31.317174] bcmsdh_oob_intr_register: HW_OOB irq=97 flags=0x4 [ 31.317369] dhd_get_memdump_info: File [/data/misc/wifi/.memdump.info] doesn't exist [ 31.317385] dhd_get_memdump_info: MEMDUMP ENABLED = 2 [ 31.319685] Disable tdls_auto_op failed. -1 [ 31.319730] dhd_tcpack_suppress_set: TCP ACK Suppress mode 0 -> mode 1 [ 31.320364] dhd_apply_default_clm: Ignore clm file /vendor/etc/firmware/clm_bcm4339a0_ag.blob [ 31.330409] Firmware up: op_mode=0x0005, MAC=f0:25:b7:4c:b3:57 [ 31.348539] Driver: 1.579.77.41.22 (r-20191105-2)(20191120-1) [ 31.348539] Firmware: wl0: Jun 20 2018 18:44:59 version 6.37.45.15 (9b93cd5@shgit) (r) [ 31.348539] CLM: 6.8.1 [ 31.348796] dhd_txglom_enable: enable 1 [ 31.348815] [dhd] dhd_conf_set_txglom_params : txglom_mode=copy [ 31.348826] [dhd] dhd_conf_set_txglom_params : txglomsize=36, deferred_tx_len=0 [ 31.348835] [dhd] dhd_conf_set_txglom_params : txinrx_thres=128, dhd_txminmax=-1 [ 31.348844] [dhd] dhd_conf_set_txglom_params : tx_max_offset=0, txctl_tmo_fix=300 [ 31.348856] [dhd] dhd_conf_get_disable_proptx : fw_proptx=1, disable_proptx=-1 [ 31.349620] dhd_wlfc_hostreorder_init(): successful bdcv2 tlv signaling, 64 [ 31.350768] dhd_pno_init: Support Android Location Service [ 31.394568] dhd_wlfc_enable: ret=0 [ 31.394617] [dhd] CFG80211-ERROR) wl_cfg80211_event : Event handler is not created [ 31.394710] [dhd] CFG80211-ERROR) wl_cfg80211_event : Event handler is not created [ 31.394838] [dhd] CFG80211-ERROR) wl_cfg80211_event : Event handler is not created [ 31.394989] rtt_do_get_ioctl: failed to send getbuf proxd iovar (CMD ID : 1), status=-23 [ 31.395056] dhd_rtt_init : FTM is not supported [ 31.395079] dhd_preinit_ioctls: SensorHub diabled 0 [ 31.395627] dhd_preinit_ioctls failed to set ShubHub disable [ 31.397150] dhd_wl_ioctl_get_intiovar: get int iovar wnm_bsstrans_resp failed, ERR -23 [ 31.397176] failed to get wnm_bsstrans_resp [ 31.397613] failed to set WNM capabilities [ 31.397940] dhd_wlfc_enable: ret=0 [ 31.397945] [dhd] dhd_conf_set_country : set country CN, revision 38 [ 31.397995] [dhd] CFG80211-ERROR) wl_cfg80211_event : Event handler is not created [ 31.398090] [dhd] CFG80211-ERROR) wl_cfg80211_event : Event handler is not created [ 31.398166] [dhd] CFG80211-ERROR) wl_cfg80211_event : Event handler is not created [ 31.400930] [dhd] dhd_conf_set_country : Country code: CN (CN/38) [ 31.404043] [dhd-wlan0] wl_android_wifi_on : Success [ 31.448884] dhd_wlfc_enable: ret=0 [ 31.465613] dhd_open : the lock is released. [ 31.465648] dhd_open: Exit ret=0 [ 31.553852] P2P interface registered [ 31.553893] wl_cfgp2p_add_p2p_disc_if: wdev: 000000006314df58, wdev->net: (null) [ 31.617247] WLC_E_IF: NO_IF set, event Ignored [ 31.618075] P2P interface started [ 31.639233] IPv6: ADDRCONF(NETDEV_UP): wlan0: link is not ready [ 31.643522] [dhd-wlan0] wl_run_escan : LEGACY_SCAN sync ID: 0, bssidx: 0 [ 31.674022] [drm:dw_hdmi_rockchip_set_property] *ERROR* failed to set rockchip hdmi connector property hdmi_color_depth_capacity [ 31.674086] [drm:dw_hdmi_rockchip_set_property] *ERROR* failed to set rockchip hdmi connector property hdmi_output_mode_capacity [ 31.807332] [drm:dw_hdmi_rockchip_set_property] *ERROR* failed to set rockchip hdmi connector property output_type_capacity [ 32.056388] vcc3v3_lcd0_n: disabling [ 32.056435] vcc3v3_lcd1_n: disabling [ 35.013822] [dhd-wlan0] wl_run_escan : LEGACY_SCAN sync ID: 1, bssidx: 0 [ 43.524951] [BT_RFKILL]: rfkill_rk_set_power: set bt wake_host high! [ 43.581939] [BT_RFKILL]: ENABLE UART_RTS [ 43.688552] [BT_RFKILL]: DISABLE UART_RTS [ 43.688684] [BT_RFKILL]: bt turn on power [ 43.688754] [BT_RFKILL]: Request irq for bt wakeup host [ 43.688845] [BT_RFKILL]: ** disable irq big.txt Edited June 8, 2023 by hotnikq 0 Quote
Kenneth Hidalgo Posted June 8, 2023 Posted June 8, 2023 wow I had not been able to open it like this, there is the possibility of increasing the space of the rootfs partition 0 Quote
Kenneth Hidalgo Posted June 8, 2023 Posted June 8, 2023 Is this: mmcblk0p6 179:6 0 6G 0 part / 0 Quote
Hqnicolas Posted June 8, 2023 Author Posted June 8, 2023 (edited) On 6/7/2023 at 9:47 PM, hotnikq said: Linux version 4.19.193 like the image v0.3 on this topic... this image probably from Rockchip it's encrypted with sha256 and use an old kernel can be good to work nativelly baremetal with RKnpu and GPU but i'm looking for something more docker side of things kernel 6.2 is runing amazing, i'm searching for a way to make an image for flash mmc i can create an image with Linux_Pack_Firmware Quote /Downloads/Linux_Pack_Firmware/rockdev$ ./mkupdate.sh start to make update.img... Android Firmware Package Tool v1.66 ------ PACKAGE ------ Add file: ./package-file Add file: ./package-file done,offset=0x800,size=0x1ce,userspace=0x1 Add file: ./Image/MiniLoaderAll.bin Add file: ./Image/MiniLoaderAll.bin done,offset=0x1000,size=0x729c0,userspace=0xe6 Add file: ./Image/parameter.txt Add file: ./Image/parameter.txt done,offset=0x74000,size=0x1aa,userspace=0x1 Add file: ./Image/dtbo.img Add file: ./Image/dtbo.img done,offset=0x74800,size=0x26f,userspace=0x1 Add file: ./Image/uboot.img Add file: ./Image/uboot.img done,offset=0x75000,size=0x400000,userspace=0x800 Add file: ./Image/parameter.txt Add file: ./Image/parameter.txt done,offset=0x475000,size=0x19e,userspace=0x1 Add file: ./Image/rootfs.img Add file: ./Image/rootfs.img done,offset=0x475800,size=0x11f213e00,userspace=0x23e428 Add CRC... Make firmware OK! ------ OK ------ ********RKImageMaker ver 1.66******** Generating new image, please wait... Writing head info... Writing boot file... Writing firmware... Generating MD5 data... MD5 data generated successfully! New image generated successfully! Making ./Image/update.img OK. My image looks like this: /dev/mmcblk1p3: PARTLABEL="trust" PARTUUID="xxx" /dev/mmcblk1p1: PARTLABEL="security" PARTUUID="xxx" /dev/mmcblk1p4: PARTLABEL="baseparameter" PARTUUID="xxx" /dev/mmcblk1p2: PARTLABEL="uboot" PARTUUID="xxx" /dev/mmcblk1p5: PTUUID="xxxx" PTTYPE="gpt" PARTLABEL="root" PARTUUID="xxx" and its reporting on ttl: Scanning mmc 0:4... Failed to iterate over directory extlinux Failed to iterate over directory boot.scr.uimg Failed to iterate over directory boot.scr Failed to iterate over directory boot Failed to iterate over directory boot Failed to iterate over directory boot ## Error: "mtd_boot" not defined ## Error: "mtd_boot" not defined ## Error: "mtd_boot" not defined But i need to change it to something like this to boot from MMC: /dev/mmcblk1p4: UUID="xxx" BLOCK_SIZE="4096" TYPE="ext4" PARTUUID="xxx" /dev/mmcblk1p3: PARTLABEL="trust" PARTUUID="xxx" /dev/mmcblk1p1: PARTLABEL="security" PARTUUID="xxx" /dev/mmcblk1p2: PARTLABEL="uboot" PARTUUID="xxx" and it need to do something like this: Scanning mmc 1:1... Found /boot/extlinux/extlinux.conf Retrieving file: /boot/extlinux/extlinux.conf 320 bytes read in 21 ms (14.6 KiB/s) 1: Armbian Retrieving file: /boot/uInitrd 33353896 bytes read in 2805 ms (11.3 MiB/s) Retrieving file: /boot/Image 27853312 bytes read in 2340 ms (11.4 MiB/s) if i boot from SD card and change it i'ts working, booting from MMC but i'm trying to make a image to share here and use as backup/repair Edited August 27 by Hqnicolas 2 Quote
Kenneth Hidalgo Posted June 8, 2023 Posted June 8, 2023 this image is working for me, the password is linaro, i had to install NTP for date and time, after rebooting the first time it doesn't work reboot, switch user, shutdown 0 Quote
Hqnicolas Posted June 8, 2023 Author Posted June 8, 2023 (edited) dear friends that buy cheap 42U$ tv boxes on chinese scam sites! rk3566 h96MAX ARMBIAN23 kernel6 MMC image it's done. 🏆 help to add other boards in armbian standart, you don't need to be a programmer to help the community, just need a copy of the ARM BOARD and a x86 computer to compile new versions. This is an internal mmc trick 2-step image! You no longer need to solder an SD-card Reader like the creepy Release Version v0.5 BETA that i made. check before if your device has the regulator: fan53555 check before if your device has: tcs4525 check before if your device has: RK809-5 works with 4gb and 8gb devices How to use it: - install RKDevTool Drivers Rockchip - Use RkDevTool v2.86 - Drop Config.cfg the RkDevTool config file on folder Righ click on white background from RKDevTool click on Load Config Select the Config.cfg Step 1: Armbian 23.11 Kernel 6.2 H96 MAX 4GB/32GB Rk3566 Server.img Armbian 23.11 Kernel 6.2 H96 MAX 8GB/64GB Rk3566 Server.img Extract this file.xz with 7zip Extract this file.tar with 7zip Connect Your device: How? press the back button with a toothpick and connect male to male USB to you computer. Flash the Update Image on entire device as an Upgrade Firmware After Complete ! ! Disconect your device ! ! and because I'm lazy and I don't want to work on that damn FIT image anymore. You will need to do a second step: Step 2: Reconnect Your device: How? press the back button with a toothpick and connect male to male USB to you computer. Flash the armbian extracted GPT image inside the MMC gpt partition how: on RkDevTool v2.86 double click the number on table set Address on 0x00000000 set Name on gpt select the root file to flash on the "..." the dot right side of the table........ mark, Write by address after flash, it's done, use HDMI and USB to create user and password, regular armbian install... The Gpt file The Server 4gb Update image The Server 8gb Update image Yes, you can Skip Root flash. But you can drop the v0.7 Root.img file. Please Reflash GPT.img after new Root.img Two Root v0.7 Files: Debian 12 BookWorm Server Minimal ROOT Debian 12 BookWorm Desktop Gnome ROOT Armbian_23.11.0-trunk_Station-m2_jammy_edge_6.2.16_Server_Minimal.img ✔️ Boot from internal MMC ✔️ Runs kernel 6.2 Server ✔️ display video HDMi ✔️ detect internal MMC ✔️ Detect SD-CARD ✔️ Detect USB 2.0 port ✖️ (no USB2.0 on Server Images) Detect USB 3.0 port ✔️ (use a cheap usb hub 3.0) ##################################### END ############################################## ############################### HOT TO CREATE IMAGES ###################################### if you wanna do all that creepy again with other devices and images, (please do it on other devices) and topic this is all you need to create this image, first step: Compile armbian on linux desktop dont forgot to do it with modified DTS file: in this case DTB + DTS Files for you to edit because you want to help the community any resemblance to this topic is mere adaptation Mount that image virtual device like /media/armbian_boot fdisk -l your-armbian-image-for-sd-card.img mount -o loop your-armbian-image-for-sd-card.img /media/armbian_boot if you can't "like WSL2" sudo apt-get install kpartx sudo kpartx -av your-armbian-image-for-sd-card.img sudo mount -o loop /dev/mapper/loop0p1 /media/armbian_boot Second Step: prepare an sd card or usb flash dummy , can be anithing with 6gb fdisk /dev/mmcblk1 N default default (lower this value to match the size of your root image) T 1 W third step: format that flash drive for ext4 mkfs.ext4 /dev/mmcblk1p1 fourth step: mount that clear partition and copy the entire virtual drive to the flash device mount /dev/mmcblk1p1 /mnt rsync -avx --timeout=10 /media/armbian_boot/ /mnt/ fifth Step: Edit your uuid From Armbian Boot config "uuid for /dev/mmcblk1p1" blkid nano -w /mnt/boot/extlinux/extlinux.conf sync umount /mnt sixth step: make an hardware RAW.img from hardware flash drive with these parameters sudo dd if=/dev/mmcblk1p1 of=~/root.img bs=4096 status=progress PS: can be /dev/SDA" I do it on my h96max" so it's mmcblk1 now you have an ROOT IMAGE MADE BY YOURSELF! Update.img CREATE the Update Image on linux with the rockchip software. Linux Pack Rockchip Firmware Quote /Downloads/Linux_Pack_Firmware/rockdev$ ./mkupdate.sh start to make update.img... Android Firmware Package Tool v1.66 ------ PACKAGE ------ Add file: ./package-file Add file: ./package-file done,offset=0x800,size=0x1ce,userspace=0x1 Add file: ./Image/MiniLoaderAll.bin Add file: ./Image/MiniLoaderAll.bin done,offset=0x1000,size=0x729c0,userspace=0xe6 Add file: ./Image/parameter.txt Add file: ./Image/parameter.txt done,offset=0x74000,size=0x1aa,userspace=0x1 Add file: ./Image/dtbo.img Add file: ./Image/dtbo.img done,offset=0x74800,size=0x26f,userspace=0x1 Add file: ./Image/uboot.img Add file: ./Image/uboot.img done,offset=0x75000,size=0x400000,userspace=0x800 Add file: ./Image/parameter.txt Add file: ./Image/parameter.txt done,offset=0x475000,size=0x19e,userspace=0x1 Add file: ./Image/rootfs.img Add file: ./Image/rootfs.img done,offset=0x475800,size=0x11f213e00,userspace=0x23e428 Add CRC... Make firmware OK! ------ OK ------ ********RKImageMaker ver 1.66******** Generating new image, please wait... Writing head info... Writing boot file... Writing firmware... Generating MD5 data... MD5 data generated successfully! New image generated successfully! Making ./Image/update.img OK. ./mkupdate.sh Uboot Legacy, Parameter.txt to create the Rockchip image this process generate two files: File1: Linux_Pack_Firmware/rockdev/Image/update.img File2: Linux_Pack_Firmware/rockdev/update.img I generally use the File2 to flash my device on upgrade Firmware RKDevTool open new topics when performing this procedure on a device other than the H96MAX I will be happy to help This topic is Closed until Kernel 7 i dont wanna talk about RK3566 for the rest of my short life we're running it "Cuban internet style" with 42U$ computers to escape government censorship. i laughed at china, now it happens here in latin america. Edited April 3 by hotnikq 2 Quote
Kenneth Hidalgo Posted June 10, 2023 Posted June 10, 2023 RkDevTool v2.86 how to change language 0 Quote
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