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Posted

No I didn't.
I guess he means line 95 of the 2nd ver of the script (which is line 107 in ver 3)

if [ "$eeprom" -eq "$eeprom_address" ]; then

But his solution " if [ true ]; then " didn't make any sense to me.
(If what is true?!)

 

So I read through the script trying to figure out the logic of it, and to see if I could come up with my own kludge, but it's just a bit beyond my level (my level isn't very high).

Posted

Sorry to sound ignorant and stupid.

 

I have an orange pi pc board running Android 7.

 

I keep having to set the date and time every time i power the board up.

 

I obviously have no ethernet internet connection until i do this.

 

Would this thing stop that from happening?

 

Thank you.

 

Dean

 

Posted
1 hour ago, KiwiChristian said:

Would this thing stop that from happening?


If you are lucky that support for it is enabled in Android.

Posted
1 minute ago, KiwiChristian said:

I thought it would be just plug in and go


It is that way. The problem will be if nothing happens :) We can't help you in reconfiguring and recompiling Amdroid kernel. We don't deal with it.

Posted
Just now, Igor said:


It is that way. The problem will be if nothing happens :) We can't help you in reconfiguring and recompiling Amdroid kernel. We don't deal with it.

I just wish i knew why i have to reset my date and time each time i power my orangepi on.

Posted
6 hours ago, KiwiChristian said:

I just wish i knew why i have to reset my date and time each time i power my orangepi on.

This is because the realtime clock of the Pi is not battery-powered, i.e. after powercycle it resets to factory default. The ds1307/3231 do have battery but need i2c in kernel and additional configuration to be used as main RTC instead of the Pi RTC.

 

In other words, by default the time is stored/restored on Pi RTC.

Posted
7 hours ago, xwiggen said:

This is because the realtime clock of the Pi is not battery-powered, i.e. after powercycle it resets to factory default. The ds1307/3231 do have battery but need i2c in kernel and additional configuration to be used as main RTC instead of the Pi RTC.

 

In other words, by default the time is stored/restored on Pi RTC.

Ah, thank you. I have been trying to work out the problem.

 

BUT, i never USED to have to do this.

 

It is only in the last couple of months.

 

I wasted money on a new orange pi and that does the same thing.

 

One thing i have noticed, it says my sd card ( i assume where android is located ) is corrupt.

 

I may try another sd card, but i only have a 4gb spare at the moment.

Posted
15 hours ago, KiwiChristian said:

Ah, thank you. I have been trying to work out the problem.

 

BUT, i never USED to have to do this.

 

It is only in the last couple of months.

 

I wasted money on a new orange pi and that does the same thing.

 

One thing i have noticed, it says my sd card ( i assume where android is located ) is corrupt.

 

I may try another sd card, but i only have a 4gb spare at the moment.

 

Fake hwclock saves/restores the date on SD in Armbian between reboots, don't know about the specifics in Android.

 

Posted (edited)

Hi @IgorS,

After following the how to's on this forum and the internets, would like to share some other things I did to make it work even better on my OrangePi Zero.

 

  1. Connect DS3231 to TWI0 (PA11+PA12 and +5V/GND of course).
     
  2. Add i2c0 overlay to /boot/armbianEnv.txt (or use armbian-config to enable the i2c0 overlay).
    [...]
    overlays=usbhost2 usbhost3 uart1 pps-gpio i2c0
    [...]

     

  3. Add custom overlay to add DS3231 RTC (using DS3232 module instead of DS1307).
    Spoiler
    /dts-v1/;
    /plugin/;
    
    / {
            compatible = "allwinner,sun4i-a10", "allwinner,sun7i-a20", "allwinner,sun8i-h3", "allwinner,sun50i-a64", "allwinner,sun50i-h5";
    
            /* 
             * Aliases can be used to set the external RTC as rtc0.
             * Needs supplying the correct path to the I2C controller RTC is connected to,
             * this example is for I2C0 on H2+ (TWI0 on PA11/PA12).
             * NOTE: setting time at boot by the kernel
             * may not work in some cases if the external RTC module is loaded too late
             */
            fragment@0 {
                    target-path = "/aliases";
                    __overlay__ {
                            rtc0 = "/soc/i2c@1c2ac00/ds3231@68";
                    };
            };
    
            fragment@1 {
                    target = <&i2c0>;
                    __overlay__ {
                            #address-cells = <1>;
                            #size-cells = <0>;
                            ds3231@68 {
                                    compatible = "dallas,ds3232";
                                    reg = <0x68>;
                                    status = "okay";
                            };
                    };
            };
    
    };

     

    Save as rtc0-i2c0-ds3231.dts.
     

  4. Add the custom DT overlay:
    sudo armbian-add-overlay rtc0-i2c0-ds3231.dts

     

  5. Add custom overlay to rename H2+ SoC RTC to rtc1.
    Spoiler
    /dts-v1/;
    /plugin/;
    
    / {
            compatible = "allwinner,sun4i-a10", "allwinner,sun7i-a20", "allwinner,sun8i-h3", "allwinner,sun50i-a64", "allwinner,sun50i-h5";
    
            /* 
             * Aliases can be used to set the internal RTC as rtc1.
             */
            fragment@0 {
                    target-path = "/aliases";
                    __overlay__ {
                            rtc1 = "/soc/rtc@1f00000";
                    };
            };
    
            fragment@1 {
                    target = <&rtc>;
                    __overlay__ {
                            rtc@1f00000 {
                                    status = "disabled";
                            };
                    };
            };
    };

     

    Save as rtc1-soc.dts.
     

  6. Add the custom DT overlay:
    sudo armbian-add-overlay rtc1-soc.dts

     

  7. Disable fake-hwclock service:
    sudo systemctl stop fake-hwclock.service    # stop
    sudo systemctl disable fake-hwclock.service # disable
    sudo systemctl mask fake-hwclock.service    # really disable
  8. Reboot and verify that you now have 2x RTC on your OrangePi Zero:
    root@sinaspi:~# ls -l /dev/rtc*
    lrwxrwxrwx 1 root root      4 Aug  5 22:57 /dev/rtc -> rtc0
    crw------- 1 root root 253, 0 Aug  5 22:57 /dev/rtc0
    crw------- 1 root root 253, 1 Aug  5 22:57 /dev/rtc1
  9. As mentioned in another post, on the H2+ the SoC supplied RTC is indeed running fast, confirm this as follows:
    for RTC in /dev/rtc[0-9]
    do
    	hwclock --rtc="${RTC:?}" --adjust
    	hwclock --rtc="${RTC:?}" --systohc
    done
    
    sleep $(( 5 * 60 ))
    
    for RTC in /dev/rtc[0-9]
    do
    	echo "${RTC:-N/A}:"
    	hwclock --rtc="${RTC:?}" --get 
    	date --rfc-3339=ns
    done

    On my OrangePi Zero the SoC RTC is dashing ahead:
     

    /dev/rtc0:
    2021-08-08 09:17:52.760046+08:00
    2021-08-08 09:17:52.526062078+08:00
    /dev/rtc1:
    2021-08-08 11:59:11.150733+08:00
    2021-08-08 09:17:54.392611945+08:00

    (rtc0 = DS3231 and rtc1 = SoC RTC.)
     

  10. On the same OrangePi Zero, there is also a GPS receiver connected that has PPS output. Used @Elektrický's how to, to set up GPS and ntpsec. After successfully following the how to, ntp will synchronize and adjust system clock to high(er) accuracy. Once system clock is synchronized, the kernel will also update the RTC (/dev/rtc0) every 11 minutes, giving you a system as follows:

    root@sinaspi:~# timedatectl 
                   Local time: Sun 2021-08-08 09:24:01 CST
               Universal time: Sun 2021-08-08 01:24:01 UTC
                     RTC time: Sun 2021-08-08 01:24:02
                    Time zone: Asia/Taipei (CST, +0800)
    System clock synchronized: yes
                  NTP service: inactive
              RTC in local TZ: no
    
    root@sinaspi:~# ntpq -p
         remote                                   refid      st t when poll reach   delay   offset   jitter
    =======================================================================================================
     0.debian.pool.ntp.org                   .POOL.          16 p    -  256    0   0.0000   0.0000   0.0019
     1.debian.pool.ntp.org                   .POOL.          16 p    -  256    0   0.0000   0.0000   0.0019
     2.debian.pool.ntp.org                   .POOL.          16 p    -  256    0   0.0000   0.0000   0.0019
     3.debian.pool.ntp.org                   .POOL.          16 p    -   64    0   0.0000   0.0000   0.0019
    oPPS(0)                                  .PPS.            0 l   56   64  377   0.0000  -0.0072   0.0035
    xSHM(0)                                  .GPS.            0 l   21   64  377   0.0000 -15.3659   1.7862
    +SHM(2)                                  .PPS.            0 l   18   64  377   0.0000  -0.0163   0.0094
    +europa.ellipse.net                      209.180.247.49   2 u   40   64  377 167.9069  -0.9358   0.1437
    +ntp1.time.nl                            .MRS.            1 u   43   64  377 210.9643   1.7869   0.1945
    +promethee.boudot.one                    94.198.159.10    2 u   21   64  377 220.2528   2.3322   0.0931
    root@sinaspi:~# 

    As the DS3231 is now set as rtc0, the udev rules in /lib/udev/rules.d/85-hwclock.rules will make sure to read the DS3231 clock time after a reboot, making sure your system clock has a nice starting offset after being powered off for a while.

 

Hope this helps anyone out there,

Groetjes,

Edited by djurny
formatting and added link to 11 minute sync

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