Meestor_X Posted 5 hours ago Posted 5 hours ago The Radxa bullseye image looks to boot fine, but Armbian forky does not boot at all. 0 Quote
Meestor_X Posted 12 minutes ago Author Posted 12 minutes ago (edited) Ya, I know, but I haven't figured out how to work with these devices that have "built in" serial->USB adapters. The USBC becomes a serial port when connected to my computer, but that also powers it on, and it's not actually a port until the e25 has power. It's a catch-22. It needs power for the port to appear, and by the time the port appears and you've already missed part of the log. The e20c is much better, it has a separate power and debug port. 🙂 https://www.dropbox.com/scl/fi/u27poqubrg4rywz1xfjo5/IMG_3840.jpeg?rlkey=1mbl58bl8cy0b9i1s3xxjuh6y&dl=0 Edited 8 minutes ago by Meestor_X 0 Quote
Meestor_X Posted 9 minutes ago Author Posted 9 minutes ago (edited) Update... I figured out how to do it. Oh, and the docs show the baud rate to be 115200 like normal devices, but no - it's actually 1500000 baud. ---- Reopened serial port /dev/tty.usbserial-3120 ---- DDR 2d653b3476 typ 24/01/20-15:04:19,fwver: v1.21 In LP4/4x derate en, other dram:1x trefi ddrconfig:7 LPDDR4X, 324MHz BW=32 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=4096MB tdqss: cs0 dqs0: 48ps, dqs1: -48ps, dqs2: 24ps, dqs3: -120ps, tdqss: cs1 dqs0: 48ps, dqs1: -48ps, dqs2: 24ps, dqs3: -96ps, change to: 324MHz PHY dr:clk:36,ca:36,DQ:29,odt:0 vrefinner:24%, vrefout:41% dram drv:40,odt:0 clk skew:0x61 rx vref: 30.4% tx vref: 40.0% change to: 528MHz PHY drv:clk:36,ca:36,DQ:29,odt:0 vrefinner:24%, vrefout:41% dram drv:40,odt:0 clk skew:0x58 rx vref: 34.4% tx vref: 40.0% change to: 80MHz PHY drv:clk:36,ca:36,DQ:29,odt:60 vrefinner:16%, vrefout:41% dram drv:40,odt:0 clk skew:0x58 rx vref: 15.6% tx vref: 40.0% change to: 1560MHz(final freq) PHY drv:clk:36,ca:36,DQ:29,odt:60 vrefinner:16%, vrefout:22% dram drv:40,odt:80 vref_ca:00000071 clk skew:0x17 rx vref: 16.6% tx vref: 22.8% cs 0: the read training result: DQS0:0x35, DQS1:0x36, DQS2:0x35, DQS3:0x2f, min : 0xf 0x11 0x12 0x10 0x2 0x6 0x8 0x6 , 0xe 0xb 0x1 0x3 0xe 0xe 0xe 0xa , 0x10 0x10 0xb 0xa 0x2 0x4 0x6 0x6 , 0xa 0x7 0x4 0x1 0xe 0x11 0xc 0xf , mid :0x29 0x2b 0x2c 0x2a 0x1d 0x20 0x22 0x21 ,0x26 0x26 0x1 0x1e 0x28 0x28 0x28 0x25 , 0x2b 0x2b 0x24 023 0x1b 0x1d 0x1e 0x1f ,0x24 0x20 0x1e 0x1a 0x27 02a 0x25 0x28 , max :0x43 0x45 0x47 0x44 0x38 0x3a 0x3c 0x3d ,0x3e 0x41 0x38 0x39 0x42 0x43 0x43 0x41 , 0x47 0x4 0x3e 0x3d 0x34 0x36 0x36 0x39 ,0x3e 0x3a 0x38 0x34 0x40 0x43 0x3e 0x41 , range:0x34 0x34 0x35 0x34 0x36 0x34 0x34 0x37 ,0x30 0x36 0x37 0x36 0x34 0x35 0x35 0x37 , 0x37 0x37 0x33 0x33 0x32 0x32 0x30 0x33 ,0x34 0x33 0x34 0x33 0x32 0x32 0x32 0x32 , the write training result: DQS0:0x20, DQS1:0xe, DQS2:0x1b, DQS3:0x4, min :0x6f 0x73 0x74 0x71 0x63 0x68 x6a 0x6a 0x68 ,0x5c 0x59 0x52 0x52 0x5d 0x5d 0x5d 0x5b 0x58 , 0x6c 0x6d 0x68 0x68 0x5f 0x5e 0x5d 0x61 0x64 ,0x55 0x51 0x4e 0x4a 0x57 0x59 0x51 0x59 0x4e , mid :0x8b 0x8e 0x8f 0x8b 0x7c 0x82 0x84 0x82 0x81 ,0x76 0x75 0x6d 0x6c 0x78 0x76 0x76 0x75 0x71 , 0x88 0x89 0x81 0x81 0x79 0x76 0x77 0x7a 0x7d ,0x6f 0x6b 0x68 0x62 0x71 0x72 0x6c 0x73 0x68 , max :0xa7 0xa9 0xaa 0xa6 0x96 0x9c 0x9e 0x9a 0x9a ,0x910x91 0x89 0x86 0x93 0x90 0x90 0x8f 0x8b , 0xa5 0xa5 0x9b 0x9a 0x93 0x8f 0x92 0x93 0x97 ,0x89 0x86 0x83 0x7b 0x8c 0x8c 0x87 0x8d 0x83 , range:0x38 0x36 0x36 0x35 0x33 0x34 0x34 0x30 0x32 ,0x35 0x38 0x37 0x34 0x36 0x33 0x33 0x34 0x33 , 0x39 0x38 0x33 0x32 0x34 0x31 0x35 0x32 0x33 ,0x34 0x35 0x35 0x31 0x35 0x33 0x36 0x34 0x35 , cs 1: the read training result: DQS0:0x35, DQS1:0x36, DQS2:0x35, DQS3:0x2f, min : 0xf 0x11 0x12 0x10 0x2 0x6 0x8 0x6 , 0xe 0xb 0x1 0x3 0xe 0xe 0xe 0xa , 0x10 0x10 0b 0xa 0x2 0x4 0x6 0x6 , 0xa 0x7 0x4 0x1 0xe 0x11 0xc 0xf , mid :029 0x2b 0x2c 0x2a 0x1d 0x20 0x22 0x21 ,0x26 0x26 0x1c 0x1e 0x28 0x28 0x28 0x25 , 0x2b 0x2b 0x24 0x23 0x1b 0x1d 0x1e 0x1f ,0x24 0x20 0x1e 0x1a 0x27 0x2a 0x25 0x28 , max :0x43 0x45 0x47 0x44 0x38 0x3a 0x3c 0x3d ,0x3e 0x41 0x38 0x39 0x42 0x43 0x43 0x41 , 0x47 0x47 0x3e 0x3d 0x34 0x36 0x36 0x39 ,0x3e 0x3a 0x38 0x34 0x40 0x43 0x3e 0x41 , range:0x34 0x34 0x35 0x34 0x36 0x34 0x34 0x37 ,0x30 0x36 0x37 0x36 0x34 0x35 0x35 0x37 , 0x37 0x37 0x33 0x33 0x32 0x32 0x30 0x33 ,0x34 0x33 0x34 0x33 0x32 0x32 0x32 0x32 , the write training result: DQS0:0x20, DQS1:0xe, DQS2:0x1b, DQS3:0x4, min :0x6f 0x73 0x74 0x71 0x63 0x68 0x6a 0x6a 0x68 ,0x5c 0x59 0x52 0x52 0x5d 0x5d 0x5d 0x5b 0x58 , 0x6c 0x6d 0x68 0x68 0x5f 0x5e 0x5d 0x61 0x64 ,0x55 0x51 0x4e0x4a 0x57 0x59 0x51 0x59 0x4e , mid :0x8b 0x8e 0x8f 0x8b 0x7c 0x82 0x84 0x82 0x81 ,0x76 0x75 0x6d 0x6c 0x78 0x76 0x76 0x75 0x7 , 0x88 0x89 0x81 0x81 0x79 0x76 0x77 0x7a 0x7d ,0x6f 0x6b 0x68 0x62 0x71 0x72 0x6c 0x73 0x68 , max :0xa7 0xa9 0xaa 0xa6 0x96 0x9c 0x9e 0x9a 0x9a ,0x91 0x91 0x89 0x86 0x93 0x90 0x90 0x8f 0x8b , 0xa5 0xa5 0x9b 0x9a 0x93 0x8f 0x92 0x93 0x97 ,0x89 0x86 0x83 0x7b 0x8c 0x8c 0x87 0x8d 0x83 , range:0x38 0x36 0x36 0x35 0x33 0x34 0x34 0x30 0x32 ,0x35 0x38 0x37 0x34 0x36 0x33 0x33 0x34 0x33 , 0x39 0x38 0x33 0x32 0x34 0x31 0x35 0x32 0x33 ,0x34 0x35 0x35 0x31 0x35 0x33 0x36 0x34 0x35 , CA Training result: cs:0 min :0x55 0x50 0x47 0x42 0x48 0x3f 0x4a ,0x53 0x4a 0x49 0x3f 0x47 0x3e 0x4c , cs0 mid :0x92 0x91 0x84 0x82 0x85 x80 0x78 ,0x8f 0x8c 0x84 0x80 0x83 0x7f 0x7a , cs:0 max :0xcf 0xd2 0xc1 0xc3 0xc2 0xc1 0xa7 ,0xcb 0xce 0xc0 0xc2 0xbf 0xc1 0xa9 , cs:0 range:0x7 0x82 0x7a 0x81 0x7a 0x82 x5d ,0x78 0x84 0x77 0x83 0x78 0x3 0x5d , cs:1 min :0x52 0x54 0x47 0x47 0x47 0x44 0x4e ,0x54 0x4f 0x48 0x47 0x45 0x45 0x4b , cs:1 mid :0x92 0x91 0x86 0x84 0x85 0x81 0x7d ,0x94 0x8d 0x87 0x84 0x84 0x82 0x7b , cs:1 max :0xd3 0xce 0xc6 0xc2 0xc4 0xbe 0xad ,0xd5 0xcc 0xc6 0xc1 0xc3 0xc0 0xab , cs:1 range:0x81 0x7a 0x7f 0x7b 0x7d 0x7a 0x5f ,0x81 0x7d 0x7e 0x7a 0x7e 0x7b 0x60 , out U-Boot SPL board init U-Boot SPL 2017.09_armbian-2017.09-S93fe-P9666-Hbdb5-Vec91-Bbf55-R448a (Nov 06 2025 - 03:5:10) sfc cmd=0fH(6BH-x4) unknown raw ID 0 0 0 unrecognized JEDEC id bytes: 00, 00, 00 Trying to boot from MMC2 No misc partition spl: partition error Trying fit image at 0x4000 sector ## Verified-boot: 0 ## Checking atf-1 0x00040000 ... sha256(b5946ac63d...) + OK ## Checking uboot 0x00a00000 ... sha256(2ba66b66df...) + OK ## Checking fdt 0x00b53a98 ... sha256(e3b0c44298...) + OK fdt_record_loadable: FDT_ERR_BADMAGIC ## Checking atf-2 0xfdcc1000 ... sha256(b8dca786b4...) + OK fdt_record_loadable: FDT_ERR_BADMAGIC ## Checking atf-3 0x0006b000 ... sha256(2f91089eb7...) + OK fdt_record_loadable: FDT_ERR_BADMAGIC ## Checking atf-4 0xfdcce000 ... sha256(86ef885748..) + OK fdt_record_loadable: FDT_ERR_BADMAGIC ## Checing atf-5 0xfdcd0000 ... sha256(0b2b146c60..) + OK fdt_record_loadable FDT_ERR_BADMAGIC ## Checking atf-6 0x00069000 ... sha256(a9a1e63bef...) + OK fdt_record_loadable: FDT_ERR_BADMAGIC Jumping to UBoot(0x00a00000) via ARM Trusted Firmware(0x00040000) Total: 282.455/439.40 ms INFO: reloader serial: 2 NOTICE: BL31: v2.3():v2.3-645-g8cea6ab0b:cl, fwver: v1.44 NOTICE: BL31: Built : 16:36:43, Sep 19 2023 INFO: GICv3 without legacy support detected. INFO: ARM GICv3 driver initialized in EL3 INFO: pmu v1 is valid 220114 INFO: l3 cache partition cfg-0 INF: dfs DDR fsp_param[0].freq_mhz= 1560MHz INFO: dfs DDR fsp_param[1].freq_mhz= 324MHz INFO: dfs DDR fsp_param[2].freq_mhz= 528MHz INFO: dfs DDR fsp_param[3].freq_mhz= 780MHz INFO: Using opteed sec cpu_context! INFO: boot cpu mask: 0 INFO: BL31: Initializing runtime ervices WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK ERROR: Error initializing runtime service opteed_fast INFO: BL31: Preparing for EL3 exit to normal world INFO: Entry point address = 0xa00000 INFO: SPSR = 0x3c9 No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb> initcall sequence 0000000000ad26c0 failed at call 0000000000ac4528 (err=-1) ### ERROR ### Please RESET the board ### Edited 8 minutes ago by Meestor_X 0 Quote
Recommended Posts
Join the conversation
You can post now and register later. If you have an account, sign in now to post with your account.
Note: Your post will require moderator approval before it will be visible.