lime-fan Posted January 25, 2018 Posted January 25, 2018 (edited) I am currently trying to upgrade my kernel from 3.4 to 4.14 and it is working quite well for my needs. But i have a problem i have not found a solution for, i can not set the PE00-11 pins as gpios. Acutally i cant set or configure them at all. I am using the /sys/class... export and writing via echo direction and value. For all other GPIOs it works perfectly fine exept for those 12 (and the IR0-pins PB3 and PB4, those are also not accessible). I tried really a lot already: stripping down the kernel to only the most essential modules, deactivating almost everything in the dts file, using different images... but in essence, as soon as i change from 3.4 to mainline, the PE-pins stop working. Has anyone any clue how i can dig deeper into this or maybe even a solution? Edited January 25, 2018 by lime-fan
Igor Posted January 25, 2018 Posted January 25, 2018 You need to adjust numbers according to: http://linux-sunxi.org/GPIO#Accessing_the_GPIO_pins_through_sysfs_with_mainline_kernel
lime-fan Posted January 25, 2018 Author Posted January 25, 2018 Thanks for this suggestion, but that is what i am already doing: for i in {128..139} ; do echo $i > /sys/class/gpio/export ; done for i in /sys/class/gpio/gpio* ; do echo "out" > $direction ; done for i in /sys/class/gpio/gpio* ; do echo 1 > value ; done if i do this with e.g. 256-277 (PI0-PI21) or 96-123 (PD0-27) or any other pin (exect for PB3 and PB4) this works perfectly fine. If i access the gpios via /dev/mem directly it also does not work (as it does with kernel 3.4). My guess is that this is somehow kernel related because i cound also not use the PG0-PG5-pins until i removed the emmc-support from the kernel. The PE-pins can also be used for CSI but there is no CSI driver for mainline yet. Could this be the reason why those pins cannot be used as gpio? Can i somehow see the memory areas the kernel is reserving or which are blocked by drivers or something?
lime-fan Posted January 25, 2018 Author Posted January 25, 2018 Maybe i got one step further, i dont know At least i now know that the wrong dtb file is loaded. I configured "lime2" (without emmc) but the "lime2-emmc" dtb file is used at bootup. Who decides which dtb is used? Is it u-boot or already the kernel?
Tido Posted January 26, 2018 Posted January 26, 2018 @lime-fan As you upgrade and you are using GPIO this might be of interest for you: ArmbianIO API proposal https://forum.armbian.com/topic/5655-armbianio-api-proposal/ libgpiod-extra "New GPIO Interface for User Space" https://forum.armbian.com/topic/6256-libgpiod-extra-new-gpio-interface-for-user-space/
lime-fan Posted January 26, 2018 Author Posted January 26, 2018 @Tido Thanks for your input, i read all through your links and checked that code. I think my problem is one level deeper as even the direct access to /dev/mem does not work. Seems like something locks the gpios so that gpio_export() function does not work. Maybe i have to try to use gpiod_export() which could override that locks... Has anyone a lime2 with mainline kernel 4.X and working PE-pins?
lime-fan Posted January 27, 2018 Author Posted January 27, 2018 After a lot of searching and debugging i found the reason for this. LDO3 (the CSI0-LDO) is not switched on. Then the PE Register does not get power and the PE pins are not usable. Now i am looking for a way to switch that LDO on. Do i have to do this in the dts files or somewhere else? I know that i can do this using I2C but i think a solution for all A20 users would be better...
lime-fan Posted January 29, 2018 Author Posted January 29, 2018 Thats why LDO3 is switched off (lime2 crash at boot or when LDO3 is activated): http://lists.infradead.org/pipermail/linux-arm-kernel/2016-March/417786.html And there are some patches implementing a solution for this (slow rampup of LDO3 voltage): https://lists.denx.de/pipermail/u-boot/2017-March/282789.html I adapted these patches to work with the current armbian build, i will post them later. PE pins are working now!
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