Testers wanted: Improving THS settings

[tkaiser]

We need you to help us improve THS settings. In case you have a Banana Pi M2+, OPi One, Lite or NanoPi M1 without heatsink and are that experienced to build Armbian images on your own (requires an x86-64 PC/VM running Ubuntu 14.04 or 16.04) or install a new kernel using .debs as outlined below and also want to help developing better settings (less temperatures, more performance in throttling situations) then please read through this whole Github issue here: https://github.com/igorpecovnik/lib/issues/298

 

If you're not already too discouraged by this stuff then we ask you to build/install a new legacy kernel for Orange Pi H3 or Banana Pi M2+ and ensure /boot/script.bin links to the correct variant for your board. Then modify the fex file please as outlined in the last Github comments so that you add a corekeeper section (with Banana Pi M2+ you're already done now) and when you have an OPi One, Lite or NanoPi M1 please modify also dvfs_table and cooler_table as follows

[dvfs_table]
pmuic_type = 1
pmu_gpio0 = port:PL06<1><1><2><1>
pmu_level0 = 11300
pmu_level1 = 1100
max_freq = 1200000000
min_freq = 480000000
LV_count = 4
LV1_freq = 1200000000
LV1_volt = 1300
LV2_freq = 960000000
LV2_volt = 1300
LV3_freq = 912000000
LV3_volt = 1100
LV4_freq = 480000000
LV4_volt = 1100

[cooler_table]
cooler_count = 6
cooler0 = "1200000 4 4294967295 0"
cooler1 = "912000 4 4294967295 0"
cooler2 = "768000 4 4294967295 0"
cooler3 = "720000 3 4294967295 0"
cooler4 = "600000 2 4294967295 0"
cooler5 = "504000 1 4294967295 0"

[corekeeper]
corekeeper_enabled = 1

Then installation of RPi-Monitor is required ('sudo armbianmonitor -r') and also commenting out the core-keeper script in /etc/rc.local. And you also need cpuburn-a7:

 git clone https://github.com/ssvb/cpuburn-arm.git
 cd cpuburn-arm
 gcc -o cpuburn-a7 cpuburn-a7.S
 ./cpuburn-a7

Expected behaviour without the new in-kernel corekeeper is that your board starts to throttle, probably kill (disable) CPU cores while SoC temperature does not exceed 85°C. Area of testing is the behaviour with 'corekeeper_enabled = 1' since Zador experienced in first tests with different settings emergency shutdowns.

 

The test won't do any harm to your hardware since H3 is specified to get as hot as 125°C and our settings lead to an initiated shutdown already with just 100°C (as a comparison: our community THS settings for A64/Pine64 start the shutdown at 108°C instead so there's a huge safety headroom with our H3 testings).

 

In case there are questions open please feel free to ask. And please keep in mind that without help from you users we're not able to improve the settings that might help every user later.

 

BTW: If anybody owning some of the 'larger' Orange Pis that use SY8106A voltage regulator is also willing to test please do so. Like with Banana Pi M2+ only adding the corekeeper section to the fex file is necessary. And then before/after measurements would be interesting. That means installing RPi-Monitor/cpuburn, then running cpuburn-a7 for an hour, and then after stopping cpuburn-a7 you would modify the fex file, deactivate the core-keeper script and simply install the .deb files you'll find at the end of the Github issue followed by a reboot and another hour of testing.

[zador.blood.stained]

Prebuilt kernel: https://www.dropbox.com/sh/d55gb7gfjpaika3/AAB9LjYI4RqrPBGR0uEXWuWta?dl=0

 

For testing it's recommended to disable userspace corekeeper by editing /etc/rc.local

 

Please also post dmesg log here in spoiler and code blocks or on pastebin or similar service.

[tkaiser]

BTW: Tested with Banana Pi M2+ and your new settings. First with unadjusted cooler_table settings. Always switching between 2 and 4 cores. Then I incrementally tried to improve cooler_table settings and ended up with this:

[cooler_table]
cooler_count = 11
cooler0 = "1200000 4 4294967295 0"
cooler1 = "912000 4 4294967295 0"
cooler2 = "720000 4 4294967295 0"
cooler3 = "648000 4 4294967295 0"
cooler4 = "576000 4 4294967295 0"
cooler5 = "480000 4 4294967295 0"
cooler6 = "312000 4 4294967295 0"
cooler7 = "240000 4 4294967295 0"
cooler8 = "240000 3 4294967295 0"
cooler9 = "240000 2 4294967295 0"
cooler10 = "240000 1 4294967295 0"

But to no avail (M2+ has a heatsink attached but I put a piece of foam rubber on top to prevent air circulation and put the board in a small cardboard box to simulate 'enclosures from hell'):

 

 

 

4	240000 MHz	52C	0 (cooler state)
4	240000 MHz	51C	0 (cooler state)
4	240000 MHz	51C	0 (cooler state)
4	240000 MHz	52C	0 (cooler state)
4	240000 MHz	51C	0 (cooler state)
4	912000 MHz	53C	0 (cooler state)
4	912000 MHz	71C	1 (cooler state)
4	720000 MHz	77C	2 (cooler state)
4	720000 MHz	76C	2 (cooler state)
4	720000 MHz	76C	2 (cooler state)
4	720000 MHz	77C	2 (cooler state)
4	720000 MHz	78C	2 (cooler state)
4	720000 MHz	78C	2 (cooler state)
4	720000 MHz	79C	2 (cooler state)
4	720000 MHz	79C	2 (cooler state)
4	720000 MHz	81C	2 (cooler state)
4	720000 MHz	81C	2 (cooler state)
4	720000 MHz	81C	2 (cooler state)
4	720000 MHz	82C	2 (cooler state)
4	720000 MHz	82C	2 (cooler state)
4	720000 MHz	83C	2 (cooler state)
4	720000 MHz	83C	2 (cooler state)
4	720000 MHz	83C	2 (cooler state)
4	720000 MHz	83C	2 (cooler state)
4	720000 MHz	84C	2 (cooler state)
4	648000 MHz	84C	3 (cooler state)
4	720000 MHz	84C	2 (cooler state)
4	720000 MHz	85C	2 (cooler state)
4	648000 MHz	84C	3 (cooler state)
4	648000 MHz	85C	3 (cooler state)
4	720000 MHz	84C	2 (cooler state)
4	648000 MHz	85C	3 (cooler state)
4	648000 MHz	85C	3 (cooler state)
4	720000 MHz	84C	2 (cooler state)
4	648000 MHz	86C	3 (cooler state)
4	648000 MHz	85C	3 (cooler state)
4	648000 MHz	85C	3 (cooler state)
4	648000 MHz	85C	3 (cooler state)
4	648000 MHz	86C	3 (cooler state)
4	648000 MHz	86C	3 (cooler state)
4	648000 MHz	86C	3 (cooler state)
4	648000 MHz	86C	3 (cooler state)
4	648000 MHz	86C	3 (cooler state)
4	648000 MHz	86C	3 (cooler state)
4	648000 MHz	86C	3 (cooler state)
4	648000 MHz	86C	3 (cooler state)
4	648000 MHz	86C	3 (cooler state)
4	648000 MHz	86C	3 (cooler state)
4	648000 MHz	88C	3 (cooler state)
4	648000 MHz	87C	3 (cooler state)
4	648000 MHz	88C	3 (cooler state)
4	648000 MHz	87C	3 (cooler state)
4	648000 MHz	87C	3 (cooler state)
4	648000 MHz	88C	3 (cooler state)
4	648000 MHz	88C	3 (cooler state)
4	648000 MHz	88C	3 (cooler state)
4	648000 MHz	89C	3 (cooler state)
4	648000 MHz	89C	3 (cooler state)
4	648000 MHz	89C	3 (cooler state)
4	648000 MHz	88C	3 (cooler state)
4	648000 MHz	89C	3 (cooler state)
4	576000 MHz	89C	3 (cooler state)
4	648000 MHz	88C	3 (cooler state)
4	648000 MHz	89C	3 (cooler state)
4	648000 MHz	89C	3 (cooler state)
4	648000 MHz	88C	3 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	648000 MHz	88C	3 (cooler state)
4	576000 MHz	89C	4 (cooler state)
4	648000 MHz	90C	3 (cooler state)
4	576000 MHz	89C	4 (cooler state)
4	648000 MHz	89C	3 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	648000 MHz	88C	3 (cooler state)
4	648000 MHz	89C	3 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	648000 MHz	89C	3 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	648000 MHz	89C	3 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	89C	4 (cooler state)
4	648000 MHz	89C	3 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	648000 MHz	89C	3 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	648000 MHz	89C	3 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	648000 MHz	90C	3 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	648000 MHz	89C	3 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	576000 MHz	95C	4 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	94C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	576000 MHz	95C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	97C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	94C	5 (cooler state)
4	576000 MHz	96C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	576000 MHz	95C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	97C	5 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	97C	5 (cooler state)
4	480000 MHz	97C	5 (cooler state)
4	480000 MHz	97C	5 (cooler state)
4	480000 MHz	97C	5 (cooler state)
4	480000 MHz	97C	5 (cooler state)
4	480000 MHz	97C	5 (cooler state)
4	480000 MHz	97C	5 (cooler state)
4	480000 MHz	97C	5 (cooler state)
4	480000 MHz	97C	5 (cooler state)
4	480000 MHz	97C	5 (cooler state)
4	480000 MHz	97C	5 (cooler state)
4	480000 MHz	97C	5 (cooler state)
4	480000 MHz	97C	5 (cooler state)
4	480000 MHz	97C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	97C	5 (cooler state)
4	480000 MHz	97C	5 (cooler state)
4	480000 MHz	97C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	99C	5 (cooler state)
4	480000 MHz	99C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	99C	5 (cooler state)
4	480000 MHz	99C	5 (cooler state)
4	480000 MHz	99C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	99C	5 (cooler state)
4	480000 MHz	99C	5 (cooler state)
4	480000 MHz	99C	5 (cooler state)
4	480000 MHz	98C	5 (cooler state)
4	480000 MHz	99C	5 (cooler state)
4	480000 MHz	99C	5 (cooler state)
4	480000 MHz	99C	5 (cooler state)

Message from syslogd@localhost at May 18 18:22:33 ...
 kernel:[  384.010152] thermal_sys: Critical temperature reached(100 C),shutting down
Connection to 192.168.83.156 closed by remote host.
Connection to 192.168.83.156 closed. 

 

 

 

These were 1 second samples (1st row is count of active CPU cores). And I'm pretty confident that I still don't get how THS and cooler table interact (I had a hope that further throttling will happen to prevent the board being shut down at 100°C)

 

BTW: With the older cooler_table settings and your new in-kernel corekeeper bringing back cores worked just fine and temperature didn't exceeded 90°C that much.

[zador.blood.stained]

BTW: Tested with Banana Pi M2+ and your new settings. First with unadjusted cooler_table settings. Always switching between 2 and 4 cores. Then I incrementally tried to improve cooler_table settings and ended up with this:

But to no avail (M2+ has a heatsink attached but I put a piece of foam rubber on top to prevent air circulation and put the board in a small cardboard box to simulate 'enclosures from hell'):

I don't expect any H3 board to survive at full load in a small box made of anything that doesn't conduct heat well or without enough holes at the top and bottom.

 

BTW: With the older cooler_table settings and your new in-kernel corekeeper bringing back cores worked just fine and temperature didn't exceeded 90°C that much.

In same hellish conditions?

 

BTW, please look at your logs and cooler table. You want cores to be killed at 240MHz, but frequency doesn't go lower than 480 probably due to limits defined in /etc/default/cpufrequtils and/or FEX file DVFS table. 

 

Edit; First 5 lines with 240MHz @ 51-52°C are probably due to data collection starting before cpufrequtils applied its settings.

[hojnikb]

What exactly is the purpose of cooler_table ? 

 

As for finer frequency steps, it would be great, if there was an auto undervolt/underclock script, that would test every defined clock with certain voltage range (for example 1.2Ghz 1.3->1.1V). 

Because this would be automated, lots of people could test it and you guys would get an general idea of what voltages can most boards take at a certain frequency. This way it would be more efficient.

[zador.blood.stained]

What exactly is the purpose of cooler_table ? 

It defines states for throttling when SoC is overheating. First number is desired frequency, second is max. allowed number of cores. 2 other numbers are irrelevant until we start dealing with A80 and other SoC with big.LITTLE architecture.

 

 

As for finer frequency steps, it would be great, if there was an auto undervolt/underclock script, that would test every defined clock with certain voltage range (for example 1.2Ghz 1.3->1.1V). 

Because this would be automated, lots of people could test it and you guys would get an general idea of what voltages can most boards take at a certain frequency. This way it would be more efficient.

It's not that easy since there is no "public" interface for switching voltage without affecting frequency ("online") AFAIK - so your options are either modularizing and disabling sunxi-cpufreq driver or direct memory-mapped registers access.

[hojnikb]

It defines states for throttling when SoC is overheating. First number is desired frequency, second is max. allowed number of cores. 2 other numbers are irrelevant until we start dealing with A80 and other SoC with big.LITTLE architecture.

 

 

It's not that easy since there is no "public" interface for switching voltage without affecting frequency ("online") AFAIK - so your options are either modularizing and disabling sunxi-cpufreq driver or direct memory-mapped registers access.

 

You can always test the setting, write another value to the .bin file, reset the system and repeat the process. It's long and rudimentary, but it could work.

[zador.blood.stained]

You can always test the setting, write another value to the .bin file, reset the system and repeat the process. It's long and rudimentary, but it could work.

Yes, that's why I said "online". With modifying FEX configuration it's not that hard to write automated testing script, but I certainly won't be doing this anytime soon.

[tkaiser]

Edit; First 5 lines with 240MHz @ 51-52°C are probably due to data collection starting before cpufrequtils applied its settings.

 

Nope, minimal allowed cpufreq was/is 240 MHz. I set up an unattended test scenario from /etc/rc.local starting with a 'sleep 60' before firing up cpuburn-a7 and were able to confirm that clockspeed has been reduced back to 240 MHz right now after stopping cpuburn-a7 after 3 minutes.

root@bananapim2plus:/home/tk# cat /etc/default/cpufrequtils 
ENABLE=true
MIN_SPEED=240000
MAX_SPEED=1200000
GOVERNOR=interactive

I fail to understand the relationship between THS settings and cooler table (same problem when playing with Pine64 back then. Single threaded workloads started to throttle already at 80°C while multithreaded stuff exceeded 90°C which is not desirable functionality)

 

BTW: Everything below /sys/devices/system/cpu/cpu0/cpufreq/stats/ seems to be broken with new cpufreq fixes (applies to output of cpufreq-info too).

[m66n]

 

I have an Orange Pi One. I have an acrylic case, but the board is just laying on a table open to ambient air (25.9C). How long should I run cpuburn-a7? The board seems to be staying at 80C, and switching between mostly 912Mhz and sometimes 768Mhz.

[lanefu]

I'm running an Orange Pi One -- no heat sink, open sitting on my desk.    I built latest legacy armbian kernel via armbian build process.  Folllowed instructions for fex settings, etc.

 

I've been running cpuburn for over an hour, and here's the bottom of my log.. I'll run overnight and post on a gist or something

 

It's been holding steady with these numbers for at least 30 minutes

23:43:33:  912MHz  4.01 100%   0%  99%   0%   0%   0%   78°C
23:43:38:  912MHz  4.01 100%   0%  99%   0%   0%   0%   78°C
23:43:43:  912MHz  4.01 100%   0%  99%   0%   0%   0%   78°C
23:43:48:  912MHz  4.01 100%   0%  99%   0%   0%   0%   77°C
23:43:53:  912MHz  4.01 100%   0%  99%   0%   0%   0%   77°C
23:43:59:  912MHz  4.01  99%   1%  98%   0%   0%   0%   78°C
23:44:04:  912MHz  4.01  99%   0%  99%   0%   0%   0%   78°C
23:44:09:  912MHz  4.01  99%   0%  99%   0%   0%   0%   77°C
23:44:14:  912MHz  4.01  99%   0%  99%   0%   0%   0%   77°C
23:44:19:  912MHz  4.00  99%   0%  99%   0%   0%   0%   78°C
23:44:24:  912MHz  4.00 100%   0%  99%   0%   0%   0%   78°C
23:44:29:  912MHz  4.00 100%   0%  99%   0%   0%   0%   78°C
23:44:34:  912MHz  4.00  99%   0%  99%   0%   0%   0%   78°C
23:44:40:  912MHz  4.00  99%   0%  99%   0%   0%   0%   78°C
23:44:45:  912MHz  4.00  99%   0%  99%   0%   0%   0%   78°C
23:44:50:  912MHz  4.08  99%   0%  99%   0%   0%   0%   78°C
23:44:55:  912MHz  4.07 100%   0%  99%   0%   0%   0%   78°C
23:45:00:  912MHz  4.06 100%   0%  99%   0%   0%   0%   77°C
23:45:05:  912MHz  4.06  99%   0%  98%   0%   0%   0%   78°C
23:45:10:  912MHz  4.05  99%   0%  98%   0%   0%   0%   78°C
23:45:15:  912MHz  4.05  99%   0%  98%   0%   0%   0%   78°C
23:45:21:  912MHz  4.05 100%   0%  99%   0%   0%   0%   78°C

 

 

And Since I had already let it run overnight.. here's a graph of it holding steady just because

 

[tkaiser]

@All: Thanks for the tests so far. Running cpuburn-a7 for an hour should be enough to get valid results.

 

@Zador: Update on BPi M2+ in 'enclosure from hell'. I modified THS settings too and am now closer to a satisfying result:

 

 

4	576000 MHz	90C	4 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	94C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	93C	5 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	90C	5 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	576000 MHz	95C	4 (cooler state)
4	312000 MHz	93C	6 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	312000 MHz	93C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	576000 MHz	95C	4 (cooler state)
4	312000 MHz	94C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	94C	5 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	93C	5 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	480000 MHz	94C	5 (cooler state)
4	576000 MHz	95C	4 (cooler state)
4	240000 MHz	94C	7 (cooler state)
4	576000 MHz	89C	4 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	312000 MHz	94C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	312000 MHz	90C	5 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	312000 MHz	94C	6 (cooler state)
4	576000 MHz	89C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	312000 MHz	94C	6 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	576000 MHz	95C	4 (cooler state)
4	312000 MHz	94C	5 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	240000 MHz	96C	7 (cooler state)
4	480000 MHz	90C	5 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	312000 MHz	90C	6 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	312000 MHz	94C	6 (cooler state)
4	576000 MHz	89C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	312000 MHz	91C	6 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	94C	5 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	240000 MHz	96C	7 (cooler state)
4	480000 MHz	88C	5 (cooler state)
4	576000 MHz	95C	4 (cooler state)
4	312000 MHz	94C	6 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	240000 MHz	96C	7 (cooler state)
4	480000 MHz	90C	5 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	312000 MHz	96C	6 (cooler state)
4	480000 MHz	90C	5 (cooler state)
4	576000 MHz	95C	4 (cooler state)
4	240000 MHz	94C	6 (cooler state)
4	576000 MHz	89C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	240000 MHz	96C	7 (cooler state)
4	480000 MHz	89C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	480000 MHz	90C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	89C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	95C	4 (cooler state)
4	240000 MHz	95C	7 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	89C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	312000 MHz	90C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	240000 MHz	96C	7 (cooler state)
4	480000 MHz	90C	5 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	240000 MHz	96C	7 (cooler state)
4	480000 MHz	90C	5 (cooler state)
4	576000 MHz	95C	4 (cooler state)
4	240000 MHz	94C	7 (cooler state)
4	480000 MHz	89C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	312000 MHz	94C	6 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	312000 MHz	91C	6 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	312000 MHz	91C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	240000 MHz	96C	7 (cooler state)
4	480000 MHz	90C	5 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	240000 MHz	96C	7 (cooler state) 

 

 

 

THS/cooler settings as follows: 

 

 

 

[ths_para]
ths_used = 1
ths_trip1_count = 8
ths_trip1_0 = 60
ths_trip1_1 = 75
ths_trip1_2 = 85
ths_trip1_3 = 90
ths_trip1_4 = 95
ths_trip1_5 = 96
ths_trip1_6 = 97
ths_trip1_7 = 100
ths_trip1_0_min = 0
ths_trip1_0_max = 1
ths_trip1_1_min = 1
ths_trip1_1_max = 2
ths_trip1_2_min = 2
ths_trip1_2_max = 3
ths_trip1_3_min = 3
ths_trip1_3_max = 4
ths_trip1_4_min = 4
ths_trip1_4_max = 6
ths_trip1_5_min = 6
ths_trip1_5_max = 8
ths_trip1_6_min = 8
ths_trip1_6_max = 10
ths_trip1_7_min = 0
ths_trip1_7_max = 0
ths_trip2_count = 1
ths_trip2_0 = 105

[cooler_table]
cooler_count = 11
cooler0 = "1200000 4 4294967295 0"
cooler1 = "912000 4 4294967295 0"
cooler2 = "720000 4 4294967295 0"
cooler3 = "648000 4 4294967295 0"
cooler4 = "576000 4 4294967295 0"
cooler5 = "480000 4 4294967295 0"
cooler6 = "312000 4 4294967295 0"
cooler7 = "240000 4 4294967295 0"
cooler8 = "240000 3 4294967295 0"
cooler9 = "240000 2 4294967295 0"
cooler10 = "240000 1 4294967295 0"

 

 

 

The highest defined ths_trip1_ value (ths_trip1_7 in my case) defines the temperature where a shutdown is initiated so increasing this by a few degree (so that it matches trip2 value) should be ok. Regarding corekeeper: a little bit later the first CPU core got killed and since cooler_state isn't getting below 3 it remains there as long as cpuburn is running:

3	576000 MHz	91C	4 (cooler state)
3	576000 MHz	92C	4 (cooler state)
3	576000 MHz	92C	4 (cooler state)
3	576000 MHz	92C	4 (cooler state)
3	576000 MHz	91C	4 (cooler state)
3	576000 MHz	92C	4 (cooler state)
3	576000 MHz	91C	4 (cooler state)
3	576000 MHz	92C	4 (cooler state)
3	576000 MHz	92C	4 (cooler state)
3	576000 MHz	92C	4 (cooler state)
3	576000 MHz	91C	4 (cooler state)
3	576000 MHz	91C	4 (cooler state)
3	576000 MHz	92C	4 (cooler state)

After stopping cpuburn-a7 the 4th CPU core came back immediately and I'm fine with these settings since they should be samewhat failsave after increasing ths_trip1_7 = 105 (and maybe increasing the two trip points before just a little bit too: 97°C and 99°C for example)

 

 

EDIT: Adjusted it that way so that it now reads

[ths_para]
ths_used = 1
ths_trip1_count = 8
ths_trip1_0 = 60
ths_trip1_1 = 75
ths_trip1_2 = 85
ths_trip1_3 = 90
ths_trip1_4 = 95
ths_trip1_5 = 97
ths_trip1_6 = 99
ths_trip1_7 = 105
ths_trip1_0_min = 0
ths_trip1_0_max = 1
ths_trip1_1_min = 1
ths_trip1_1_max = 2
ths_trip1_2_min = 2
ths_trip1_2_max = 3
ths_trip1_3_min = 3
ths_trip1_3_max = 4
ths_trip1_4_min = 4
ths_trip1_4_max = 6
ths_trip1_5_min = 6
ths_trip1_5_max = 8
ths_trip1_6_min = 8
ths_trip1_6_max = 10
ths_trip1_7_min = 0
ths_trip1_7_max = 0
ths_trip2_count = 1
ths_trip2_0 = 105

[cooler_table]
cooler_count = 11
cooler0 = "1200000 4 4294967295 0"
cooler1 = "912000 4 4294967295 0"
cooler2 = "720000 4 4294967295 0"
cooler3 = "648000 4 4294967295 0"
cooler4 = "576000 4 4294967295 0"
cooler5 = "480000 4 4294967295 0"
cooler6 = "312000 4 4294967295 0"
cooler7 = "240000 4 4294967295 0"
cooler8 = "240000 3 4294967295 0"
cooler9 = "240000 2 4294967295 0"
cooler10 = "240000 1 4294967295 0"

Works both good in 'enclosure from hell' and just with a heatsink and some airflow possible. Then it looks like this (at least a heatsink is a basic requirement for using Banana Pi M2+ since otherwise the SoC overheats way too easy):

 

 

 

4	312000 MHz	93C	5 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	94C	5 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	94C	5 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	91C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	91C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	312000 MHz	96C	6 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	312000 MHz	96C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	95C	4 (cooler state)
4	312000 MHz	94C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	95C	4 (cooler state)
4	312000 MHz	94C	5 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	94C	5 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	94C	5 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	91C	5 (cooler state)
4	576000 MHz	95C	4 (cooler state)
4	312000 MHz	94C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	312000 MHz	96C	6 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	312000 MHz	96C	6 (cooler state)
4	480000 MHz	91C	5 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	91C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	92C	5 (cooler state)
4	576000 MHz	95C	4 (cooler state)
4	312000 MHz	94C	5 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	95C	4 (cooler state)
4	312000 MHz	94C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	91C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	94C	5 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	91C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	92C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	94C	5 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	312000 MHz	96C	6 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	94C	5 (cooler state)
4	576000 MHz	95C	4 (cooler state)
4	312000 MHz	94C	6 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	91C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	312000 MHz	96C	6 (cooler state)
4	480000 MHz	91C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	91C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	92C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	94C	5 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	312000 MHz	96C	6 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	91C	5 (cooler state)
4	576000 MHz	95C	4 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	480000 MHz	90C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	312000 MHz	96C	6 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	94C	5 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	96C	4 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	480000 MHz	90C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	312000 MHz	96C	6 (cooler state)
4	480000 MHz	91C	5 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	91C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	312000 MHz	91C	5 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	94C	5 (cooler state)
4	576000 MHz	95C	4 (cooler state)
4	312000 MHz	94C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	91C	5 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	312000 MHz	94C	5 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	312000 MHz	96C	6 (cooler state)
4	480000 MHz	92C	5 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	91C	5 (cooler state)
4	576000 MHz	95C	4 (cooler state)
4	312000 MHz	94C	6 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	312000 MHz	96C	6 (cooler state)
4	480000 MHz	92C	5 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	94C	5 (cooler state)
4	576000 MHz	95C	4 (cooler state)
4	312000 MHz	94C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	312000 MHz	91C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	480000 MHz	94C	5 (cooler state)
4	576000 MHz	93C	4 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	480000 MHz	94C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	312000 MHz	92C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	96C	4 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	89C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	312000 MHz	96C	6 (cooler state)
4	480000 MHz	91C	5 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	312000 MHz	91C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	96C	4 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	480000 MHz	89C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	312000 MHz	96C	6 (cooler state)
4	480000 MHz	91C	5 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	576000 MHz	96C	4 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	480000 MHz	90C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	312000 MHz	96C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	576000 MHz	95C	4 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	480000 MHz	90C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	312000 MHz	96C	6 (cooler state)
4	576000 MHz	91C	4 (cooler state)
4	480000 MHz	95C	5 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	90C	4 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	312000 MHz	96C	6 (cooler state)
4	480000 MHz	90C	5 (cooler state)
4	576000 MHz	94C	4 (cooler state)
4	480000 MHz	96C	5 (cooler state)
4	312000 MHz	91C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state)
4	312000 MHz	95C	6 (cooler state)
4	576000 MHz	92C	4 (cooler state) 

 

 

 

Dmesg output at the end of armhwinfo.log: http://sprunge.us/MBbc

[zador.blood.stained]

I fail to understand the relationship between THS settings and cooler table (same problem when playing with Pine64 back then. Single threaded workloads started to throttle already at 80°C while multithreaded stuff exceeded 90°C which is not desirable functionality)

Since it looks like THS setings directly reference cooler states, it's a good idea to map cooler_table to THS settings.

 

[ths_para]
ths_used = 1
ths_trip1_count = 8
ths_trip1_0 = 60
ths_trip1_1 = 75
ths_trip1_2 = 85
ths_trip1_3 = 90
ths_trip1_4 = 95
ths_trip1_5 = 96
ths_trip1_6 = 97
ths_trip1_7 = 100
ths_trip1_0_min = 0
ths_trip1_0_max = 1
ths_trip1_1_min = 1
ths_trip1_1_max = 2
ths_trip1_2_min = 2
ths_trip1_2_max = 3
ths_trip1_3_min = 3
ths_trip1_3_max = 4
ths_trip1_4_min = 4
ths_trip1_4_max = 6
ths_trip1_5_min = 6
ths_trip1_5_max = 8
ths_trip1_6_min = 8
ths_trip1_6_max = 10
ths_trip1_7_min = 0
ths_trip1_7_max = 0
ths_trip2_count = 1
ths_trip2_0 = 105

[ths_para]
ths_used = 1
ths_trip1_count = 8
ths_trip1_0 = 60
ths_trip1_1 = 75
ths_trip1_2 = 85
ths_trip1_3 = 90
ths_trip1_4 = 95
ths_trip1_5 = 97
ths_trip1_6 = 99
ths_trip1_7 = 105
ths_trip1_0_min = 0
ths_trip1_0_max = 1
ths_trip1_1_min = 1
ths_trip1_1_max = 2
ths_trip1_2_min = 2
ths_trip1_2_max = 3
ths_trip1_3_min = 3
ths_trip1_3_max = 4
ths_trip1_4_min = 4
ths_trip1_4_max = 6
ths_trip1_5_min = 6
ths_trip1_5_max = 8
ths_trip1_6_min = 8
ths_trip1_6_max = 10
ths_trip1_7_min = 0
ths_trip1_7_max = 0
ths_trip2_count = 1
ths_trip2_0 = 105

Bad news: THS table is limited to 7 points for trip1 and it's even uglier than other limits

 

 

	sunxi_trip_data_1.trip_count = ths_info.trip1_count;
	sunxi_trip_data_1.trip_val[0] = ths_info.trip1_0;
	sunxi_trip_data_1.trip_val[1] = ths_info.trip1_1;
	sunxi_trip_data_1.trip_val[2] = ths_info.trip1_2;
	sunxi_trip_data_1.trip_val[3] = ths_info.trip1_3;
	sunxi_trip_data_1.trip_val[4] = ths_info.trip1_4;
	sunxi_trip_data_1.trip_val[5] = ths_info.trip1_5;
	sunxi_trip_data_1.trip_val[6] = ths_info.trip1_6;
	sunxi_trip_data_1.trip_val[7] = ths_info.trip1_7;

	sunxi_cooling_data_1.freq_clip_count = ths_info.trip1_count-1;
	sunxi_cooling_data_1.freq_data[0].freq_clip_min = ths_info.trip1_0_min;
	sunxi_cooling_data_1.freq_data[0].freq_clip_max = ths_info.trip1_0_max;
	sunxi_cooling_data_1.freq_data[0].temp_level = ths_info.trip1_0;
	sunxi_cooling_data_1.freq_data[1].freq_clip_min = ths_info.trip1_1_min;
	sunxi_cooling_data_1.freq_data[1].freq_clip_max = ths_info.trip1_1_max;
	sunxi_cooling_data_1.freq_data[1].temp_level = ths_info.trip1_1;
	sunxi_cooling_data_1.freq_data[2].freq_clip_min = ths_info.trip1_2_min;
	sunxi_cooling_data_1.freq_data[2].freq_clip_max = ths_info.trip1_2_max;
	sunxi_cooling_data_1.freq_data[2].temp_level = ths_info.trip1_2;
	sunxi_cooling_data_1.freq_data[3].freq_clip_min = ths_info.trip1_3_min;
	sunxi_cooling_data_1.freq_data[3].freq_clip_max = ths_info.trip1_3_max;
	sunxi_cooling_data_1.freq_data[3].temp_level = ths_info.trip1_3;
	sunxi_cooling_data_1.freq_data[4].freq_clip_min = ths_info.trip1_4_min;
	sunxi_cooling_data_1.freq_data[4].freq_clip_max = ths_info.trip1_4_max;
	sunxi_cooling_data_1.freq_data[4].temp_level = ths_info.trip1_4;
	sunxi_cooling_data_1.freq_data[5].freq_clip_min = ths_info.trip1_5_min;
	sunxi_cooling_data_1.freq_data[5].freq_clip_max = ths_info.trip1_5_max;
	sunxi_cooling_data_1.freq_data[5].temp_level = ths_info.trip1_5;
	sunxi_cooling_data_1.freq_data[6].freq_clip_min = ths_info.trip1_6_min;
	sunxi_cooling_data_1.freq_data[6].freq_clip_max = ths_info.trip1_6_max;
	sunxi_cooling_data_1.freq_data[6].temp_level = ths_info.trip1_6; 

 

 

 

Edit: And 2-3°C difference is too small for trip points where core killing might happen. This may lead to killing and bringing back cores almost every 10 seconds.

[tkaiser]

Bad news: THS table is limited to 7 points for trip1 and it's even uglier than other limits 

 

Ok, that means we can use ths_trip1_0 to ths_trip1_6 to define throttling steps (referencing different cooler_table entries as min and max values) and ths_trip1_7 will be used as shutdown treshold. And I also experienced "killing and bringing back cores almost every 10 seconds" before I adjusted cooler_table in a way that killing CPU cores only happens as last resort at the minimum allowed cpufreq (240 MHz on M2+ and as proposed an hour ago on Github I would now do the same with OPi One/Lite and Nano Pi M1 at 480 MHz).

 

With these settings killing of CPU cores happens at a very high cooler_state value and then the killed core doesn't come back immediately since the system running on 3 cores is still too hot (at least my experience with M2+, has to be confirmed by OPi One and NanoPi M1 users with the aforementioned settings)

[m66n]

I modified orangepione.fex to reflect the values in this GitHub comment and reran ./compile.sh to generate an Orange Pi One image. Here's a graph of that:

 

 

The ambient temperature is 23.1C.

[tkaiser]

I modified orangepione.fex to reflect the values in this GitHub comment and reran ./compile.sh to generate an Orange Pi One image. Here's a graph of that

 

Thx for the update. So on your OPi One (still without heatsink?) with these settings the board almost immediately switches to 912 MHz @ 1.1V while temperature does not even reach 80°C. IMO we still use very conservative settings

 

In case you want to try out a new round of settings (BTW: no need to rerun compile.sh any more since you can directly modify /boot/bin/orangepione.bin by temporarely converting it back to fex using bin2fex /boot/bin/orangepione.bin /boot/bin/orangepione.fex and then overwriting the .bin file using fex2bin the other way around followed by a reboot) you could give this a try (first trip point increased by 10°C, also cooler_table settings increased):

[ths_para]
ths_used = 1
ths_trip1_count = 6
ths_trip1_0 = 80
ths_trip1_1 = 85
ths_trip1_2 = 90
ths_trip1_3 = 95
ths_trip1_4 = 100
ths_trip1_5 = 105
ths_trip1_6 = 0
ths_trip1_7 = 0
ths_trip1_0_min = 0
ths_trip1_0_max = 1
ths_trip1_1_min = 1
ths_trip1_1_max = 2
ths_trip1_2_min = 2
ths_trip1_2_max = 3
ths_trip1_3_min = 3
ths_trip1_3_max = 4
ths_trip1_4_min = 4
ths_trip1_4_max = 5
ths_trip1_5_min = 5
ths_trip1_5_max = 7
ths_trip1_6_min = 0
ths_trip1_6_max = 0
ths_trip2_count = 1
ths_trip2_0 = 105

[cooler_table]
cooler_count = 8
cooler0 = "1200000 4 4294967295 0"
cooler1 = "1008000 4 4294967295 0"
cooler2 = "816000 4 4294967295 0"
cooler3 = "648000 4 4294967295 0"
cooler4 = "480000 4 4294967295 0"
cooler5 = "480000 3 4294967295 0"
cooler6 = "480000 2 4294967295 0"
cooler7 = "480000 1 4294967295 0"

BTW: We should always keep in mind that cpuburn-a7 is a really heavy workload therefore it would make some sense to compare with more typical 'full load' situations also. A good try would be to use sysbench and after that cpuburn:

sysbench --test=cpu --cpu-max-prime=100000 run --num-threads=4 && cpuburn-a7

[m66n]

Yes, the previous run was 912 Mhz @ 1.1 V exclusively. I've ordered a heat sink because I was hitting 93C (making Guile 2.0.11 from source) with a build from 11 May, but it hasn't arrived yet. Here is a shot of my OPi One setup:

 

 

It's resting on a silicone coaster on a coffee table open to the air in the room. I changed the fex file settings as indicated:

 

 

From 12:32 to 13:01, I ran configure and make -j 5 on Ruby 2.31 source code, then sysbench to 13:32, and finally cpuburn-a7.

[tkaiser]

Thx for the update.

 

Obviously 'make -j5' with Ruby sources is light enough to run at 1200 MHz without heatsink, sysbench ran at 960 MHz @ 1.3V (with the former settings I would believe it would be 912 MHz @ 1.1V) and it's somewhat hard to tell whether really heavy workloads like cpuburn-a7 'perform' better with the older settings or not. Temperatures are higher, VDD_CPUX voltage switches between 1.1V and 1.3V constantly but we see also throttling down to 720 MHz which looks counterproductive.

 

Anyway: The purpose of this test was whether the new in-kernel core-keeper approach (bringing back killed CPU cores when thermal situation is OK again) works or not. And in both your and @lanefu's tests count of active CPU cores never went below 4.

 

Maybe you're able to simulate 'enclosure from hell' putting the board into the enclosure and limit airflow possible above H3 to the minimum? And then provide sysbench and cpuburn results again?

[m66n]

I put the board into a plastic enclosure and jammed a cotton ball above the processor. cpuburn-a7 has been running for over an hour and the temperature won't go above 97°C. CPU frequency toggles between 480 and 648 Mhz.

 

[dony71]

sorry, i'm newbie on this

where can i find the log file to check cooler_state value?

on rpi monitor, it shows core went to 3 while hit ~98C

but it never come back to 4 core 

 

[tkaiser]

where can i find the log file to check cooler_state value?

 

I used a script I've already thrown away to be able to query in 1 sec interval. Simply use RPi-Monitor instead. When CPU cores don't come back then probably neither the userspace core-keeper.sh script was running nor the in-kernel core-keeper (that requires changes tof the fex as can be seen in the 1st post).

 

Anyway: Xunlong is said to sent out a few OPi Lite to Armbian devs so we're able to do some testing on our own soon (which might be more efficient than asking our users for help). At the moment we have only one Orange Pi One I bought back in February that shows wrong thermal readouts so experiences made with this device are questionable. But fortunately this will change soon.

[lanefu]

I have 2 Opi Ones if additional testing is needed. one with heatsink one without. i have a 2e coming also

 

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